Add QSPIMEM_QUADDATA to the QSPI memory flags. This flag selects quad
data width while keeping the address phase on a single line (1-1-4),
which QSPIMEM_QUADIO cannot express (it forces quad on both address and
data phases). Update stm32_qspi_memory() to honour the new flag by
setting CCR_DMODE_QUAD without touching the address mode.
Signed-off-by: Sammy Tran <sammytran@geotab.com>
struct gran_s and struct graninfo_s store granule counts in uint16_t.
Reject pools whose computed granule count exceeds UINT16_MAX,
instead of truncating the count and creating an invalid handle.
Signed-off-by: shichunma <shichunma@bestechnic.com>
1. The .kasan.unused and .kasan.global sections contain compiler-generated
data with the WRITE flag (.data..LASAN*), but the linker script placed
them before .text without specifying a memory region. The linker could
not put writable sections into the read-only ROM (rx) region, so it
silently placed them at 0x40000000 in RAM, creating an extra LOAD
segment that conflicts with QEMU virt's RAM layout and causes boot
failure.
2. The .kasan.global should be placed before .data because .data
patten (*(.data*)) includes .kasan.global pattern (*(.data..LASAN0)),
and it cause kasan_global.py cannot find .kasan.global section to
generate the g_global_region array.
3. Move .kasan.shadows from before .text to after .rodata. Placing it
before .text causes .text to shift when .kasan.shadows transitions
from empty (pass 1) to populated (pass 2+), preventing the multi-pass
link addresses from converging. After .rodata it does not affect any
upstream section addresses.
4. Add CMake post-build step to strip .kasan.unused and .kasan.global
sections from the final binary, matching the Makefile build behavior.
Signed-off-by: leisiji <2265215145@qq.com>
When CONFIG_BUILD_KERNEL is enabled, user-space and kernel-space have
separate address spaces. User-space addresses passed via syscalls
(e.g., open) are registered by KASAN but should not be monitored,
as they are not kernel heap allocations. This causes KASAN to
report false positives on user-space pointers accessed through
system calls.
Mark the user-space heap with nokasan=true so KASAN skips checking
its address range, consistent with how rptun already handles this.
Signed-off-by: leisiji <2265215145@qq.com>
When CONFIG_MM_KASAN_GLOBAL is enabled, hook.c is also linked into
libmm.a. However, g_global_region (defined in global.c) is only
injected into the nuttx ELF by kasan_global.py — it does not process
the app binary. This causes undefined symbol errors when linking an
app against libmm.a.
Guard the inclusion of global.c with __KERNEL__ so that only kernel
builds pull in the global KASAN region, while app builds fall back
to the no-op stub.
Signed-off-by: leisiji <2265215145@qq.com>
This file does not build with minor modifications due to nxstyle issues.
Adding symbols to the white_content_list to address_this.
Testing: "gcc -o nxstyle nxstyle.c" builds fine.
Signed-off-by: Catalin Visinescu <catalin_visinescu@yahoo.com>
Invalid data is passed to the NXP Plug & Trust Nano Package used by the
NuttX secure element driver. If the NXP code is not handling the malformed
data, a corruption can occur. Alternatively, if the attacker is able to
point create_signature_args->algorithm in memory at an address that is not
accessible, a crash can occur.
Applicable to:
* `signature_algorithm_mapping[create_signature_args->algorithm]`
* `signature_algorithm_mapping[verify_signature_args->algorithm]`
Signed-off-by: Catalin Visinescu <catalin_visinescu@yahoo.com>
Provide correct pin name BOARD_LED1 and associated bit mask
BOARD_LED1_BIT. Also use non-negated `ledon`. Add initialization into
bringup code.
Signed-off-by: Martin Vajnar <martin.vajnar@gmail.com>
Move the stm32l1 sources, headers and boards into arch/arm/src/stm32l1,
arch/arm/include/stm32l1 and boards/arm/stm32l1, then finalize the split:
source each split family directly in arch/arm/Kconfig and boards/Kconfig and
remove the now-empty combined arch/arm/src/stm32 and boards/arm/stm32 trees.
BREAKING CHANGE: The legacy STM32 architecture and board paths were split into
stm32f1, stm32l1, stm32f2, stm32f3, stm32f4, and stm32g4 directories.
Out-of-tree boards must move from stm32 to the matching split family.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE:
Part of splitting the legacy stm32 super-directory; relocates
the stm32g4 sources, headers and boards into arch/arm/src/stm32g4,
arch/arm/include/stm32g4 and boards/arm/stm32g4.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE:
Part of splitting the legacy stm32 super-directory; relocates
the stm32f4 sources, headers and boards into arch/arm/src/stm32f4,
arch/arm/include/stm32f4 and boards/arm/stm32f4.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE:
Part of splitting the legacy stm32 super-directory; relocates
the stm32f3 sources, headers and boards into arch/arm/src/stm32f3,
arch/arm/include/stm32f3 and boards/arm/stm32f3.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE:
Part of splitting the legacy stm32 super-directory; relocates
the stm32f2 sources, headers and boards into arch/arm/src/stm32f2,
arch/arm/include/stm32f2 and boards/arm/stm32f2.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE:
Part of splitting the legacy stm32 super-directory; relocates
the stm32f1 sources, headers and boards into arch/arm/src/stm32f1,
arch/arm/include/stm32f1 and boards/arm/stm32f1.
Signed-off-by: raiden00pl <raiden00@railab.me>
Move the stm32c0 sources, headers and boards into arch/arm/src/stm32c0,
arch/arm/include/stm32c0 and boards/arm/stm32c0, then finalize the split:
source each split family directly in arch/arm/Kconfig and boards/Kconfig and
remove the now-empty combined arch/arm/src/stm32f0l0g0 and
boards/arm/stm32f0l0g0 trees.
BREAKING CHANGE: The combined STM32F0/L0/G0/C0 architecture and board
paths were split into stm32f0, stm32l0, stm32g0, and stm32c0 directories.
Out-of-tree boards, include paths, source paths, and defconfigs must move
from stm32f0l0g0 to the matching split family.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE:
Part of splitting the legacy stm32 super-directory; relocates
the stm32g0 sources, headers and boards into arch/arm/src/stm32g0,
arch/arm/include/stm32g0 and boards/arm/stm32g0.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE:
Part of splitting the legacy stm32 super-directory; relocates
the stm32l0 sources, headers and boards into arch/arm/src/stm32l0,
arch/arm/include/stm32l0 and boards/arm/stm32l0.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE:
Part of splitting the legacy stm32 super-directory; relocates
the stm32f0 sources, headers and boards into arch/arm/src/stm32f0,
arch/arm/include/stm32f0 and boards/arm/stm32f0.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: Common STM32 source and private header files moved to
arch/arm/src/common/stm32. Out-of-tree code that references family-local
common source paths must update includes, build rules, and source paths
to the new common STM32 location.
Signed-off-by: raiden00pl <raiden00@railab.me>
Add boards/arm/stm32l4/common so STM32L4 boards build through the shared
STM32 board-common tree (boards/arm/common/stm32), like the other split
STM32 families.
Convert each STM32L4 board's src/Makefile to src/Make.defs so the
per-board sources are pulled in by the common board Makefile.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: Move the existing STM32 board common sources to
boards/arm/common/stm32 and fold in the common STM32F0/L0/G0/C0
board helpers so split STM32 board families can share one source
tree.
Signed-off-by: raiden00pl <raiden00@railab.me>
Replace the bare "README.txt literal include" with a proper reStructuredText
page for the Sony Spresense board, and remove the now-redundant README.txt
(all of its content has been migrated into index.rst):
- Add board, extension and camera pinout figures (sony*.png).
- Add Features, Serial Console, Buttons and LEDs sections.
- Add "Flashing the bootloader" and "Building and Flashing" sections,
including the official firmware download link and the flash_writer.py
workflow.
- Document all board configurations (audio, audio_sdk, camera, charger,
coremark, elf, example_camera, example_lcd, fmsynth, getprime, lcd, lte,
module, mpy, nsh, nsh_automount, nsh_trace, ostest, posix_spawn, rndis,
rndis_composite, rndis_smp, smp, usbmsc, usbnsh, wifi, wifi_smp), each of
which was verified to build.
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
BREAKING CHANGE: Convert the legacy STM32 F1/F2/F3/F4/G4/L1 port to the concrete
family selectors while keeping the shared STM32 selector hidden.
Legacy STM32 family selector Kconfig symbols were split by
concrete STM32 sub-family. Out-of-tree defconfigs and code must update
CONFIG_ARCH_CHIP_* selections to the new family-specific selectors.
Signed-off-by: raiden00pl <raiden00@railab.me>
devif_conn_event() saves list->nxtconn before invoking the current
callback. If the callback mutates its callback list, the saved local
successor may no longer match the post-callback list topology.
Align devif_conn_event() with devif_dev_event(): protect the current
callback with DEVIF_CB_DONT_FREE, refresh next after the callback
returns, and defer freeing the current node until iteration is safe.
Signed-off-by: shichunma <shichunma@bestechnic.com>
The audio tone generator stopped working with the 'echo' command
since https://github.com/apache/nuttx-apps/pull/1559
Before that PR:
nsh> echo "t120o1l16b9n0baan0bn0bn0baaan0b9n0baan0b" > /dev/tone0
tone_write: Received 41 bytes
nsh>
After that PR:
nsh> echo "t120o1l16b9n0baan0bn0bn0baaan0b9n0baan0b" > /dev/tone0
tone_write: Received 40 bytes
tone_write: Received 1 bytes
nsh>
Unfortunately the Audio Tone was not block new write attempts even
when it was already playing a melody.
This commit fix it and avoids the issue caused by that PR.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
Generic stdc_ functions use _Generic macro, but this requires the type
specific functions stdc_*_uc, stdc_*_ul and so on to be functions,
not just another macro definitions.
This commit fixes the issue by ensuring all type specific functions
are static inline functions, not macro definitions.
There is no change other in the functionality or implementation.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
PR https://github.com/apache/nuttx/pull/19139 addresses the issue, but there
is one minor problem. In the for loop the element `i+1` is written which
means there can still be an overflow by one element (uint32_t or 4 bytes).
Addressing here with this PR.
Tested locally, builds fine.
Signed-off-by: Catalin Visinescu <catalin_visinescu@yahoo.com>
BREAKING CHANGE: STM32N6 Kconfig symbols were renamed from CONFIG_STM32N6_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: STM32WL5 Kconfig symbols were renamed from CONFIG_STM32WL5_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: STM32WB Kconfig symbols were renamed from CONFIG_STM32WB_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
The custom clock option is a special breaking case that does not follow the family-to-common pattern:
CONFIG_ARCH_BOARD_STM32WB_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: STM32U5 Kconfig symbols were renamed from CONFIG_STM32U5_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
The custom clock option is a special breaking case that does not follow the family-to-common pattern:
CONFIG_ARCH_BOARD_STM32U5_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: STM32L5 Kconfig symbols were renamed from CONFIG_STM32L5_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
The custom clock option is a special breaking case that does not follow the family-to-common pattern:
CONFIG_ARCH_BOARD_STM32L5_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: STM32L4 Kconfig symbols were renamed from CONFIG_STM32L4_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
The custom clock option is a special breaking case that does not follow the family-to-common pattern:
CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: STM32H7 Kconfig symbols were renamed from CONFIG_STM32H7_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
The custom clock option is a special breaking case that does not follow the family-to-common pattern:
CONFIG_STM32H7_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: STM32H5 Kconfig symbols were renamed from CONFIG_STM32H5_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
The custom clock option is a special breaking case that does not follow the family-to-common pattern:
CONFIG_ARCH_BOARD_STM32H5_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: STM32F7 Kconfig symbols were renamed from CONFIG_STM32F7_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
The custom clock option is a special breaking case that does not follow the family-to-common pattern:
CONFIG_STM32F7_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.
Signed-off-by: raiden00pl <raiden00@railab.me>
Shared STM32 Kconfig option definitions from the stm32 (F1/F2/F3/F4/G4/L1)
and stm32f0l0g0 (F0/L0/G0/C0) families moved into arch/arm/src/common/stm32.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: STM32F0/L0/G0/C0 Kconfig symbols were renamed from
CONFIG_STM32F0L0G0_* to CONFIG_STM32_*. Out-of-tree code must update defconfigs
and Kconfig references to the new CONFIG_STM32_* names.
The custom clock option is a special breaking case that does not follow the
family-to-common pattern:
CONFIG_ARCH_BOARD_STM32F0G0L0_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.
Signed-off-by: raiden00pl <raiden00@railab.me>
Add the shared STM32 Kconfig include and introduce the hidden
common ARCH_CHIP_STM32 selector used by concrete STM32 families.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: CONFIG_STM32F7_QUADSPI and CONFIG_STM32H7_QUADSPI are
renamed to CONFIG_STM32F7_QSPI and CONFIG_STM32H7_QSPI. Out-of-tree F7/H7
board configurations must update the symbol name.
Standardize the F7/H7 QSPI enable symbol on the QSPI name (the QUADSPI and
QSPI peripherals are the same IP block). Only the Kconfig enable symbol and
its CONFIG_ references are renamed; the QUADSPI hardware register/pin/DMA
macros are unchanged.
Signed-off-by: raiden00pl <raiden00@railab.me>
Fixed three bugs in the RP23XX (RISC-V) PWM driver, mirroring the fix
previously applied to the ARM variant:
* setup_period: The previous divisor calculation used integer arithmetic
that caused overflow and loss of precision. The divider is now computed
as a 16-bit fixed-point value (div16) using 64-bit arithmetic, and
clamped to the valid hardware range (0x10 to 0xFFF).
* setup_pulse: The compare value was incorrectly scaled by TOP instead
of 65535, producing wrong duty cycles. The formula is now corrected
to ((duty * (top + 1)) / 65535) with an overflow guard.
* pwm_start: The driver was not updated as part of the breaking change
introduced in commit 4df80e19 ("!drivers/pwm: remove PWM_MULTICHAN
option"). Access to single channel API is now info->channels[0].duty
instead of info[0].duty.
Signed-off-by: Brunocor26 <bruno.correia@ubi.pt>
up_disableusartint() saves USART interrupt state from hardware CTL0-CTL3
registers but omits the CTL selector bits (bits 24-27) in the encoded
ie value. When up_restoreusartint() later restores interrupts, it uses
ie >> 24 to determine which CTL register to write. Without selector bits
this evaluates to 0, so no CTL register is updated and all interrupt
enables (including RBNEIE) are permanently lost.
This causes RX interrupts to never fire after any call to up_putc()
(e.g. via syslog), making the serial console unable to receive input.
Fix by adding the corresponding CTL selector bit (USART_CFG_CTLx_INT
<< USART_CFG_SHIFT) whenever a CTL register has active interrupt bits.
Signed-off-by: lccosy <1191294205@qq.com>
Add NULL check for g_uart_devs[i] before accessing ->priv in
arm_earlyserialinit() loop. When a USART is not enabled in defconfig,
g_uart_devs[i] is NULL, causing a HardFault crash during early boot.
The bug occurs because the original code only checked g_uart_devs[i]->priv
without first verifying g_uart_devs[i] is not NULL. On Cortex-M4, NULL
pointer dereference reads from Flash vector table (0x00000000 maps to
0x08000000), returning a function pointer that causes BusFault when
written to.
This fix matches the existing NULL check pattern used in arm_serialinit()
at line 2835 of the same file.
Tested on mplant-gd32f450 board with only USART5 enabled in defconfig.
Before fix: HardFault at boot (IPSR=3, PC=0x080003e0)
After fix: System boots normally to NSH Shell
Signed-off-by: lccosy <1191294205@qq.com>
