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!arch/stm32: move stm32g4 to its own directory

Browse source 
BREAKING CHANGE:

Part of splitting the legacy stm32 super-directory; relocates
the stm32g4 sources, headers and boards into arch/arm/src/stm32g4,
arch/arm/include/stm32g4 and boards/arm/stm32g4.

Signed-off-by: raiden00pl <raiden00@railab.me>
This commit is contained in:
raiden00pl 2026-05-25 22:44:13 +02:00 • committed by Xiang Xiao
parent 7361060fed
commit 62b0dbe851
138 changed files with 1512 additions and 136 deletions
Download patch file Download diff file Expand all files Collapse all files

350
arch/arm/include/stm32g4/chip.h Normal file
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@ -0,0 +1,350 @@
/****************************************************************************
* arch/arm/include/stm32g4/chip.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_STM32G4_CHIP_H
#define __ARCH_ARM_INCLUDE_STM32G4_CHIP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Get customizations for each supported chip and provide alternate function
* pin-mapping
*
* NOTE: Each GPIO pin may serve either for general purpose I/O or for a
* special alternate function (such as USART, CAN, USB, SDIO, etc.). That
* particular pin-mapping will depend on the package and STM32 family. If
* you are incorporating a new STM32 chip into NuttX, you will need to add
* the pin-mapping to a header file and to include that header file below.
* The chip-specific pin-mapping is defined in the chip datasheet.
*/
#if defined (CONFIG_ARCH_CHIP_STM32G431K)
# define STM32_NFSMC 0 /* FSMC */
# define STM32_NATIM 2 /* (2) Advanced motor control timers TIM1, 8 with DMA */
# define STM32_NGTIM 6 /* (2) 16-bit general timers TIM3 and 4 with DMA
* (1) 32-bit general timers TIM2 with DMA
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* (0) 16-bit general timers TIM9-14 without DMA */
# define STM32_NBTIM 2 /* (2) Basic timers, TIM6-7 */
# define STM32_NDMA 2 /* DMA1-2 */
# define STM32_NSPI 3 /* SPI1-3 */
# define STM32_NI2S 2 /* I2S2-3 (multiplexed with SPI2-3) */
# define STM32_NUSART 2 /* USART1-2 */
# define STM32_NLPUART 1 /* LPUART1 */
# define STM32_NI2C 3 /* I2C1-3 */
# define STM32_NCAN 1 /* FDCAN1 */
# define STM32_NSDIO 0 /* No SDIO */
# define STM32_NLCD 0 /* No LCD */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (but there is USB 2.0 full-speed
* with LPM and BCD support) */
# define STM32_NGPIO 26 /* GPIOA-G */
# define STM32_NADC 2 /* 12-bit ADC1-2 */
# define STM32_NDAC 2 /* 12-bit DAC1-2, 4 channels (2 external, 2 internal) */
# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
# define STM32_NCRC 1 /* CRC */
# define STM32_NETHERNET 0 /* No Ethernet MAC */
# define STM32_NRNG 1 /* Random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined (CONFIG_ARCH_CHIP_STM32G431C)
# define STM32_NFSMC 0 /* FSMC */
# define STM32_NATIM 2 /* (2) Advanced motor control timers TIM1, 8 with DMA */
# define STM32_NGTIM 6 /* (2) 16-bit general timers TIM3 and 4 with DMA
* (1) 32-bit general timers TIM2 with DMA
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* (0) 16-bit general timers TIM9-14 without DMA */
# define STM32_NBTIM 2 /* (2) Basic timers, TIM6-7 */
# define STM32_NDMA 2 /* DMA1-2 */
# define STM32_NSPI 3 /* SPI1-3 */
# define STM32_NI2S 2 /* I2S2-3 (multiplexed with SPI2-3) */
# define STM32_NUSART 3 /* USART1-3 */
# define STM32_NLPUART 1 /* LPUART1 */
# define STM32_NI2C 3 /* I2C1-3 */
# define STM32_NCAN 1 /* FDCAN1 */
# define STM32_NSDIO 0 /* No SDIO */
# define STM32_NLCD 0 /* No LCD */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (but there is USB 2.0 full-speed
* with LPM and BCD support) */
# define STM32_NGPIO 42 /* GPIOA-G */
# define STM32_NADC 2 /* 12-bit ADC1-2 */
# define STM32_NDAC 2 /* 12-bit DAC1-2, 4 channels (2 external, 2 internal) */
# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
# define STM32_NCRC 1 /* CRC */
# define STM32_NETHERNET 0 /* No Ethernet MAC */
# define STM32_NRNG 1 /* Random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined (CONFIG_ARCH_CHIP_STM32G431R)
# define STM32_NFSMC 0 /* FSMC */
# define STM32_NATIM 2 /* (2) Advanced motor control timers TIM1, 8 with DMA */
# define STM32_NGTIM 6 /* (2) 16-bit general timers TIM3 and 4 with DMA
* (1) 32-bit general timers TIM2 with DMA
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* (0) 16-bit general timers TIM9-14 without DMA */
# define STM32_NBTIM 2 /* (2) Basic timers, TIM6-7 */
# define STM32_NDMA 2 /* DMA1-2 */
# define STM32_NSPI 3 /* SPI1-3 */
# define STM32_NI2S 2 /* I2S2-3 (multiplexed with SPI2-3) */
# define STM32_NUSART 4 /* USART1-3 and UART4*/
# define STM32_NLPUART 1 /* LPUART1 */
# define STM32_NI2C 3 /* I2C1-3 */
# define STM32_NCAN 1 /* FDCAN1 */
# define STM32_NSDIO 0 /* No SDIO */
# define STM32_NLCD 0 /* No LCD */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (but there is USB 2.0 full-speed
* with LPM and BCD support) */
# define STM32_NGPIO 52 /* GPIOA-G */
# define STM32_NADC 2 /* 12-bit ADC1-2 */
# define STM32_NDAC 2 /* 12-bit DAC1-2, 4 channels (2 external, 2 internal) */
# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
# define STM32_NCRC 1 /* CRC */
# define STM32_NETHERNET 0 /* No Ethernet MAC */
# define STM32_NRNG 1 /* Random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined (CONFIG_ARCH_CHIP_STM32G431M)
# define STM32_NFSMC 0 /* FSMC */
# define STM32_NATIM 2 /* (2) Advanced motor control timers TIM1, 8 with DMA */
# define STM32_NGTIM 6 /* (2) 16-bit general timers TIM3 and 4 with DMA
* (1) 32-bit general timers TIM2 with DMA
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* (0) 16-bit general timers TIM9-14 without DMA */
# define STM32_NBTIM 2 /* (2) Basic timers, TIM6-7 */
# define STM32_NDMA 2 /* DMA1-2 */
# define STM32_NSPI 3 /* SPI1-3 */
# define STM32_NI2S 2 /* I2S2-3 (multiplexed with SPI2-3) */
# define STM32_NUSART 4 /* USART1-3 and UART4*/
# define STM32_NLPUART 1 /* LPUART1 */
# define STM32_NI2C 3 /* I2C1-3 */
# define STM32_NCAN 1 /* FDCAN1 */
# define STM32_NSDIO 0 /* No SDIO */
# define STM32_NLCD 0 /* No LCD */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (but there is USB 2.0 full-speed
* with LPM and BCD support) */
# define STM32_NGPIO 66 /* GPIOA-G */
# define STM32_NADC 2 /* 12-bit ADC1-2 */
# define STM32_NDAC 2 /* 12-bit DAC1-2, 4 channels (2 external, 2 internal) */
# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
# define STM32_NCRC 1 /* CRC */
# define STM32_NETHERNET 0 /* No Ethernet MAC */
# define STM32_NRNG 1 /* Random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined (CONFIG_ARCH_CHIP_STM32G431V)
# define STM32_NFSMC 0 /* FSMC */
# define STM32_NATIM 2 /* (2) Advanced motor control timers TIM1, 8 with DMA */
# define STM32_NGTIM 6 /* (2) 16-bit general timers TIM3 and 4 with DMA
* (1) 32-bit general timers TIM2 with DMA
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* (0) 16-bit general timers TIM9-14 without DMA */
# define STM32_NBTIM 2 /* (2) Basic timers, TIM6-7 */
# define STM32_NDMA 2 /* DMA1-2 */
# define STM32_NSPI 3 /* SPI1-3 */
# define STM32_NI2S 2 /* I2S2-3 (multiplexed with SPI2-3) */
# define STM32_NUSART 4 /* USART1-3 and UART4*/
# define STM32_NLPUART 1 /* LPUART1 */
# define STM32_NI2C 3 /* I2C1-3 */
# define STM32_NCAN 1 /* FDCAN1 */
# define STM32_NSDIO 0 /* No SDIO */
# define STM32_NLCD 0 /* No LCD */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (but there is USB 2.0 full-speed
* with LPM and BCD support) */
# define STM32_NGPIO 86 /* GPIOA-G */
# define STM32_NADC 2 /* 12-bit ADC1-2 */
# define STM32_NDAC 2 /* 12-bit DAC1-2, 4 channels (2 external, 2 internal) */
# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
# define STM32_NCRC 1 /* CRC */
# define STM32_NETHERNET 0 /* No Ethernet MAC */
# define STM32_NRNG 1 /* Random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined (CONFIG_ARCH_CHIP_STM32G474C)
# define STM32_NFSMC 0 /* FSMC */
# define STM32_NATIM 3 /* (3) Advanced motor control timers TIM1, 8, and 20 with DMA */
# define STM32_NGTIM 7 /* (2) 16-bit general timers TIM3 and 4 with DMA
* (2) 32-bit general timers TIM2 and 5 with DMA
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* (0) 16-bit general timers TIM9-14 without DMA */
# define STM32_NBTIM 2 /* (2) Basic timers, TIM6-7 */
# define STM32_NDMA 2 /* DMA1-2 */
# define STM32_NSPI 3 /* SPI1-3 */
# define STM32_NI2S 2 /* I2S2-3 (multiplexed with SPI2-3) */
# define STM32_NUSART 3 /* USART1-3 */
# define STM32_NLPUART 1 /* LPUART1 */
# define STM32_NI2C 4 /* I2C1-4 */
# define STM32_NCAN 3 /* FDCAN1-3 */
# define STM32_NSDIO 0 /* No SDIO */
# define STM32_NLCD 0 /* No LCD */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (but there is USB 2.0 full-speed
* with LPM and BCD support) */
# define STM32_NGPIO 42 /* GPIOA-C, F-G */
# define STM32_NADC 5 /* 12-bit ADC1-5 */
# define STM32_NDAC 4 /* 12-bit DAC1-4, 7 channels (3 external, 4 internal) */
# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
# define STM32_NCRC 1 /* CRC */
# define STM32_NETHERNET 0 /* No Ethernet MAC */
# define STM32_NRNG 1 /* Random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined (CONFIG_ARCH_CHIP_STM32G474M)
# define STM32_NFSMC 0 /* FSMC */
# define STM32_NATIM 3 /* (3) Advanced motor control timers TIM1, 8, and 20 with DMA */
# define STM32_NGTIM 7 /* (2) 16-bit general timers TIM3 and 4 with DMA
* (2) 32-bit general timers TIM2 and 5 with DMA
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* (0) 16-bit general timers TIM9-14 without DMA */
# define STM32_NBTIM 2 /* (2) Basic timers, TIM6-7 */
# define STM32_NDMA 2 /* DMA1-2 */
# define STM32_NSPI 4 /* SPI1-4 */
# define STM32_NI2S 2 /* I2S2-3 (multiplexed with SPI2-3) */
# define STM32_NUSART 5 /* USART1-3 and UART 4-5 */
# define STM32_NLPUART 1 /* LPUART1 */
# define STM32_NI2C 4 /* I2C1-4 */
# define STM32_NCAN 3 /* FDCAN1-3 */
# define STM32_NSDIO 0 /* No SDIO */
# define STM32_NLCD 0 /* No LCD */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (but there is USB 2.0 full-speed
* with LPM and BCD support) */
# define STM32_NGPIO 67 /* GPIOA-G */
# define STM32_NADC 5 /* 12-bit ADC1-5 */
# define STM32_NDAC 4 /* 12-bit DAC1-4, 7 channels (3 external, 4 internal) */
# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
# define STM32_NCRC 1 /* CRC */
# define STM32_NETHERNET 0 /* No Ethernet MAC */
# define STM32_NRNG 1 /* Random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined (CONFIG_ARCH_CHIP_STM32G474R)
# define STM32_NFSMC 0 /* FSMC */
# define STM32_NATIM 3 /* (3) Advanced motor control timers TIM1, 8, and 20 with DMA */
# define STM32_NGTIM 7 /* (2) 16-bit general timers TIM3 and 4 with DMA
* (2) 32-bit general timers TIM2 and 5 with DMA
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* (0) 16-bit general timers TIM9-14 without DMA */
# define STM32_NBTIM 2 /* (2) Basic timers, TIM6-7 */
# define STM32_NDMA 2 /* DMA1-2 */
# define STM32_NSPI 3 /* SPI1-3 */
# define STM32_NI2S 2 /* I2S2-3 (multiplexed with SPI2-3) */
# define STM32_NUSART 5 /* USART1-3 and UART 4-5 */
# define STM32_NLPUART 1 /* LPUART1 */
# define STM32_NI2C 4 /* I2C1-4 */
# define STM32_NCAN 3 /* FDCAN1-3 */
# define STM32_NSDIO 0 /* No SDIO */
# define STM32_NLCD 0 /* No LCD */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (but there is USB 2.0 full-speed
* with LPM and BCD support) */
# define STM32_NGPIO 52 /* GPIOA-D, F-G */
# define STM32_NADC 5 /* 12-bit ADC1-5 */
# define STM32_NDAC 4 /* 12-bit DAC1-4, 7 channels (3 external, 4 internal) */
# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
# define STM32_NCRC 1 /* CRC */
# define STM32_NETHERNET 0 /* No Ethernet MAC */
# define STM32_NRNG 1 /* Random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined (CONFIG_ARCH_CHIP_STM32G474Q)
# define STM32_NFSMC 1 /* FSMC */
# define STM32_NATIM 3 /* (3) Advanced motor control timers TIM1, 8, and 20 with DMA */
# define STM32_NGTIM 7 /* (2) 16-bit general timers TIM3 and 4 with DMA
* (2) 32-bit general timers TIM2 and 5 with DMA
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* (0) 16-bit general timers TIM9-14 without DMA */
# define STM32_NBTIM 2 /* (2) Basic timers, TIM6-7 */
# define STM32_NDMA 2 /* DMA1-2 */
# define STM32_NSPI 4 /* SPI1-4 */
# define STM32_NI2S 2 /* I2S2-3 (multiplexed with SPI2-3) */
# define STM32_NUSART 5 /* USART1-3 and UART 4-5 */
# define STM32_NLPUART 1 /* LPUART1 */
# define STM32_NI2C 4 /* I2C1-4 */
# define STM32_NCAN 3 /* FDCAN1-3 */
# define STM32_NSDIO 0 /* No SDIO */
# define STM32_NLCD 1 /* LCD parallel interface possible via FMC */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (but there is USB 2.0 full-speed
* with LPM and BCD support) */
# define STM32_NGPIO 107 /* GPIOA-G */
# define STM32_NADC 5 /* 12-bit ADC1-5 */
# define STM32_NDAC 4 /* 12-bit DAC1-4, 7 channels (3 external, 4 internal) */
# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
# define STM32_NCRC 1 /* CRC */
# define STM32_NETHERNET 0 /* No Ethernet MAC */
# define STM32_NRNG 1 /* Random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined (CONFIG_ARCH_CHIP_STM32G474V)
# define STM32_NFSMC 1 /* FSMC */
# define STM32_NATIM 3 /* (3) Advanced motor control timers TIM1, 8, and 20 with DMA */
# define STM32_NGTIM 7 /* (2) 16-bit general timers TIM3 and 4 with DMA
* (2) 32-bit general timers TIM2 and 5 with DMA
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* (0) 16-bit general timers TIM9-14 without DMA */
# define STM32_NBTIM 2 /* (2) Basic timers, TIM6-7 */
# define STM32_NDMA 2 /* DMA1-2 */
# define STM32_NSPI 4 /* SPI1-4 */
# define STM32_NI2S 2 /* I2S2-3 (multiplexed with SPI2-3) */
# define STM32_NUSART 5 /* USART1-3 and UART 4-5 */
# define STM32_NLPUART 1 /* LPUART1 */
# define STM32_NI2C 4 /* I2C1-4 */
# define STM32_NCAN 3 /* FDCAN1-3 */
# define STM32_NSDIO 0 /* No SDIO */
# define STM32_NLCD 1 /* LCD parallel interface possible via FMC */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (but there is USB 2.0 full-speed
* with LPM and BCD support) */
# define STM32_NGPIO 86 /* GPIOA-G */
# define STM32_NADC 5 /* 12-bit ADC1-5 */
# define STM32_NDAC 4 /* 12-bit DAC1-4, 7 channels (3 external, 4 internal) */
# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
# define STM32_NCRC 1 /* CRC */
# define STM32_NETHERNET 0 /* No Ethernet MAC */
# define STM32_NRNG 1 /* Random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#else
# error "Unsupported STM32 chip"
#endif
/* Peripheral IP versions ***************************************************/
/* Peripheral IP versions are invariant and should be decided here, not in
* Kconfig.
*
* REVISIT: Currently only SPI IP version is handled here, with others being
* handled in Kconfig. Those others need to be gradually refactored
* and resolved here.
*/
#define STM32_HAVE_IP_SPI_V4
/* NVIC priority levels *****************************************************/
#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits set in minimum priority */
#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Four bits of interrupt priority used */
#endif /* __ARCH_ARM_INCLUDE_STM32G4_CHIP_H */

75
arch/arm/include/stm32/stm32g4xxxx_irq.h → arch/arm/include/stm32g4/irq.h
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@ -1,31 +1,31 @@
/****************************************************************************
* arch/arm/include/stm32/stm32g4xxxx_irq.h
* arch/arm/include/stm32g4/irq.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly
* through nuttx/irq.h
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_STM32_STM32G4XXXX_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32_STM32G4XXXX_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_STM32G4_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32G4_IRQ_H
/****************************************************************************
* Included Files
@ -33,21 +33,44 @@
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <arch/stm32g4/chip.h>
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers. The IRQ numbers correspond to the vector numbers and hence
* map directly to bits in the NVIC. This does, however, waste several words
* of memory in the IRQ to handle mapping tables.
*
* Processor Exceptions (vectors 0-15) are common to all STM32 parts and are
* found in nuttx/arch/arm/include/stm32/irq.h. They are not repeated here.
*
* Other interrupts (vectors >= 16) are defined below.
/* IRQ numbers.
* The IRQ number corresponds vector number and hence map directly to
* bits in the NVIC. This does, however, waste several words of memory in
* the IRQ to handle mapping tables.
*/
/* Processor Exceptions (vectors 0-15) */
#define STM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define STM32_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
#define STM32_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
#define STM32_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */
#define STM32_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */
#define STM32_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */
#define STM32_IRQ_SVCALL (11) /* Vector 11: SVC call */
#define STM32_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */
/* Vector 13: Reserved */
#define STM32_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
#define STM32_IRQ_SYSTICK (15) /* Vector 15: System tick */
/* External interrupts (vectors >= 16).
* These definitions are chip-specific
*/
#define STM32_IRQ_FIRST (16) /* Vector number of the first external interrupt */
/****************************************************************************
* Included Files
****************************************************************************/
#define STM32_IRQ_WWDG (STM32_IRQ_FIRST + 0) /* 0: Window Watchdog interrupt */
#define STM32_IRQ_PVD (STM32_IRQ_FIRST + 1) /* 1: PVD through EXTI Line detection interrupt */
#define STM32_IRQ_TAMPER (STM32_IRQ_FIRST + 2) /* 2: Tamper interrupt, or Time Stamp (shared with STM32_IRQ_TIMESTAMP) */
@ -199,4 +222,4 @@ extern "C"
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_STM32_STM32G4XXXX_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_STM32G4_IRQ_H */

28
arch/arm/src/stm32g4/CMakeLists.txt Normal file
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@ -0,0 +1,28 @@
# ##############################################################################
# arch/arm/src/stm32g4/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
set(SRCS)
list(APPEND SRCS stm32_rcc.c)
target_sources(arch PRIVATE ${SRCS})
add_subdirectory(${NUTTX_DIR}/arch/arm/src/common/stm32 stm32_common)

340
arch/arm/src/stm32g4/Kconfig Normal file
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@ -0,0 +1,340 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
comment "STM32 G4 configuration"
if ARCH_CHIP_STM32G4
choice
prompt "STM32G4 Chip Selection"
depends on ARCH_CHIP_STM32G4
config ARCH_CHIP_STM32G431K
bool "STM32G431K"
select STM32_STM32G43XX
select STM32_STM32G4XXK
select STM32_STM32G431K
config ARCH_CHIP_STM32G431C
bool "STM32G431C"
select STM32_STM32G43XX
select STM32_STM32G4XXC
select STM32_STM32G431C
config ARCH_CHIP_STM32G431R
bool "STM32G431R"
select STM32_STM32G43XX
select STM32_STM32G4XXR
select STM32_STM32G431R
config ARCH_CHIP_STM32G431M
bool "STM32G431M"
select STM32_STM32G43XX
select STM32_STM32G4XXM
select STM32_STM32G431M
config ARCH_CHIP_STM32G431V
bool "STM32G431V"
select STM32_STM32G43XX
select STM32_STM32G4XXV
select STM32_STM32G431V
config ARCH_CHIP_STM32G474C
bool "STM32G474C"
select STM32_STM32G47XX
select STM32_STM32G4XXC
select STM32_STM32G474C
config ARCH_CHIP_STM32G474M
bool "STM32G474M"
select STM32_STM32G47XX
select STM32_STM32G4XXM
select STM32_STM32G474M
config ARCH_CHIP_STM32G474R
bool "STM32G474R"
select STM32_STM32G47XX
select STM32_STM32G4XXR
select STM32_STM32G474R
select STM32_HAVE_USBFS
config ARCH_CHIP_STM32G474Q
bool "STM32G474Q"
select STM32_STM32G47XX
select STM32_STM32G4XXQ
select STM32_STM32G474Q
config ARCH_CHIP_STM32G474V
bool "STM32G474V"
select STM32_STM32G47XX
select STM32_STM32G4XXV
select STM32_STM32G474V
endchoice
endif
config STM32_STM32G4XXX
bool
default n
select STM32_HAVE_DMA1
select STM32_HAVE_COMP
select STM32_HAVE_DMA2
select ARCH_CORTEXM4
select ARCH_HAVE_FPU
select STM32_HAVE_I2C1
select STM32_HAVE_SPI1
select STM32_HAVE_SYSCFG
select STM32_HAVE_USART1
select STM32_HAVE_USART2
select STM32_HAVE_DMAMUX
select STM32_HAVE_IP_AES_M3M4_V1 if STM32_HAVE_AES
select STM32_HAVE_IP_BBSRAM_M3M4_V1
select STM32_HAVE_IP_BKP_M3M4_V1
select STM32_HAVE_IP_CAN_BXCAN_M3M4_V1
select STM32_HAVE_IP_CCM_M3M4_V1 if STM32_HAVE_CCM
select STM32_HAVE_IP_CRYPTO_M3M4_V1
select STM32_HAVE_IP_DBGMCU_M3M4_V3
select STM32_HAVE_IP_ADC_M3M4_V2
select STM32_FOC_HAVE_ADC_CHAN0_WORKAROUND
select STM32_HAVE_COMMON_FOC
select STM32_HAVE_IP_COMP_M3M4_V2
select STM32_HAVE_IP_CORDIC_M3M4_V1 if STM32_HAVE_CORDIC
select STM32_HAVE_IP_DAC_M3M4_V2
select STM32_HAVE_IP_DCMI_V1
select STM32_HAVE_IP_DFUMODE_M3M4_V1
select STM32_HAVE_IP_DMA_V1
select STM32_HAVE_IP_DMA_V1_8CH_DMAMUX
select STM32_HAVE_IP_EXTI_V2
select STM32_HAVE_IP_ETHMAC_M3M4_V1 if STM32_HAVE_ETHMAC
select STM32_HAVE_IP_FDCAN_MCAN_M3M4_V1
select STM32_HAVE_IP_FLASH_M3M4_V1
select STM32_HAVE_IP_FLASH_M3M4_G4
select STM32_HAVE_IP_FMC_M3M4_V1 if STM32_HAVE_FMC
select STM32_HAVE_IP_FREERUN_M3M4_V1
select STM32_HAVE_IP_FSMC_M3M4_V1 if STM32_HAVE_FSMC
select STM32_HAVE_IP_GPIO_M3M4_V1
select STM32_HAVE_IP_HRTIM_M3M4_V1 if STM32_HAVE_HRTIM1
select STM32_HAVE_IP_I2C_M3M4_V2
select STM32_HAVE_IP_I2S_M3M4_V1
select STM32_HAVE_IP_ONESHOT_M3M4_V1
select STM32_HAVE_IP_OPAMP_M3M4_V1 if STM32_HAVE_OPAMP1 || STM32_HAVE_OPAMP2 || STM32_HAVE_OPAMP3 || STM32_HAVE_OPAMP4 || STM32_HAVE_OPAMP5 || STM32_HAVE_OPAMP6
select STM32_HAVE_IP_PWR_M3M4_V1
select STM32_HAVE_IP_RNG_M3M4_V1 if STM32_HAVE_RNG
select STM32_HAVE_IP_RTC_M3M4_V1
select STM32_HAVE_IP_RTCC_M3M4_V1
select STM32_HAVE_RTC_MAGIC
select STM32_HAVE_RTC
select STM32_HAVE_CRC
select STM32_HAVE_PWR
select STM32_HAVE_IP_SPI_V3
select STM32_HAVE_IP_SYSCFG_M3M4_V1
select STM32_HAVE_IP_TIMERS_M3M4_V3
select STM32_HAVE_IP_UID_M3M4_V1
select STM32_HAVE_IP_USART_V4
select STM32_HAVE_IP_USBDEV_M3M4_V1 if STM32_HAVE_USBDEV
select STM32_HAVE_IP_USBFS_M3M4_V1 if STM32_HAVE_USBFS
select STM32_HAVE_IP_OTGFS_M3M4_V1 if STM32_HAVE_OTGFS
select STM32_HAVE_IP_WDG_M3M4_V1
config STM32_STM32G4_CAT2
bool
default n
config STM32_STM32G4_CAT3
bool
default n
config STM32_STM32G4_CAT4
bool
default n
config STM32_STM32G4XXK
bool
default n
config STM32_STM32G4XXC
bool
default n
config STM32_STM32G4XXR
bool
default n
config STM32_STM32G4XXM
bool
default n
config STM32_STM32G4XXV
bool
default n
config STM32_STM32G4XXP
bool
default n
config STM32_STM32G4XXQ
bool
default n
config STM32_STM32G43XX
bool
default n
select STM32_STM32G4XXX
select STM32_STM32G4_CAT2
select STM32_HAVE_ADC2
select STM32_HAVE_CCM
select STM32_HAVE_COMP1
select STM32_HAVE_COMP2
select STM32_HAVE_COMP3
select STM32_HAVE_COMP4
select STM32_HAVE_CORDIC
select STM32_HAVE_CRS
select STM32_HAVE_DAC1
select STM32_HAVE_DAC3
select STM32_HAVE_FMAC
select STM32_HAVE_FDCAN1
select STM32_HAVE_I2C2
select STM32_HAVE_I2C3
select STM32_HAVE_LPTIM1
select STM32_HAVE_LPUART1
select STM32_HAVE_OPAMP1
select STM32_HAVE_OPAMP2
select STM32_HAVE_OPAMP3
select STM32_HAVE_RNG
select STM32_HAVE_SPI2
select STM32_HAVE_SPI3
select STM32_HAVE_TIM1
select STM32_HAVE_TIM15
select STM32_HAVE_TIM16
select STM32_HAVE_TIM17
select STM32_HAVE_TIM2
select STM32_HAVE_TIM3
select STM32_HAVE_TIM4
select STM32_HAVE_TIM8
select STM32_HAVE_UCPD
select STM32_HAVE_USBDEV
config STM32_STM32G431K
bool
default n
config STM32_STM32G431C
bool
default n
select STM32_HAVE_USART3
config STM32_STM32G431R
bool
default n
select STM32_HAVE_USART3
select STM32_HAVE_UART4
config STM32_STM32G431M
bool
default n
select STM32_HAVE_USART3
select STM32_HAVE_UART4
config STM32_STM32G431V
bool
default n
select STM32_HAVE_USART3
select STM32_HAVE_UART4
config STM32_STM32G47XX
bool
default n
select STM32_STM32G4XXX
select STM32_STM32G4_CAT3
select STM32_HAVE_ADC2
select STM32_HAVE_ADC3
select STM32_HAVE_ADC4
select STM32_HAVE_ADC5
select STM32_HAVE_CCM
select STM32_HAVE_COMP1
select STM32_HAVE_COMP2
select STM32_HAVE_COMP3
select STM32_HAVE_COMP4
select STM32_HAVE_COMP5
select STM32_HAVE_COMP6
select STM32_HAVE_COMP7
select STM32_HAVE_CORDIC
select STM32_HAVE_CRS
select STM32_HAVE_DAC1
select STM32_HAVE_DAC2
select STM32_HAVE_DAC3
select STM32_HAVE_DAC4
select STM32_HAVE_FSMC
select STM32_HAVE_FMAC
select STM32_HAVE_FDCAN1
select STM32_HAVE_FDCAN2
select STM32_HAVE_HRTIM1
select STM32_HAVE_I2C2
select STM32_HAVE_I2C3
select STM32_HAVE_I2C4
select STM32_HAVE_I2S3
select STM32_HAVE_LPTIM1
select STM32_HAVE_LPUART1
select STM32_HAVE_OPAMP1
select STM32_HAVE_OPAMP2
select STM32_HAVE_OPAMP3
select STM32_HAVE_OPAMP4
select STM32_HAVE_OPAMP5
select STM32_HAVE_OPAMP6
select STM32_HAVE_QSPI
select STM32_HAVE_RNG
select STM32_HAVE_SPI2
select STM32_HAVE_SPI3
select STM32_HAVE_TIM1
select STM32_HAVE_TIM15
select STM32_HAVE_TIM16
select STM32_HAVE_TIM17
select STM32_HAVE_TIM2
select STM32_HAVE_TIM20
select STM32_HAVE_TIM3
select STM32_HAVE_TIM4
select STM32_HAVE_TIM5
select STM32_HAVE_TIM8
select STM32_HAVE_USART3
select STM32_HAVE_UCPD
select STM32_HAVE_USBDEV
config STM32_STM32G474C
bool
default n
select STM32_HAVE_FDCAN3
config STM32_STM32G474M
bool
default n
select STM32_HAVE_FDCAN3
select STM32_HAVE_SPI4
select STM32_HAVE_UART4
select STM32_HAVE_UART5
config STM32_STM32G474R
bool
default n
select STM32_HAVE_FDCAN3
select STM32_HAVE_UART4
select STM32_HAVE_UART5
config STM32_STM32G474Q
bool
default n
select STM32_HAVE_FDCAN3
select STM32_HAVE_FMC
select STM32_HAVE_SPI4
select STM32_HAVE_UART4
select STM32_HAVE_UART5
config STM32_STM32G474V
bool
default n
select STM32_HAVE_FDCAN3
select STM32_HAVE_FMC
select STM32_HAVE_SPI4
select STM32_HAVE_UART4
select STM32_HAVE_UART5

27
arch/arm/src/stm32g4/Make.defs Normal file
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@ -0,0 +1,27 @@
############################################################################
# arch/arm/src/stm32g4/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include armv7-m/Make.defs
CHIP_CSRCS = stm32_rcc.c
include common/stm32/Make.defs

59
arch/arm/src/stm32g4/chip.h Normal file
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@ -0,0 +1,59 @@
/****************************************************************************
* arch/arm/src/stm32g4/chip.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32G4_CHIP_H
#define __ARCH_ARM_SRC_STM32G4_CHIP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/* Include the chip capabilities file */
#include <arch/stm32g4/chip.h>
/* Include the chip interrupt definition file */
#include <arch/stm32g4/irq.h>
/* Include the chip memory map */
#include "hardware/stm32_memorymap.h"
/* Include the chip pinmap */
#include "hardware/stm32_pinmap.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Provide the required number of peripheral interrupt vector
* definitions as * well. The definition STM32_IRQ_NEXTINTS simply comes
* from the chip-specific * IRQ header file included by arch/stm32/irq.h.
*/
#define ARMV7M_PERIPHERAL_INTERRUPTS STM32_IRQ_NEXTINTS
#endif /* __ARCH_ARM_SRC_STM32G4_CHIP_H */

17
arch/arm/src/stm32g4/hardware/stm32_memorymap.h Normal file
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@ -0,0 +1,17 @@
/****************************************************************************
* arch/arm/src/stm32g4/hardware/stm32_memorymap.h
*
* SPDX-License-Identifier: Apache-2.0
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32G4_HARDWARE_STM32_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32G4_HARDWARE_STM32_MEMORYMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include "hardware/stm32g4xxxx_memorymap.h"
#endif /* __ARCH_ARM_SRC_STM32G4_HARDWARE_STM32_MEMORYMAP_H */

17
arch/arm/src/stm32g4/hardware/stm32_pinmap.h Normal file
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@ -0,0 +1,17 @@
/****************************************************************************
* arch/arm/src/stm32g4/hardware/stm32_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32G4_HARDWARE_STM32_PINMAP_H
#define __ARCH_ARM_SRC_STM32G4_HARDWARE_STM32_PINMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include "hardware/stm32g4xxxx_pinmap.h"
#endif /* __ARCH_ARM_SRC_STM32G4_HARDWARE_STM32_PINMAP_H */

2
arch/arm/src/stm32/hardware/stm32g47xxx_hrtim.h → arch/arm/src/stm32g4/hardware/stm32g47xxx_hrtim.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g47xxx_hrtim.h
* arch/arm/src/stm32g4/hardware/stm32g47xxx_hrtim.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxc_pinmap.h → arch/arm/src/stm32g4/hardware/stm32g4xxc_pinmap.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxc_pinmap.h
* arch/arm/src/stm32g4/hardware/stm32g4xxc_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxk_pinmap.h → arch/arm/src/stm32g4/hardware/stm32g4xxk_pinmap.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxk_pinmap.h
* arch/arm/src/stm32g4/hardware/stm32g4xxk_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxm_pinmap.h → arch/arm/src/stm32g4/hardware/stm32g4xxm_pinmap.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxm_pinmap.h
* arch/arm/src/stm32g4/hardware/stm32g4xxm_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxp_pinmap.h → arch/arm/src/stm32g4/hardware/stm32g4xxp_pinmap.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxp_pinmap.h
* arch/arm/src/stm32g4/hardware/stm32g4xxp_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxq_pinmap.h → arch/arm/src/stm32g4/hardware/stm32g4xxq_pinmap.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxq_pinmap.h
* arch/arm/src/stm32g4/hardware/stm32g4xxq_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxr_pinmap.h → arch/arm/src/stm32g4/hardware/stm32g4xxr_pinmap.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxr_pinmap.h
* arch/arm/src/stm32g4/hardware/stm32g4xxr_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxv_pinmap.h → arch/arm/src/stm32g4/hardware/stm32g4xxv_pinmap.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxv_pinmap.h
* arch/arm/src/stm32g4/hardware/stm32g4xxv_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxxx_comp.h → arch/arm/src/stm32g4/hardware/stm32g4xxxx_comp.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxxx_comp.h
* arch/arm/src/stm32g4/hardware/stm32g4xxxx_comp.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxxx_cordic.h → arch/arm/src/stm32g4/hardware/stm32g4xxxx_cordic.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxxx_cordic.h
* arch/arm/src/stm32g4/hardware/stm32g4xxxx_cordic.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxxx_dmamux.h → arch/arm/src/stm32g4/hardware/stm32g4xxxx_dmamux.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxxx_dmamux.h
* arch/arm/src/stm32g4/hardware/stm32g4xxxx_dmamux.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxxx_gpio.h → arch/arm/src/stm32g4/hardware/stm32g4xxxx_gpio.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxxx_gpio.h
* arch/arm/src/stm32g4/hardware/stm32g4xxxx_gpio.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxxx_memorymap.h → arch/arm/src/stm32g4/hardware/stm32g4xxxx_memorymap.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxxx_memorymap.h
* arch/arm/src/stm32g4/hardware/stm32g4xxxx_memorymap.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxxx_opamp.h → arch/arm/src/stm32g4/hardware/stm32g4xxxx_opamp.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxxx_opamp.h
* arch/arm/src/stm32g4/hardware/stm32g4xxxx_opamp.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxxx_pinmap.h → arch/arm/src/stm32g4/hardware/stm32g4xxxx_pinmap.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxxx_pinmap.h
* arch/arm/src/stm32g4/hardware/stm32g4xxxx_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxxx_pwr.h → arch/arm/src/stm32g4/hardware/stm32g4xxxx_pwr.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxxx_pwr.h
* arch/arm/src/stm32g4/hardware/stm32g4xxxx_pwr.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxxx_rcc.h → arch/arm/src/stm32g4/hardware/stm32g4xxxx_rcc.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxxx_rcc.h
* arch/arm/src/stm32g4/hardware/stm32g4xxxx_rcc.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxxx_syscfg.h → arch/arm/src/stm32g4/hardware/stm32g4xxxx_syscfg.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxxx_syscfg.h
* arch/arm/src/stm32g4/hardware/stm32g4xxxx_syscfg.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
arch/arm/src/stm32/hardware/stm32g4xxxx_vrefbuf.h → arch/arm/src/stm32g4/hardware/stm32g4xxxx_vrefbuf.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32g4xxxx_vrefbuf.h
* arch/arm/src/stm32g4/hardware/stm32g4xxxx_vrefbuf.h
*
* SPDX-License-Identifier: Apache-2.0
*

69
arch/arm/src/stm32g4/stm32.h Normal file
View file

@ -0,0 +1,69 @@
/****************************************************************************
* arch/arm/src/stm32g4/stm32.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32_STM32_H
#define __ARCH_ARM_SRC_STM32_STM32_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include "arm_internal.h"
/* Peripherals **************************************************************/
#include "chip.h"
#include "stm32_adc.h"
#include "stm32_can.h"
#include "stm32_comp.h"
#include "stm32_dbgmcu.h"
#include "stm32_dma.h"
#include "stm32_dac_m3m4_v1.h"
#include "stm32_exti.h"
#include "stm32_flash.h"
#include "stm32_fmc_m3m4_v1.h"
#include "stm32_fsmc_m3m4_v1.h"
#include "stm32_gpio.h"
#include "stm32_i2c.h"
#include "stm32_ltdc_m3m4_v1.h"
#include "stm32_opamp_m3m4_v1.h"
#include "stm32_pwr.h"
#include "stm32_rcc.h"
#include "stm32_rtc.h"
#include "stm32_sdio_m3m4_v1.h"
#include "stm32_spi.h"
#include "stm32_i2s.h"
#include "stm32_tim.h"
#include "stm32_uart.h"
#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
# include "stm32_usbdev.h"
#endif
#include "stm32_wdg.h"
#include "stm32_lowputc.h"
#include "stm32_eth_m3m4_v1.h"
#endif /* __ARCH_ARM_SRC_STM32_STM32_H */

234
arch/arm/src/stm32g4/stm32_rcc.c Normal file
View file

@ -0,0 +1,234 @@
/****************************************************************************
* arch/arm/src/stm32g4/stm32_rcc.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdio.h>
#include <assert.h>
#include <nuttx/debug.h>
#include <arch/board/board.h>
#include "arm_internal.h"
#include "chip.h"
#include "stm32_gpio.h"
#include "stm32_rcc.h"
#include "stm32_rtc.h"
#include "stm32_flash.h"
#include "stm32.h"
#include "stm32_waste.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1,
"Configure BOARD_LOOPSPERMSEC to non-default value.");
/* Allow up to 100 milliseconds for the high speed clock to become ready.
* that is a very long delay, but if the clock does not become ready we are
* hosed anyway.
*/
#define HSERDY_TIMEOUT (100 * CONFIG_BOARD_LOOPSPERMSEC)
/****************************************************************************
* Included Files
****************************************************************************/
/* Include chip-specific clocking initialization logic */
#include "stm32g4xxxx_rcc.c"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if defined(CONFIG_STM32_STM32L15XX)
# define STM32_RCC_XXX STM32_RCC_CSR
# define RCC_XXX_YYYRST RCC_CSR_RTCRST
#else
# define STM32_RCC_XXX STM32_RCC_BDCR
# define RCC_XXX_YYYRST RCC_BDCR_BDRST
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: rcc_resetbkp
*
* Description:
* The RTC needs to reset the Backup Domain to change RTCSEL and resetting
* the Backup Domain renders to disabling the LSE as consequence.
* In order to avoid resetting the Backup Domain when we already
* configured LSE we will reset the Backup Domain early (here).
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
#if defined(CONFIG_STM32_RTC) && defined(CONFIG_STM32_PWR) && !defined(CONFIG_STM32_STM32F10XX)
static inline void rcc_resetbkp(void)
{
uint32_t regval;
/* Check if the RTC is already configured */
stm32_pwr_initbkp(false);
regval = getreg32(RTC_MAGIC_REG);
if (regval != RTC_MAGIC && regval != RTC_MAGIC_TIME_SET)
{
stm32_pwr_enablebkp(true);
/* We might be changing RTCSEL - to ensure such changes work, we must
* reset the backup domain (having backed up the RTC_MAGIC token)
*/
modifyreg32(STM32_RCC_XXX, 0, RCC_XXX_YYYRST);
modifyreg32(STM32_RCC_XXX, RCC_XXX_YYYRST, 0);
stm32_pwr_enablebkp(false);
}
}
#else
# define rcc_resetbkp()
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_clockconfig
*
* Description:
* Called to establish the clock settings based on the values in board.h.
* This function (by default) will reset most everything, enable the PLL,
* and enable peripheral clocking for all peripherals enabled in the NuttX
* configuration file.
*
* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking
* will be enabled by an externally provided, board-specific function
* called stm32_board_clockconfig().
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void stm32_clockconfig(void)
{
/* Make sure that we are starting in the reset state */
rcc_reset();
/* Reset backup domain if appropriate */
rcc_resetbkp();
#if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
/* Invoke Board Custom Clock Configuration */
stm32_board_clockconfig();
#else
/* Invoke standard, fixed clock configuration based on definitions
* in board.h
*/
stm32_stdclockconfig();
#endif
/* Enable peripheral clocking */
rcc_enableperipherals();
#ifdef CONFIG_STM32_SYSCFG_IOCOMPENSATION
/* Enable I/O Compensation */
stm32_iocompensation();
#endif
}
/****************************************************************************
* Name: stm32_clockenable
*
* Description:
* Re-enable the clock and restore the clock settings based on settings
* in board.h. This function is only available to support low-power
* modes of operation: When re-awakening from deep-sleep modes, it is
* necessary to re-enable/re-start the PLL
*
* This functional performs a subset of the operations performed by
* stm32_clockconfig(): It does not reset any devices, and it does not
* reset the currently enabled peripheral clocks.
*
* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking
* will be enabled by an externally provided, board-specific function
* called stm32_board_clockconfig().
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_PM
void stm32_clockenable(void)
{
#if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
/* Invoke Board Custom Clock Configuration */
stm32_board_clockconfig();
#else
/* Invoke standard, fixed clock configuration based on definitions
* in board.h
*/
stm32_stdclockconfig();
#endif
}
#endif

2
arch/arm/src/stm32/stm32g4xxxx_rcc.c → arch/arm/src/stm32g4/stm32g4xxxx_rcc.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/stm32g4xxxx_rcc.c
* arch/arm/src/stm32g4/stm32g4xxxx_rcc.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/b-g474e-dpow1/CMakeLists.txt → boards/arm/stm32g4/b-g431b-esc1/CMakeLists.txt
View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32/b-g474e-dpow1/CMakeLists.txt
# boards/arm/stm32g4/b-g431b-esc1/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

0
boards/arm/stm32/b-g431b-esc1/Kconfig → boards/arm/stm32g4/b-g431b-esc1/Kconfig
View file

2
boards/arm/stm32/b-g431b-esc1/configs/can/defconfig → boards/arm/stm32g4/b-g431b-esc1/configs/can/defconfig
View file

@ -14,7 +14,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-g431b-esc1"
CONFIG_ARCH_BOARD_B_G431B_ESC1=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431C=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/b-g431b-esc1/configs/cansock/defconfig → boards/arm/stm32g4/b-g431b-esc1/configs/cansock/defconfig
View file

@ -12,7 +12,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-g431b-esc1"
CONFIG_ARCH_BOARD_B_G431B_ESC1=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431C=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/b-g431b-esc1/configs/foc_b16/defconfig → boards/arm/stm32g4/b-g431b-esc1/configs/foc_b16/defconfig
View file

@ -14,7 +14,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-g431b-esc1"
CONFIG_ARCH_BOARD_B_G431B_ESC1=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431C=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/b-g431b-esc1/configs/foc_f32/defconfig → boards/arm/stm32g4/b-g431b-esc1/configs/foc_f32/defconfig
View file

@ -14,7 +14,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-g431b-esc1"
CONFIG_ARCH_BOARD_B_G431B_ESC1=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431C=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/b-g431b-esc1/configs/nsh/defconfig → boards/arm/stm32g4/b-g431b-esc1/configs/nsh/defconfig
View file

@ -14,7 +14,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-g431b-esc1"
CONFIG_ARCH_BOARD_B_G431B_ESC1=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431C=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/b-g431b-esc1/include/board.h → boards/arm/stm32g4/b-g431b-esc1/include/board.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/include/board.h
* boards/arm/stm32g4/b-g431b-esc1/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/nucleo-g431kb/scripts/Make.defs → boards/arm/stm32g4/b-g431b-esc1/scripts/Make.defs
View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32/nucleo-g431kb/scripts/Make.defs
# boards/arm/stm32g4/b-g431b-esc1/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32/b-g431b-esc1/scripts/ld.script → boards/arm/stm32g4/b-g431b-esc1/scripts/ld.script
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/scripts/ld.script
* boards/arm/stm32g4/b-g431b-esc1/scripts/ld.script
*
* SPDX-License-Identifier: Apache-2.0
*

0
boards/arm/stm32/b-g431b-esc1/src/.gitignore → boards/arm/stm32g4/b-g431b-esc1/src/.gitignore vendored
View file

2
boards/arm/stm32/b-g431b-esc1/src/CMakeLists.txt → boards/arm/stm32g4/b-g431b-esc1/src/CMakeLists.txt
View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32/b-g431b-esc1/src/CMakeLists.txt
# boards/arm/stm32g4/b-g431b-esc1/src/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32/b-g431b-esc1/src/Make.defs → boards/arm/stm32g4/b-g431b-esc1/src/Make.defs
View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32/b-g431b-esc1/src/Make.defs
# boards/arm/stm32g4/b-g431b-esc1/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32/b-g431b-esc1/src/b-g431b-esc1.h → boards/arm/stm32g4/b-g431b-esc1/src/b-g431b-esc1.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/src/b-g431b-esc1.h
* boards/arm/stm32g4/b-g431b-esc1/src/b-g431b-esc1.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/b-g431b-esc1/src/stm32_autoleds.c → boards/arm/stm32g4/b-g431b-esc1/src/stm32_autoleds.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/src/stm32_autoleds.c
* boards/arm/stm32g4/b-g431b-esc1/src/stm32_autoleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/b-g431b-esc1/src/stm32_boot.c → boards/arm/stm32g4/b-g431b-esc1/src/stm32_boot.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/src/stm32_boot.c
* boards/arm/stm32g4/b-g431b-esc1/src/stm32_boot.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/b-g431b-esc1/src/stm32_bringup.c → boards/arm/stm32g4/b-g431b-esc1/src/stm32_bringup.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/src/stm32_bringup.c
* boards/arm/stm32g4/b-g431b-esc1/src/stm32_bringup.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/b-g431b-esc1/src/stm32_buttons.c → boards/arm/stm32g4/b-g431b-esc1/src/stm32_buttons.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/src/stm32_buttons.c
* boards/arm/stm32g4/b-g431b-esc1/src/stm32_buttons.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/b-g431b-esc1/src/stm32_can.c → boards/arm/stm32g4/b-g431b-esc1/src/stm32_can.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/src/stm32_can.c
* boards/arm/stm32g4/b-g431b-esc1/src/stm32_can.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/b-g431b-esc1/src/stm32_cansock.c → boards/arm/stm32g4/b-g431b-esc1/src/stm32_cansock.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/src/stm32_cansock.c
* boards/arm/stm32g4/b-g431b-esc1/src/stm32_cansock.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/b-g431b-esc1/src/stm32_foc.c → boards/arm/stm32g4/b-g431b-esc1/src/stm32_foc.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/src/stm32_foc.c
* boards/arm/stm32g4/b-g431b-esc1/src/stm32_foc.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/b-g431b-esc1/src/stm32_userleds.c → boards/arm/stm32g4/b-g431b-esc1/src/stm32_userleds.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/src/stm32_userleds.c
* boards/arm/stm32g4/b-g431b-esc1/src/stm32_userleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

23
boards/arm/stm32g4/b-g474e-dpow1/CMakeLists.txt Normal file
View file

@ -0,0 +1,23 @@
# ##############################################################################
# boards/arm/stm32g4/b-g474e-dpow1/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
add_subdirectory(src)

0
boards/arm/stm32/b-g474e-dpow1/Kconfig → boards/arm/stm32g4/b-g474e-dpow1/Kconfig
View file

2
boards/arm/stm32/b-g474e-dpow1/configs/buckboost/defconfig → boards/arm/stm32g4/b-g474e-dpow1/configs/buckboost/defconfig
View file

@ -12,7 +12,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-g474e-dpow1"
CONFIG_ARCH_BOARD_B_G474E_DPOW1=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G474R=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/b-g474e-dpow1/configs/nsh/defconfig → boards/arm/stm32g4/b-g474e-dpow1/configs/nsh/defconfig
View file

@ -11,7 +11,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-g474e-dpow1"
CONFIG_ARCH_BOARD_B_G474E_DPOW1=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G474R=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/b-g474e-dpow1/configs/ostest/defconfig → boards/arm/stm32g4/b-g474e-dpow1/configs/ostest/defconfig
View file

@ -11,7 +11,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-g474e-dpow1"
CONFIG_ARCH_BOARD_B_G474E_DPOW1=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G474R=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/b-g474e-dpow1/include/board.h → boards/arm/stm32g4/b-g474e-dpow1/include/board.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/include/board.h
* boards/arm/stm32g4/b-g474e-dpow1/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/nucleo-g431rb/scripts/Make.defs → boards/arm/stm32g4/b-g474e-dpow1/scripts/Make.defs
View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32/nucleo-g431rb/scripts/Make.defs
# boards/arm/stm32g4/b-g474e-dpow1/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32/b-g474e-dpow1/scripts/ld.script → boards/arm/stm32g4/b-g474e-dpow1/scripts/ld.script
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/scripts/ld.script
* boards/arm/stm32g4/b-g474e-dpow1/scripts/ld.script
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/b-g474e-dpow1/scripts/ld.script.dfu → boards/arm/stm32g4/b-g474e-dpow1/scripts/ld.script.dfu
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/scripts/ld.script
* boards/arm/stm32g4/b-g474e-dpow1/scripts/ld.script
*
* SPDX-License-Identifier: Apache-2.0
*

0
boards/arm/stm32/b-g474e-dpow1/src/.gitignore → boards/arm/stm32g4/b-g474e-dpow1/src/.gitignore vendored
View file

2
boards/arm/stm32/b-g474e-dpow1/src/CMakeLists.txt → boards/arm/stm32g4/b-g474e-dpow1/src/CMakeLists.txt
View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32/b-g474e-dpow1/src/CMakeLists.txt
# boards/arm/stm32g4/b-g474e-dpow1/src/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32/b-g474e-dpow1/src/Make.defs → boards/arm/stm32g4/b-g474e-dpow1/src/Make.defs
View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32/b-g474e-dpow1/src/Make.defs
# boards/arm/stm32g4/b-g474e-dpow1/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32/b-g474e-dpow1/src/b-g474e-dpow1.h → boards/arm/stm32g4/b-g474e-dpow1/src/b-g474e-dpow1.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/src/b-g474e-dpow1.h
* boards/arm/stm32g4/b-g474e-dpow1/src/b-g474e-dpow1.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/b-g474e-dpow1/src/stm32_autoleds.c → boards/arm/stm32g4/b-g474e-dpow1/src/stm32_autoleds.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/src/stm32_autoleds.c
* boards/arm/stm32g4/b-g474e-dpow1/src/stm32_autoleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/b-g474e-dpow1/src/stm32_boot.c → boards/arm/stm32g4/b-g474e-dpow1/src/stm32_boot.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/src/stm32_boot.c
* boards/arm/stm32g4/b-g474e-dpow1/src/stm32_boot.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/b-g474e-dpow1/src/stm32_smps.c → boards/arm/stm32g4/b-g474e-dpow1/src/stm32_smps.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/src/stm32_smps.c
* boards/arm/stm32g4/b-g474e-dpow1/src/stm32_smps.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/b-g474e-dpow1/src/stm32_userleds.c → boards/arm/stm32g4/b-g474e-dpow1/src/stm32_userleds.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/src/stm32_userleds.c
* boards/arm/stm32g4/b-g474e-dpow1/src/stm32_userleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

25
boards/arm/stm32g4/common/CMakeLists.txt Normal file
View file

@ -0,0 +1,25 @@
# ##############################################################################
# boards/arm/stm32g4/common/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
if(CONFIG_ARCH_BOARD_COMMON)
add_subdirectory(${NUTTX_DIR}/boards/arm/common/stm32 stm32_common)
endif()

6
boards/arm/stm32g4/common/Kconfig Normal file
View file

@ -0,0 +1,6 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
source "boards/arm/common/stm32/Kconfig"

38
boards/arm/stm32g4/common/Makefile Normal file
View file

@ -0,0 +1,38 @@
#############################################################################
# boards/arm/stm32g4/common/Makefile
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
#############################################################################
include $(TOPDIR)/Make.defs
STM32_BOARD_COMMON_DIR := $(TOPDIR)$(DELIM)boards$(DELIM)arm$(DELIM)common$(DELIM)stm32
STM32_COMMON_SRCDIR := $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)common$(DELIM)stm32
include board/Make.defs
include $(STM32_BOARD_COMMON_DIR)$(DELIM)src$(DELIM)Make.defs
DEPPATH += --dep-path board
include $(TOPDIR)/boards/Board.mk
ARCHSRCDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src
BOARDDIR = $(ARCHSRCDIR)$(DELIM)board
CFLAGS += ${INCDIR_PREFIX}$(BOARDDIR)$(DELIM)include
CFLAGS += ${INCDIR_PREFIX}$(STM32_COMMON_SRCDIR)

23
boards/arm/stm32g4/nucleo-g431kb/CMakeLists.txt Normal file
View file

@ -0,0 +1,23 @@
# ##############################################################################
# boards/arm/stm32g4/nucleo-g431kb/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
add_subdirectory(src)

0
boards/arm/stm32/nucleo-g431kb/Kconfig → boards/arm/stm32g4/nucleo-g431kb/Kconfig
View file

2
boards/arm/stm32/nucleo-g431kb/configs/comp/defconfig → boards/arm/stm32g4/nucleo-g431kb/configs/comp/defconfig
View file

@ -9,7 +9,7 @@ CONFIG_ANALOG=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431kb"
CONFIG_ARCH_BOARD_NUCLEO_G431KB=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431K=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/nucleo-g431kb/configs/nsh/defconfig → boards/arm/stm32g4/nucleo-g431kb/configs/nsh/defconfig
View file

@ -13,7 +13,7 @@
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431kb"
CONFIG_ARCH_BOARD_NUCLEO_G431KB=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431K=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/nucleo-g431kb/configs/pwm/defconfig → boards/arm/stm32g4/nucleo-g431kb/configs/pwm/defconfig
View file

@ -8,7 +8,7 @@
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431kb"
CONFIG_ARCH_BOARD_NUCLEO_G431KB=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431K=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/nucleo-g431kb/include/board.h → boards/arm/stm32g4/nucleo-g431kb/include/board.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-g431kb/include/board.h
* boards/arm/stm32g4/nucleo-g431kb/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/b-g474e-dpow1/scripts/Make.defs → boards/arm/stm32g4/nucleo-g431kb/scripts/Make.defs
View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32/b-g474e-dpow1/scripts/Make.defs
# boards/arm/stm32g4/nucleo-g431kb/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32/nucleo-g431kb/scripts/ld.script → boards/arm/stm32g4/nucleo-g431kb/scripts/ld.script
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-g431kb/scripts/ld.script
* boards/arm/stm32g4/nucleo-g431kb/scripts/ld.script
*
* SPDX-License-Identifier: Apache-2.0
*

0
boards/arm/stm32/nucleo-g431kb/src/.gitignore → boards/arm/stm32g4/nucleo-g431kb/src/.gitignore vendored
View file

2
boards/arm/stm32/nucleo-g431kb/src/CMakeLists.txt → boards/arm/stm32g4/nucleo-g431kb/src/CMakeLists.txt
View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32/nucleo-g431kb/src/CMakeLists.txt
# boards/arm/stm32g4/nucleo-g431kb/src/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32/nucleo-g431kb/src/Make.defs → boards/arm/stm32g4/nucleo-g431kb/src/Make.defs
View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32/nucleo-g431kb/src/Make.defs
# boards/arm/stm32g4/nucleo-g431kb/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32/nucleo-g431kb/src/nucleo-g431kb.h → boards/arm/stm32g4/nucleo-g431kb/src/nucleo-g431kb.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-g431kb/src/nucleo-g431kb.h
* boards/arm/stm32g4/nucleo-g431kb/src/nucleo-g431kb.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/nucleo-g431kb/src/stm32_autoleds.c → boards/arm/stm32g4/nucleo-g431kb/src/stm32_autoleds.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-g431kb/src/stm32_autoleds.c
* boards/arm/stm32g4/nucleo-g431kb/src/stm32_autoleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/nucleo-g431kb/src/stm32_boot.c → boards/arm/stm32g4/nucleo-g431kb/src/stm32_boot.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-g431kb/src/stm32_boot.c
* boards/arm/stm32g4/nucleo-g431kb/src/stm32_boot.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c → boards/arm/stm32g4/nucleo-g431kb/src/stm32_bringup.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c
* boards/arm/stm32g4/nucleo-g431kb/src/stm32_bringup.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/nucleo-g431kb/src/stm32_comp.c → boards/arm/stm32g4/nucleo-g431kb/src/stm32_comp.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-g431kb/src/stm32_comp.c
* boards/arm/stm32g4/nucleo-g431kb/src/stm32_comp.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/nucleo-g431kb/src/stm32_dac.c → boards/arm/stm32g4/nucleo-g431kb/src/stm32_dac.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-g431kb/src/stm32_dac.c
* boards/arm/stm32g4/nucleo-g431kb/src/stm32_dac.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/nucleo-g431kb/src/stm32_pwm.c → boards/arm/stm32g4/nucleo-g431kb/src/stm32_pwm.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-g431kb/src/stm32_pwm.c
* boards/arm/stm32g4/nucleo-g431kb/src/stm32_pwm.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32/nucleo-g431kb/src/stm32_userleds.c → boards/arm/stm32g4/nucleo-g431kb/src/stm32_userleds.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-g431kb/src/stm32_userleds.c
* boards/arm/stm32g4/nucleo-g431kb/src/stm32_userleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

23
boards/arm/stm32g4/nucleo-g431rb/CMakeLists.txt Normal file
View file

@ -0,0 +1,23 @@
# ##############################################################################
# boards/arm/stm32g4/nucleo-g431rb/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
add_subdirectory(src)

0
boards/arm/stm32/nucleo-g431rb/Kconfig → boards/arm/stm32g4/nucleo-g431rb/Kconfig
View file

2
boards/arm/stm32/nucleo-g431rb/configs/adc/defconfig → boards/arm/stm32g4/nucleo-g431rb/configs/adc/defconfig
View file

@ -13,7 +13,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431R=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/nucleo-g431rb/configs/can/defconfig → boards/arm/stm32g4/nucleo-g431rb/configs/can/defconfig
View file

@ -14,7 +14,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431R=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/nucleo-g431rb/configs/cansock/defconfig → boards/arm/stm32g4/nucleo-g431rb/configs/cansock/defconfig
View file

@ -12,7 +12,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431R=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/nucleo-g431rb/configs/cordic/defconfig → boards/arm/stm32g4/nucleo-g431rb/configs/cordic/defconfig
View file

@ -14,7 +14,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431R=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/nucleo-g431rb/configs/ihm16m1_b16/defconfig → boards/arm/stm32g4/nucleo-g431rb/configs/ihm16m1_b16/defconfig
View file

@ -15,7 +15,7 @@ CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431R=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/nucleo-g431rb/configs/ihm16m1_f32/defconfig → boards/arm/stm32g4/nucleo-g431rb/configs/ihm16m1_f32/defconfig
View file

@ -15,7 +15,7 @@ CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431R=y
CONFIG_ARCH_CHIP_STM32G4=y

2
boards/arm/stm32/nucleo-g431rb/configs/nsh/defconfig → boards/arm/stm32g4/nucleo-g431rb/configs/nsh/defconfig
View file

@ -14,7 +14,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32g4"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431R=y
CONFIG_ARCH_CHIP_STM32G4=y

Some files were not shown because too many files have changed in this diff Show more