!arch/stm32: move stm32f3 to its own directory

BREAKING CHANGE:

Part of splitting the legacy stm32 super-directory; relocates
the stm32f3 sources, headers and boards into arch/arm/src/stm32f3,
arch/arm/include/stm32f3 and boards/arm/stm32f3.

Signed-off-by: raiden00pl <raiden00@railab.me>
This commit is contained in:
raiden00pl 2026-05-25 22:44:13 +02:00 committed by Xiang Xiao
parent 420aec6313
commit 4b3f2c61bb
164 changed files with 2093 additions and 278 deletions

View file

@ -0,0 +1,627 @@
/****************************************************************************
* arch/arm/include/stm32f3/chip.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_STM32F3_CHIP_H
#define __ARCH_ARM_INCLUDE_STM32F3_CHIP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Get customizations for each supported chip and provide alternate function
* pin-mapping
*
* NOTE: Each GPIO pin may serve either for general purpose I/O or for a
* special alternate function (such as USART, CAN, USB, SDIO, etc.). That
* particular pin-mapping will depend on the package and STM32 family. If
* you are incorporating a new STM32 chip into NuttX, you will need to add
* the pin-mapping to a header file and to include that header file below.
* The chip-specific pin-mapping is defined in the chip datasheet.
*/
#if defined(CONFIG_ARCH_CHIP_STM32F302K6) || defined(CONFIG_ARCH_CHIP_STM32F302K8)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 1 /* (1) Advanced 16-bit timers with DMA: TIM1 (no TIM8) */
# define STM32_NGTIM 6 /* (2) 16-bit general timers with DMA: TIM3 and TIM4
* (1) 32-bit general timers with DMA: TIM2
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 1 /* (1) Basic timers: TIM6 (no TIM7) */
# define STM32_NDMA 1 /* (1) DMA1 (7 channels) */
# define STM32_NSPI 2 /* (3) SPI1-3 */
# define STM32_NI2S 0 /* (0) No I2S */
# define STM32_NUSART 2 /* (2) USART1-2, no UARTs */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 3 /* (3) I2C1-3 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* USB FS device, but no USB OTG FS/HS */
# define STM32_NGPIO 24 /* GPIOA-F */
# define STM32_NADC 1 /* (1) 12-bit ADC1 */
# define STM32_NDAC 1 /* (1) 12-bit DAC1, 1 channel */
# define STM32_NCMP 2 /* (2) Ultra-fast analog comparators: COMP2 and COMP4 */
# define STM32_NPGA 1 /* (1) Operational amplifiers: OPAMP */
# define STM32_NCAPSENSE 13 /* (13) Capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F302C6) || defined(CONFIG_ARCH_CHIP_STM32F302C8)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 1 /* (1) Advanced 16-bit timers with DMA: TIM1 (no TIM8) */
# define STM32_NGTIM 6 /* (2) 16-bit general timers with DMA: TIM3 and TIM4
* (1) 32-bit general timers with DMA: TIM2
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 1 /* (1) Basic timers: TIM6 (no TIM7) */
# define STM32_NDMA 1 /* (1) DMA1 (7 channels) */
# define STM32_NSPI 2 /* (3) SPI1-3 */
# define STM32_NI2S 0 /* (0) No I2S */
# define STM32_NUSART 3 /* (3) USART1-3, no UARTs */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 3 /* (3) I2C1-3 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* USB FS device, but no USB OTG FS/HS */
# define STM32_NGPIO 37 /* GPIOA-F */
# define STM32_NADC 1 /* (1) 12-bit ADC1 */
# define STM32_NDAC 1 /* (1) 12-bit DAC1, 1 channel */
# define STM32_NCMP 3 /* (3) Ultra-fast analog comparators: COMP2, COMP4 and COMP6*/
# define STM32_NPGA 1 /* (1) Operational amplifiers: OPAMP */
# define STM32_NCAPSENSE 17 /* (17) Capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F302R6) || defined(CONFIG_ARCH_CHIP_STM32F302R8)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 1 /* (1) Advanced 16-bit timers with DMA: TIM1 (no TIM8) */
# define STM32_NGTIM 6 /* (2) 16-bit general timers with DMA: TIM3 and TIM4
* (1) 32-bit general timers with DMA: TIM2
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 1 /* (1) Basic timers: TIM6 (no TIM7) */
# define STM32_NDMA 1 /* (1) DMA1 (7 channels) */
# define STM32_NSPI 2 /* (3) SPI1-3 */
# define STM32_NI2S 0 /* (0) No I2S */
# define STM32_NUSART 3 /* (2) USART1-3, no UARTs */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 3 /* (3) I2C1-3 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* USB FS device, but no USB OTG FS/HS */
# define STM32_NGPIO 51 /* GPIOA-F */
# define STM32_NADC 1 /* (1) 12-bit ADC1 */
# define STM32_NDAC 1 /* (1) 12-bit DAC1, 1 channel */
# define STM32_NCMP 3 /* (3) Ultra-fast analog comparators: COMP2, COMP4 and COMP6*/
# define STM32_NPGA 1 /* (1) Operational amplifiers: OPAMP */
# define STM32_NCAPSENSE 18 /* (18) Capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F302CB) || defined(CONFIG_ARCH_CHIP_STM32F302CC)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 1 /* (1) Advanced 16-bit timers with DMA: TIM1 (no TIM8) */
# define STM32_NGTIM 6 /* (2) 16-bit general timers with DMA: TIM3 and TIM4
* (1) 32-bit general timers with DMA: TIM2
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 1 /* (1) Basic timers: TIM6 (no TIM7) */
# define STM32_NDMA 2 /* (2) DMA1 (7 channels) and DMA2 (5 channels) */
# define STM32_NSPI 3 /* (3) SPI1-3 */
# define STM32_NI2S 0 /* (0) No I2S */
# define STM32_NUSART 3 /* (3) No UART1-3, no UARTs */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 2 /* (2) I2C1-2 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* USB FS device, but no USB OTG FS/HS */
# define STM32_NGPIO 37 /* GPIOA-F */
# define STM32_NADC 2 /* (2) 12-bit ADC1-2 */
# define STM32_NDAC 1 /* (1) 12-bit DAC1, 1 channel */
# define STM32_NCAPSENSE 0 /* (0) No capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F302RB) || defined(CONFIG_ARCH_CHIP_STM32F302RC)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 1 /* (1) Advanced 16-bit timers with DMA: TIM1 (no TIM8) */
# define STM32_NGTIM 6 /* (2) 16-bit general timers with DMA: TIM3 and TIM4
* (1) 32-bit general timers with DMA: TIM2
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 1 /* (1) Basic timers: TIM6 (no TIM7) */
# define STM32_NDMA 2 /* (2) DMA1 (7 channels) and DMA2 (5 channels) */
# define STM32_NSPI 3 /* (3) SPI1-3 */
# define STM32_NI2S 0 /* (0) No I2S */
# define STM32_NUSART 5 /* (5) USART1-3, UART4-5 */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 2 /* (2) I2C1-2 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* USB FS device, but no USB OTG FS/HS */
# define STM32_NGPIO 52 /* GPIOA-F */
# define STM32_NADC 2 /* (2) 12-bit ADC1-2 */
# define STM32_NDAC 1 /* (1) 12-bit DAC1, 1 channel */
# define STM32_NCAPSENSE 0 /* (0) No capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F302VB) || defined(CONFIG_ARCH_CHIP_STM32F302VC)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 1 /* (1) Advanced 16-bit timers with DMA: TIM1 (no TIM8) */
# define STM32_NGTIM 6 /* (2) 16-bit general timers with DMA: TIM3 and TIM4
* (1) 32-bit general timers with DMA: TIM2
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 1 /* (1) Basic timers: TIM6 (no TIM7) */
# define STM32_NDMA 2 /* (2) DMA1 (7 channels) and DMA2 (5 channels) */
# define STM32_NSPI 3 /* (3) SPI1-3 */
# define STM32_NI2S 0 /* (0) No I2S */
# define STM32_NUSART 5 /* (5) USART1-3, UART4-5 */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 2 /* (2) I2C1-2 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* USB FS device, but no USB OTG FS/HS */
# define STM32_NGPIO 87 /* GPIOA-F */
# define STM32_NADC 2 /* (2) 12-bit ADC1-2 */
# define STM32_NDAC 1 /* (1) 12-bit DAC1, 1 channel */
# define STM32_NCAPSENSE 0 /* (0) No capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F303K6) || defined(CONFIG_ARCH_CHIP_STM32F303K8)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 1 /* (1) Advanced 16-bit timers with DMA: TIM1 */
# define STM32_NGTIM 5 /* (1) 16-bit general timers with DMA: TIM3
* (1) 32-bit general timers with DMA: TIM2
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 2 /* (2) Basic timers: TIM6 and TIM7 */
# define STM32_NDMA 1 /* (1) DMA1 (7 channels) */
# define STM32_NSPI 1 /* (1) SPI1 */
# define STM32_NI2S 0 /* (0) No I2S */
# define STM32_NUSART 2 /* (2) USART1-2, no UARTs */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 1 /* (1) I2C1 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */
# define STM32_NGPIO 25 /* GPIOA-F */
# define STM32_NADC 2 /* (2) 12-bit ADC1-2 */
# define STM32_NDAC 3 /* (3) 12-bit DAC1-2, 3 channels */
# define STM32_NCAPSENSE 0 /* (0) No capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F303C6) || defined(CONFIG_ARCH_CHIP_STM32F303C8)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 1 /* (1) Advanced 16-bit timers with DMA: TIM1 */
# define STM32_NGTIM 5 /* (1) 16-bit general timers with DMA: TIM3
* (1) 32-bit general timers with DMA: TIM2
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 2 /* (2) Basic timers: TIM6 and TIM7 */
# define STM32_NDMA 1 /* (1) DMA1 (7 channels) */
# define STM32_NSPI 1 /* (1) SPI1 */
# define STM32_NI2S 0 /* (0) No I2S */
# define STM32_NUSART 3 /* (3) USART1-3, no UARTs */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 1 /* (1) I2C1 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */
# define STM32_NGPIO 37 /* GPIOA-F */
# define STM32_NADC 2 /* (2) 12-bit ADC1-2 */
# define STM32_NDAC 3 /* (3) 12-bit DAC1-2, 3 channels */
# define STM32_NCAPSENSE 0 /* (0) No capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F303CB) || defined(CONFIG_ARCH_CHIP_STM32F303CC)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 2 /* (2) Advanced 16-bit timers with DMA: TIM1 and TIM8 */
# define STM32_NGTIM 6 /* (2) 16-bit general timers with DMA: TIM3 and TIM4
* (1) 32-bit general timers with DMA: TIM2
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 2 /* (2) Basic timers: TIM6 and TIM7 */
# define STM32_NDMA 2 /* (2) DMA1 (7 channels) and DMA2 (5 channels) */
# define STM32_NSPI 3 /* (3) SPI1-3 */
# define STM32_NI2S 2 /* (2) I2S1-2 (multiplexed with SPI2-3) */
# define STM32_NUSART 3 /* (3) No UART1-3, no UARTs */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 2 /* (2) I2C1-2 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* USB FS device, but no USB OTG FS/HS */
# define STM32_NGPIO 37 /* GPIOA-F */
# define STM32_NADC 4 /* (3) 12-bit ADC1-4 */
# define STM32_NDAC 2 /* (2) 12-bit DAC1, 2 channels */
# define STM32_NCAPSENSE 0 /* (0) No capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F303RB) || defined(CONFIG_ARCH_CHIP_STM32F303RC)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 2 /* (2) Advanced 16-bit timers with DMA: TIM1 and TIM8 */
# define STM32_NGTIM 6 /* (2) 16-bit general timers with DMA: TIM3 and TIM4
* (1) 32-bit general timers with DMA: TIM2
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 2 /* (2) Basic timers: TIM6 and TIM7 */
# define STM32_NDMA 2 /* (2) DMA1 (7 channels) and DMA2 (5 channels) */
# define STM32_NSPI 3 /* (3) SPI1-3 */
# define STM32_NI2S 2 /* (2) I2S1-2 (multiplexed with SPI2-3) */
# define STM32_NUSART 5 /* (5) USART1-3, UART4-5 */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 2 /* (2) I2C1-2 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* USB FS device, but no USB OTG FS/HS */
# define STM32_NGPIO 52 /* GPIOA-F */
# define STM32_NADC 4 /* (3) 12-bit ADC1-4 */
# define STM32_NDAC 2 /* (2) 12-bit DAC1, 2 channels */
# define STM32_NCAPSENSE 0 /* (0) No capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F303RD) || defined(CONFIG_ARCH_CHIP_STM32F303RE)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 2 /* (2) Advanced 16-bit timers with DMA: TIM1 and TIM8 */
# define STM32_NGTIM 6 /* (2) 16-bit general timers with DMA: TIM3 and TIM4
* (1) 32-bit general timers with DMA: TIM2
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 2 /* (2) Basic timers: TIM6 and TIM7 */
# define STM32_NDMA 2 /* (2) DMA1 (7 channels) and DMA2 (5 channels) */
# define STM32_NSPI 4 /* (4) SPI1-4 */
# define STM32_NI2S 2 /* (2) I2S1-2 (multiplexed with SPI2-3) */
# define STM32_NUSART 5 /* (5) USART1-3, UART4-5 */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 3 /* (2) I2C1-3 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* USB FS device, but no USB OTG FS/HS */
# define STM32_NGPIO 51 /* GPIOA-F */
# define STM32_NADC 4 /* (4) 12-bit ADC1-4 */
# define STM32_NDAC 2 /* (2) 12-bit DAC1, 2 channels */
# define STM32_NCAPSENSE 0 /* (0) No capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F303VB) || defined(CONFIG_ARCH_CHIP_STM32F303VC)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 2 /* (2) Advanced 16-bit timers with DMA: TIM1 and TIM8 */
# define STM32_NGTIM 6 /* (2) 16-bit general timers with DMA: TIM3 and TIM4
* (1) 32-bit general timers with DMA: TIM2
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 2 /* (2) Basic timers: TIM6 and TIM7 */
# define STM32_NDMA 2 /* (2) DMA1 (7 channels) and DMA2 (5 channels) */
# define STM32_NSPI 3 /* (3) SPI1-3 */
# define STM32_NI2S 2 /* (2) I2S1-2 (multiplexed with SPI2-3) */
# define STM32_NUSART 5 /* (5) USART1-3, UART4-5 */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 2 /* (2) I2C1-2 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* USB FS device, but no USB OTG FS/HS */
# define STM32_NGPIO 87 /* GPIOA-F */
# define STM32_NADC 4 /* (3) 12-bit ADC1-4 */
# define STM32_NDAC 2 /* (2) 12-bit DAC1, 2 channels */
# define STM32_NCAPSENSE 0 /* (0) No capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F303RD) || defined(CONFIG_ARCH_CHIP_STM32F303RE)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 2 /* (2) Advanced 16-bit timers with DMA: TIM1 and TIM8 */
# define STM32_NGTIM 6 /* (5) 16-bit general timers
* (1) 32-bit general timers */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 2 /* (2) Basic timers: TIM6 and TIM7 */
# define STM32_NDMA 2 /* (2) DMA1 (7 channels) and DMA2 (5 channels) */
# define STM32_NSPI 4 /* (4) SPI1-4 */
# define STM32_NI2S 2 /* (2) I2S1-2 (multiplexed with SPI2-3) */
# define STM32_NUSART 5 /* (5) USART1-3, UART4-5 */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 3 /* (3) I2C1-3 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* USB FS device, but no USB OTG FS/HS */
# define STM32_NGPIO 51 /* GPIOA-F */
# define STM32_NADC 4 /* (4) 12-bit ADC1-4 */
# define STM32_NDAC 2 /* (2) 12-bit DAC1, 2 channels */
# define STM32_NCAPSENSE 18 /* (18) No capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F303VD) || defined(CONFIG_ARCH_CHIP_STM32F303VE)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 3 /* (3) Advanced 16-bit timers with DMA: TIM1, TIM8 and TIM20 */
# define STM32_NGTIM 6 /* (5) 16-bit general timers
* (1) 32-bit general timers */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 2 /* (2) Basic timers: TIM6 and TIM7 */
# define STM32_NDMA 2 /* (2) DMA1 (7 channels) and DMA2 (5 channels) */
# define STM32_NSPI 4 /* (4) SPI1-4 */
# define STM32_NI2S 2 /* (2) I2S1-2 (multiplexed with SPI2-3) */
# define STM32_NUSART 5 /* (5) USART1-3, UART4-5 */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 3 /* (3) I2C1-3 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* USB FS device, but no USB OTG FS/HS */
# define STM32_NGPIO 84 /* GPIOA-F (depends on package) */
# define STM32_NADC 4 /* (4) 12-bit ADC1-4 */
# define STM32_NDAC 2 /* (2) 12-bit DAC1, 2 channels */
# define STM32_NCAPSENSE 24 /* (24) No capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F303ZD) || defined(CONFIG_ARCH_CHIP_STM32F303ZE)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 3 /* (3) Advanced 16-bit timers with DMA: TIM1, TIM8 and TIM20 */
# define STM32_NGTIM 6 /* (5) 16-bit general timers
* (1) 32-bit general timers */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 2 /* (2) Basic timers: TIM6 and TIM7 */
# define STM32_NDMA 2 /* (2) DMA1 (7 channels) and DMA2 (5 channels) */
# define STM32_NSPI 4 /* (4) SPI1-4 */
# define STM32_NI2S 2 /* (2) I2S1-2 (multiplexed with SPI2-3) */
# define STM32_NUSART 5 /* (5) USART1-3, UART4-5 */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 3 /* (3) I2C1-3 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* USB FS device, but no USB OTG FS/HS */
# define STM32_NGPIO 115 /* GPIOA-F */
# define STM32_NADC 4 /* (4) 12-bit ADC1-4 */
# define STM32_NDAC 2 /* (2) 12-bit DAC1, 2 channels */
# define STM32_NCAPSENSE 24 /* (24) No capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F334K4) || defined(CONFIG_ARCH_CHIP_STM32F334K6) || defined(CONFIG_ARCH_CHIP_STM32F334K8)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_HRTIM 1 /* (1) High-resolution timer 16-bit, 10 channels: HRTIM1 */
# define STM32_NATIM 1 /* (1) Advanced 16-bit timers with DMA: TIM1*/
# define STM32_NGTIM 5 /* (1) 16-bit general timers with DMA: TIM3
* (1) 32-bit general timers with DMA: TIM2
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 2 /* (2) Basic timers: TIM6 and TIM7 */
# define STM32_NDMA 1 /* (1) DMA1 (7 channels) */
# define STM32_NSPI 1 /* (1) SPI1 */
# define STM32_NI2S 0 /* (0) No I2S1 */
# define STM32_NUSART 2 /* (2) USART1-2 */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 1 /* (1) I2C1 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* (0) No USB */
# define STM32_NGPIO 25 /* GPIOA-F */
# define STM32_NADC 2 /* (2) 12-bit ADC1-2 */
# define STM32_NDAC 3 /* (3) 12-bit DAC1-2, 3 channels */
# define STM32_NCMP 2 /* (2) Ultra-fast analog comparators: COMP2 and COMP4 */
# define STM32_NPGA 1 /* (1) Operational amplifiers: OPAMP */
# define STM32_NCAPSENSE 14 /* (14) Capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F334C4) || defined(CONFIG_ARCH_CHIP_STM32F334C6) || defined(CONFIG_ARCH_CHIP_STM32F334C8)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_HRTIM 1 /* (1) High-resolution timer 16-bit, 10 channels: HRTIM1 */
# define STM32_NATIM 1 /* (1) Advanced 16-bit timers with DMA: TIM1*/
# define STM32_NGTIM 5 /* (1) 16-bit general timers with DMA: TIM3
* (1) 32-bit general timers with DMA: TIM2
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 2 /* (2) Basic timers: TIM6 and TIM7 */
# define STM32_NDMA 1 /* (1) DMA1 (7 channels) */
# define STM32_NSPI 1 /* (1) SPI1 */
# define STM32_NI2S 0 /* (0) No I2S1 */
# define STM32_NUSART 3 /* (3) USART1-3 */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 1 /* (1) I2C1 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* (0) No USB */
# define STM32_NGPIO 37 /* GPIOA-F */
# define STM32_NADC 2 /* (2) 12-bit ADC1-2 */
# define STM32_NDAC 3 /* (3) 12-bit DAC1-2, 3 channels */
# define STM32_NCMP 3 /* (3) Ultra-fast analog comparators: COMP2, COMP4 and COMP6 */
# define STM32_NPGA 1 /* (1) Operational amplifiers: OPAMP */
# define STM32_NCAPSENSE 17 /* (17) Capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F334R4) || defined(CONFIG_ARCH_CHIP_STM32F334R6) || defined(CONFIG_ARCH_CHIP_STM32F334R8)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_HRTIM 1 /* (1) High-resolution timer 16-bit, 10 channels: HRTIM1 */
# define STM32_NATIM 1 /* (1) Advanced 16-bit timers with DMA: TIM1*/
# define STM32_NGTIM 5 /* (1) 16-bit general timers with DMA: TIM3
* (1) 32-bit general timers with DMA: TIM2
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 0 /* All timers have DMA */
# define STM32_NBTIM 2 /* (2) Basic timers: TIM6 and TIM7 */
# define STM32_NDMA 1 /* (1) DMA1 (7 channels) */
# define STM32_NSPI 1 /* (1) SPI1 */
# define STM32_NI2S 0 /* (0) No I2S1 */
# define STM32_NUSART 3 /* (3) USART1-3 */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 1 /* (1) I2C1 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* (0) No USB */
# define STM32_NGPIO 51 /* GPIOA-F */
# define STM32_NADC 2 /* (2) 12-bit ADC1-2 */
# define STM32_NDAC 3 /* (3) 12-bit DAC1-2, 3 channels */
# define STM32_NCMP 3 /* (3) Ultra-fast analog comparators: COMP2, COMP4 and COMP6 */
# define STM32_NPGA 1 /* (1) Operational amplifiers: OPAMP */
# define STM32_NCAPSENSE 18 /* (18) Capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F373C8) || defined(CONFIG_ARCH_CHIP_STM32F373CB) || defined(CONFIG_ARCH_CHIP_STM32F373CC)
# define STM32_NFSMC 0 /* No FSMC */
# define STM32_NATIM 0 /* (0) Advanced 16-bit timers with DMA: */
# define STM32_NGTIM 8 /* (3) 16-bit general timers with DMA: TIM3, TIM4 and TIM19
* (2) 32-bit general timers with DMA: TIM2 and TIM5
* (3) 16-bit general timers count-up timers with DMA: TIM15-17 */
# define STM32_NGTIMNDMA 3 /* (3) 16-bit general timers count-up timers without DMA: TIM12-14 */
# define STM32_NBTIM 3 /* (3) Basic timers: TIM6, TIM7 and TIM18 */
# define STM32_NDMA 2 /* (2) DMA1 (7 channels) and DMA2 (5 channels) */
# define STM32_NSPI 3 /* (3) SPI1-3 */
# define STM32_NI2S 3 /* (3) I2S1-2 (multiplexed with SPI1-3) */
# define STM32_NUSART 3 /* (3) USART1-3 */
# define STM32_NLPUART 0 /* No LPUART */
# define STM32_NI2C 2 /* (2) I2C1-2 */
# define STM32_NCAN 1 /* (1) CAN1 */
# define STM32_NSDIO 0 /* (0) No SDIO */
# define STM32_NLCD 0 /* (0) No LCD */
# define STM32_NUSBOTG 0 /* USB FS device, but no USB OTG FS/HS */
# define STM32_NGPIO 87 /* GPIOA-F */
# define STM32_NADC 1 /* (1) 12-bit ADC1 */
# define STM32_NSDADC 3 /* (3) 16-bit SDADC1-3 */
# define STM32_NDAC 3 /* (3) 12-bit DAC1-2, 3 channels */
# define STM32_NCAPSENSE 0 /* (0) No capacitive sensing channels */
# define STM32_NCRC 1 /* (1) CRC calculation unit */
# define STM32_NETHERNET 0 /* (0) No Ethernet MAC */
# define STM32_NRNG 0 /* (0) No random number generator (RNG) */
# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
/* STM23 F4 Family **********************************************************/
/* STM32F01xB/C Family Differences:
*
* PART PACKAGE FLASH SDIO ADC Channels
* ----------- ---------------- ----- ---- ------------
* STM32F401CB WLCSP49/UFQFPN48 128Kb No 10
* STM32F401RB LQFP64 128Kb Yes 16
* STM32F401VB UFBGA100/LQFP100 128Kb Yes 16
* STM32F401CC WLCSP49/UFQFPN48 256Kb No 10
* STM32F401RC LQFP64 256Kb Yes 16
* STM32F401VC UFBGA100/LQFP100 256Kb Yes 16
*/
#else
# error "Unsupported STM32 chip"
#endif
/* Peripheral IP versions ***************************************************/
/* Peripheral IP versions are invariant and should be decided here, not in
* Kconfig.
*
* REVISIT: Currently only SPI IP version is handled here, with others being
* handled in Kconfig. Those others need to be gradually refactored
* and resolved here.
*/
#if defined(CONFIG_STM32_STM32F30XX)
# define STM32_HAVE_IP_SPI_V3
#elif defined(CONFIG_STM32_STM32F33XX)
# define STM32_HAVE_IP_SPI_V1
#elif defined(CONFIG_STM32_STM32F37XX)
# define STM32_HAVE_IP_SPI_V3
#else
# error "Did not resolve peripheral IP versions!"
#endif
/* NVIC priority levels *****************************************************/
#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits set in minimum priority */
#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Four bits of interrupt priority used */
#endif /* __ARCH_ARM_INCLUDE_STM32F3_CHIP_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/include/stm32/irq.h
* arch/arm/include/stm32f3/irq.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -24,8 +24,8 @@
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_STM32_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_STM32F3_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32F3_IRQ_H
/****************************************************************************
* Included Files
@ -33,7 +33,7 @@
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <arch/stm32/chip.h>
#include <arch/stm32f3/chip.h>
/****************************************************************************
* Pre-processor Prototypes
@ -71,51 +71,14 @@
* Included Files
****************************************************************************/
#if defined(CONFIG_STM32_STM32L15XX)
# include <arch/stm32/stm32l15xxx_irq.h>
#elif defined(CONFIG_STM32_STM32F10XX)
# include <arch/stm32/stm32f10xxx_irq.h>
#elif defined(CONFIG_STM32_STM32F20XX)
# include <arch/stm32/stm32f20xxx_irq.h>
#elif defined(CONFIG_STM32_STM32F30XX)
# include <arch/stm32/stm32f30xxx_irq.h>
#if defined(CONFIG_STM32_STM32F30XX)
# include <arch/stm32f3/stm32f30xxx_irq.h>
#elif defined(CONFIG_STM32_STM32F33XX)
# include <arch/stm32/stm32f33xxx_irq.h>
# include <arch/stm32f3/stm32f33xxx_irq.h>
#elif defined(CONFIG_STM32_STM32F37XX)
# include <arch/stm32/stm32f37xxx_irq.h>
#elif defined(CONFIG_STM32_STM32F4XXX)
# include <arch/stm32/stm32f40xxx_irq.h>
#elif defined(CONFIG_STM32_STM32G4XXX)
# include <arch/stm32/stm32g4xxxx_irq.h>
# include <arch/stm32f3/stm32f37xxx_irq.h>
#else
# error "Unsupported STM32 chip"
# error "Unsupported STM32F3 chip"
#endif
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_STM32_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_STM32F3_IRQ_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/include/stm32/stm32f30xxx_irq.h
* arch/arm/include/stm32f3/stm32f30xxx_irq.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -43,7 +43,7 @@
* memory in the IRQ to handle mapping tables.
*
* Processor Exceptions (vectors 0-15). These common definitions can be
* found in nuttx/arch/arm/include/stm32/irq.h
* found in nuttx/arch/arm/include/stm32f3/irq.h
*
* External interrupts (vectors >= 16)
*/
@ -153,31 +153,4 @@
#define STM32_IRQ_NEXTINTS (82)
#define NR_IRQS (STM32_IRQ_FIRST + STM32_IRQ_NEXTINTS)
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_STM32_STM32F30XXX_IRQ_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/include/stm32/stm32f33xxx_irq.h
* arch/arm/include/stm32f3/stm32f33xxx_irq.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -43,7 +43,7 @@
* memory in the IRQ to handle mapping tables.
*
* Processor Exceptions (vectors 0-15). These common definitions can be
* found in nuttx/arch/arm/include/stm32/irq.h
* found in nuttx/arch/arm/include/stm32f3/irq.h
*
* External interrupts (vectors >= 16)
*/
@ -143,31 +143,4 @@
#define STM32_IRQ_NEXTINTS (82)
#define NR_IRQS (STM32_IRQ_FIRST + STM32_IRQ_NEXTINTS)
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_STM32F30XXX_IRQ_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/include/stm32/stm32f37xxx_irq.h
* arch/arm/include/stm32f3/stm32f37xxx_irq.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -43,7 +43,7 @@
* memory in the IRQ to handle mapping tables.
*
* Processor Exceptions (vectors 0-15). These common definitions can be
* found in nuttx/arch/arm/include/stm32/irq.h
* found in nuttx/arch/arm/include/stm32f3/irq.h
*
* External interrupts (vectors >= 16)
*/
@ -138,31 +138,4 @@
#define STM32_IRQ_NEXTINTS (82)
#define NR_IRQS (STM32_IRQ_FIRST + STM32_IRQ_NEXTINTS)
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_STM32F30XXX_IRQ_H */

View file

@ -0,0 +1,28 @@
# ##############################################################################
# arch/arm/src/stm32f3/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
set(SRCS)
list(APPEND SRCS stm32_rcc.c)
target_sources(arch PRIVATE ${SRCS})
add_subdirectory(${NUTTX_DIR}/arch/arm/src/common/stm32 stm32_common)

View file

@ -0,0 +1,626 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
comment "STM32 F3 configuration"
if ARCH_CHIP_STM32F3
choice
prompt "STM32F3 Chip Selection"
depends on ARCH_CHIP_STM32F3
config ARCH_CHIP_STM32F302K6
bool "STM32F302K6"
select STM32_STM32F30XX
select STM32_STM32F302
select STM32_HAVE_I2C3
config ARCH_CHIP_STM32F302K8
bool "STM32F302K8"
select STM32_STM32F30XX
select STM32_STM32F302
select STM32_HAVE_I2C3
config ARCH_CHIP_STM32F302C6
bool "STM32F302C6"
select STM32_STM32F30XX
select STM32_STM32F302
config ARCH_CHIP_STM32F302C8
bool "STM32F302C8"
select STM32_STM32F30XX
select STM32_STM32F302
config ARCH_CHIP_STM32F302R6
bool "STM32F302R6"
select STM32_STM32F30XX
select STM32_STM32F302
config ARCH_CHIP_STM32F302R8
bool "STM32F302R8"
select STM32_STM32F30XX
select STM32_STM32F302
config ARCH_CHIP_STM32F302CB
bool "STM32F302CB"
select STM32_STM32F30XX
select STM32_STM32F302
select STM32_HAVE_ADC2
select STM32_HAVE_USART3
config ARCH_CHIP_STM32F302CC
bool "STM32F302CC"
select STM32_STM32F30XX
select STM32_STM32F302
select STM32_HAVE_ADC2
select STM32_HAVE_USART3
config ARCH_CHIP_STM32F302RB
bool "STM32F302RB"
select STM32_STM32F30XX
select STM32_STM32F302
select STM32_HAVE_ADC2
select STM32_HAVE_USART3
select STM32_HAVE_UART4
select STM32_HAVE_UART5
config ARCH_CHIP_STM32F302RC
bool "STM32F302RC"
select STM32_STM32F30XX
select STM32_STM32F302
select STM32_HAVE_ADC2
select STM32_HAVE_USART3
select STM32_HAVE_UART4
select STM32_HAVE_UART5
config ARCH_CHIP_STM32F302VB
bool "STM32F302VB"
select STM32_STM32F30XX
select STM32_STM32F302
select STM32_HAVE_ADC2
select STM32_HAVE_USART3
select STM32_HAVE_UART4
select STM32_HAVE_UART5
config ARCH_CHIP_STM32F302VC
bool "STM32F302VC"
select STM32_STM32F30XX
select STM32_STM32F302
select STM32_HAVE_ADC2
select STM32_HAVE_USART3
select STM32_HAVE_UART4
select STM32_HAVE_UART5
config ARCH_CHIP_STM32F303K6
bool "STM32F303K6"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_DAC2
config ARCH_CHIP_STM32F303K8
bool "STM32F303K8"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_DAC2
config ARCH_CHIP_STM32F303C6
bool "STM32F303C6"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_DAC2
select STM32_HAVE_USART3
config ARCH_CHIP_STM32F303C8
bool "STM32F303C8"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_DAC2
select STM32_HAVE_USART3
config ARCH_CHIP_STM32F303CB
bool "STM32F303CB"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_ADC3
select STM32_HAVE_ADC4
select STM32_HAVE_I2C2
select STM32_HAVE_SPI2
select STM32_HAVE_SPI3
select STM32_HAVE_TIM4
select STM32_HAVE_TIM8
select STM32_HAVE_USART3
select STM32_HAVE_USBDEV
config ARCH_CHIP_STM32F303CC
bool "STM32F303CC"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_ADC3
select STM32_HAVE_ADC4
select STM32_HAVE_I2C2
select STM32_HAVE_SPI2
select STM32_HAVE_SPI3
select STM32_HAVE_TIM4
select STM32_HAVE_TIM8
select STM32_HAVE_USART3
select STM32_HAVE_USBDEV
config ARCH_CHIP_STM32F303RB
bool "STM32F303RB"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_ADC3
select STM32_HAVE_ADC4
select STM32_HAVE_I2C2
select STM32_HAVE_SPI2
select STM32_HAVE_SPI3
select STM32_HAVE_TIM4
select STM32_HAVE_TIM8
select STM32_HAVE_USART3
select STM32_HAVE_UART4
select STM32_HAVE_UART5
select STM32_HAVE_USBDEV
config ARCH_CHIP_STM32F303RC
bool "STM32F303RC"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_ADC3
select STM32_HAVE_ADC4
select STM32_HAVE_I2C2
select STM32_HAVE_SPI2
select STM32_HAVE_SPI3
select STM32_HAVE_TIM4
select STM32_HAVE_TIM8
select STM32_HAVE_USART3
select STM32_HAVE_UART4
select STM32_HAVE_UART5
select STM32_HAVE_USBDEV
config ARCH_CHIP_STM32F303RD
bool "STM32F303RD"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_ADC3
select STM32_HAVE_ADC4
select STM32_HAVE_I2C2
select STM32_HAVE_I2C3
select STM32_HAVE_SPI2
select STM32_HAVE_SPI3
select STM32_HAVE_SPI4
select STM32_HAVE_TIM4
select STM32_HAVE_TIM8
select STM32_HAVE_USART3
select STM32_HAVE_UART4
select STM32_HAVE_UART5
select STM32_HAVE_USBDEV
config ARCH_CHIP_STM32F303RE
bool "STM32F303RE"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_ADC3
select STM32_HAVE_ADC4
select STM32_HAVE_I2C2
select STM32_HAVE_I2C3
select STM32_HAVE_SPI2
select STM32_HAVE_SPI3
select STM32_HAVE_SPI4
select STM32_HAVE_TIM4
select STM32_HAVE_TIM8
select STM32_HAVE_USART3
select STM32_HAVE_UART4
select STM32_HAVE_UART5
select STM32_HAVE_USBDEV
config ARCH_CHIP_STM32F303VB
bool "STM32F303VB"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_ADC3
select STM32_HAVE_ADC4
select STM32_HAVE_I2C2
select STM32_HAVE_SPI2
select STM32_HAVE_SPI3
select STM32_HAVE_TIM4
select STM32_HAVE_TIM8
select STM32_HAVE_USART3
select STM32_HAVE_UART4
select STM32_HAVE_UART5
select STM32_HAVE_USBDEV
config ARCH_CHIP_STM32F303VC
bool "STM32F303VC"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_ADC3
select STM32_HAVE_ADC4
select STM32_HAVE_I2C2
select STM32_HAVE_SPI2
select STM32_HAVE_SPI3
select STM32_HAVE_TIM4
select STM32_HAVE_TIM8
select STM32_HAVE_USART3
select STM32_HAVE_UART4
select STM32_HAVE_UART5
select STM32_HAVE_USBDEV
config ARCH_CHIP_STM32F303VD
bool "STM32F303VD"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_ADC3
select STM32_HAVE_ADC4
select STM32_HAVE_USART3
config ARCH_CHIP_STM32F303VE
bool "STM32F303VE"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_ADC3
select STM32_HAVE_ADC4
select STM32_HAVE_USART3
config ARCH_CHIP_STM32F303ZD
bool "STM32F303ZD"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_ADC3
select STM32_HAVE_ADC4
select STM32_HAVE_USART3
config ARCH_CHIP_STM32F303ZE
bool "STM32F303ZE"
select STM32_STM32F30XX
select STM32_STM32F303
select STM32_HAVE_ADC3
select STM32_HAVE_ADC4
select STM32_HAVE_USART3
config ARCH_CHIP_STM32F334K4
bool "STM32F334K4"
select STM32_STM32F33XX
config ARCH_CHIP_STM32F334K6
bool "STM32F334K6"
select STM32_STM32F33XX
config ARCH_CHIP_STM32F334K8
bool "STM32F334K8"
select STM32_STM32F33XX
config ARCH_CHIP_STM32F334C4
bool "STM32F334C4"
select STM32_STM32F33XX
config ARCH_CHIP_STM32F334C6
bool "STM32F334C6"
select STM32_STM32F33XX
config ARCH_CHIP_STM32F334C8
bool "STM32F334C8"
select STM32_STM32F33XX
config ARCH_CHIP_STM32F334R4
bool "STM32F334R4"
select STM32_STM32F33XX
config ARCH_CHIP_STM32F334R6
bool "STM32F334R6"
select STM32_STM32F33XX
config ARCH_CHIP_STM32F334R8
bool "STM32F334R8"
select STM32_STM32F33XX
config ARCH_CHIP_STM32F372C8
bool "STM32F372C8"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F372R8
bool "STM32F372R8"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F372V8
bool "STM32F372V8"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F372CB
bool "STM32F372CB"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F372RB
bool "STM32F372RB"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F372VB
bool "STM32F372VB"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F372CC
bool "STM32F372CC"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F372RC
bool "STM32F372RC"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F372VC
bool "STM32F372VC"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F373C8
bool "STM32F373C8"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F373R8
bool "STM32F373R8"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F373V8
bool "STM32F373V8"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F373CB
bool "STM32F373CB"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F373RB
bool "STM32F373RB"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F373VB
bool "STM32F373VB"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F373CC
bool "STM32F373CC"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F373RC
bool "STM32F373RC"
select STM32_STM32F37XX
config ARCH_CHIP_STM32F373VC
bool "STM32F373VC"
select STM32_STM32F37XX
endchoice
endif
config STM32_STM32F30XX
bool
default n
select STM32_HAVE_DMA1
select STM32_HAVE_DMA2
select ARCH_CORTEXM4
select ARCH_HAVE_FPU
select STM32_HAVE_I2C1
select STM32_HAVE_SPI1
select STM32_HAVE_SYSCFG
select STM32_HAVE_USART1
select STM32_HAVE_USART2
select STM32_HAVE_CAN1
select STM32_HAVE_DAC1
select STM32_HAVE_TIM1
select STM32_HAVE_TIM2
select STM32_HAVE_TIM3
select STM32_HAVE_TIM6
select STM32_HAVE_TIM15
select STM32_HAVE_TIM16
select STM32_HAVE_TIM17
select STM32_HAVE_TSC
select STM32_HAVE_IP_AES_M3M4_V1 if STM32_HAVE_AES
select STM32_HAVE_IP_BBSRAM_M3M4_V1
select STM32_HAVE_IP_BKP_M3M4_V1
select STM32_HAVE_IP_CAN_BXCAN_M3M4_V1
select STM32_HAVE_IP_CCM_M3M4_V1 if STM32_HAVE_CCM
select STM32_HAVE_IP_CRYPTO_M3M4_V1
select STM32_HAVE_IP_DBGMCU_M3M4_V2
select STM32_HAVE_IP_ADC_M3M4_V2
select STM32_HAVE_COMMON_FOC
select STM32_HAVE_IP_DCMI_V1
select STM32_HAVE_IP_DAC_M3M4_V1
select STM32_HAVE_IP_DFUMODE_M3M4_V1
select STM32_HAVE_IP_DMA_V1
select STM32_HAVE_IP_DMA_V1_8CH
select STM32_HAVE_IP_EXTI_V1
select STM32_HAVE_IP_ETHMAC_M3M4_V1 if STM32_HAVE_ETHMAC
select STM32_HAVE_IP_FLASH_M3M4_V1
select STM32_HAVE_IP_FLASH_M3M4_F1F3
select STM32_HAVE_IP_FMC_M3M4_V1 if STM32_HAVE_FMC
select STM32_HAVE_IP_FREERUN_M3M4_V1
select STM32_HAVE_IP_FSMC_M3M4_V1 if STM32_HAVE_FSMC
select STM32_HAVE_IP_GPIO_M3M4_V1
select STM32_HAVE_IP_HRTIM_M3M4_V1 if STM32_HAVE_HRTIM1
select STM32_HAVE_IP_I2C_M3M4_V2
select STM32_HAVE_IP_I2S_M3M4_V1
select STM32_HAVE_IP_ONESHOT_M3M4_V1
select STM32_HAVE_IP_PWR_M3M4_V1
select STM32_HAVE_IP_RTC_M3M4_V1
select STM32_HAVE_IP_RTCC_M3M4_V1
select STM32_HAVE_RTC_MAGIC
select STM32_HAVE_RTC
select STM32_HAVE_CRC
select STM32_HAVE_PWR
select STM32_HAVE_IP_SDIO_M3M4_V1
select STM32_HAVE_IP_SPI_V3
select STM32_HAVE_IP_SYSCFG_M3M4_V1
select STM32_HAVE_IP_TIMERS_M3M4_V2
select STM32_HAVE_IP_UID_M3M4_V1
select STM32_HAVE_IP_USART_V3
select STM32_HAVE_IP_USBDEV_M3M4_V1 if STM32_HAVE_USBDEV
select STM32_HAVE_IP_USBFS_M3M4_V1 if STM32_HAVE_USBFS
select STM32_HAVE_IP_OTGFS_M3M4_V1 if STM32_HAVE_OTGFS
select STM32_HAVE_IP_WDG_M3M4_V1
config STM32_STM32F302
bool
default n
select STM32_HAVE_ADC2
select STM32_HAVE_I2C2
select STM32_HAVE_SPI2
select STM32_HAVE_SPI3
select STM32_HAVE_TIM4
select STM32_HAVE_USBDEV
config STM32_STM32F303
bool
default n
select STM32_HAVE_ADC2
select STM32_HAVE_CCM
select STM32_HAVE_TIM7
config STM32_STM32F33XX
bool
default n
select STM32_HAVE_DMA1
select STM32_HAVE_COMP
select STM32_HAVE_DMA2
select ARCH_CORTEXM4
select ARCH_HAVE_FPU
select STM32_HAVE_I2C1
select STM32_HAVE_HRTIM1
select STM32_HAVE_COMP2
select STM32_HAVE_COMP4
select STM32_HAVE_COMP6
select STM32_HAVE_OPAMP2
select STM32_HAVE_CCM
select STM32_HAVE_TIM1
select STM32_HAVE_TIM2
select STM32_HAVE_TIM6
select STM32_HAVE_TIM7
select STM32_HAVE_TIM15
select STM32_HAVE_TIM16
select STM32_HAVE_TIM17
select STM32_HAVE_TSC
select STM32_HAVE_ADC2
select STM32_HAVE_CAN1
select STM32_HAVE_DAC1
select STM32_HAVE_DAC2
select STM32_HAVE_SPI1
select STM32_HAVE_SYSCFG
select STM32_HAVE_USART2
select STM32_HAVE_USART3
select STM32_HAVE_IP_AES_M3M4_V1 if STM32_HAVE_AES
select STM32_HAVE_IP_BBSRAM_M3M4_V1
select STM32_HAVE_IP_BKP_M3M4_V1
select STM32_HAVE_IP_CAN_BXCAN_M3M4_V1
select STM32_HAVE_IP_CCM_M3M4_V1 if STM32_HAVE_CCM
select STM32_HAVE_IP_CRYPTO_M3M4_V1
select STM32_HAVE_IP_DBGMCU_M3M4_V2
select STM32_HAVE_IP_ADC_M3M4_V2
select STM32_HAVE_IP_COMP_M3M4_V1
select STM32_HAVE_COMMON_FOC
select STM32_HAVE_IP_DCMI_V1
select STM32_HAVE_IP_DAC_M3M4_V1
select STM32_HAVE_IP_DFUMODE_M3M4_V1
select STM32_HAVE_IP_DMA_V1
select STM32_HAVE_IP_DMA_V1_8CH
select STM32_HAVE_IP_EXTI_V1
select STM32_HAVE_IP_ETHMAC_M3M4_V1 if STM32_HAVE_ETHMAC
select STM32_HAVE_IP_FLASH_M3M4_V1
select STM32_HAVE_IP_FLASH_M3M4_F1F3
select STM32_HAVE_IP_FMC_M3M4_V1 if STM32_HAVE_FMC
select STM32_HAVE_IP_FREERUN_M3M4_V1
select STM32_HAVE_IP_FSMC_M3M4_V1 if STM32_HAVE_FSMC
select STM32_HAVE_IP_GPIO_M3M4_V1
select STM32_HAVE_IP_HRTIM_M3M4_V1 if STM32_HAVE_HRTIM1
select STM32_HAVE_IP_I2C_M3M4_V2
select STM32_HAVE_IP_I2S_M3M4_V1
select STM32_HAVE_IP_ONESHOT_M3M4_V1
select STM32_HAVE_IP_OPAMP_M3M4_V1 if STM32_HAVE_OPAMP1 || STM32_HAVE_OPAMP2 || STM32_HAVE_OPAMP3 || STM32_HAVE_OPAMP4 || STM32_HAVE_OPAMP5 || STM32_HAVE_OPAMP6
select STM32_HAVE_IP_PWR_M3M4_V1
select STM32_HAVE_IP_RTC_M3M4_V1
select STM32_HAVE_IP_RTCC_M3M4_V1
select STM32_HAVE_RTC_MAGIC
select STM32_HAVE_RTC
select STM32_HAVE_CRC
select STM32_HAVE_PWR
select STM32_HAVE_IP_SDIO_M3M4_V1
select STM32_HAVE_IP_SPI_V3
select STM32_HAVE_IP_SYSCFG_M3M4_V1
select STM32_HAVE_IP_TIMERS_M3M4_V2
select STM32_HAVE_IP_UID_M3M4_V1
select STM32_HAVE_IP_USART_V3
select STM32_HAVE_IP_USBDEV_M3M4_V1 if STM32_HAVE_USBDEV
select STM32_HAVE_IP_USBFS_M3M4_V1 if STM32_HAVE_USBFS
select STM32_HAVE_IP_OTGFS_M3M4_V1 if STM32_HAVE_OTGFS
select STM32_HAVE_IP_WDG_M3M4_V1
config STM32_STM32F37XX
bool
default n
select STM32_HAVE_DMA1
select STM32_HAVE_DMA2
select ARCH_CORTEXM4
select ARCH_HAVE_FPU
select STM32_HAVE_I2C1
select STM32_HAVE_SPI1
select STM32_HAVE_SYSCFG
select STM32_HAVE_USBDEV
select STM32_HAVE_TIM2
select STM32_HAVE_TIM3
select STM32_HAVE_TIM4
select STM32_HAVE_TIM5
select STM32_HAVE_TIM6
select STM32_HAVE_TIM7
select STM32_HAVE_TIM15
select STM32_HAVE_TIM16
select STM32_HAVE_TIM17
select STM32_HAVE_TSC
select STM32_HAVE_SDADC1
select STM32_HAVE_SDADC2
select STM32_HAVE_SDADC3
select STM32_HAVE_CAN1
select STM32_HAVE_DAC1
select STM32_HAVE_DAC2
select STM32_HAVE_I2C2
select STM32_HAVE_SPI2
select STM32_HAVE_SPI3
select STM32_HAVE_USART3
select STM32_HAVE_IP_AES_M3M4_V1 if STM32_HAVE_AES
select STM32_HAVE_IP_BBSRAM_M3M4_V1
select STM32_HAVE_IP_BKP_M3M4_V1
select STM32_HAVE_IP_CAN_BXCAN_M3M4_V1
select STM32_HAVE_IP_CCM_M3M4_V1 if STM32_HAVE_CCM
select STM32_HAVE_IP_CRYPTO_M3M4_V1
select STM32_HAVE_IP_TIMERS_M3M4_V1
select STM32_HAVE_IP_ADC_M3M4_V1_BASIC
select STM32_HAVE_COMMON_FOC
select STM32_HAVE_IP_DCMI_V1
select STM32_HAVE_IP_DAC_M3M4_V1
select STM32_HAVE_IP_DFUMODE_M3M4_V1
select STM32_HAVE_IP_DMA_V1
select STM32_HAVE_IP_DMA_V1_8CH
select STM32_HAVE_IP_EXTI_V1
select STM32_HAVE_IP_ETHMAC_M3M4_V1 if STM32_HAVE_ETHMAC
select STM32_HAVE_IP_FLASH_M3M4_V1
select STM32_HAVE_IP_FLASH_M3M4_F1F3
select STM32_HAVE_IP_FMC_M3M4_V1 if STM32_HAVE_FMC
select STM32_HAVE_IP_FREERUN_M3M4_V1
select STM32_HAVE_IP_FSMC_M3M4_V1 if STM32_HAVE_FSMC
select STM32_HAVE_IP_GPIO_M3M4_V1
select STM32_HAVE_IP_HRTIM_M3M4_V1 if STM32_HAVE_HRTIM1
select STM32_HAVE_IP_I2C_M3M4_V2
select STM32_HAVE_IP_I2S_M3M4_V1
select STM32_HAVE_IP_ONESHOT_M3M4_V1
select STM32_HAVE_IP_PWR_M3M4_V1
select STM32_HAVE_IP_RTC_M3M4_V1
select STM32_HAVE_IP_RTCC_M3M4_V1
select STM32_HAVE_RTC_MAGIC
select STM32_HAVE_RTC
select STM32_HAVE_CRC
select STM32_HAVE_PWR
select STM32_HAVE_IP_SDADC_M3M4_V1
select STM32_HAVE_IP_SDIO_M3M4_V1
select STM32_HAVE_IP_SPI_V3
select STM32_HAVE_IP_SYSCFG_M3M4_V1
select STM32_HAVE_IP_UID_M3M4_V1
select STM32_HAVE_IP_USART_V3
select STM32_HAVE_IP_USBDEV_M3M4_V1 if STM32_HAVE_USBDEV
select STM32_HAVE_IP_USBFS_M3M4_V1 if STM32_HAVE_USBFS
select STM32_HAVE_IP_OTGFS_M3M4_V1 if STM32_HAVE_OTGFS
select STM32_HAVE_IP_WDG_M3M4_V1

View file

@ -0,0 +1,27 @@
############################################################################
# arch/arm/src/stm32f3/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include armv7-m/Make.defs
CHIP_CSRCS = stm32_rcc.c
include common/stm32/Make.defs

View file

@ -0,0 +1,59 @@
/****************************************************************************
* arch/arm/src/stm32f3/chip.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F3_CHIP_H
#define __ARCH_ARM_SRC_STM32F3_CHIP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/* Include the chip capabilities file */
#include <arch/stm32f3/chip.h>
/* Include the chip interrupt definition file */
#include <arch/stm32f3/irq.h>
/* Include the chip memory map */
#include "hardware/stm32_memorymap.h"
/* Include the chip pinmap */
#include "hardware/stm32_pinmap.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Provide the required number of peripheral interrupt vector
* definitions as * well. The definition STM32_IRQ_NEXTINTS simply comes
* from the chip-specific * IRQ header file included by arch/stm32/irq.h.
*/
#define ARMV7M_PERIPHERAL_INTERRUPTS STM32_IRQ_NEXTINTS
#endif /* __ARCH_ARM_SRC_STM32F3_CHIP_H */

View file

@ -0,0 +1,27 @@
/****************************************************************************
* arch/arm/src/stm32f3/hardware/stm32_memorymap.h
*
* SPDX-License-Identifier: Apache-2.0
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F3_HARDWARE_STM32_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32F3_HARDWARE_STM32_MEMORYMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#if defined(CONFIG_STM32_STM32F30XX)
# include "hardware/stm32f30xxx_memorymap.h"
#elif defined(CONFIG_STM32_STM32F33XX)
# include "hardware/stm32f33xxx_memorymap.h"
#elif defined(CONFIG_STM32_STM32F37XX)
# include "hardware/stm32f37xxx_memorymap.h"
#else
# error "Unsupported STM32F3 memory map"
#endif
#endif /* __ARCH_ARM_SRC_STM32F3_HARDWARE_STM32_MEMORYMAP_H */

View file

@ -0,0 +1,27 @@
/****************************************************************************
* arch/arm/src/stm32f3/hardware/stm32_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F3_HARDWARE_STM32_PINMAP_H
#define __ARCH_ARM_SRC_STM32F3_HARDWARE_STM32_PINMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#if defined(CONFIG_STM32_STM32F30XX)
# include "hardware/stm32f30xxx_pinmap.h"
#elif defined(CONFIG_STM32_STM32F33XX)
# include "hardware/stm32f33xxx_pinmap.h"
#elif defined(CONFIG_STM32_STM32F37XX)
# include "hardware/stm32f37xxx_pinmap.h"
#else
# error "Unsupported STM32F3 pin map"
#endif
#endif /* __ARCH_ARM_SRC_STM32F3_HARDWARE_STM32_PINMAP_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f30xxx_gpio.h
* arch/arm/src/stm32f3/hardware/stm32f30xxx_gpio.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f30xxx_memorymap.h
* arch/arm/src/stm32f3/hardware/stm32f30xxx_memorymap.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f30xxx_pinmap.h
* arch/arm/src/stm32f3/hardware/stm32f30xxx_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f30xxx_rcc.h
* arch/arm/src/stm32f3/hardware/stm32f30xxx_rcc.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f30xxx_syscfg.h
* arch/arm/src/stm32f3/hardware/stm32f30xxx_syscfg.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f33xxx_comp.h
* arch/arm/src/stm32f3/hardware/stm32f33xxx_comp.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f33xxx_hrtim.h
* arch/arm/src/stm32f3/hardware/stm32f33xxx_hrtim.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f33xxx_memorymap.h
* arch/arm/src/stm32f3/hardware/stm32f33xxx_memorymap.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f33xxx_opamp.h
* arch/arm/src/stm32f3/hardware/stm32f33xxx_opamp.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f33xxx_pinmap.h
* arch/arm/src/stm32f3/hardware/stm32f33xxx_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f33xxx_rcc.h
* arch/arm/src/stm32f3/hardware/stm32f33xxx_rcc.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f33xxx_syscfg.h
* arch/arm/src/stm32f3/hardware/stm32f33xxx_syscfg.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f37xxx_memorymap.h
* arch/arm/src/stm32f3/hardware/stm32f37xxx_memorymap.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f37xxx_pinmap.h
* arch/arm/src/stm32f3/hardware/stm32f37xxx_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f37xxx_rcc.h
* arch/arm/src/stm32f3/hardware/stm32f37xxx_rcc.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f37xxx_sdadc.h
* arch/arm/src/stm32f3/hardware/stm32f37xxx_sdadc.h
*
* SPDX-License-Identifier: BSD-3-Clause
* SPDX-FileCopyrightText: 2016 Studelec SA. All rights reserved.

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/hardware/stm32f37xxx_syscfg.h
* arch/arm/src/stm32f3/hardware/stm32f37xxx_syscfg.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -0,0 +1,69 @@
/****************************************************************************
* arch/arm/src/stm32f3/stm32.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32_STM32_H
#define __ARCH_ARM_SRC_STM32_STM32_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include "arm_internal.h"
/* Peripherals **************************************************************/
#include "chip.h"
#include "stm32_adc.h"
#include "stm32_can.h"
#include "stm32_comp.h"
#include "stm32_dbgmcu.h"
#include "stm32_dma.h"
#include "stm32_dac_m3m4_v1.h"
#include "stm32_exti.h"
#include "stm32_flash.h"
#include "stm32_fmc_m3m4_v1.h"
#include "stm32_fsmc_m3m4_v1.h"
#include "stm32_gpio.h"
#include "stm32_i2c.h"
#include "stm32_ltdc_m3m4_v1.h"
#include "stm32_opamp_m3m4_v1.h"
#include "stm32_pwr.h"
#include "stm32_rcc.h"
#include "stm32_rtc.h"
#include "stm32_sdio_m3m4_v1.h"
#include "stm32_spi.h"
#include "stm32_i2s.h"
#include "stm32_tim.h"
#include "stm32_uart.h"
#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
# include "stm32_usbdev.h"
#endif
#include "stm32_wdg.h"
#include "stm32_lowputc.h"
#include "stm32_eth_m3m4_v1.h"
#endif /* __ARCH_ARM_SRC_STM32_STM32_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/stm32_rcc.c
* arch/arm/src/stm32f3/stm32_rcc.c
*
* SPDX-License-Identifier: Apache-2.0
*
@ -62,24 +62,14 @@ static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1,
/* Include chip-specific clocking initialization logic */
#if defined(CONFIG_STM32_STM32L15XX)
# include "stm32l15xxx_rcc.c"
#elif defined(CONFIG_STM32_STM32F10XX)
# include "stm32f10xxx_rcc.c"
#elif defined(CONFIG_STM32_STM32F20XX)
# include "stm32f20xxx_rcc.c"
#elif defined(CONFIG_STM32_STM32F30XX)
#if defined(CONFIG_STM32_STM32F30XX)
# include "stm32f30xxx_rcc.c"
#elif defined(CONFIG_STM32_STM32F33XX)
# include "stm32f33xxx_rcc.c"
#elif defined(CONFIG_STM32_STM32F37XX)
# include "stm32f37xxx_rcc.c"
#elif defined(CONFIG_STM32_STM32F4XXX)
# include "stm32f40xxx_rcc.c"
#elif defined(CONFIG_STM32_STM32G4XXX)
# include "stm32g4xxxx_rcc.c"
#else
# error "Unsupported STM32 chip"
# error "Unsupported STM32F3 chip"
#endif
/****************************************************************************

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/stm32f30xxx_rcc.c
* arch/arm/src/stm32f3/stm32f30xxx_rcc.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/stm32f33xxx_rcc.c
* arch/arm/src/stm32f3/stm32f33xxx_rcc.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32/stm32f37xxx_rcc.c
* arch/arm/src/stm32f3/stm32f37xxx_rcc.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -0,0 +1,25 @@
# ##############################################################################
# boards/arm/stm32f3/common/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
if(CONFIG_ARCH_BOARD_COMMON)
add_subdirectory(${NUTTX_DIR}/boards/arm/common/stm32 stm32_common)
endif()

View file

@ -0,0 +1,6 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
source "boards/arm/common/stm32/Kconfig"

View file

@ -0,0 +1,38 @@
#############################################################################
# boards/arm/stm32f3/common/Makefile
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
#############################################################################
include $(TOPDIR)/Make.defs
STM32_BOARD_COMMON_DIR := $(TOPDIR)$(DELIM)boards$(DELIM)arm$(DELIM)common$(DELIM)stm32
STM32_COMMON_SRCDIR := $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)common$(DELIM)stm32
include board/Make.defs
include $(STM32_BOARD_COMMON_DIR)$(DELIM)src$(DELIM)Make.defs
DEPPATH += --dep-path board
include $(TOPDIR)/boards/Board.mk
ARCHSRCDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src
BOARDDIR = $(ARCHSRCDIR)$(DELIM)board
CFLAGS += ${INCDIR_PREFIX}$(BOARDDIR)$(DELIM)include
CFLAGS += ${INCDIR_PREFIX}$(STM32_COMMON_SRCDIR)

View file

@ -0,0 +1,23 @@
# ##############################################################################
# boards/arm/stm32f3/nucleo-f302r8/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
add_subdirectory(src)

View file

@ -9,7 +9,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f302r8"
CONFIG_ARCH_BOARD_NUCLEO_F302R8=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F302R8=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -13,7 +13,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f302r8"
CONFIG_ARCH_BOARD_NUCLEO_F302R8=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F302R8=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -9,7 +9,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f302r8"
CONFIG_ARCH_BOARD_NUCLEO_F302R8=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F302R8=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -15,7 +15,7 @@ CONFIG_ARCH_BOARD="nucleo-f302r8"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_NUCLEO_F302R8=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F302R8=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -15,7 +15,7 @@ CONFIG_ARCH_BOARD="nucleo-f302r8"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_NUCLEO_F302R8=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F302R8=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -11,7 +11,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f302r8"
CONFIG_ARCH_BOARD_NUCLEO_F302R8=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F302R8=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -62,7 +62,7 @@ CONFIG_ARCH_BOARD="nucleo-f302r8"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_NUCLEO_F302R8=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F302R8=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f302r8/include/board.h
* boards/arm/stm32f3/nucleo-f302r8/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -0,0 +1,41 @@
############################################################################
# boards/arm/stm32f3/nucleo-f302r8/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = ld.script
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f302r8/scripts/ld.script
* boards/arm/stm32f3/nucleo-f302r8/scripts/ld.script
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32/nucleo-f302r8/src/CMakeLists.txt
# boards/arm/stm32f3/nucleo-f302r8/src/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32/nucleo-f302r8/src/Make.defs
# boards/arm/stm32f3/nucleo-f302r8/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f302r8/src/nucleo-f302r8.h
* boards/arm/stm32f3/nucleo-f302r8/src/nucleo-f302r8.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f302r8/src/stm32_adc.c
* boards/arm/stm32f3/nucleo-f302r8/src/stm32_adc.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f302r8/src/stm32_autoleds.c
* boards/arm/stm32f3/nucleo-f302r8/src/stm32_autoleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f302r8/src/stm32_boot.c
* boards/arm/stm32f3/nucleo-f302r8/src/stm32_boot.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f302r8/src/stm32_bringup.c
* boards/arm/stm32f3/nucleo-f302r8/src/stm32_bringup.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f302r8/src/stm32_buttons.c
* boards/arm/stm32f3/nucleo-f302r8/src/stm32_buttons.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f302r8/src/stm32_can.c
* boards/arm/stm32f3/nucleo-f302r8/src/stm32_can.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f302r8/src/stm32_cansock.c
* boards/arm/stm32f3/nucleo-f302r8/src/stm32_cansock.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f302r8/src/stm32_foc_ihm07m1.c
* boards/arm/stm32f3/nucleo-f302r8/src/stm32_foc_ihm07m1.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f302r8/src/stm32_highpri.c
* boards/arm/stm32f3/nucleo-f302r8/src/stm32_highpri.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f302r8/src/stm32_pwm.c
* boards/arm/stm32f3/nucleo-f302r8/src/stm32_pwm.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f302r8/src/stm32_userleds.c
* boards/arm/stm32f3/nucleo-f302r8/src/stm32_userleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -0,0 +1,23 @@
# ##############################################################################
# boards/arm/stm32f3/nucleo-f303re/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
add_subdirectory(src)

View file

@ -12,7 +12,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f303re"
CONFIG_ARCH_BOARD_NUCLEO_F303RE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F303RE=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -12,7 +12,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f303re"
CONFIG_ARCH_BOARD_NUCLEO_F303RE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F303RE=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -10,7 +10,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f303re"
CONFIG_ARCH_BOARD_NUCLEO_F303RE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F303RE=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -10,7 +10,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f303re"
CONFIG_ARCH_BOARD_NUCLEO_F303RE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F303RE=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -14,7 +14,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f303re"
CONFIG_ARCH_BOARD_NUCLEO_F303RE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F303RE=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -10,7 +10,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f303re"
CONFIG_ARCH_BOARD_NUCLEO_F303RE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F303RE=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -12,7 +12,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f303re"
CONFIG_ARCH_BOARD_NUCLEO_F303RE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F303RE=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303re/include/board.h
* boards/arm/stm32f3/nucleo-f303re/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -0,0 +1,41 @@
############################################################################
# boards/arm/stm32f3/nucleo-f303re/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = ld.script
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303re/scripts/ld.script
* boards/arm/stm32f3/nucleo-f303re/scripts/ld.script
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32/nucleo-f303re/src/CMakeLists.txt
# boards/arm/stm32f3/nucleo-f303re/src/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32/nucleo-f303re/src/Make.defs
# boards/arm/stm32f3/nucleo-f303re/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303re/src/nucleo-f303re.h
* boards/arm/stm32f3/nucleo-f303re/src/nucleo-f303re.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303re/src/stm32_adc.c
* boards/arm/stm32f3/nucleo-f303re/src/stm32_adc.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303re/src/stm32_autoleds.c
* boards/arm/stm32f3/nucleo-f303re/src/stm32_autoleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303re/src/stm32_boot.c
* boards/arm/stm32f3/nucleo-f303re/src/stm32_boot.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303re/src/stm32_buttons.c
* boards/arm/stm32f3/nucleo-f303re/src/stm32_buttons.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303re/src/stm32_can.c
* boards/arm/stm32f3/nucleo-f303re/src/stm32_can.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303re/src/stm32_pwm.c
* boards/arm/stm32f3/nucleo-f303re/src/stm32_pwm.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303re/src/stm32_spi.c
* boards/arm/stm32f3/nucleo-f303re/src/stm32_spi.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303re/src/stm32_ssd1351.c
* boards/arm/stm32f3/nucleo-f303re/src/stm32_ssd1351.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303re/src/stm32_timer.c
* boards/arm/stm32f3/nucleo-f303re/src/stm32_timer.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303re/src/stm32_uid.c
* boards/arm/stm32f3/nucleo-f303re/src/stm32_uid.c
*
* SPDX-License-Identifier: BSD-3-Clause
* SPDX-FileCopyrightText: 2015 Marawan Ragab. All rights reserved.

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303re/src/stm32_userleds.c
* boards/arm/stm32f3/nucleo-f303re/src/stm32_userleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -0,0 +1,23 @@
# ##############################################################################
# boards/arm/stm32f3/nucleo-f303ze/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
add_subdirectory(src)

View file

@ -13,7 +13,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f303ze"
CONFIG_ARCH_BOARD_NUCLEO_F303ZE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F303ZE=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -10,7 +10,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f303ze"
CONFIG_ARCH_BOARD_NUCLEO_F303ZE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F303ZE=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -13,7 +13,7 @@ CONFIG_ARCH_BOARD="nucleo-f303ze"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_NUCLEO_F303ZE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP="stm32f3"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F303ZE=y
CONFIG_ARCH_CHIP_STM32F3=y

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303ze/include/board.h
* boards/arm/stm32f3/nucleo-f303ze/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -0,0 +1,41 @@
############################################################################
# boards/arm/stm32f3/nucleo-f303ze/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = ld.script
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303ze/scripts/ld.script
* boards/arm/stm32f3/nucleo-f303ze/scripts/ld.script
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32/nucleo-f303ze/src/CMakeLists.txt
# boards/arm/stm32f3/nucleo-f303ze/src/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32/nucleo-f303ze/src/Make.defs
# boards/arm/stm32f3/nucleo-f303ze/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303ze/src/nucleo-f303ze.h
* boards/arm/stm32f3/nucleo-f303ze/src/nucleo-f303ze.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f303ze/src/stm32_adc.c
* boards/arm/stm32f3/nucleo-f303ze/src/stm32_adc.c
*
* SPDX-License-Identifier: Apache-2.0
*

Some files were not shown because too many files have changed in this diff Show more