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!arch/stm32f0l0g0: move stm32l0 to its own directory

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BREAKING CHANGE:

Part of splitting the legacy stm32 super-directory; relocates
the stm32l0 sources, headers and boards into arch/arm/src/stm32l0,
arch/arm/include/stm32l0 and boards/arm/stm32l0.

Signed-off-by: raiden00pl <raiden00@railab.me>
This commit is contained in:
raiden00pl 2026-05-25 22:43:32 +02:00 • committed by Xiang Xiao
parent f9c9e078f5
commit 9002941cd1
71 changed files with 1387 additions and 113 deletions
Download patch file Download diff file Expand all files Collapse all files

371
arch/arm/include/stm32l0/chip.h Normal file
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@ -0,0 +1,371 @@
/****************************************************************************
* arch/arm/include/stm32l0/chip.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_STM32L0_CHIP_H
#define __ARCH_ARM_INCLUDE_STM32L0_CHIP_H
#define ARMV6M_PERIPHERAL_INTERRUPTS 32
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Get customizations for each supported chip */
#if defined(CONFIG_ARCH_CHIP_STM32L071K8)
# define STM32_NATIM 0 /* No advanced timers */
# define STM32_NGTIM16 4 /* 16-bit general up/down timers TIM2-3
* (with DMA) and TIM21-22 without DMA */
# define STM32_NGTIM32 0 /* No 32-bit general up/down timers */
# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 with DMA */
/* 1 LPTIMER */
# define STM32_NSPI 1 /* 1 SPI modules SPI1 */
# define STM32_NI2S 0 /* 0 I2S module */
# define STM32_NI2C 2 /* 2 I2C */
# define STM32_NDMA 1 /* 1 DMA1, 7-channels */
# define STM32_NUSART 3 /* 3 USART modules, USART1-3 */
/* 1 LPUART */
# define STM32_NCAN 0 /* 0 CAN controllers */
# define STM32_NLCD 0 /* 0 LCD */
# define STM32_NUSBDEV 0 /* 0 USB full-speed device controller */
# define STM32_NUSBOTG 0 /* 0 USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 0 /* 0 HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 0 /* 0 DAC channel */
# define STM32_NCOMP 2 /* 2 Analog Comparators */
# define STM32_NCRC 0 /* 0 CRC module */
# define STM32_NRNG 0 /* 0 Random number generator (RNG) */
# define STM32_NCAP 0 /* 0 Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-E, H */
#elif defined(CONFIG_ARCH_CHIP_STM32L053C8)
# define STM32_NATIM 0 /* No advanced timers */
# define STM32_NGTIM16 3 /* 16-bit general up/down timers TIM2-3
* (with DMA) and TIM22 without DMA */
# define STM32_NGTIM32 0 /* No 32-bit general up/down timers */
# define STM32_NBTIM 1 /* 1 basic timers: TIM6 with DMA */
/* 1 LPTIMER */
# define STM32_NSPI 2 /* 2 SPI modules SPI1 */
# define STM32_NI2S 1 /* 1 I2S module */
# define STM32_NI2C 2 /* 2 I2C */
# define STM32_NDMA 1 /* 1 DMA1, 7-channels */
# define STM32_NUSART 2 /* 2 USART modules, USART1-1 */
/* 1 LPUART */
# define STM32_NCAN 0 /* 0 CAN controllers */
# define STM32_NLCD 1 /* 1 LCD */
# define STM32_NUSBDEV 1 /* 1 USB full-speed device controller */
# define STM32_NUSBOTG 0 /* 0 USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 0 /* 0 HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 0 /* 0 DAC channel */
# define STM32_NCOMP 2 /* 2 Analog Comparators */
# define STM32_NCRC 0 /* 0 CRC module */
# define STM32_NRNG 0 /* 0 Random number generator (RNG) */
# define STM32_NCAP 24 /* 24 Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-E, H */
#elif defined(CONFIG_ARCH_CHIP_STM32L053R8)
# define STM32_NATIM 0 /* No advanced timers */
# define STM32_NGTIM16 3 /* 16-bit general up/down timers TIM2-3
* (with DMA) and TIM22 without DMA */
# define STM32_NGTIM32 0 /* No 32-bit general up/down timers */
# define STM32_NBTIM 1 /* 1 basic timers: TIM6 with DMA */
/* 1 LPTIMER */
# define STM32_NSPI 2 /* 2 SPI modules SPI1 */
# define STM32_NI2S 1 /* 1 I2S module */
# define STM32_NI2C 2 /* 2 I2C */
# define STM32_NDMA 1 /* 1 DMA1, 7-channels */
# define STM32_NUSART 2 /* 2 USART modules, USART1-1 */
/* 1 LPUART */
# define STM32_NCAN 0 /* 0 CAN controllers */
# define STM32_NLCD 1 /* 1 LCD */
# define STM32_NUSBDEV 1 /* 1 USB full-speed device controller */
# define STM32_NUSBOTG 0 /* 0 USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 0 /* 0 HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 0 /* 0 DAC channel */
# define STM32_NCOMP 2 /* 2 Analog Comparators */
# define STM32_NCRC 0 /* 0 CRC module */
# define STM32_NRNG 0 /* 0 Random number generator (RNG) */
# define STM32_NCAP 24 /* 24 Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-E, H */
#elif defined(CONFIG_ARCH_CHIP_STM32L071C8) || defined(CONFIG_ARCH_CHIP_STM32L071V8) || \
defined(CONFIG_ARCH_CHIP_STM32L071CB) || defined(CONFIG_ARCH_CHIP_STM32L071VB) || \
defined(CONFIG_ARCH_CHIP_STM32L071RB) || defined(CONFIG_ARCH_CHIP_STM32L071CZ) || \
defined(CONFIG_ARCH_CHIP_STM32L071VZ) || defined(CONFIG_ARCH_CHIP_STM32L071RZ)
# define STM32_NATIM 0 /* 0 advanced timers */
# define STM32_NGTIM16 4 /* 16-bit general up/down timers TIM2-3
* (with DMA) and TIM21-22 without DMA */
# define STM32_NGTIM32 0 /* 0 32-bit general up/down timers */
# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 with DMA */
/* 1 LPTIMER */
# define STM32_NSPI 2 /* 2 SPI modules SPI1-2 */
# define STM32_NI2S 1 /* 1 I2S module */
# define STM32_NI2C 3 /* 3 I2C */
# define STM32_NDMA 1 /* 1 DMA1, 7-channels */
# define STM32_NUSART 4 /* 4 USART modules, USART1-4 */
/* 1 LPUART */
# define STM32_NCAN 0 /* 0 CAN controllers */
# define STM32_NLCD 0 /* 0 LCD */
# define STM32_NUSBDEV 0 /* 0 USB full-speed device controller */
# define STM32_NUSBOTG 0 /* 0 USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 0 /* 0 HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 0 /* 0 DAC channel */
# define STM32_NCOMP 2 /* 2 Analog Comparators */
# define STM32_NCRC 0 /* 0 CRC module */
# define STM32_NRNG 0 /* 0 Random number generator (RNG) */
# define STM32_NCAP 0 /* 0 Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-E, H */
#elif defined(CONFIG_ARCH_CHIP_STM32L071KB) || defined(CONFIG_ARCH_CHIP_STM32L071KZ)
# define STM32_NATIM 0 /* 0 advanced timers */
# define STM32_NGTIM16 4 /* 16-bit general up/down timers TIM2-3
* (with DMA) and TIM21-22 without DMA */
# define STM32_NGTIM32 0 /* 0 32-bit general up/down timers */
# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 with DMA */
/* 1 LPTIMER */
# define STM32_NSPI 1 /* 1 SPI modules SPI1 */
# define STM32_NI2S 0 /* 0 I2S module */
# define STM32_NI2C 3 /* 3 I2C */
# define STM32_NDMA 1 /* 1 DMA1, 7-channels */
# define STM32_NUSART 4 /* 4 USART modules, USART1-4 */
/* 1 LPUART */
# define STM32_NCAN 0 /* 0 CAN controllers */
# define STM32_NLCD 0 /* 0 LCD */
# define STM32_NUSBDEV 0 /* 0 USB full-speed device controller */
# define STM32_NUSBOTG 0 /* 0 USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 0 /* 0 HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 0 /* 0 DAC channel */
# define STM32_NCOMP 2 /* 2 Analog Comparators */
# define STM32_NCRC 0 /* 0 CRC module */
# define STM32_NRNG 0 /* 0 Random number generator (RNG) */
# define STM32_NCAP 0 /* 0 Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-E, H */
#elif defined(CONFIG_ARCH_CHIP_STM32L072V8) || defined(CONFIG_ARCH_CHIP_STM32L072VB) || \
defined(CONFIG_ARCH_CHIP_STM32L072VZ)
# define STM32_NATIM 0 /* No advanced timers */
# define STM32_NGTIM16 4 /* 16-bit general up/down timers TIM2-3
* (with DMA) and TIM21-22 without DMA */
# define STM32_NGTIM32 0 /* No 32-bit general up/down timers */
# define STM32_NBTIM 2 /* Two basic timers: TIM6, TIM7 with DMA */
/* One LPTIMER */
# define STM32_NSPI 2 /* Two SPI modules SPI1-2 */
# define STM32_NI2S 1 /* One I2S module */
# define STM32_NI2C 3 /* Three I2C (2 with SMBus/PMBus) */
# define STM32_NDMA 1 /* One DMA1, 7-channels */
# define STM32_NUSART 4 /* Four USART modules, USART1-4 */
/* One LPUART */
# define STM32_NCAN 0 /* No CAN controllers */
# define STM32_NLCD 0 /* No LCD */
# define STM32_NUSBDEV 0 /* No USB full-speed device controller */
# define STM32_NUSBOTG 1 /* One USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 0 /* No HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 2 /* Two DAC channels */
# define STM32_NCOMP 2 /* Two Analog Comparators */
# define STM32_NCRC 1 /* One CRC module */
# define STM32_NRNG 1 /* One Random number generator (RNG) */
# define STM32_NCAP 24 /* Twenty-four Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-E, H */
#elif defined(CONFIG_ARCH_CHIP_STM32L072KB) || defined(CONFIG_ARCH_CHIP_STM32L072KZ)
# define STM32_NATIM 0 /* No advanced timers */
# define STM32_NGTIM16 4 /* 16-bit general up/down timers TIM2-3
* (with DMA) and TIM21-22 without DMA */
# define STM32_NGTIM32 0 /* No 32-bit general up/down timers */
# define STM32_NBTIM 2 /* Two basic timers: TIM6, TIM7 with DMA */
/* One LPTIMER */
# define STM32_NSPI 2 /* Two SPI modules SPI1-2 */
# define STM32_NI2C 3 /* Three I2C (2 with SMBus/PMBus) */
# define STM32_NDMA 1 /* One DMA1, 7-channels */
# define STM32_NUSART 4 /* Four USART modules, USART1-4 */
/* One LPUART */
# define STM32_NCAN 0 /* No CAN controllers */
# define STM32_NLCD 0 /* No LCD */
# define STM32_NUSBDEV 0 /* No USB full-speed device controller */
# define STM32_NUSBOTG 1 /* One USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 0 /* No HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 2 /* Two DAC channels */
# define STM32_NCOMP 2 /* Two Analog Comparators */
# define STM32_NCRC 1 /* One CRC module */
# define STM32_NRNG 1 /* One Random number generator (RNG) */
# define STM32_NCAP 13 /* Thirteen Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-E, H */
#elif defined(CONFIG_ARCH_CHIP_STM32L072CB) || defined(CONFIG_ARCH_CHIP_STM32L072CZ)
# define STM32_NATIM 0 /* No advanced timers */
# define STM32_NGTIM16 4 /* 16-bit general up/down timers TIM2-3
* (with DMA) and TIM21-22 without DMA */
# define STM32_NGTIM32 0 /* No 32-bit general up/down timers */
# define STM32_NBTIM 2 /* Two basic timers: TIM6, TIM7 with DMA */
/* One LPTIMER */
# define STM32_NSPI 2 /* Two SPI modules SPI1-2 */
# define STM32_NI2S 1 /* One I2S module */
# define STM32_NI2C 3 /* Three I2C (2 with SMBus/PMBus) */
# define STM32_NDMA 1 /* One DMA1, 7-channels */
# define STM32_NUSART 4 /* Four USART modules, USART1-4 */
/* One LPUART */
# define STM32_NCAN 0 /* No CAN controllers */
# define STM32_NLCD 0 /* No LCD */
# define STM32_NUSBDEV 0 /* No USB full-speed device controller */
# define STM32_NUSBOTG 1 /* One USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 0 /* No HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 2 /* Two DAC channels */
# define STM32_NCOMP 2 /* Two Analog Comparators */
# define STM32_NCRC 1 /* One CRC module */
# define STM32_NRNG 1 /* One Random number generator (RNG) */
# define STM32_NCAP 18 /* Nineteen Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-E, H */
#elif defined(CONFIG_ARCH_CHIP_STM32L072RB) || defined(CONFIG_ARCH_CHIP_STM32L072RZ)
# define STM32_NATIM 0 /* No advanced timers */
# define STM32_NGTIM16 4 /* 16-bit general up/down timers TIM2-3
* (with DMA) and TIM21-22 without DMA */
# define STM32_NGTIM32 0 /* No 32-bit general up/down timers */
# define STM32_NBTIM 2 /* Two basic timers: TIM6, TIM7 with DMA */
/* One LPTIMER */
# define STM32_NSPI 2 /* Two SPI modules SPI1-2 */
# define STM32_NI2S 1 /* One I2S module */
# define STM32_NI2C 3 /* Three I2C (2 with SMBus/PMBus) */
# define STM32_NDMA 1 /* One DMA1, 7-channels */
# define STM32_NUSART 4 /* Four USART modules, USART1-4 */
/* One LPUART */
# define STM32_NCAN 0 /* No CAN controllers */
# define STM32_NLCD 0 /* No LCD */
# define STM32_NUSBDEV 0 /* No USB full-speed device controller */
# define STM32_NUSBOTG 1 /* One USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 0 /* No HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 2 /* Two DAC channels */
# define STM32_NCOMP 2 /* Two Analog Comparators */
# define STM32_NCRC 1 /* One CRC module */
# define STM32_NRNG 1 /* One Random number generator (RNG) */
# define STM32_NCAP 24 /* Twenty-four Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-E, H */
#elif defined(CONFIG_ARCH_CHIP_STM32L073V8) || defined(CONFIG_ARCH_CHIP_STM32L073VB) || \
defined(CONFIG_ARCH_CHIP_STM32L073VZ)
# define STM32_NATIM 0 /* No advanced timers */
# define STM32_NGTIM16 4 /* 16-bit general up/down timers TIM2-3
* (with DMA) and TIM21-22 without DMA */
# define STM32_NGTIM32 0 /* No 32-bit general up/down timers */
# define STM32_NBTIM 2 /* Two basic timers: TIM6, TIM7 with DMA */
/* One LPTIMER */
# define STM32_NSPI 2 /* Two SPI modules SPI1-2 */
# define STM32_NI2S 1 /* One I2S module */
# define STM32_NI2C 3 /* Three I2C (2 with SMBus/PMBus) */
# define STM32_NDMA 1 /* One DMA1, 7-channels */
# define STM32_NUSART 4 /* Four USART modules, USART1-4 */
/* One LPUART */
# define STM32_NCAN 0 /* No CAN controllers */
# define STM32_NLCD 1 /* One LCD controller */
# define STM32_NUSBDEV 0 /* No USB full-speed device controller */
# define STM32_NUSBOTG 1 /* One USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 0 /* No HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 2 /* Two DAC channels */
# define STM32_NCOMP 2 /* Two Analog Comparators */
# define STM32_NCRC 1 /* One CRC module */
# define STM32_NRNG 1 /* One Random number generator (RNG) */
# define STM32_NCAP 24 /* Twenty-four Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-E, H */
#elif defined(CONFIG_ARCH_CHIP_STM32L073CB) || defined(CONFIG_ARCH_CHIP_STM32L073CZ)
# define STM32_NATIM 0 /* No advanced timers */
# define STM32_NGTIM16 4 /* 16-bit general up/down timers TIM2-3
* (with DMA) and TIM21-22 without DMA */
# define STM32_NGTIM32 0 /* No 32-bit general up/down timers */
# define STM32_NBTIM 2 /* Two basic timers: TIM6, TIM7 with DMA */
/* One LPTIMER */
# define STM32_NSPI 2 /* Two SPI modules SPI1-2 */
# define STM32_NI2S 1 /* One I2S module */
# define STM32_NI2C 3 /* Three I2C (2 with SMBus/PMBus) */
# define STM32_NDMA 1 /* One DMA1, 7-channels */
# define STM32_NUSART 4 /* Four USART modules, USART1-4 */
/* One LPUART */
# define STM32_NCAN 0 /* No CAN controllers */
# define STM32_NLCD 1 /* One LCD controller */
# define STM32_NUSBDEV 0 /* No USB full-speed device controller */
# define STM32_NUSBOTG 1 /* One USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 0 /* No HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 2 /* Two DAC channels */
# define STM32_NCOMP 2 /* Two Analog Comparators */
# define STM32_NCRC 1 /* One CRC module */
# define STM32_NRNG 1 /* One Random number generator (RNG) */
# define STM32_NCAP 17 /* Seventeen Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-E, H */
#elif defined(CONFIG_ARCH_CHIP_STM32L073RB) || defined(CONFIG_ARCH_CHIP_STM32L073RZ)
# define STM32_NATIM 0 /* No advanced timers */
# define STM32_NGTIM16 4 /* 16-bit general up/down timers TIM2-3
* (with DMA) and TIM21-22 without DMA */
# define STM32_NGTIM32 0 /* No 32-bit general up/down timers */
# define STM32_NBTIM 2 /* Two basic timers: TIM6, TIM7 with DMA */
/* One LPTIMER */
# define STM32_NSPI 2 /* Two SPI modules SPI1-2 */
# define STM32_NI2S 1 /* One I2S module */
# define STM32_NI2C 3 /* Three I2C (2 with SMBus/PMBus) */
# define STM32_NDMA 1 /* One DMA1, 7-channels */
# define STM32_NUSART 4 /* Four USART modules, USART1-4 */
/* One LPUART */
# define STM32_NCAN 0 /* No CAN controllers */
# define STM32_NLCD 1 /* One LCD controller */
# define STM32_NUSBDEV 0 /* No USB full-speed device controller */
# define STM32_NUSBOTG 1 /* One USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 0 /* No HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 2 /* Two DAC channels */
# define STM32_NCOMP 2 /* Two Analog Comparators */
# define STM32_NCRC 1 /* One CRC module */
# define STM32_NRNG 1 /* One Random number generator (RNG) */
# define STM32_NCAP 24 /* Twenty-four Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-E, H */
#endif
/* NVIC priority levels *****************************************************/
/* Each priority field holds a priority value, 0-31. The lower the value,
* the greater the priority of the corresponding interrupt. The processor
* implements only bits[7:6] of each field, bits[5:0] read as zero and
* ignore writes.
*/
#define NVIC_SYSH_PRIORITY_MIN 0xc0 /* All bits[7:6] set is minimum priority */
#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x40 /* Two bits of interrupt priority used */
#endif /* __ARCH_ARM_INCLUDE_STM32L0_CHIP_H */

79
arch/arm/include/stm32f0l0g0/stm32l0_irq.h → arch/arm/include/stm32l0/irq.h
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@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/include/stm32f0l0g0/stm32l0_irq.h
* arch/arm/include/stm32l0/irq.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,34 +20,54 @@
*
****************************************************************************/
/* This file should never be included directly but, rather,
* only indirectly through nuttx/irq.h
/* This file should never be included directly but, rather, only indirectly
* through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32L0_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32L0_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_STM32L0_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32L0_IRQ_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <arch/stm32f0l0g0/chip.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
#include <arch/stm32l0/chip.h>
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* IRQ numbers.
* The IRQ number corresponds vector number and hence map directly to
* bits in the NVIC. This does, however, waste several words of memory in
* the IRQ to handle mapping tables.
*
* Processor Exceptions (vectors 0-15). These common definitions
* can be found in nuttx/arch/arm/include/stm32f0l0g0/irq.h
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words of
* memory in the IRQ to handle mapping tables.
*/
/* Common Processor Exceptions (vectors 0-15) */
#define STM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define STM32_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
#define STM32_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
/* Vectors 4-10: Reserved */
#define STM32_IRQ_SVCALL (11) /* Vector 11: SVC call */
/* Vector 12-13: Reserved */
#define STM32_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
#define STM32_IRQ_SYSTICK (15) /* Vector 15: System tick */
/* External interrupts (vectors >= 16) */
#define STM32_IRQ_EXTINT (16) /* Vector number of the first external interrupt */
/****************************************************************************
* Included Files
****************************************************************************/
/* External interrupt vectors */
#define STM32_IRQ_WWDG (STM32_IRQ_EXTINT + 0) /* 0: Window Watchdog interrupt */
#define STM32_IRQ_PVD (STM32_IRQ_EXTINT + 1) /* 1: PVD through EXTI Line detection interrupt */
#define STM32_IRQ_RTC (STM32_IRQ_EXTINT + 2) /* 2: RTC global interrupt */
@ -92,31 +112,6 @@
#define STM32_IRQ_NEXTINTS (32)
/****************************************************************************
* Public Types
****************************************************************************/
#define NR_IRQS (STM32_IRQ_EXTINT + STM32_IRQ_NEXTINTS)
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32L0_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_STM32L0_IRQ_H */

32
arch/arm/src/stm32l0/CMakeLists.txt Normal file
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@ -0,0 +1,32 @@
# ##############################################################################
# arch/arm/src/stm32l0/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
set(SRCS)
list(APPEND SRCS stm32_rcc.c)
if(CONFIG_BUILD_PROTECTED)
list(APPEND SRCS stm32_userspace.c)
endif()
target_sources(arch PRIVATE ${SRCS})
add_subdirectory(${NUTTX_DIR}/arch/arm/src/common/stm32 stm32_common)

273
arch/arm/src/stm32l0/Kconfig Normal file
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@ -0,0 +1,273 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
comment "STM32 L0 configuration"
if ARCH_CHIP_STM32L0
choice
prompt "ST STM32L0 Chip Selection"
default ARCH_CHIP_STM32L073RZ
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L053C8
bool "STM32L053C8"
select ARCH_CHIP_STM32L053XX
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L053R8
bool "STM32L053R8"
select ARCH_CHIP_STM32L053XX
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L071K8
bool "STM32L071K8"
select ARCH_CHIP_STM32L071XX
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L071KB
bool "STM32L071KB"
select ARCH_CHIP_STM32L071XX
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L071KZ
bool "STM32L071KZ"
select ARCH_CHIP_STM32L071XX
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L071C8
bool "STM32L071C8"
select ARCH_CHIP_STM32L071XX
select STM32_HAVE_USART5
select STM32_HAVE_SPI2
select STM32_HAVE_I2C3
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L071CB
bool "STM32L071CB"
select ARCH_CHIP_STM32L071XX
select STM32_HAVE_USART5
select STM32_HAVE_SPI2
select STM32_HAVE_I2C3
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L071CZ
bool "STM32L071CZ"
select ARCH_CHIP_STM32L071XX
select STM32_HAVE_USART5
select STM32_HAVE_SPI2
select STM32_HAVE_I2C3
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L071V8
bool "STM32L071V8"
select ARCH_CHIP_STM32L071XX
select STM32_HAVE_USART5
select STM32_HAVE_SPI2
select STM32_HAVE_I2C3
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L071VB
bool "STM32L071VB"
select ARCH_CHIP_STM32L071XX
select STM32_HAVE_USART5
select STM32_HAVE_SPI2
select STM32_HAVE_I2C3
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L071VZ
bool "STM32L071VZ"
select ARCH_CHIP_STM32L071XX
select STM32_HAVE_USART5
select STM32_HAVE_SPI2
select STM32_HAVE_I2C3
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L071RB
bool "STM32L071RB"
select ARCH_CHIP_STM32L071XX
select STM32_HAVE_USART5
select STM32_HAVE_SPI2
select STM32_HAVE_I2C3
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L071RZ
bool "STM32L071RZ"
select ARCH_CHIP_STM32L071XX
select STM32_HAVE_USART5
select STM32_HAVE_SPI2
select STM32_HAVE_I2C3
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L072V8
bool "STM32L072V8"
select ARCH_CHIP_STM32L072XX
select STM32_HAVE_SPI2
select STM32_HAVE_I2C3
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L072VB
bool "STM32L072VB"
select ARCH_CHIP_STM32L072XX
select STM32_HAVE_SPI2
select STM32_HAVE_I2C3
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L072VZ
bool "STM32L072VZ"
select ARCH_CHIP_STM32L072XX
select STM32_HAVE_SPI2
select STM32_HAVE_I2C3
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L072KB
bool "STM32L072KB"
select ARCH_CHIP_STM32L072XX
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L072KZ
bool "STM32L072KZ"
select ARCH_CHIP_STM32L072XX
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L072CB
bool "STM32L072CB"
select ARCH_CHIP_STM32L072XX
select STM32_HAVE_SPI2
select STM32_HAVE_I2C3
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L072CZ
bool "STM32L072CZ"
select ARCH_CHIP_STM32L072XX
select STM32_HAVE_SPI2
select STM32_HAVE_I2C3
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L072RB
bool "STM32L072RB"
select ARCH_CHIP_STM32L072XX
select STM32_HAVE_SPI2
select STM32_HAVE_I2C3
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L072RZ
bool "STM32L072RZ"
select ARCH_CHIP_STM32L072XX
select STM32_HAVE_SPI2
select STM32_HAVE_I2C3
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L073V8
bool "STM32L073V8"
select ARCH_CHIP_STM32L073XX
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L073VB
bool "STM32L073VB"
select ARCH_CHIP_STM32L073XX
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L073VZ
bool "STM32L073VZ"
select ARCH_CHIP_STM32L073XX
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L073CB
bool "STM32L073CB"
select ARCH_CHIP_STM32L073XX
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L073CZ
bool "STM32L073CZ"
select ARCH_CHIP_STM32L073XX
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L073RB
bool "STM32L073RB"
select ARCH_CHIP_STM32L073XX
depends on ARCH_CHIP_STM32L0
config ARCH_CHIP_STM32L073RZ
bool "STM32L073RZ"
select ARCH_CHIP_STM32L073XX
depends on ARCH_CHIP_STM32L0
endchoice
endif
config STM32_STM32L0
bool
default n
select STM32_HAVE_DMA1
select STM32_HAVE_I2C1
select STM32_HAVE_SPI1
select STM32_HAVE_USART1
select STM32_HAVE_USART2
select STM32_ENERGYLITE
select STM32_HAVE_LCD
select STM32_HAVE_VREFINT
select STM32_HAVE_IP_ADC_M0_V1
select STM32_HAVE_CRC
select STM32_HAVE_PWR
select STM32_HAVE_BKP
select STM32_HAVE_BKPSRAM
select STM32_HAVE_IP_AES_M0_V1 if STM32_HAVE_AES
select STM32_HAVE_IP_COMP_M0_V1 if STM32_HAVE_COMP
select STM32_HAVE_IP_DAC_M0_V1 if STM32_HAVE_DAC1
select STM32_HAVE_IP_DBGMCU_M0_V1
select STM32_HAVE_IP_DMA_V1
select STM32_HAVE_IP_DMA_V1_7CH
select STM32_HAVE_IP_EXTI_V1
select STM32_HAVE_IP_FLASH_M0_V1
select STM32_HAVE_IP_GPIO_M0_V1
select STM32_HAVE_IP_I2C_M0_V1
select STM32_HAVE_IP_PWR_M0_V1
select STM32_HAVE_IP_SPI_V1
select STM32_HAVE_IP_TIMERS_M0_V1
select STM32_HAVE_IP_USART_V3
select STM32_HAVE_IP_WDG_M0_V1
select STM32_HAVE_IP_UID_M0_V1
select STM32_HAVE_IP_RNG_M0_V1 if STM32_HAVE_RNG
select STM32_HAVE_IP_RTCC_M0_V1
select STM32_HAVE_IP_USBDEV_M0_V1 if STM32_HAVE_USBDEV
select STM32_HAVE_IP_HSI48_M0_V1 if STM32_HAVE_HSI48
config ARCH_CHIP_STM32L053XX
bool
select STM32_STM32L0
config ARCH_CHIP_STM32L071XX
bool
select STM32_STM32L0
select STM32_HAVE_RNG
select STM32_HAVE_HSI48
select STM32_HAVE_USART4
config ARCH_CHIP_STM32L072XX
bool
select STM32_STM32L0
select STM32_HAVE_RNG
select STM32_HAVE_HSI48
select STM32_HAVE_USART4
select STM32_HAVE_USART5
select STM32_HAVE_I2C2
select STM32_HAVE_USBDEV
config ARCH_CHIP_STM32L073XX
bool
select STM32_STM32L0
select STM32_HAVE_RNG
select STM32_HAVE_HSI48
select STM32_HAVE_USART4
select STM32_HAVE_USART5
select STM32_HAVE_SPI2
select STM32_HAVE_I2C2
select STM32_HAVE_I2C3
select STM32_HAVE_USBDEV
config STM32_FLASH_OVERRIDE
bool "Override Flash Designator"
default n

31
arch/arm/src/stm32l0/Make.defs Normal file
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@ -0,0 +1,31 @@
############################################################################
# arch/arm/src/stm32l0/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include armv6-m/Make.defs
CHIP_CSRCS = stm32_rcc.c
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CHIP_CSRCS += stm32_userspace.c
endif
include common/stm32/Make.defs

44
arch/arm/src/stm32l0/chip.h Normal file
View file

@ -0,0 +1,44 @@
/****************************************************************************
* arch/arm/src/stm32l0/chip.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32L0_CHIP_H
#define __ARCH_ARM_SRC_STM32L0_CHIP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "nvic.h"
/* Include the chip capabilities file */
#include <arch/stm32l0/chip.h>
/* Include the memory map file.
* Other chip hardware files should then include this file for the proper
* setup.
*/
#include "hardware/stm32_memorymap.h"
#endif /* __ARCH_ARM_SRC_STM32L0_CHIP_H */

17
arch/arm/src/stm32l0/hardware/stm32_memorymap.h Normal file
View file

@ -0,0 +1,17 @@
/****************************************************************************
* arch/arm/src/stm32l0/hardware/stm32_memorymap.h
*
* SPDX-License-Identifier: Apache-2.0
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32_MEMORYMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include "hardware/stm32l0_memorymap.h"
#endif /* __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32_MEMORYMAP_H */

17
arch/arm/src/stm32l0/hardware/stm32_pinmap.h Normal file
View file

@ -0,0 +1,17 @@
/****************************************************************************
* arch/arm/src/stm32l0/hardware/stm32_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32_PINMAP_H
#define __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32_PINMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include "hardware/stm32l0_pinmap.h"
#endif /* __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32_PINMAP_H */

8
arch/arm/src/stm32f0l0g0/hardware/stm32l0_exti.h → arch/arm/src/stm32l0/hardware/stm32l0_exti.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32l0_exti.h
* arch/arm/src/stm32l0/hardware/stm32l0_exti.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_EXTI_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_EXTI_H
#ifndef __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_EXTI_H
#define __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_EXTI_H
/****************************************************************************
* Included Files
@ -116,4 +116,4 @@
#define EXTI_PR_SHIFT (0) /* Bits 0-X: Pending bit for all lines */
#define EXTI_PR_MASK STM32_EXTI_MASK
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_EXTI_H */
#endif /* __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_EXTI_H */

8
arch/arm/src/stm32f0l0g0/hardware/stm32l0_flash.h → arch/arm/src/stm32l0/hardware/stm32l0_flash.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32l0_flash.h
* arch/arm/src/stm32l0/hardware/stm32l0_flash.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_FLASH_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_FLASH_H
#ifndef __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_FLASH_H
#define __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_FLASH_H
/****************************************************************************
* Included Files
@ -102,4 +102,4 @@
#define FLASH_SR_OPTVERRUSR (1 << 12) /* Bit 12: Option UserValidity Error */
#define FLASH_SR_RDERR (1 << 13) /* Bit 13: Read protected error */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_FLASH_H */
#endif /* __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_FLASH_H */

8
arch/arm/src/stm32f0l0g0/hardware/stm32l0_memorymap.h → arch/arm/src/stm32l0/hardware/stm32l0_memorymap.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32l0_memorymap.h
* arch/arm/src/stm32l0/hardware/stm32l0_memorymap.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_MEMORYMAP_H
#ifndef __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_MEMORYMAP_H
/****************************************************************************
* Pre-processor Definitions
@ -118,4 +118,4 @@
#define STM32_SYSMEM_UID 0x1ff80050 /* The 96-bit unique device identifier */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_MEMORYMAP_H */
#endif /* __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_MEMORYMAP_H */

8
arch/arm/src/stm32f0l0g0/hardware/stm32l0_pinmap.h → arch/arm/src/stm32l0/hardware/stm32l0_pinmap.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32l0_pinmap.h
* arch/arm/src/stm32l0/hardware/stm32l0_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_PINMAP_H
#ifndef __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_PINMAP_H
#define __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_PINMAP_H
/****************************************************************************
* Included Files
@ -326,4 +326,4 @@
/* TODO: LPUART */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_PINMAP_H */
#endif /* __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_PINMAP_H */

8
arch/arm/src/stm32f0l0g0/hardware/stm32l0_pwr.h → arch/arm/src/stm32l0/hardware/stm32l0_pwr.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32l0_pwr.h
* arch/arm/src/stm32l0/hardware/stm32l0_pwr.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_PWR_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_PWR_H
#ifndef __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_PWR_H
#define __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_PWR_H
/****************************************************************************
* Included Files
@ -91,4 +91,4 @@
#define PWR_CSR_EWUP2 (1 << 9) /* Bit 9: Enable WKUP2 pin */
#define PWR_CSR_EWUP3 (1 << 10) /* Bit 10: Enable WKUP3 pin */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_PWR_H */
#endif /* __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_PWR_H */

8
arch/arm/src/stm32f0l0g0/hardware/stm32l0_rcc.h → arch/arm/src/stm32l0/hardware/stm32l0_rcc.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32l0_rcc.h
* arch/arm/src/stm32l0/hardware/stm32l0_rcc.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_RCC_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_RCC_H
#ifndef __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_RCC_H
#define __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_RCC_H
/****************************************************************************
* Pre-processor Definitions
@ -538,4 +538,4 @@
#define RCC_CSR_WWDGRSTF (1 << 30) /* Bit 30: WWDG reset flag */
#define RCC_CSR_LPWRRSTF (1 << 31) /* Bit 31: Low-power reset flag */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_RCC_H */
#endif /* __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_RCC_H */

8
arch/arm/src/stm32f0l0g0/hardware/stm32l0_syscfg.h → arch/arm/src/stm32l0/hardware/stm32l0_syscfg.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32l0_syscfg.h
* arch/arm/src/stm32l0/hardware/stm32l0_syscfg.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_SYSCFG_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_SYSCFG_H
#ifndef __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_SYSCFG_H
#define __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_SYSCFG_H
/****************************************************************************
* Included Files
@ -132,4 +132,4 @@
#define SYSCFG_EXTICR4_EXTI15_SHIFT (12) /* Bits 12-15: EXTI 15 configuration */
#define SYSCFG_EXTICR4_EXTI15_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI15_SHIFT)
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32L0_SYSCFG_H */
#endif /* __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_SYSCFG_H */

54
arch/arm/src/stm32l0/stm32.h Normal file
View file

@ -0,0 +1,54 @@
/****************************************************************************
* arch/arm/src/stm32l0/stm32.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32L0_STM32_H
#define __ARCH_ARM_SRC_STM32L0_STM32_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include "arm_internal.h"
/* Peripherals **************************************************************/
#include "chip.h"
#include "stm32_dma.h"
#include "stm32_gpio.h"
#include "stm32_i2c.h"
#include "stm32_pwr.h"
#include "stm32_rcc.h"
#include "stm32_spi.h"
#include "stm32_uart.h"
#include "stm32_lowputc.h"
#include "stm32_adc.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#endif /* __ARCH_ARM_SRC_STM32L0_STM32_H */

220
arch/arm/src/stm32l0/stm32_rcc.c Normal file
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@ -0,0 +1,220 @@
/****************************************************************************
* arch/arm/src/stm32l0/stm32_rcc.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdio.h>
#include <assert.h>
#include <nuttx/debug.h>
#include <arch/board/board.h>
#include "arm_internal.h"
#include "hardware/stm32_flash.h"
#include "stm32_rcc.h"
#include "stm32_hsi48_m0_v1.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_STM32_RNG
# ifndef STM32_USE_CLK48
# error RNG requires CLK48 enabled
# endif
#endif
#ifdef CONFIG_STM32_USB
# ifndef STM32_USE_CLK48
# error USB requires CLK48 enabled
# endif
#endif
static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1,
"Configure BOARD_LOOPSPERMSEC to non-default value.");
/* Allow up to 100 milliseconds for the high speed clock to become ready.
* that is a very long delay, but if the clock does not become ready we are
* hosed anyway.
*/
#define HSERDY_TIMEOUT (100 * CONFIG_BOARD_LOOPSPERMSEC)
/****************************************************************************
* Included Files
****************************************************************************/
/* Include chip-specific clocking initialization logic */
#include "stm32l0_rcc.c"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: rcc_resetbkp
*
* Description:
* The RTC needs to reset the Backup Domain to change RTCSEL and resetting
* the Backup Domain renders to disabling the LSE as consequence.
* In order to avoid resetting the Backup Domain when we already configured
* LSE we will reset the Backup Domain early (here).
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
#if defined(CONFIG_STM32_RTC) && defined(CONFIG_STM32_PWR)
static inline void rcc_resetbkp(void)
{
uint32_t regval;
/* Check if the RTC is already configured */
stm32_pwr_initbkp(false);
regval = getreg32(RTC_MAGIC_REG);
if (regval != RTC_MAGIC && regval != RTC_MAGIC_TIME_SET)
{
stm32_pwr_enablebkp(true);
/* We might be changing RTCSEL - to ensure such changes work, we must
* reset the backup domain (having backed up the RTC_MAGIC token)
*/
modifyreg32(STM32_RCC_BDCR, 0, RCC_BDCR_BDRST);
modifyreg32(STM32_RCC_BDCR, RCC_BDCR_BDRST, 0);
stm32_pwr_enablebkp(false);
}
}
#else
# define rcc_resetbkp()
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_clockconfig
*
* Description:
* Called to establish the clock settings based on the values in board.h.
* This function (by default) will reset most everything, enable the PLL,
* and enable peripheral clocking for all peripherals enabled in the NuttX
* configuration file.
*
* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then
* clocking will be enabled by an externally provided, board-specific
* function called stm32_board_clockconfig().
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void stm32_clockconfig(void)
{
/* Make sure that we are starting in the reset state */
rcc_reset();
/* Reset backup domain if appropriate */
rcc_resetbkp();
#if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
/* Invoke Board Custom Clock Configuration */
stm32_board_clockconfig();
#else
/* Invoke standard, fixed clock configuration based on definitions
* in board.h
*/
stm32_stdclockconfig();
#endif
/* Enable peripheral clocking */
rcc_enableperipherals();
}
/****************************************************************************
* Name: stm32_clockenable
*
* Description:
* Re-enable the clock and restore the clock settings based on settings in
* board.h. This function is only available to support low-power modes of
* operation: When re-awakening from deep-sleep modes, it is necessary to
* re-enable/re-start the PLL
*
* This functional performs a subset of the operations performed by
* stm32_clockconfig(): It does not reset any devices, and it does not
* reset the currently enabled peripheral clocks.
*
* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then
* clocking will be enabled by an externally provided, board-specific
* function called stm32_board_clockconfig().
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_PM
void stm32_clockenable(void)
{
#if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
/* Invoke Board Custom Clock Configuration */
stm32_board_clockconfig();
#else
/* Invoke standard, fixed clock configuration based on definitions
* in board.h
*/
stm32_stdclockconfig();
#endif
}
#endif

2
arch/arm/src/stm32f0l0g0/stm32l0_rcc.c → arch/arm/src/stm32l0/stm32l0_rcc.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/stm32l0_rcc.c
* arch/arm/src/stm32l0/stm32l0_rcc.c
*
* SPDX-License-Identifier: Apache-2.0
*

23
boards/arm/stm32l0/b-l072z-lrwan1/CMakeLists.txt Normal file
View file

@ -0,0 +1,23 @@
# ##############################################################################
# boards/arm/stm32l0/b-l072z-lrwan1/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
add_subdirectory(src)

0
boards/arm/stm32f0l0g0/b-l072z-lrwan1/Kconfig → boards/arm/stm32l0/b-l072z-lrwan1/Kconfig
View file

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/configs/adc/defconfig → boards/arm/stm32l0/b-l072z-lrwan1/configs/adc/defconfig
View file

@ -11,7 +11,7 @@ CONFIG_ANALOG=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-l072z-lrwan1"
CONFIG_ARCH_BOARD_B_L072Z_LRWAN1=y
CONFIG_ARCH_CHIP="stm32f0l0g0"
CONFIG_ARCH_CHIP="stm32l0"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32L072CZ=y
CONFIG_ARCH_CHIP_STM32L072XX=y

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/configs/nsh/defconfig → boards/arm/stm32l0/b-l072z-lrwan1/configs/nsh/defconfig
View file

@ -9,7 +9,7 @@
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-l072z-lrwan1"
CONFIG_ARCH_BOARD_B_L072Z_LRWAN1=y
CONFIG_ARCH_CHIP="stm32f0l0g0"
CONFIG_ARCH_CHIP="stm32l0"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32L072CZ=y
CONFIG_ARCH_CHIP_STM32L072XX=y

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/configs/nxlines_oled/defconfig → boards/arm/stm32l0/b-l072z-lrwan1/configs/nxlines_oled/defconfig
View file

@ -12,7 +12,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-l072z-lrwan1"
CONFIG_ARCH_BOARD_B_L072Z_LRWAN1=y
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_CHIP="stm32f0l0g0"
CONFIG_ARCH_CHIP="stm32l0"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32L072CZ=y
CONFIG_ARCH_CHIP_STM32L072XX=y

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/configs/sx127x/defconfig → boards/arm/stm32l0/b-l072z-lrwan1/configs/sx127x/defconfig
View file

@ -9,7 +9,7 @@
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-l072z-lrwan1"
CONFIG_ARCH_BOARD_B_L072Z_LRWAN1=y
CONFIG_ARCH_CHIP="stm32f0l0g0"
CONFIG_ARCH_CHIP="stm32l0"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32L072CZ=y
CONFIG_ARCH_CHIP_STM32L072XX=y

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/include/board.h → boards/arm/stm32l0/b-l072z-lrwan1/include/board.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/b-l072z-lrwan1/include/board.h
* boards/arm/stm32l0/b-l072z-lrwan1/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
*

41
boards/arm/stm32l0/b-l072z-lrwan1/scripts/Make.defs Normal file
View file

@ -0,0 +1,41 @@
############################################################################
# boards/arm/stm32l0/b-l072z-lrwan1/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv6-m/Toolchain.defs
LDSCRIPT = ld.script
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/scripts/ld.script → boards/arm/stm32l0/b-l072z-lrwan1/scripts/ld.script
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/b-l072z-lrwan1/scripts/ld.script
* boards/arm/stm32l0/b-l072z-lrwan1/scripts/ld.script
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/CMakeLists.txt → boards/arm/stm32l0/b-l072z-lrwan1/src/CMakeLists.txt
View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/CMakeLists.txt
# boards/arm/stm32l0/b-l072z-lrwan1/src/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/Make.defs → boards/arm/stm32l0/b-l072z-lrwan1/src/Make.defs
View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/Make.defs
# boards/arm/stm32l0/b-l072z-lrwan1/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/b-l072z-lrwan1.h → boards/arm/stm32l0/b-l072z-lrwan1/src/b-l072z-lrwan1.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/b-l072z-lrwan1.h
* boards/arm/stm32l0/b-l072z-lrwan1/src/b-l072z-lrwan1.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_adc.c → boards/arm/stm32l0/b-l072z-lrwan1/src/stm32_adc.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_adc.c
* boards/arm/stm32l0/b-l072z-lrwan1/src/stm32_adc.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_autoleds.c → boards/arm/stm32l0/b-l072z-lrwan1/src/stm32_autoleds.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_autoleds.c
* boards/arm/stm32l0/b-l072z-lrwan1/src/stm32_autoleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_boot.c → boards/arm/stm32l0/b-l072z-lrwan1/src/stm32_boot.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_boot.c
* boards/arm/stm32l0/b-l072z-lrwan1/src/stm32_boot.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_bringup.c → boards/arm/stm32l0/b-l072z-lrwan1/src/stm32_bringup.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_bringup.c
* boards/arm/stm32l0/b-l072z-lrwan1/src/stm32_bringup.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_lcd_ssd1306.c → boards/arm/stm32l0/b-l072z-lrwan1/src/stm32_lcd_ssd1306.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_lcd_ssd1306.c
* boards/arm/stm32l0/b-l072z-lrwan1/src/stm32_lcd_ssd1306.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_spi.c → boards/arm/stm32l0/b-l072z-lrwan1/src/stm32_spi.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_spi.c
* boards/arm/stm32l0/b-l072z-lrwan1/src/stm32_spi.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_sx127x.c → boards/arm/stm32l0/b-l072z-lrwan1/src/stm32_sx127x.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/b-l072z-lrwan1/src/stm32_sx127x.c
* boards/arm/stm32l0/b-l072z-lrwan1/src/stm32_sx127x.c
*
* SPDX-License-Identifier: Apache-2.0
*

25
boards/arm/stm32l0/common/CMakeLists.txt Normal file
View file

@ -0,0 +1,25 @@
# ##############################################################################
# boards/arm/stm32l0/common/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
if(CONFIG_ARCH_BOARD_COMMON)
add_subdirectory(${NUTTX_DIR}/boards/arm/common/stm32 stm32_common)
endif()

6
boards/arm/stm32l0/common/Kconfig Normal file
View file

@ -0,0 +1,6 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
source "boards/arm/common/stm32/Kconfig"

38
boards/arm/stm32l0/common/Makefile Normal file
View file

@ -0,0 +1,38 @@
#############################################################################
# boards/arm/stm32l0/common/Makefile
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
#############################################################################
include $(TOPDIR)/Make.defs
STM32_BOARD_COMMON_DIR := $(TOPDIR)$(DELIM)boards$(DELIM)arm$(DELIM)common$(DELIM)stm32
STM32_COMMON_SRCDIR := $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)common$(DELIM)stm32
include board/Make.defs
include $(STM32_BOARD_COMMON_DIR)$(DELIM)src$(DELIM)Make.defs
DEPPATH += --dep-path board
include $(TOPDIR)/boards/Board.mk
ARCHSRCDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src
BOARDDIR = $(ARCHSRCDIR)$(DELIM)board
CFLAGS += ${INCDIR_PREFIX}$(BOARDDIR)$(DELIM)include
CFLAGS += ${INCDIR_PREFIX}$(STM32_COMMON_SRCDIR)

23
boards/arm/stm32l0/nucleo-l073rz/CMakeLists.txt Normal file
View file

@ -0,0 +1,23 @@
# ##############################################################################
# boards/arm/stm32l0/nucleo-l073rz/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
add_subdirectory(src)

0
boards/arm/stm32f0l0g0/nucleo-l073rz/Kconfig → boards/arm/stm32l0/nucleo-l073rz/Kconfig
View file

2
boards/arm/stm32f0l0g0/nucleo-l073rz/configs/nsh/defconfig → boards/arm/stm32l0/nucleo-l073rz/configs/nsh/defconfig
View file

@ -9,7 +9,7 @@
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-l073rz"
CONFIG_ARCH_BOARD_NUCLEO_L073RZ=y
CONFIG_ARCH_CHIP="stm32f0l0g0"
CONFIG_ARCH_CHIP="stm32l0"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32L073RZ=y
CONFIG_ARCH_CHIP_STM32L073XX=y

2
boards/arm/stm32f0l0g0/nucleo-l073rz/configs/sx127x/defconfig → boards/arm/stm32l0/nucleo-l073rz/configs/sx127x/defconfig
View file

@ -10,7 +10,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-l073rz"
CONFIG_ARCH_BOARD_NUCLEO_L073RZ=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32f0l0g0"
CONFIG_ARCH_CHIP="stm32l0"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32L073RZ=y
CONFIG_ARCH_CHIP_STM32L073XX=y

2
boards/arm/stm32f0l0g0/nucleo-l073rz/include/board.h → boards/arm/stm32l0/nucleo-l073rz/include/board.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-l073rz/include/board.h
* boards/arm/stm32l0/nucleo-l073rz/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
*

41
boards/arm/stm32l0/nucleo-l073rz/scripts/Make.defs Normal file
View file

@ -0,0 +1,41 @@
############################################################################
# boards/arm/stm32l0/nucleo-l073rz/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv6-m/Toolchain.defs
LDSCRIPT = ld.script
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048

2
boards/arm/stm32f0l0g0/nucleo-l073rz/scripts/ld.script → boards/arm/stm32l0/nucleo-l073rz/scripts/ld.script
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-l073rz/scripts/ld.script
* boards/arm/stm32l0/nucleo-l073rz/scripts/ld.script
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/nucleo-l073rz/src/CMakeLists.txt → boards/arm/stm32l0/nucleo-l073rz/src/CMakeLists.txt
View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32f0l0g0/nucleo-l073rz/src/CMakeLists.txt
# boards/arm/stm32l0/nucleo-l073rz/src/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32f0l0g0/nucleo-l073rz/src/Make.defs → boards/arm/stm32l0/nucleo-l073rz/src/Make.defs
View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32f0l0g0/nucleo-l073rz/src/Make.defs
# boards/arm/stm32l0/nucleo-l073rz/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32f0l0g0/nucleo-l073rz/src/nucleo-l073rz.h → boards/arm/stm32l0/nucleo-l073rz/src/nucleo-l073rz.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-l073rz/src/nucleo-l073rz.h
* boards/arm/stm32l0/nucleo-l073rz/src/nucleo-l073rz.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_autoleds.c → boards/arm/stm32l0/nucleo-l073rz/src/stm32_autoleds.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_autoleds.c
* boards/arm/stm32l0/nucleo-l073rz/src/stm32_autoleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_boot.c → boards/arm/stm32l0/nucleo-l073rz/src/stm32_boot.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_boot.c
* boards/arm/stm32l0/nucleo-l073rz/src/stm32_boot.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_bringup.c → boards/arm/stm32l0/nucleo-l073rz/src/stm32_bringup.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_bringup.c
* boards/arm/stm32l0/nucleo-l073rz/src/stm32_bringup.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_buttons.c → boards/arm/stm32l0/nucleo-l073rz/src/stm32_buttons.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_buttons.c
* boards/arm/stm32l0/nucleo-l073rz/src/stm32_buttons.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_mfrc522.c → boards/arm/stm32l0/nucleo-l073rz/src/stm32_mfrc522.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_mfrc522.c
* boards/arm/stm32l0/nucleo-l073rz/src/stm32_mfrc522.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_nrf24l01.c → boards/arm/stm32l0/nucleo-l073rz/src/stm32_nrf24l01.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_nrf24l01.c
* boards/arm/stm32l0/nucleo-l073rz/src/stm32_nrf24l01.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_spi.c → boards/arm/stm32l0/nucleo-l073rz/src/stm32_spi.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_spi.c
* boards/arm/stm32l0/nucleo-l073rz/src/stm32_spi.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_sx127x.c → boards/arm/stm32l0/nucleo-l073rz/src/stm32_sx127x.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-l073rz/src/stm32_sx127x.c
* boards/arm/stm32l0/nucleo-l073rz/src/stm32_sx127x.c
*
* SPDX-License-Identifier: Apache-2.0
*

23
boards/arm/stm32l0/stm32l0538-disco/CMakeLists.txt Normal file
View file

@ -0,0 +1,23 @@
# ##############################################################################
# boards/arm/stm32l0/stm32l0538-disco/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
add_subdirectory(src)

0
boards/arm/stm32f0l0g0/stm32l0538-disco/Kconfig → boards/arm/stm32l0/stm32l0538-disco/Kconfig
View file

2
boards/arm/stm32f0l0g0/stm32l0538-disco/configs/nsh/defconfig → boards/arm/stm32l0/stm32l0538-disco/configs/nsh/defconfig
View file

@ -9,7 +9,7 @@
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm32l0538-disco"
CONFIG_ARCH_BOARD_STM32L0538_DISCO=y
CONFIG_ARCH_CHIP="stm32f0l0g0"
CONFIG_ARCH_CHIP="stm32l0"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32L053C8=y
CONFIG_ARCH_CHIP_STM32L053XX=y

2
boards/arm/stm32f0l0g0/stm32l0538-disco/include/board.h → boards/arm/stm32l0/stm32l0538-disco/include/board.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32l0538-disco/include/board.h
* boards/arm/stm32l0/stm32l0538-disco/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/stm32l0538-disco/scripts/Make.defs → boards/arm/stm32l0/stm32l0538-disco/scripts/Make.defs
View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32f0l0g0/stm32l0538-disco/scripts/Make.defs
# boards/arm/stm32l0/stm32l0538-disco/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32f0l0g0/stm32l0538-disco/scripts/ld.script → boards/arm/stm32l0/stm32l0538-disco/scripts/ld.script
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32l0538-disco/scripts/ld.script
* boards/arm/stm32l0/stm32l0538-disco/scripts/ld.script
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/stm32l0538-disco/src/CMakeLists.txt → boards/arm/stm32l0/stm32l0538-disco/src/CMakeLists.txt
View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32f0l0g0/stm32l0538-disco/src/CMakeLists.txt
# boards/arm/stm32l0/stm32l0538-disco/src/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32f0l0g0/stm32l0538-disco/src/Make.defs → boards/arm/stm32l0/stm32l0538-disco/src/Make.defs
View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32f0l0g0/stm32l0538-disco/src/Make.defs
# boards/arm/stm32l0/stm32l0538-disco/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

2
boards/arm/stm32f0l0g0/stm32l0538-disco/src/stm32_autoleds.c → boards/arm/stm32l0/stm32l0538-disco/src/stm32_autoleds.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32l0538-disco/src/stm32_autoleds.c
* boards/arm/stm32l0/stm32l0538-disco/src/stm32_autoleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/stm32l0538-disco/src/stm32_boot.c → boards/arm/stm32l0/stm32l0538-disco/src/stm32_boot.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32l0538-disco/src/stm32_boot.c
* boards/arm/stm32l0/stm32l0538-disco/src/stm32_boot.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/stm32l0538-disco/src/stm32_bringup.c → boards/arm/stm32l0/stm32l0538-disco/src/stm32_bringup.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32l0538-disco/src/stm32_bringup.c
* boards/arm/stm32l0/stm32l0538-disco/src/stm32_bringup.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/stm32l0538-disco/src/stm32_buttons.c → boards/arm/stm32l0/stm32l0538-disco/src/stm32_buttons.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32l0538-disco/src/stm32_buttons.c
* boards/arm/stm32l0/stm32l0538-disco/src/stm32_buttons.c
*
* SPDX-License-Identifier: Apache-2.0
*

2
boards/arm/stm32f0l0g0/stm32l0538-disco/src/stm32l0538-disco.h → boards/arm/stm32l0/stm32l0538-disco/src/stm32l0538-disco.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32l0538-disco/src/stm32l0538-disco.h
* boards/arm/stm32l0/stm32l0538-disco/src/stm32l0538-disco.h
*
* SPDX-License-Identifier: Apache-2.0
*