Commit graph

24721 commits

Author SHA1 Message Date
raiden00pl
4b3f2c61bb !arch/stm32: move stm32f3 to its own directory
BREAKING CHANGE:

Part of splitting the legacy stm32 super-directory; relocates
the stm32f3 sources, headers and boards into arch/arm/src/stm32f3,
arch/arm/include/stm32f3 and boards/arm/stm32f3.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-07-03 10:27:27 +08:00
raiden00pl
420aec6313 !arch/stm32: move stm32f2 to its own directory
BREAKING CHANGE:

Part of splitting the legacy stm32 super-directory; relocates
the stm32f2 sources, headers and boards into arch/arm/src/stm32f2,
arch/arm/include/stm32f2 and boards/arm/stm32f2.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-07-03 10:27:27 +08:00
raiden00pl
ed237096bc !arch/stm32: move stm32f1 to its own directory
BREAKING CHANGE:

Part of splitting the legacy stm32 super-directory; relocates
the stm32f1 sources, headers and boards into arch/arm/src/stm32f1,
arch/arm/include/stm32f1 and boards/arm/stm32f1.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-07-03 10:27:27 +08:00
raiden00pl
070524fa62 !arch/stm32f0l0g0: move stm32c0 and finalize the directory split
Move the stm32c0 sources, headers and boards into arch/arm/src/stm32c0,
arch/arm/include/stm32c0 and boards/arm/stm32c0, then finalize the split:
source each split family directly in arch/arm/Kconfig and boards/Kconfig and
remove the now-empty combined arch/arm/src/stm32f0l0g0 and
boards/arm/stm32f0l0g0 trees.

BREAKING CHANGE: The combined STM32F0/L0/G0/C0 architecture and board
paths were split into stm32f0, stm32l0, stm32g0, and stm32c0 directories.
Out-of-tree boards, include paths, source paths, and defconfigs must move
from stm32f0l0g0 to the matching split family.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-07-03 10:27:27 +08:00
raiden00pl
44566988b1 !arch/stm32f0l0g0: move stm32g0 to its own directory
BREAKING CHANGE:

Part of splitting the legacy stm32 super-directory; relocates
the stm32g0 sources, headers and boards into arch/arm/src/stm32g0,
arch/arm/include/stm32g0 and boards/arm/stm32g0.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-07-03 10:27:27 +08:00
raiden00pl
9002941cd1 !arch/stm32f0l0g0: move stm32l0 to its own directory
BREAKING CHANGE:

Part of splitting the legacy stm32 super-directory; relocates
the stm32l0 sources, headers and boards into arch/arm/src/stm32l0,
arch/arm/include/stm32l0 and boards/arm/stm32l0.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-07-03 10:27:27 +08:00
raiden00pl
f9c9e078f5 !arch/stm32f0l0g0: move stm32f0 to its own directory
BREAKING CHANGE:

Part of splitting the legacy stm32 super-directory; relocates
the stm32f0 sources, headers and boards into arch/arm/src/stm32f0,
arch/arm/include/stm32f0 and boards/arm/stm32f0.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-07-03 10:27:27 +08:00
raiden00pl
bf30992c2c !arch/stm32: move common sources to common/stm32
BREAKING CHANGE: Common STM32 source and private header files moved to
arch/arm/src/common/stm32. Out-of-tree code that references family-local
common source paths must update includes, build rules, and source paths
to the new common STM32 location.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-07-03 10:27:27 +08:00
Alan Carvalho de Assis
a28a5db9f7 arch/arm: Fix LPC2378 to work again
Olimex LPC-2378-STK was the first board I ran NuttX in 2010. Then
in 2023 I found this board on eBay and decided to buy it to try
NuttX on it again, but for my disappointment it was not working:
https://acassis.wordpress.com/2023/04/01/testing-nuttx-again-on-olimex-lpc2378-stk-board/

Then I opened an Issue: https://github.com/apache/nuttx/issues/19201
and Xiang Xiao and ldube helped me to get it working again.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2026-07-02 11:29:02 -03:00
raiden00pl
a42f07052b !arm/stm32: split legacy STM32 family selectors
BREAKING CHANGE: Convert the legacy STM32 F1/F2/F3/F4/G4/L1 port to the concrete
family selectors while keeping the shared STM32 selector hidden.

Legacy STM32 family selector Kconfig symbols were split by
concrete STM32 sub-family. Out-of-tree defconfigs and code must update
CONFIG_ARCH_CHIP_* selections to the new family-specific selectors.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-07-02 10:27:21 -03:00
raiden00pl
a6886722b3 arch/arm/src/common/stm32/Kconfig.i2c: add missing new line
kconfig-frontends doesnt handle missing newlines at the end of the file.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-24 23:14:35 +08:00
raiden00pl
84e62bcc67 !arch/stm32n6: use common STM32 Kconfig symbols
BREAKING CHANGE: STM32N6 Kconfig symbols were renamed from CONFIG_STM32N6_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-24 23:14:35 +08:00
raiden00pl
fa8d14eb9b !arch/stm32wl5: use common STM32 Kconfig symbols
BREAKING CHANGE: STM32WL5 Kconfig symbols were renamed from CONFIG_STM32WL5_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-24 23:14:35 +08:00
raiden00pl
2379454ca8 !arch/stm32wb: use common STM32 Kconfig symbols
BREAKING CHANGE: STM32WB Kconfig symbols were renamed from CONFIG_STM32WB_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
The custom clock option is a special breaking case that does not follow the family-to-common pattern:
CONFIG_ARCH_BOARD_STM32WB_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-24 23:14:35 +08:00
raiden00pl
dd0c546eac !arch/stm32u5: use common STM32 Kconfig symbols
BREAKING CHANGE: STM32U5 Kconfig symbols were renamed from CONFIG_STM32U5_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
The custom clock option is a special breaking case that does not follow the family-to-common pattern:
CONFIG_ARCH_BOARD_STM32U5_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-24 23:14:35 +08:00
raiden00pl
0c41b13966 !arch/stm32l5: use common STM32 Kconfig symbols
BREAKING CHANGE: STM32L5 Kconfig symbols were renamed from CONFIG_STM32L5_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
The custom clock option is a special breaking case that does not follow the family-to-common pattern:
CONFIG_ARCH_BOARD_STM32L5_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-24 23:14:35 +08:00
raiden00pl
a7bd8799b7 !arch/stm32l4: use common STM32 Kconfig symbols
BREAKING CHANGE: STM32L4 Kconfig symbols were renamed from CONFIG_STM32L4_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
The custom clock option is a special breaking case that does not follow the family-to-common pattern:
CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-24 23:14:35 +08:00
raiden00pl
c926b8af0c !arch/stm32h7: use common STM32 Kconfig symbols
BREAKING CHANGE: STM32H7 Kconfig symbols were renamed from CONFIG_STM32H7_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
The custom clock option is a special breaking case that does not follow the family-to-common pattern:
CONFIG_STM32H7_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-24 23:14:35 +08:00
raiden00pl
4f093cc1dd !arch/stm32h5: use common STM32 Kconfig symbols
BREAKING CHANGE: STM32H5 Kconfig symbols were renamed from CONFIG_STM32H5_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
The custom clock option is a special breaking case that does not follow the family-to-common pattern:
CONFIG_ARCH_BOARD_STM32H5_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-24 23:14:35 +08:00
raiden00pl
6bd8fe6ab6 !arch/stm32f7: use common STM32 Kconfig symbols
BREAKING CHANGE: STM32F7 Kconfig symbols were renamed from CONFIG_STM32F7_* to CONFIG_STM32_*.
Out-of-tree code must update defconfigs and Kconfig references to the new CONFIG_STM32_* names.
The custom clock option is a special breaking case that does not follow the family-to-common pattern:
CONFIG_STM32F7_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-24 23:14:35 +08:00
raiden00pl
297bb7b5e6 arch/stm32: split common Kconfig into per-peripheral files
STM32 common Kconfig into smaller files.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-24 23:14:35 +08:00
raiden00pl
68d9930e5f arch/stm32: move stm32 and stm32f0l0g0 shared Kconfig options to common
Shared STM32 Kconfig option definitions from the stm32 (F1/F2/F3/F4/G4/L1)
and stm32f0l0g0 (F0/L0/G0/C0) families moved into arch/arm/src/common/stm32.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-24 23:14:35 +08:00
raiden00pl
de84c7f7eb !arch/stm32f0l0g0: use common STM32 Kconfig symbols
BREAKING CHANGE: STM32F0/L0/G0/C0 Kconfig symbols were renamed from
CONFIG_STM32F0L0G0_* to CONFIG_STM32_*. Out-of-tree code must update defconfigs
and Kconfig references to the new CONFIG_STM32_* names.

The custom clock option is a special breaking case that does not follow the
family-to-common pattern:

CONFIG_ARCH_BOARD_STM32F0G0L0_CUSTOM_CLOCKCONFIG was renamed to CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-24 23:14:35 +08:00
raiden00pl
f13f5d91e2 arch/stm32: add common STM32 Kconfig support
Add the shared STM32 Kconfig include and introduce the hidden
common ARCH_CHIP_STM32 selector used by concrete STM32 families.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-24 23:14:35 +08:00
raiden00pl
7c2100462a !arch/stm32: rename STM32F7/H7 QUADSPI Kconfig symbol to QSPI
BREAKING CHANGE: CONFIG_STM32F7_QUADSPI and CONFIG_STM32H7_QUADSPI are
renamed to CONFIG_STM32F7_QSPI and CONFIG_STM32H7_QSPI. Out-of-tree F7/H7
board configurations must update the symbol name.

Standardize the F7/H7 QSPI enable symbol on the QSPI name (the QUADSPI and
QSPI peripherals are the same IP block). Only the Kconfig enable symbol and
its CONFIG_ references are renamed; the QUADSPI hardware register/pin/DMA
macros are unchanged.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-24 12:19:34 +08:00
Brunocor26
0c48a44431 arch/risc-v/rp23xx-rv: Fix PWM frequency and duty cycle calculation.
Fixed three bugs in the RP23XX (RISC-V) PWM driver, mirroring the fix
previously applied to the ARM variant:

* setup_period: The previous divisor calculation used integer arithmetic
  that caused overflow and loss of precision. The divider is now computed
  as a 16-bit fixed-point value (div16) using 64-bit arithmetic, and
  clamped to the valid hardware range (0x10 to 0xFFF).

* setup_pulse: The compare value was incorrectly scaled by TOP instead
  of 65535, producing wrong duty cycles. The formula is now corrected
  to ((duty * (top + 1)) / 65535) with an overflow guard.

* pwm_start: The driver was not updated as part of the breaking change
  introduced in commit 4df80e19 ("!drivers/pwm: remove PWM_MULTICHAN
  option"). Access to single channel API is now info->channels[0].duty
  instead of info[0].duty.

Signed-off-by: Brunocor26 <bruno.correia@ubi.pt>
2026-06-24 12:19:26 +08:00
lccosy
d4f31f73aa arch/arm/gd32f4: fix missing CTL selector bits in up_disableusartint.
up_disableusartint() saves USART interrupt state from hardware CTL0-CTL3
registers but omits the CTL selector bits (bits 24-27) in the encoded
ie value. When up_restoreusartint() later restores interrupts, it uses
ie >> 24 to determine which CTL register to write. Without selector bits
this evaluates to 0, so no CTL register is updated and all interrupt
enables (including RBNEIE) are permanently lost.

This causes RX interrupts to never fire after any call to up_putc()
(e.g. via syslog), making the serial console unable to receive input.

Fix by adding the corresponding CTL selector bit (USART_CFG_CTLx_INT
<< USART_CFG_SHIFT) whenever a CTL register has active interrupt bits.

Signed-off-by: lccosy <1191294205@qq.com>
2026-06-24 12:19:17 +08:00
lccosy
186d1ca80f arch/arm/gd32f4: fix NULL pointer dereference in arm_earlyserialinit.
Add NULL check for g_uart_devs[i] before accessing ->priv in
arm_earlyserialinit() loop. When a USART is not enabled in defconfig,
g_uart_devs[i] is NULL, causing a HardFault crash during early boot.

The bug occurs because the original code only checked g_uart_devs[i]->priv
without first verifying g_uart_devs[i] is not NULL. On Cortex-M4, NULL
pointer dereference reads from Flash vector table (0x00000000 maps to
0x08000000), returning a function pointer that causes BusFault when
written to.

This fix matches the existing NULL check pattern used in arm_serialinit()
at line 2835 of the same file.

Tested on mplant-gd32f450 board with only USART5 enabled in defconfig.
Before fix: HardFault at boot (IPSR=3, PC=0x080003e0)
After fix: System boots normally to NSH Shell

Signed-off-by: lccosy <1191294205@qq.com>
2026-06-24 12:19:17 +08:00
Alin Jerpelea
53513986cf Revert "arch/arm/gd32f4: fix NULL pointer dereference in arm_earlyserialinit."
This reverts commit c6e36a4a8b.
2026-06-24 12:19:17 +08:00
leisiji
c28bdaa3c9 arch/arm/armv7-a: Fix L1 page table entry double-offset in addrenv create region
In arm_addrenv_create_region(), the inner loop already advances vaddr by
MM_PGSIZE for each mapped page, so after filling one L2 page table
(i.e., ENTRIES_PER_L2TABLE pages), vaddr has naturally advanced to the
start of the next 1MB section.  The old code additionally added
i * SECTION_SIZE, causing the L1 entry for the second and subsequent
sections to skip one section each iteration—leaving virtual address
holes in the mapping.

Remove the redundant i * SECTION_SIZE offset so that the L1 entry tracks
the vaddr already maintained by the inner loop, producing contiguous
section mappings.

Signed-off-by: leisiji <2265215145@qq.com>
2026-06-23 10:45:03 +08:00
raiden00pl
9db6667ac4 !arm/stm32wl5: standardize public API/type prefix to stm32_
BREAKING CHANGE: Public STM32WL5 interfaces were renamed from stm32wl5_*
forms to canonical stm32_* forms across arch and board headers/sources.

Public type names in STM32WL5 timer/GPIO/EXTI and related API-facing
declarations were normalized to stm32_* equivalents.

The STM32WL5 root family header was renamed from stm32wl5.h to stm32.h;
all STM32WL5 arch/board includes were updated accordingly.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-23 09:45:36 +08:00
raiden00pl
f1ff5abddf !arm/stm32wb: standardize public API/type prefix to stm32_
BREAKING CHANGE: Public STM32WB interfaces were renamed from stm32wb_*
forms to canonical stm32_* forms across arch and board headers/sources.

Public type names in STM32WB timer/dma/freerun/oneshot/GPIO/EXTI and
related API-facing declarations were normalized to stm32_* equivalents.

The STM32WB root family header was renamed from stm32wb.h to stm32.h;
all STM32WB arch/board includes were updated accordingly.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-23 09:45:36 +08:00
raiden00pl
ab7a32031b !arm/stm32l5: standardize public API/type prefix to stm32_
BREAKING CHANGE: Public STM32L5 interfaces were renamed from stm32l5_* forms
to canonical stm32_* forms across arch and board headers/sources.

Public type names in STM32L5 timer/GPIO/EXTI and related API-facing
declarations were normalized to stm32_* equivalents.

The STM32L5 root family header was renamed from stm32l5.h to stm32.h;
all STM32L5 arch/board includes were updated accordingly.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-23 09:45:36 +08:00
raiden00pl
e5d9e2dd59 !arm/stm32l4: standardize public API/type prefix to stm32_
BREAKING CHANGE: Public STM32L4 interfaces were renamed from stm32l4_* forms to
canonical stm32_* forms across arch and board headers/sources.

Public type names were normalized to stm32_*
equivalents (including timer/lptimer/dma/freerun API-facing types), and
stm32l4can_initialize() was renamed to stm32_caninitialize().

The STM32L4 root family header was renamed from stm32l4.h to stm32.h;
all STM32L4 arch/board includes were updated accordingly.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-23 09:45:36 +08:00
raiden00pl
e6bfa37424 !arm/stm32h7: standardize public API prefix to stm32_
BREAKING CHANGE: Public STM32H7 APIs were renamed from stm32h7_*
forms to canonical stm32_* forms.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-23 09:45:36 +08:00
raiden00pl
f897cb9ef6 !arm/stm32h5: standardize public API prefix to stm32_
BREAKING CHANGE: Public STM32H5 APIs were renamed from stm32h5_*
forms to canonical stm32_* forms.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-23 09:45:36 +08:00
raiden00pl
096e8d7e59 !arm/stm32f7: standardize public API prefix to stm32_
BREAKING CHANGE: Public STM32F7 APIs were renamed from stm32f7_*
and stm32f7x9_* forms to canonical stm32_* names.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-23 09:45:36 +08:00
Jukka Laitinen
d4a5db49c2 drivers/mtd: Make compile time check for sane mtd isbad/markbad configuration
This removes the DEBUGASSERT in ftl_initialize_by_path. Instead, check
compile time that FTL is enabled in case some of the drivers implement
the isbad and markbad functions.

Also select the FTL_BBM for those drivers as they require it.

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2026-06-17 23:14:58 +08:00
yushuailong
8538e1423f arch/risc-v/esp32c3-legacy: Fix non-atomic clock read in up_rtc_rdalarm.
up_rtc_rdalarm() computed tv_sec and tv_nsec from two separate
evaluations of rt_timer_time_us() + offset + deadline. The RT timer
advances between the two calls, so a read that straddles a second
boundary yields an inconsistent timespec.

Compute the microsecond value once into a local variable and derive
both fields from that single snapshot.

Signed-off-by: yushuailong <yyyusl@qq.com>
2026-06-17 17:12:04 +08:00
yushuailong
a23a7b45c3 arch/risc-v/espressif: Fix non-atomic clock read in esp_rtc_rdalarm.
esp_rtc_rdalarm() computed tv_sec and tv_nsec from two separate
evaluations of esp_hr_timer_time_us() + offset + deadline. The
high-resolution timer advances between the two calls, so a read that
straddles a second boundary yields an inconsistent timespec.

Compute the microsecond value once into a local variable and derive
both fields from that single snapshot.

Signed-off-by: yushuailong <yyyusl@qq.com>
2026-06-17 17:12:04 +08:00
yushuailong
fb2f117ec2 arch/xtensa/espressif: Fix non-atomic clock read in esp_rtc_rdalarm.
esp_rtc_rdalarm() computed tv_sec and tv_nsec from two separate
evaluations of esp_hr_timer_time_us() + offset + deadline. The
high-resolution timer advances between the two calls, so a read that
straddles a second boundary yields an inconsistent timespec.

Compute the microsecond value once into a local variable and derive
both fields from that single snapshot.

Signed-off-by: yushuailong <yyyusl@qq.com>
2026-06-17 17:12:04 +08:00
Jukka Laitinen
361e7e29ae arch, sched/signal: Fix compilation with ENABLE_PARTIAL_SIGNALS=y
Correct build errors when CONFIG_ENABLE_ALL_SIGNALS is not defined

- sched makefiles: Move pending-signal helpers from the ENABLE_ALL_SIGNALS-only
  list to the !DISABLE_ALL_SIGNALS list so signal dispatch is available in
  PARTIAL builds sched: make SIG_PREALLOC_ACTIONS, SIG_ALLOC_ACTIONS and
  SIG_DEFAULT depend on ENABLE_ALL_SIGNALS
- sched: fix ifdefs around pending-signal queue access and signal-mask for
  PARTIAL/DISABLE modes
- arch: gate SYS_signal_handler / _return calls and SYSCALL_LOOKUP(signal)
  with ENABLE_ALL_SIGNALS

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2026-06-17 17:11:26 +08:00
raiden00pl
7f479a7e84 arch/arm/src/stm32f7: remove duplicated stm32_exti_alarm.c source
stm32_exti_alarm.c was added twice in Make.defs and CMakeLists.txt.
Drop the duplicate block

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-17 17:10:35 +08:00
raiden00pl
e23af454f1 !arch/stm32n6: unify non-standard hardware definition prefixes
BREAKING CHANGE: STM32N6 non-standard hardware definition macros
(IRQ, peripheral-count, SRAM and related) were renamed to the common
STM32_* prefix. Out-of-tree code must update the affected references.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-17 17:10:28 +08:00
raiden00pl
8e3710d0d7 !arch/stm32wl5: unify non-standard hardware definition prefixes
BREAKING CHANGE: STM32WL5 non-standard hardware definition macros
(IRQ, peripheral-count, SRAM and related) were renamed to the common
STM32_* prefix. Out-of-tree code must update the affected references.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-17 17:10:28 +08:00
raiden00pl
62751f772c !arch/stm32wb: unify non-standard hardware definition prefixes
BREAKING CHANGE: STM32WB non-standard hardware definition macros
(IRQ, peripheral-count, SRAM and related) were renamed to the common
STM32_* prefix. Out-of-tree code must update the affected references.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-17 17:10:28 +08:00
raiden00pl
a3acb2bf13 !arch/stm32u5: unify non-standard hardware definition prefixes
BREAKING CHANGE: STM32U5 non-standard hardware definition macros
(IRQ, peripheral-count, SRAM and related) were renamed to the common
STM32_* prefix. Out-of-tree code must update the affected references.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-17 17:10:28 +08:00
raiden00pl
813af2e506 !arch/stm32l5: unify non-standard hardware definition prefixes
BREAKING CHANGE: STM32L5 non-standard hardware definition macros
(IRQ, peripheral-count, SRAM and related) were renamed to the common
STM32_* prefix. Out-of-tree code must update the affected references.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-17 17:10:28 +08:00
raiden00pl
6d489b66b1 !arch/stm32l4: unify non-standard hardware definition prefixes
BREAKING CHANGE: STM32L4 non-standard hardware definition macros
(IRQ, peripheral-count, SRAM and related) were renamed to the common
STM32_* prefix. Out-of-tree code must update the affected references.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-17 17:10:28 +08:00
raiden00pl
1e0a014b40 !arch/stm32h7: unify non-standard hardware definition prefixes
BREAKING CHANGE: STM32H7 non-standard hardware definition macros
(IRQ, peripheral-count, SRAM and related) were renamed to the common
STM32_* prefix. Out-of-tree code must update the affected references.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-17 17:10:28 +08:00