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!arm/stm32wb: standardize public API/type prefix to stm32_

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BREAKING CHANGE: Public STM32WB interfaces were renamed from stm32wb_*
forms to canonical stm32_* forms across arch and board headers/sources.

Public type names in STM32WB timer/dma/freerun/oneshot/GPIO/EXTI and
related API-facing declarations were normalized to stm32_* equivalents.

The STM32WB root family header was renamed from stm32wb.h to stm32.h;
all STM32WB arch/board includes were updated accordingly.

Signed-off-by: raiden00pl <raiden00@railab.me>
This commit is contained in:
raiden00pl 2026-05-29 16:28:52 +02:00 • committed by Xiang Xiao
parent ab7a32031b
commit f1ff5abddf
76 changed files with 1954 additions and 1954 deletions
Download patch file Download diff file Expand all files Collapse all files

2
arch/arm/src/stm32wb/stm32wb.h → arch/arm/src/stm32wb/stm32.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32wb/stm32wb.h
* arch/arm/src/stm32wb/stm32.h
*
* SPDX-License-Identifier: Apache-2.0
*

6
arch/arm/src/stm32wb/stm32wb_allocateheap.c
View file

@ -201,7 +201,7 @@ void up_allocate_heap(void **heap_start, size_t *heap_size)
/* Allow user-mode access to the user heap memory */
stm32wb_mpu_uheap((uintptr_t)ubase, usize);
stm32_mpu_uheap((uintptr_t)ubase, usize);
#else
/* Return the heap settings */
@ -289,7 +289,7 @@ void arm_addregion(void)
/* Allow user-mode access to the SRAM2a heap */
stm32wb_mpu_uheap((uintptr_t)SRAM2A_START, SRAM2A_END - SRAM2A_START);
stm32_mpu_uheap((uintptr_t)SRAM2A_START, SRAM2A_END - SRAM2A_START);
#endif
@ -309,7 +309,7 @@ void arm_addregion(void)
/* Allow user-mode access to the SRAM2b heap */
stm32wb_mpu_uheap((uintptr_t)SRAM2B_START, SRAM2B_END - SRAM2B_START);
stm32_mpu_uheap((uintptr_t)SRAM2B_START, SRAM2B_END - SRAM2B_START);
#endif

62
arch/arm/src/stm32wb/stm32wb_blehci.c
View file

@ -106,14 +106,14 @@
* Private Function Prototypes
****************************************************************************/
static int stm32wb_blehci_driveropen(struct bt_driver_s *btdev);
static int stm32wb_blehci_driversend(struct bt_driver_s *btdev,
static int stm32_blehci_driveropen(struct bt_driver_s *btdev);
static int stm32_blehci_driversend(struct bt_driver_s *btdev,
enum bt_buf_type_e type,
void *data, size_t len);
static int stm32wb_blehci_rxevt(struct stm32wb_mbox_evt_s *evt);
static void stm32wb_blehci_bleinit(void);
static int stm32wb_blehci_driverinitialize(void);
static void stm32wb_blehci_drvinitworker(void *arg);
static int stm32_blehci_rxevt(struct stm32_mbox_evt_s *evt);
static void stm32_blehci_bleinit(void);
static int stm32_blehci_driverinitialize(void);
static void stm32_blehci_drvinitworker(void *arg);
/****************************************************************************
* Private Data
@ -122,8 +122,8 @@ static void stm32wb_blehci_drvinitworker(void *arg);
static struct bt_driver_s g_blehci_driver =
{
.head_reserve = 0,
.open = stm32wb_blehci_driveropen,
.send = stm32wb_blehci_driversend
.open = stm32_blehci_driveropen,
.send = stm32_blehci_driversend
};
static mutex_t g_lock = NXMUTEX_INITIALIZER;
@ -134,19 +134,19 @@ struct work_s g_drv_init_work;
****************************************************************************/
/****************************************************************************
* Name: stm32wb_blehci_driveropen
* Name: stm32_blehci_driveropen
****************************************************************************/
static int stm32wb_blehci_driveropen(struct bt_driver_s *btdev)
static int stm32_blehci_driveropen(struct bt_driver_s *btdev)
{
return 0;
}
/****************************************************************************
* Name: stm32wb_blehci_driversend
* Name: stm32_blehci_driversend
****************************************************************************/
static int stm32wb_blehci_driversend(struct bt_driver_s *btdev,
static int stm32_blehci_driversend(struct bt_driver_s *btdev,
enum bt_buf_type_e type,
void *data, size_t len)
{
@ -177,11 +177,11 @@ static int stm32wb_blehci_driversend(struct bt_driver_s *btdev,
if (type == BT_CMD)
{
ret = stm32wb_mbox_blecmd(data, len);
ret = stm32_mbox_blecmd(data, len);
}
else
{
ret = stm32wb_mbox_bleacl(data, len);
ret = stm32_mbox_bleacl(data, len);
}
nxmutex_unlock(&g_lock);
@ -191,10 +191,10 @@ static int stm32wb_blehci_driversend(struct bt_driver_s *btdev,
}
/****************************************************************************
* Name: stm32wb_blehci_rxevt
* Name: stm32_blehci_rxevt
****************************************************************************/
static int stm32wb_blehci_rxevt(struct stm32wb_mbox_evt_s *evt)
static int stm32_blehci_rxevt(struct stm32_mbox_evt_s *evt)
{
size_t len;
@ -259,7 +259,7 @@ static int stm32wb_blehci_rxevt(struct stm32wb_mbox_evt_s *evt)
if (evt->evt_hdr.evt == STM32_SHCI_ASYNC_EVT &&
*(uint16_t *)(&evt->evt_hdr + 1) == STM32_SHCI_ASYNC_EVT_C2RDY)
{
stm32wb_blehci_bleinit();
stm32_blehci_bleinit();
}
break;
@ -276,7 +276,7 @@ static int stm32wb_blehci_rxevt(struct stm32wb_mbox_evt_s *evt)
/* Make driver initialisation in low priority work queue */
work_queue(LPWORK, &g_drv_init_work,
stm32wb_blehci_drvinitworker, NULL, 0);
stm32_blehci_drvinitworker, NULL, 0);
}
break;
@ -288,14 +288,14 @@ static int stm32wb_blehci_rxevt(struct stm32wb_mbox_evt_s *evt)
}
/****************************************************************************
* Name: stm32wb_blehci_bleinit
* Name: stm32_blehci_bleinit
****************************************************************************/
static void stm32wb_blehci_bleinit(void)
static void stm32_blehci_bleinit(void)
{
/* Prepare BLE configuration */
struct stm32wb_shci_ble_init_cfg_s params =
struct stm32_shci_ble_init_cfg_s params =
{
.ble_buf = NULL,
.ble_buf_size = 0,
@ -323,14 +323,14 @@ static void stm32wb_blehci_bleinit(void)
/* Initialise BLE */
stm32wb_mbox_bleinit(&params);
stm32_mbox_bleinit(&params);
}
/****************************************************************************
* Name: stm32wb_blehci_driverinitialize
* Name: stm32_blehci_driverinitialize
****************************************************************************/
static int stm32wb_blehci_driverinitialize(void)
static int stm32_blehci_driverinitialize(void)
{
int ret = 0;
@ -345,12 +345,12 @@ static int stm32wb_blehci_driverinitialize(void)
}
/****************************************************************************
* Name: stm32wb_blehci_drvinitworker
* Name: stm32_blehci_drvinitworker
****************************************************************************/
static void stm32wb_blehci_drvinitworker(void *arg)
static void stm32_blehci_drvinitworker(void *arg)
{
stm32wb_blehci_driverinitialize();
stm32_blehci_driverinitialize();
}
/****************************************************************************
@ -358,7 +358,7 @@ static void stm32wb_blehci_drvinitworker(void *arg)
****************************************************************************/
/****************************************************************************
* Name: stm32wb_blehci_initialize
* Name: stm32_blehci_initialize
*
* Description:
* Initialize and register BLE HCI driver which interfaces a BLE host
@ -367,15 +367,15 @@ static void stm32wb_blehci_drvinitworker(void *arg)
*
****************************************************************************/
void stm32wb_blehci_initialize(void)
void stm32_blehci_initialize(void)
{
/* Initialize mbox internal data structures and set
* event receive handler.
*/
stm32wb_mboxinitialize(stm32wb_blehci_rxevt);
stm32_mboxinitialize(stm32_blehci_rxevt);
/* Enable communication hardware and boot up CPU2 */
stm32wb_mboxenable();
stm32_mboxenable();
}

4
arch/arm/src/stm32wb/stm32wb_blehci.h
View file

@ -50,7 +50,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: stm32wb_blehci_initialize
* Name: stm32_blehci_initialize
*
* Description:
* Initialize and register BLE HCI driver which interfaces a BLE host
@ -59,7 +59,7 @@ extern "C"
*
****************************************************************************/
void stm32wb_blehci_initialize(void);
void stm32_blehci_initialize(void);
#undef EXTERN
#if defined(__cplusplus)

196
arch/arm/src/stm32wb/stm32wb_dma.c
View file

@ -75,20 +75,20 @@
/* This structure described one DMAMUX device */
struct stm32wb_dmamux_s
struct stm32_dmamux_s
{
uint8_t id; /* DMAMUX id */
uint8_t nchan; /* DMAMUX channels */
uint32_t base; /* DMAMUX base address */
};
typedef const struct stm32wb_dmamux_s *DMA_MUX;
typedef const struct stm32_dmamux_s *DMA_MUX;
/* This structure describes one DMA controller */
struct stm32wb_dma_s
struct stm32_dma_s
{
uint8_t first; /* Offset in stm32wb_dmach_s array */
uint8_t first; /* Offset in stm32_dmach_s array */
uint8_t nchan; /* Number of channels */
uint8_t dmamux_offset; /* DMAMUX channel offset */
uint32_t base; /* Base address */
@ -97,7 +97,7 @@ struct stm32wb_dma_s
/* This structure describes one DMA channel (DMA1, DMA2) */
struct stm32wb_dmach_s
struct stm32_dmach_s
{
bool used; /* Channel in use */
uint8_t dmamux_req; /* Configured DMAMUX input request */
@ -110,11 +110,11 @@ struct stm32wb_dmach_s
void *arg; /* Argument passed to callback function */
};
typedef struct stm32wb_dmach_s *DMA_CHANNEL;
typedef struct stm32_dmach_s *DMA_CHANNEL;
/* DMA operations */
struct stm32wb_dma_ops_s
struct stm32_dma_ops_s
{
/* Disable the DMA transfer */
@ -145,12 +145,12 @@ struct stm32wb_dma_ops_s
#ifdef CONFIG_DEBUG_DMA_INFO
/* Sample the DMA registers */
void (*dma_sample)(DMA_HANDLE handle, struct stm32wb_dmaregs_s *regs);
void (*dma_sample)(DMA_HANDLE handle, struct stm32_dmaregs_s *regs);
/* Dump the DMA registers */
void (*dma_dump)(DMA_HANDLE handle,
const struct stm32wb_dmaregs_s *regs,
const struct stm32_dmaregs_s *regs,
const char *msg);
#endif
};
@ -160,19 +160,19 @@ struct stm32wb_dma_ops_s
****************************************************************************/
#if defined(CONFIG_STM32WB_DMA1) || defined(CONFIG_STM32WB_DMA2)
static void stm32wb_dma12_disable(DMA_CHANNEL dmachan);
static int stm32wb_dma12_interrupt(int irq, void *context, void *arg);
static void stm32wb_dma12_setup(DMA_HANDLE handle, uint32_t paddr,
static void stm32_dma12_disable(DMA_CHANNEL dmachan);
static int stm32_dma12_interrupt(int irq, void *context, void *arg);
static void stm32_dma12_setup(DMA_HANDLE handle, uint32_t paddr,
uint32_t maddr, size_t ntransfers,
uint32_t ccr);
static void stm32wb_dma12_start(DMA_HANDLE handle, dma_callback_t callback,
static void stm32_dma12_start(DMA_HANDLE handle, dma_callback_t callback,
void *arg, bool half);
static size_t stm32wb_dma12_residual(DMA_HANDLE handle);
static size_t stm32_dma12_residual(DMA_HANDLE handle);
#ifdef CONFIG_DEBUG_DMA_INFO
static void stm32wb_dma12_sample(DMA_HANDLE handle,
struct stm32wb_dmaregs_s *regs);
static void stm32wb_dma12_dump(DMA_HANDLE handle,
const struct stm32wb_dmaregs_s *regs,
static void stm32_dma12_sample(DMA_HANDLE handle,
struct stm32_dmaregs_s *regs);
static void stm32_dma12_dump(DMA_HANDLE handle,
const struct stm32_dmaregs_s *regs,
const char *msg);
#endif
#endif
@ -187,14 +187,14 @@ static void dmachan_putreg(DMA_CHANNEL dmachan, uint32_t offset,
static void dmamux_putreg(DMA_MUX dmamux, uint32_t offset, uint32_t value);
#ifdef CONFIG_DEBUG_DMA_INFO
static uint32_t dmamux_getreg(DMA_MUX dmamux, uint32_t offset);
static void stm32wb_dmamux_sample(DMA_MUX dmamux, uint8_t chan,
struct stm32wb_dmaregs_s *regs);
static void stm32wb_dmamux_dump(DMA_MUX dmamux, uint8_t channel,
const struct stm32wb_dmaregs_s *regs);
static void stm32_dmamux_sample(DMA_MUX dmamux, uint8_t chan,
struct stm32_dmaregs_s *regs);
static void stm32_dmamux_dump(DMA_MUX dmamux, uint8_t channel,
const struct stm32_dmaregs_s *regs);
#endif
static DMA_CHANNEL stm32wb_dma_channel_get(uint8_t channel,
static DMA_CHANNEL stm32_dma_channel_get(uint8_t channel,
uint8_t controller);
static void stm32wb_gdma_limits_get(uint8_t controller, uint8_t *first,
static void stm32_gdma_limits_get(uint8_t controller, uint8_t *first,
uint8_t *last);
/****************************************************************************
@ -203,20 +203,20 @@ static void stm32wb_gdma_limits_get(uint8_t controller, uint8_t *first,
/* Operations specific to DMA controller */
static const struct stm32wb_dma_ops_s g_dma_ops[DMA_CONTROLLERS] =
static const struct stm32_dma_ops_s g_dma_ops[DMA_CONTROLLERS] =
{
#ifdef CONFIG_STM32WB_DMA1
/* 0 - DMA1 */
{
.dma_disable = stm32wb_dma12_disable,
.dma_interrupt = stm32wb_dma12_interrupt,
.dma_setup = stm32wb_dma12_setup,
.dma_start = stm32wb_dma12_start,
.dma_residual = stm32wb_dma12_residual,
.dma_disable = stm32_dma12_disable,
.dma_interrupt = stm32_dma12_interrupt,
.dma_setup = stm32_dma12_setup,
.dma_start = stm32_dma12_start,
.dma_residual = stm32_dma12_residual,
#ifdef CONFIG_DEBUG_DMA_INFO
.dma_sample = stm32wb_dma12_sample,
.dma_dump = stm32wb_dma12_dump,
.dma_sample = stm32_dma12_sample,
.dma_dump = stm32_dma12_dump,
#endif
},
#else
@ -229,14 +229,14 @@ static const struct stm32wb_dma_ops_s g_dma_ops[DMA_CONTROLLERS] =
/* 1 - DMA2 */
{
.dma_disable = stm32wb_dma12_disable,
.dma_interrupt = stm32wb_dma12_interrupt,
.dma_setup = stm32wb_dma12_setup,
.dma_start = stm32wb_dma12_start,
.dma_residual = stm32wb_dma12_residual,
.dma_disable = stm32_dma12_disable,
.dma_interrupt = stm32_dma12_interrupt,
.dma_setup = stm32_dma12_setup,
.dma_start = stm32_dma12_start,
.dma_residual = stm32_dma12_residual,
#ifdef CONFIG_DEBUG_DMA_INFO
.dma_sample = stm32wb_dma12_sample,
.dma_dump = stm32wb_dma12_dump,
.dma_sample = stm32_dma12_sample,
.dma_dump = stm32_dma12_dump,
#endif
}
#else
@ -248,7 +248,7 @@ static const struct stm32wb_dma_ops_s g_dma_ops[DMA_CONTROLLERS] =
/* This array describes the state of DMAMUX controller */
static const struct stm32wb_dmamux_s g_dmamux[DMAMUX_NUM] =
static const struct stm32_dmamux_s g_dmamux[DMAMUX_NUM] =
{
{
.id = 1,
@ -259,7 +259,7 @@ static const struct stm32wb_dmamux_s g_dmamux[DMAMUX_NUM] =
/* This array describes the state of each controller */
static const struct stm32wb_dma_s g_dma[DMA_NCHANNELS] =
static const struct stm32_dma_s g_dma[DMA_NCHANNELS] =
{
/* 0 - DMA1 */
@ -284,7 +284,7 @@ static const struct stm32wb_dma_s g_dma[DMA_NCHANNELS] =
/* This array describes the state of each DMA channel. */
static struct stm32wb_dmach_s g_dmach[DMA_NCHANNELS] =
static struct stm32_dmach_s g_dmach[DMA_NCHANNELS] =
{
#ifdef CONFIG_STM32WB_DMA1
/* DMA1 */
@ -517,7 +517,7 @@ static uint32_t dmamux_getreg(DMA_MUX dmamux, uint32_t offset)
#endif
/****************************************************************************
* Name: stm32wb_dma_channel_get
* Name: stm32_dma_channel_get
*
* Description:
* Get the g_dmach table entry associated with a given DMA controller
@ -525,7 +525,7 @@ static uint32_t dmamux_getreg(DMA_MUX dmamux, uint32_t offset)
*
****************************************************************************/
static DMA_CHANNEL stm32wb_dma_channel_get(uint8_t channel,
static DMA_CHANNEL stm32_dma_channel_get(uint8_t channel,
uint8_t controller)
{
uint8_t first = 0;
@ -533,7 +533,7 @@ static DMA_CHANNEL stm32wb_dma_channel_get(uint8_t channel,
/* Get limits for g_dma array */
stm32wb_gdma_limits_get(controller, &first, &nchan);
stm32_gdma_limits_get(controller, &first, &nchan);
DEBUGASSERT(channel <= nchan);
@ -541,14 +541,14 @@ static DMA_CHANNEL stm32wb_dma_channel_get(uint8_t channel,
}
/****************************************************************************
* Name: stm32wb_gdma_limits_get
* Name: stm32_gdma_limits_get
*
* Description:
* Get g_dma array limits for a given DMA controller.
*
****************************************************************************/
static void stm32wb_gdma_limits_get(uint8_t controller, uint8_t *first,
static void stm32_gdma_limits_get(uint8_t controller, uint8_t *first,
uint8_t *nchan)
{
DEBUGASSERT(first != NULL);
@ -567,14 +567,14 @@ static void stm32wb_gdma_limits_get(uint8_t controller, uint8_t *first,
#if defined(CONFIG_STM32WB_DMA1) || defined(CONFIG_STM32WB_DMA2)
/****************************************************************************
* Name: stm32wb_dma12_disable
* Name: stm32_dma12_disable
*
* Description:
* Disable DMA channel (DMA1/DMA2)
*
****************************************************************************/
static void stm32wb_dma12_disable(DMA_CHANNEL dmachan)
static void stm32_dma12_disable(DMA_CHANNEL dmachan)
{
uint32_t regval;
@ -597,14 +597,14 @@ static void stm32wb_dma12_disable(DMA_CHANNEL dmachan)
}
/****************************************************************************
* Name: stm32wb_dma12_interrupt
* Name: stm32_dma12_interrupt
*
* Description:
* DMA channel interrupt handler
*
****************************************************************************/
static int stm32wb_dma12_interrupt(int irq, void *context, void *arg)
static int stm32_dma12_interrupt(int irq, void *context, void *arg)
{
DMA_CHANNEL dmachan;
uint32_t isr;
@ -643,7 +643,7 @@ static int stm32wb_dma12_interrupt(int irq, void *context, void *arg)
/* Get the channel structure from the stream and controller numbers */
dmachan = stm32wb_dma_channel_get(channel, controller);
dmachan = stm32_dma_channel_get(channel, controller);
/* Get the interrupt status (for this channel only) */
@ -666,14 +666,14 @@ static int stm32wb_dma12_interrupt(int irq, void *context, void *arg)
}
/****************************************************************************
* Name: stm32wb_dma12_setup
* Name: stm32_dma12_setup
*
* Description:
* Configure DMA before using
*
****************************************************************************/
static void stm32wb_dma12_setup(DMA_HANDLE handle, uint32_t paddr,
static void stm32_dma12_setup(DMA_HANDLE handle, uint32_t paddr,
uint32_t maddr, size_t ntransfers,
uint32_t ccr)
{
@ -738,13 +738,13 @@ static void stm32wb_dma12_setup(DMA_HANDLE handle, uint32_t paddr,
}
/****************************************************************************
* Name: stm32wb_dma12_start
* Name: stm32_dma12_start
*
* Description:
* Start the standard DMA transfer
****************************************************************************/
static void stm32wb_dma12_start(DMA_HANDLE handle, dma_callback_t callback,
static void stm32_dma12_start(DMA_HANDLE handle, dma_callback_t callback,
void *arg, bool half)
{
DMA_CHANNEL dmachan = (DMA_CHANNEL)handle;
@ -800,10 +800,10 @@ static void stm32wb_dma12_start(DMA_HANDLE handle, dma_callback_t callback,
}
/****************************************************************************
* Name: stm32wb_dma12_residual
* Name: stm32_dma12_residual
****************************************************************************/
static size_t stm32wb_dma12_residual(DMA_HANDLE handle)
static size_t stm32_dma12_residual(DMA_HANDLE handle)
{
DMA_CHANNEL dmachan = (DMA_CHANNEL)handle;
@ -813,11 +813,11 @@ static size_t stm32wb_dma12_residual(DMA_HANDLE handle)
}
/****************************************************************************
* Name: stm32wb_dma12_sample
* Name: stm32_dma12_sample
****************************************************************************/
#ifdef CONFIG_DEBUG_DMA_INFO
void stm32wb_dma12_sample(DMA_HANDLE handle, struct stm32wb_dmaregs_s *regs)
void stm32_dma12_sample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs)
{
DMA_CHANNEL dmachan = (DMA_CHANNEL)handle;
irqstate_t flags;
@ -830,7 +830,7 @@ void stm32wb_dma12_sample(DMA_HANDLE handle, struct stm32wb_dmaregs_s *regs)
regs->cpar = dmachan_getreg(dmachan, STM32_DMACHAN_CPAR_OFFSET);
regs->cmar = dmachan_getreg(dmachan, STM32_DMACHAN_CMAR_OFFSET);
stm32wb_dmamux_sample(g_dma[dmachan->ctrl].dmamux,
stm32_dmamux_sample(g_dma[dmachan->ctrl].dmamux,
dmachan->chan + g_dma[dmachan->ctrl].dmamux_offset,
regs);
@ -839,12 +839,12 @@ void stm32wb_dma12_sample(DMA_HANDLE handle, struct stm32wb_dmaregs_s *regs)
#endif
/****************************************************************************
* Name: stm32wb_dma12_dump
* Name: stm32_dma12_dump
****************************************************************************/
#ifdef CONFIG_DEBUG_DMA_INFO
static void stm32wb_dma12_dump(DMA_HANDLE handle,
const struct stm32wb_dmaregs_s *regs,
static void stm32_dma12_dump(DMA_HANDLE handle,
const struct stm32_dmaregs_s *regs,
const char *msg)
{
DMA_CHANNEL dmachan = (DMA_CHANNEL)handle;
@ -872,7 +872,7 @@ static void stm32wb_dma12_dump(DMA_HANDLE handle,
dmachan->base + STM32_DMACHAN_CMAR_OFFSET,
regs->cmar);
stm32wb_dmamux_dump(g_dma[dmachan->ctrl].dmamux,
stm32_dmamux_dump(g_dma[dmachan->ctrl].dmamux,
dmachan->chan + g_dma[dmachan->ctrl].dmamux_offset,
regs);
}
@ -881,12 +881,12 @@ static void stm32wb_dma12_dump(DMA_HANDLE handle,
#endif /* CONFIG_STM32WB_DMA1 || CONFIG_STM32WB_DMA2 */
/****************************************************************************
* Name: stm32wb_dmamux_sample
* Name: stm32_dmamux_sample
****************************************************************************/
#ifdef CONFIG_DEBUG_DMA_INFO
static void stm32wb_dmamux_sample(DMA_MUX dmamux, uint8_t chan,
struct stm32wb_dmaregs_s *regs)
static void stm32_dmamux_sample(DMA_MUX dmamux, uint8_t chan,
struct stm32_dmaregs_s *regs)
{
regs->dmamux.ccr = dmamux_getreg(dmamux, STM32_DMAMUX_CXCR_OFFSET(chan));
regs->dmamux.csr = dmamux_getreg(dmamux, STM32_DMAMUX_CSR_OFFSET);
@ -899,12 +899,12 @@ static void stm32wb_dmamux_sample(DMA_MUX dmamux, uint8_t chan,
#endif
/****************************************************************************
* Name: stm32wb_dmamux_dump
* Name: stm32_dmamux_dump
****************************************************************************/
#ifdef CONFIG_DEBUG_DMA_INFO
static void stm32wb_dmamux_dump(DMA_MUX dmamux, uint8_t channel,
const struct stm32wb_dmaregs_s *regs)
static void stm32_dmamux_dump(DMA_MUX dmamux, uint8_t channel,
const struct stm32_dmaregs_s *regs)
{
dmainfo("DMAMUX%d CH=%d\n", dmamux->id, channel);
dmainfo(" CCR[%08x]: %08x\n",
@ -980,7 +980,7 @@ void weak_function arm_dma_initialize(void)
}
/****************************************************************************
* Name: stm32wb_dmachannel
* Name: stm32_dmachannel
*
* Description:
* Allocate a DMA channel. This function gives the caller mutually
@ -1004,7 +1004,7 @@ void weak_function arm_dma_initialize(void)
*
****************************************************************************/
DMA_HANDLE stm32wb_dmachannel(unsigned int dmamap)
DMA_HANDLE stm32_dmachannel(unsigned int dmamap)
{
DMA_CHANNEL dmachan;
uint8_t dmamux_req;
@ -1026,7 +1026,7 @@ DMA_HANDLE stm32wb_dmachannel(unsigned int dmamap)
/* Get g_dma array limits for given controller */
stm32wb_gdma_limits_get(controller, &first, &nchan);
stm32_gdma_limits_get(controller, &first, &nchan);
/* Find available channel for given controller */
@ -1070,13 +1070,13 @@ DMA_HANDLE stm32wb_dmachannel(unsigned int dmamap)
}
/****************************************************************************
* Name: stm32wb_dmafree
* Name: stm32_dmafree
*
* Description:
* Release a DMA channel and unmap DMAMUX if required.
*
* NOTE: The 'handle' used in this argument must NEVER be used again
* until stm32wb_dmachannel() is called again to re-gain access to the
* until stm32_dmachannel() is called again to re-gain access to the
* channel.
*
* Returned Value:
@ -1088,7 +1088,7 @@ DMA_HANDLE stm32wb_dmachannel(unsigned int dmamap)
*
****************************************************************************/
void stm32wb_dmafree(DMA_HANDLE handle)
void stm32_dmafree(DMA_HANDLE handle)
{
DMA_CHANNEL dmachan = (DMA_CHANNEL)handle;
uint8_t controller;
@ -1114,14 +1114,14 @@ void stm32wb_dmafree(DMA_HANDLE handle)
}
/****************************************************************************
* Name: stm32wb_dmasetup
* Name: stm32_dmasetup
*
* Description:
* Configure DMA before using
*
****************************************************************************/
void stm32wb_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
size_t ntransfers, uint32_t ccr)
{
DMA_CHANNEL dmachan = (DMA_CHANNEL)handle;
@ -1138,18 +1138,18 @@ void stm32wb_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
}
/****************************************************************************
* Name: stm32wb_dmastart
* Name: stm32_dmastart
*
* Description:
* Start the DMA transfer
*
* Assumptions:
* - DMA handle allocated by stm32wb_dmachannel()
* - DMA handle allocated by stm32_dmachannel()
* - No DMA in progress
*
****************************************************************************/
void stm32wb_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg,
void stm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg,
bool half)
{
DMA_CHANNEL dmachan = (DMA_CHANNEL)handle;
@ -1187,19 +1187,19 @@ void stm32wb_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg,
}
/****************************************************************************
* Name: stm32wb_dmastop
* Name: stm32_dmastop
*
* Description:
* Cancel the DMA. After stm32wb_dmastop() is called, the DMA channel is
* reset and stm32wb_dmasetup() must be called before stm32wb_dmastart()
* Cancel the DMA. After stm32_dmastop() is called, the DMA channel is
* reset and stm32_dmasetup() must be called before stm32_dmastart()
* can be called again
*
* Assumptions:
* - DMA handle allocated by stm32wb_dmachannel()
* - DMA handle allocated by stm32_dmachannel()
*
****************************************************************************/
void stm32wb_dmastop(DMA_HANDLE handle)
void stm32_dmastop(DMA_HANDLE handle)
{
DMA_CHANNEL dmachan = (DMA_CHANNEL)handle;
DMA_MUX dmamux;
@ -1228,17 +1228,17 @@ void stm32wb_dmastop(DMA_HANDLE handle)
}
/****************************************************************************
* Name: stm32wb_dmaresidual
* Name: stm32_dmaresidual
*
* Description:
* Read the DMA bytes-remaining register.
*
* Assumptions:
* - DMA handle allocated by stm32wb_dmachannel()
* - DMA handle allocated by stm32_dmachannel()
*
****************************************************************************/
size_t stm32wb_dmaresidual(DMA_HANDLE handle)
size_t stm32_dmaresidual(DMA_HANDLE handle)
{
DMA_CHANNEL dmachan = (DMA_CHANNEL)handle;
uint8_t controller;
@ -1254,7 +1254,7 @@ size_t stm32wb_dmaresidual(DMA_HANDLE handle)
}
/****************************************************************************
* Name: stm32wb_dmacapable
* Name: stm32_dmacapable
*
* Description:
* Check if the DMA controller can transfer data to/from given memory
@ -1271,7 +1271,7 @@ size_t stm32wb_dmaresidual(DMA_HANDLE handle)
****************************************************************************/
#ifdef CONFIG_STM32WB_DMACAPABLE
bool stm32wb_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
{
unsigned int msize_shift;
uint32_t transfer_size;
@ -1347,18 +1347,18 @@ bool stm32wb_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
#endif
/****************************************************************************
* Name: stm32wb_dmasample
* Name: stm32_dmasample
*
* Description:
* Sample DMA register contents
*
* Assumptions:
* - DMA handle allocated by stm32wb_dmachannel()
* - DMA handle allocated by stm32_dmachannel()
*
****************************************************************************/
#ifdef CONFIG_DEBUG_DMA_INFO
void stm32wb_dmasample(DMA_HANDLE handle, struct stm32wb_dmaregs_s *regs)
void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs)
{
DMA_CHANNEL dmachan = (DMA_CHANNEL)handle;
uint8_t controller;
@ -1375,18 +1375,18 @@ void stm32wb_dmasample(DMA_HANDLE handle, struct stm32wb_dmaregs_s *regs)
#endif
/****************************************************************************
* Name: stm32wb_dmadump
* Name: stm32_dmadump
*
* Description:
* Dump previously sampled DMA register contents
*
* Assumptions:
* - DMA handle allocated by stm32wb_dmachannel()
* - DMA handle allocated by stm32_dmachannel()
*
****************************************************************************/
#ifdef CONFIG_DEBUG_DMA_INFO
void stm32wb_dmadump(DMA_HANDLE handle, const struct stm32wb_dmaregs_s *regs,
void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs,
const char *msg)
{
DMA_CHANNEL dmachan = (DMA_CHANNEL)handle;

60
arch/arm/src/stm32wb/stm32wb_dma.h
View file

@ -71,7 +71,7 @@ typedef void *DMA_HANDLE;
typedef void (*dma_callback_t)(DMA_HANDLE handle, uint8_t status, void *arg);
#ifdef CONFIG_DEBUG_DMA_INFO
struct stm32wb_dmaregs_s
struct stm32_dmaregs_s
{
uint32_t isr; /* Interrupt Status Register; each channel gets 4 bits */
uint32_t ccr; /* Channel Configuration Register; determines functionality */
@ -139,18 +139,18 @@ extern "C"
*
****************************************************************************/
DMA_HANDLE stm32wb_dmachannel(unsigned int dmamap);
DMA_HANDLE stm32_dmachannel(unsigned int dmamap);
/****************************************************************************
* Name: stm32wb_dmafree
* Name: stm32_dmafree
*
* Description:
* Release a DMA channel. If another thread is waiting for this DMA
* channel in a call to stm32wb_dmachannel, then this function will
* channel in a call to stm32_dmachannel, then this function will
* re-assign the DMA channel to that thread and wake it up.
*
* NOTE: The 'handle' used in this argument must NEVER be used again
* until stm32wb_dmachannel() is called again to re-gain access to
* until stm32_dmachannel() is called again to re-gain access to
* the channel.
*
* Returned Value:
@ -162,64 +162,64 @@ DMA_HANDLE stm32wb_dmachannel(unsigned int dmamap);
*
****************************************************************************/
void stm32wb_dmafree(DMA_HANDLE handle);
void stm32_dmafree(DMA_HANDLE handle);
/****************************************************************************
* Name: stm32wb_dmasetup
* Name: stm32_dmasetup
*
* Description:
* Configure DMA before using
*
****************************************************************************/
void stm32wb_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
size_t ntransfers, uint32_t ccr);
/****************************************************************************
* Name: stm32wb_dmastart
* Name: stm32_dmastart
*
* Description:
* Start the DMA transfer
*
* Assumptions:
* - DMA handle allocated by stm32wb_dmachannel()
* - DMA handle allocated by stm32_dmachannel()
* - No DMA in progress
*
****************************************************************************/
void stm32wb_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg,
void stm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg,
bool half);
/****************************************************************************
* Name: stm32wb_dmastop
* Name: stm32_dmastop
*
* Description:
* Cancel the DMA. After stm32wb_dmastop() is called, the DMA channel is
* reset and stm32wb_dmasetup() must be called before stm32wb_dmastart()
* Cancel the DMA. After stm32_dmastop() is called, the DMA channel is
* reset and stm32_dmasetup() must be called before stm32_dmastart()
* can be called again
*
* Assumptions:
* - DMA handle allocated by stm32wb_dmachannel()
* - DMA handle allocated by stm32_dmachannel()
*
****************************************************************************/
void stm32wb_dmastop(DMA_HANDLE handle);
void stm32_dmastop(DMA_HANDLE handle);
/****************************************************************************
* Name: stm32wb_dmaresidual
* Name: stm32_dmaresidual
*
* Description:
* Returns the number of bytes remaining to be transferred
*
* Assumptions:
* - DMA handle allocated by stm32wb_dmachannel()
* - DMA handle allocated by stm32_dmachannel()
*
****************************************************************************/
size_t stm32wb_dmaresidual(DMA_HANDLE handle);
size_t stm32_dmaresidual(DMA_HANDLE handle);
/****************************************************************************
* Name: stm32wb_dmacapable
* Name: stm32_dmacapable
*
* Description:
* Check if the DMA controller can transfer data to/from given memory
@ -234,44 +234,44 @@ size_t stm32wb_dmaresidual(DMA_HANDLE handle);
****************************************************************************/
#ifdef CONFIG_STM32WB_DMACAPABLE
bool stm32wb_dmacapable(uintptr_t maddr, uint32_t count, uint32_t ccr);
bool stm32_dmacapable(uintptr_t maddr, uint32_t count, uint32_t ccr);
#else
# define stm32wb_dmacapable(maddr, count, ccr) (true)
# define stm32_dmacapable(maddr, count, ccr) (true)
#endif
/****************************************************************************
* Name: stm32wb_dmasample
* Name: stm32_dmasample
*
* Description:
* Sample DMA register contents
*
* Assumptions:
* - DMA handle allocated by stm32wb_dmachannel()
* - DMA handle allocated by stm32_dmachannel()
*
****************************************************************************/
#ifdef CONFIG_DEBUG_DMA_INFO
void stm32wb_dmasample(DMA_HANDLE handle, struct stm32wb_dmaregs_s *regs);
void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs);
#else
# define stm32wb_dmasample(handle,regs) ((void)0)
# define stm32_dmasample(handle,regs) ((void)0)
#endif
/****************************************************************************
* Name: stm32wb_dmadump
* Name: stm32_dmadump
*
* Description:
* Dump previously sampled DMA register contents
*
* Assumptions:
* - DMA handle allocated by stm32wb_dmachannel()
* - DMA handle allocated by stm32_dmachannel()
*
****************************************************************************/
#ifdef CONFIG_DEBUG_DMA_INFO
void stm32wb_dmadump(DMA_HANDLE handle, const struct stm32wb_dmaregs_s *regs,
void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs,
const char *msg);
#else
# define stm32wb_dmadump(handle,regs,msg) ((void)0)
# define stm32_dmadump(handle,regs,msg) ((void)0)
#endif
#undef EXTERN

4
arch/arm/src/stm32wb/stm32wb_dumpgpio.c
View file

@ -66,14 +66,14 @@ static const char g_portchar[STM32_NPORTS] =
****************************************************************************/
/****************************************************************************
* Function: stm32wb_dumpgpio
* Function: stm32_dumpgpio
*
* Description:
* Dump all GPIO registers associated with the provided base address
*
****************************************************************************/
int stm32wb_dumpgpio(uint32_t pinset, const char *msg)
int stm32_dumpgpio(uint32_t pinset, const char *msg)
{
irqstate_t flags;
uint32_t base;

12
arch/arm/src/stm32wb/stm32wb_exti.h
View file

@ -54,7 +54,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: stm32wb_gpiosetevent
* Name: stm32_gpiosetevent
*
* Description:
* Sets/clears GPIO based event and interrupt triggers.
@ -73,11 +73,11 @@ extern "C"
*
****************************************************************************/
int stm32wb_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
int stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
bool event, xcpt_t func, void *arg);
/****************************************************************************
* Name: stm32wb_exti_alarm
* Name: stm32_exti_alarm
*
* Description:
* Sets/clears EXTI alarm interrupt.
@ -95,12 +95,12 @@ int stm32wb_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
int stm32wb_exti_alarm(bool risingedge, bool fallingedge, bool event,
int stm32_exti_alarm(bool risingedge, bool fallingedge, bool event,
xcpt_t func, void *arg);
#endif
/****************************************************************************
* Name: stm32wb_exti_wakeup
* Name: stm32_exti_wakeup
*
* Description:
* Sets/clears EXTI wakeup interrupt.
@ -118,7 +118,7 @@ int stm32wb_exti_alarm(bool risingedge, bool fallingedge, bool event,
****************************************************************************/
#ifdef CONFIG_RTC_PERIODIC
int stm32wb_exti_wakeup(bool risingedge, bool fallingedge, bool event,
int stm32_exti_wakeup(bool risingedge, bool fallingedge, bool event,
xcpt_t func, void *arg);
#endif

10
arch/arm/src/stm32wb/stm32wb_exti_alarm.c
View file

@ -51,14 +51,14 @@ static void *g_callback_arg;
****************************************************************************/
/****************************************************************************
* Name: stm32wb_exti_alarm_isr
* Name: stm32_exti_alarm_isr
*
* Description:
* EXTI ALARM interrupt service routine/dispatcher
*
****************************************************************************/
static int stm32wb_exti_alarm_isr(int irq, void *context, void *arg)
static int stm32_exti_alarm_isr(int irq, void *context, void *arg)
{
int ret = OK;
@ -81,7 +81,7 @@ static int stm32wb_exti_alarm_isr(int irq, void *context, void *arg)
****************************************************************************/
/****************************************************************************
* Name: stm32wb_exti_alarm
* Name: stm32_exti_alarm
*
* Description:
* Sets/clears EXTI alarm interrupt.
@ -97,7 +97,7 @@ static int stm32wb_exti_alarm_isr(int irq, void *context, void *arg)
*
****************************************************************************/
int stm32wb_exti_alarm(bool risingedge, bool fallingedge, bool event,
int stm32_exti_alarm(bool risingedge, bool fallingedge, bool event,
xcpt_t func, void *arg)
{
g_alarm_callback = func;
@ -107,7 +107,7 @@ int stm32wb_exti_alarm(bool risingedge, bool fallingedge, bool event,
if (func)
{
irq_attach(STM32_IRQ_RTCALRM, stm32wb_exti_alarm_isr, NULL);
irq_attach(STM32_IRQ_RTCALRM, stm32_exti_alarm_isr, NULL);
up_enable_irq(STM32_IRQ_RTCALRM);
}
else

40
arch/arm/src/stm32wb/stm32wb_exti_gpio.c
View file

@ -65,7 +65,7 @@ static struct gpio_callback_s g_gpio_handlers[16];
* Interrupt Service Routines - Dispatchers
****************************************************************************/
static int stm32wb_exti0_isr(int irq, void *context, void *arg)
static int stm32_exti0_isr(int irq, void *context, void *arg)
{
int ret = OK;
@ -86,7 +86,7 @@ static int stm32wb_exti0_isr(int irq, void *context, void *arg)
return ret;
}
static int stm32wb_exti1_isr(int irq, void *context, void *arg)
static int stm32_exti1_isr(int irq, void *context, void *arg)
{
int ret = OK;
@ -107,7 +107,7 @@ static int stm32wb_exti1_isr(int irq, void *context, void *arg)
return ret;
}
static int stm32wb_exti2_isr(int irq, void *context, void *arg)
static int stm32_exti2_isr(int irq, void *context, void *arg)
{
int ret = OK;
@ -128,7 +128,7 @@ static int stm32wb_exti2_isr(int irq, void *context, void *arg)
return ret;
}
static int stm32wb_exti3_isr(int irq, void *context, void *arg)
static int stm32_exti3_isr(int irq, void *context, void *arg)
{
int ret = OK;
@ -149,7 +149,7 @@ static int stm32wb_exti3_isr(int irq, void *context, void *arg)
return ret;
}
static int stm32wb_exti4_isr(int irq, void *context, void *arg)
static int stm32_exti4_isr(int irq, void *context, void *arg)
{
int ret = OK;
@ -170,7 +170,7 @@ static int stm32wb_exti4_isr(int irq, void *context, void *arg)
return ret;
}
static int stm32wb_exti_multiisr(int irq, void *context, void *arg,
static int stm32_exti_multiisr(int irq, void *context, void *arg,
int first, int last)
{
uint32_t pr;
@ -214,14 +214,14 @@ static int stm32wb_exti_multiisr(int irq, void *context, void *arg,
return ret;
}
static int stm32wb_exti95_isr(int irq, void *context, void *arg)
static int stm32_exti95_isr(int irq, void *context, void *arg)
{
return stm32wb_exti_multiisr(irq, context, arg, 5, 9);
return stm32_exti_multiisr(irq, context, arg, 5, 9);
}
static int stm32wb_exti1510_isr(int irq, void *context, void *arg)
static int stm32_exti1510_isr(int irq, void *context, void *arg)
{
return stm32wb_exti_multiisr(irq, context, arg, 10, 15);
return stm32_exti_multiisr(irq, context, arg, 10, 15);
}
/****************************************************************************
@ -229,7 +229,7 @@ static int stm32wb_exti1510_isr(int irq, void *context, void *arg)
****************************************************************************/
/****************************************************************************
* Name: stm32wb_gpiosetevent
* Name: stm32_gpiosetevent
*
* Description:
* Sets/clears GPIO based event and interrupt triggers.
@ -251,7 +251,7 @@ static int stm32wb_exti1510_isr(int irq, void *context, void *arg)
*
****************************************************************************/
int stm32wb_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
int stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
bool event, xcpt_t func, void *arg)
{
struct gpio_callback_s *shared_cbs;
@ -271,37 +271,37 @@ int stm32wb_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
switch (pin)
{
case 0:
handler = stm32wb_exti0_isr;
handler = stm32_exti0_isr;
break;
case 1:
handler = stm32wb_exti1_isr;
handler = stm32_exti1_isr;
break;
case 2:
handler = stm32wb_exti2_isr;
handler = stm32_exti2_isr;
break;
case 3:
handler = stm32wb_exti3_isr;
handler = stm32_exti3_isr;
break;
default:
handler = stm32wb_exti4_isr;
handler = stm32_exti4_isr;
break;
}
}
else if (pin < 10)
{
irq = STM32_IRQ_EXTI95;
handler = stm32wb_exti95_isr;
handler = stm32_exti95_isr;
shared_cbs = &g_gpio_handlers[5];
nshared = 5;
}
else
{
irq = STM32_IRQ_EXTI1510;
handler = stm32wb_exti1510_isr;
handler = stm32_exti1510_isr;
shared_cbs = &g_gpio_handlers[10];
nshared = 6;
}
@ -347,7 +347,7 @@ int stm32wb_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
pinset |= GPIO_EXTI;
}
stm32wb_configgpio(pinset);
stm32_configgpio(pinset);
/* Configure rising/falling edges */

10
arch/arm/src/stm32wb/stm32wb_exti_pwr.c
View file

@ -56,14 +56,14 @@ static void *g_callback_arg;
****************************************************************************/
/****************************************************************************
* Name: stm32wb_exti_pvd_isr
* Name: stm32_exti_pvd_isr
*
* Description:
* EXTI PVD interrupt service routine/dispatcher
*
****************************************************************************/
static int stm32wb_exti_pvd_isr(int irq, void *context, void *arg)
static int stm32_exti_pvd_isr(int irq, void *context, void *arg)
{
int ret = OK;
@ -86,7 +86,7 @@ static int stm32wb_exti_pvd_isr(int irq, void *context, void *arg)
****************************************************************************/
/****************************************************************************
* Name: stm32wb_exti_pvd
* Name: stm32_exti_pvd
*
* Description:
* Sets/clears EXTI PVD interrupt.
@ -102,7 +102,7 @@ static int stm32wb_exti_pvd_isr(int irq, void *context, void *arg)
*
****************************************************************************/
int stm32wb_exti_pvd(bool risingedge, bool fallingedge, bool event,
int stm32_exti_pvd(bool risingedge, bool fallingedge, bool event,
xcpt_t func, void *arg)
{
/* Get the previous GPIO IRQ handler; Save the new IRQ handler. */
@ -114,7 +114,7 @@ int stm32wb_exti_pvd(bool risingedge, bool fallingedge, bool event,
if (func)
{
irq_attach(STM32_IRQ_PVD, stm32wb_exti_pvd_isr, NULL);
irq_attach(STM32_IRQ_PVD, stm32_exti_pvd_isr, NULL);
up_enable_irq(STM32_IRQ_PVD);
}
else

10
arch/arm/src/stm32wb/stm32wb_exti_wakeup.c
View file

@ -51,14 +51,14 @@ static void *g_callback_arg;
****************************************************************************/
/****************************************************************************
* Name: stm32wb_exti_wakeup_isr
* Name: stm32_exti_wakeup_isr
*
* Description:
* EXTI periodic WAKEUP interrupt service routine/dispatcher
*
****************************************************************************/
static int stm32wb_exti_wakeup_isr(int irq, void *context, void *arg)
static int stm32_exti_wakeup_isr(int irq, void *context, void *arg)
{
int ret = OK;
@ -81,7 +81,7 @@ static int stm32wb_exti_wakeup_isr(int irq, void *context, void *arg)
****************************************************************************/
/****************************************************************************
* Name: stm32wb_exti_wakeup
* Name: stm32_exti_wakeup
*
* Description:
* Sets/clears EXTI wakeup interrupt.
@ -97,7 +97,7 @@ static int stm32wb_exti_wakeup_isr(int irq, void *context, void *arg)
*
****************************************************************************/
int stm32wb_exti_wakeup(bool risingedge, bool fallingedge, bool event,
int stm32_exti_wakeup(bool risingedge, bool fallingedge, bool event,
xcpt_t func, void *arg)
{
g_wakeup_callback = func;
@ -107,7 +107,7 @@ int stm32wb_exti_wakeup(bool risingedge, bool fallingedge, bool event,
if (func)
{
irq_attach(STM32_IRQ_RTC_WKUP, stm32wb_exti_wakeup_isr, NULL);
irq_attach(STM32_IRQ_RTC_WKUP, stm32_exti_wakeup_isr, NULL);
up_enable_irq(STM32_IRQ_RTC_WKUP);
}
else

16
arch/arm/src/stm32wb/stm32wb_flash.c
View file

@ -93,7 +93,7 @@ static void flash_unlock(void)
{
while (getreg32(STM32_FLASH_SR) & FLASH_SR_BSY)
{
stm32wb_waste();
stm32_waste();
}
if (getreg32(STM32_FLASH_CR) & FLASH_CR_LOCK)
@ -143,7 +143,7 @@ static inline void flash_erase(size_t page)
while (getreg32(STM32_FLASH_SR) & FLASH_SR_BSY)
{
stm32wb_waste();
stm32_waste();
}
modifyreg32(STM32_FLASH_CR, FLASH_CR_PAGE_ERASE, 0);
@ -153,7 +153,7 @@ static inline void flash_erase(size_t page)
* Public Functions
****************************************************************************/
int stm32wb_flash_unlock(void)
int stm32_flash_unlock(void)
{
int ret;
@ -169,7 +169,7 @@ int stm32wb_flash_unlock(void)
return ret;
}
int stm32wb_flash_lock(void)
int stm32_flash_lock(void)
{
int ret;
@ -186,7 +186,7 @@ int stm32wb_flash_lock(void)
}
/****************************************************************************
* Name: stm32wb_flash_user_optbytes
* Name: stm32_flash_user_optbytes
*
* Description:
* Modify the contents of the user option bytes (USR OPT) on the flash.
@ -202,7 +202,7 @@ int stm32wb_flash_lock(void)
*
****************************************************************************/
uint32_t stm32wb_flash_user_optbytes(uint32_t clrbits, uint32_t setbits)
uint32_t stm32_flash_user_optbytes(uint32_t clrbits, uint32_t setbits)
{
uint32_t regval;
int ret;
@ -240,7 +240,7 @@ uint32_t stm32wb_flash_user_optbytes(uint32_t clrbits, uint32_t setbits)
while (getreg32(STM32_FLASH_SR) & FLASH_SR_BSY)
{
stm32wb_waste();
stm32_waste();
}
flash_optbytes_lock();
@ -453,7 +453,7 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t buflen)
while (getreg32(STM32_FLASH_SR) & FLASH_SR_BSY)
{
stm32wb_waste();
stm32_waste();
}
/* Verify */

8
arch/arm/src/stm32wb/stm32wb_flash.h
View file

@ -35,11 +35,11 @@
* Public Function Prototypes
****************************************************************************/
int stm32wb_flash_lock(void);
int stm32wb_flash_unlock(void);
int stm32_flash_lock(void);
int stm32_flash_unlock(void);
/****************************************************************************
* Name: stm32wb_flash_user_optbytes
* Name: stm32_flash_user_optbytes
*
* Description:
* Modify the contents of the user option bytes (USR OPT) on the flash.
@ -55,6 +55,6 @@ int stm32wb_flash_unlock(void);
*
****************************************************************************/
uint32_t stm32wb_flash_user_optbytes(uint32_t clrbits, uint32_t setbits);
uint32_t stm32_flash_user_optbytes(uint32_t clrbits, uint32_t setbits);
#endif /* __ARCH_ARM_SRC_STM32WB_STM32WB_FLASH_H */

32
arch/arm/src/stm32wb/stm32wb_freerun.c
View file

@ -44,7 +44,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_freerun_handler
* Name: stm32_freerun_handler
*
* Description:
* Timer interrupt callback. When the freerun timer counter overflows,
@ -62,9 +62,9 @@
****************************************************************************/
#ifndef CONFIG_CLOCK_TIMEKEEPING
static int stm32wb_freerun_handler(int irq, void *context, void *arg)
static int stm32_freerun_handler(int irq, void *context, void *arg)
{
struct stm32wb_freerun_s *freerun = (struct stm32wb_freerun_s *)arg;
struct stm32_freerun_s *freerun = (struct stm32_freerun_s *)arg;
DEBUGASSERT(freerun != NULL && freerun->overflow < UINT32_MAX);
freerun->overflow++;
@ -79,7 +79,7 @@ static int stm32wb_freerun_handler(int irq, void *context, void *arg)
****************************************************************************/
/****************************************************************************
* Name: stm32wb_freerun_initialize
* Name: stm32_freerun_initialize
*
* Description:
* Initialize the freerun timer wrapper
@ -97,7 +97,7 @@ static int stm32wb_freerun_handler(int irq, void *context, void *arg)
*
****************************************************************************/
int stm32wb_freerun_initialize(struct stm32wb_freerun_s *freerun, int chan,
int stm32_freerun_initialize(struct stm32_freerun_s *freerun, int chan,
uint16_t resolution)
{
uint32_t frequency;
@ -110,7 +110,7 @@ int stm32wb_freerun_initialize(struct stm32wb_freerun_s *freerun, int chan,
frequency = USEC_PER_SEC / (uint32_t)resolution;
freerun->frequency = frequency;
freerun->tch = stm32wb_tim_init(chan);
freerun->tch = stm32_tim_init(chan);
if (!freerun->tch)
{
tmrerr("ERROR: Failed to allocate TIM%d\n", chan);
@ -135,7 +135,7 @@ int stm32wb_freerun_initialize(struct stm32wb_freerun_s *freerun, int chan,
/* Set up to receive the callback when the counter overflow occurs */
STM32_TIM_SETISR(freerun->tch, stm32wb_freerun_handler, freerun, 0);
STM32_TIM_SETISR(freerun->tch, stm32_freerun_handler, freerun, 0);
#endif
/* Set timer period */
@ -156,7 +156,7 @@ int stm32wb_freerun_initialize(struct stm32wb_freerun_s *freerun, int chan,
}
/****************************************************************************
* Name: stm32wb_freerun_counter
* Name: stm32_freerun_counter
*
* Description:
* Read the counter register of the free-running timer.
@ -164,7 +164,7 @@ int stm32wb_freerun_initialize(struct stm32wb_freerun_s *freerun, int chan,
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* stm32wb_freerun_initialize();
* stm32_freerun_initialize();
* ts The location in which to return the time from the free-running
* timer.
*
@ -176,7 +176,7 @@ int stm32wb_freerun_initialize(struct stm32wb_freerun_s *freerun, int chan,
#ifndef CONFIG_CLOCK_TIMEKEEPING
int stm32wb_freerun_counter(struct stm32wb_freerun_s *freerun,
int stm32_freerun_counter(struct stm32_freerun_s *freerun,
struct timespec *ts)
{
uint64_t usec;
@ -190,7 +190,7 @@ int stm32wb_freerun_counter(struct stm32wb_freerun_s *freerun,
DEBUGASSERT(freerun && freerun->tch && ts);
/* Temporarily disable the overflow counter. NOTE that we have to be
* careful here because stm32wb_tc_getpending() will reset the pending
* careful here because stm32_tc_getpending() will reset the pending
* interrupt status. If we do not handle the overflow here then, it will
* be lost.
*/
@ -253,7 +253,7 @@ int stm32wb_freerun_counter(struct stm32wb_freerun_s *freerun,
#else /* CONFIG_CLOCK_TIMEKEEPING */
int stm32wb_freerun_counter(struct stm32wb_freerun_s *freerun,
int stm32_freerun_counter(struct stm32_freerun_s *freerun,
uint64_t *counter)
{
*counter = STM32_TIM_GETCOUNTER(freerun->tch);
@ -263,7 +263,7 @@ int stm32wb_freerun_counter(struct stm32wb_freerun_s *freerun,
#endif /* CONFIG_CLOCK_TIMEKEEPING */
/****************************************************************************
* Name: stm32wb_freerun_uninitialize
* Name: stm32_freerun_uninitialize
*
* Description:
* Stop the free-running timer and release all resources that it uses.
@ -271,7 +271,7 @@ int stm32wb_freerun_counter(struct stm32wb_freerun_s *freerun,
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* stm32wb_freerun_initialize();
* stm32_freerun_initialize();
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
@ -279,7 +279,7 @@ int stm32wb_freerun_counter(struct stm32wb_freerun_s *freerun,
*
****************************************************************************/
int stm32wb_freerun_uninitialize(struct stm32wb_freerun_s *freerun)
int stm32_freerun_uninitialize(struct stm32_freerun_s *freerun)
{
DEBUGASSERT(freerun && freerun->tch);
@ -291,7 +291,7 @@ int stm32wb_freerun_uninitialize(struct stm32wb_freerun_s *freerun)
/* Free the timer */
stm32wb_tim_deinit(freerun->tch);
stm32_tim_deinit(freerun->tch);
freerun->tch = NULL;
return OK;

26
arch/arm/src/stm32wb/stm32wb_freerun.h
View file

@ -42,17 +42,17 @@
****************************************************************************/
/* The freerun client must allocate an instance of this structure and called
* stm32wb_freerun_initialize() before using the freerun facilities. The
* stm32_freerun_initialize() before using the freerun facilities. The
* client should not access the contents of this structure directly since
* the contents are subject to change.
*/
struct stm32wb_freerun_s
struct stm32_freerun_s
{
uint8_t chan; /* The timer/counter in use */
uint8_t width; /* Width of timer (16- or 32-bits) */
struct stm32wb_tim_dev_s *tch; /* Pointer returned by
* stm32wb_tim_init() */
struct stm32_tim_dev_s *tch; /* Pointer returned by
* stm32_tim_init() */
uint32_t frequency;
#ifndef CONFIG_CLOCK_TIMEKEEPING
@ -82,7 +82,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: stm32wb_freerun_initialize
* Name: stm32_freerun_initialize
*
* Description:
* Initialize the freerun timer wrapper
@ -100,11 +100,11 @@ extern "C"
*
****************************************************************************/
int stm32wb_freerun_initialize(struct stm32wb_freerun_s *freerun, int chan,
int stm32_freerun_initialize(struct stm32_freerun_s *freerun, int chan,
uint16_t resolution);
/****************************************************************************
* Name: stm32wb_freerun_counter
* Name: stm32_freerun_counter
*
* Description:
* Read the counter register of the free-running timer.
@ -112,7 +112,7 @@ int stm32wb_freerun_initialize(struct stm32wb_freerun_s *freerun, int chan,
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* stm32wb_freerun_initialize();
* stm32_freerun_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer.
*
@ -124,18 +124,18 @@ int stm32wb_freerun_initialize(struct stm32wb_freerun_s *freerun, int chan,
#ifndef CONFIG_CLOCK_TIMEKEEPING
int stm32wb_freerun_counter(struct stm32wb_freerun_s *freerun,
int stm32_freerun_counter(struct stm32_freerun_s *freerun,
struct timespec *ts);
#else /* CONFIG_CLOCK_TIMEKEEPING */
int stm32wb_freerun_counter(struct stm32_freerun_s *freerun,
int stm32_freerun_counter(struct stm32_freerun_s *freerun,
uint64_t *counter);
#endif /* CONFIG_CLOCK_TIMEKEEPING */
/****************************************************************************
* Name: stm32wb_freerun_uninitialize
* Name: stm32_freerun_uninitialize
*
* Description:
* Stop the free-running timer and release all resources that it uses.
@ -143,7 +143,7 @@ int stm32wb_freerun_counter(struct stm32_freerun_s *freerun,
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* stm32wb_freerun_initialize();
* stm32_freerun_initialize();
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
@ -151,7 +151,7 @@ int stm32wb_freerun_counter(struct stm32_freerun_s *freerun,
*
****************************************************************************/
int stm32wb_freerun_uninitialize(struct stm32wb_freerun_s *freerun);
int stm32_freerun_uninitialize(struct stm32_freerun_s *freerun);
#undef EXTERN
#ifdef __cplusplus

28
arch/arm/src/stm32wb/stm32wb_gpio.c
View file

@ -71,13 +71,13 @@ const uint32_t g_gpiobase[STM32_NPORTS] =
****************************************************************************/
/****************************************************************************
* Function: stm32wb_gpioinit
* Function: stm32_gpioinit
*
* Description:
* Based on configuration within the .config file, it does:
* - Remaps positions of alternative functions.
*
* Typically called from stm32wb_start().
* Typically called from stm32_start().
*
* Assumptions:
* This function is called early in the initialization sequence so that
@ -85,17 +85,17 @@ const uint32_t g_gpiobase[STM32_NPORTS] =
*
****************************************************************************/
void stm32wb_gpioinit(void)
void stm32_gpioinit(void)
{
}
/****************************************************************************
* Name: stm32wb_configgpio
* Name: stm32_configgpio
*
* Description:
* Configure a GPIO pin based on bit-encoded description of the pin.
* Once it is configured as Alternative (GPIO_ALT|GPIO_CNF_AFPP|...)
* function, it must be unconfigured with stm32wb_unconfiggpio() with
* function, it must be unconfigured with stm32_unconfiggpio() with
* the same cfgset first before it can be set to non-alternative function.
*
* Returned Value:
@ -106,7 +106,7 @@ void stm32wb_gpioinit(void)
* To-Do: Auto Power Enable
****************************************************************************/
int stm32wb_configgpio(uint32_t cfgset)
int stm32_configgpio(uint32_t cfgset)
{
uintptr_t base;
uint32_t regval;
@ -147,7 +147,7 @@ int stm32wb_configgpio(uint32_t cfgset)
/* Set the initial output value */
stm32wb_gpiowrite(cfgset, (cfgset & GPIO_OUTPUT_SET) != 0);
stm32_gpiowrite(cfgset, (cfgset & GPIO_OUTPUT_SET) != 0);
pinmode = GPIO_MODER_OUTPUT;
break;
@ -305,7 +305,7 @@ int stm32wb_configgpio(uint32_t cfgset)
}
/****************************************************************************
* Name: stm32wb_unconfiggpio
* Name: stm32_unconfiggpio
*
* Description:
* Unconfigure a GPIO pin based on bit-encoded description of the pin, set
@ -325,7 +325,7 @@ int stm32wb_configgpio(uint32_t cfgset)
* To-Do: Auto Power Disable
****************************************************************************/
int stm32wb_unconfiggpio(uint32_t cfgset)
int stm32_unconfiggpio(uint32_t cfgset)
{
/* Reuse port and pin number and set it to default HiZ INPUT */
@ -334,18 +334,18 @@ int stm32wb_unconfiggpio(uint32_t cfgset)
/* To-Do: Mark its unuse for automatic power saving options */
return stm32wb_configgpio(cfgset);
return stm32_configgpio(cfgset);
}
/****************************************************************************
* Name: stm32wb_gpiowrite
* Name: stm32_gpiowrite
*
* Description:
* Write one or zero to the selected GPIO pin
*
****************************************************************************/
void stm32wb_gpiowrite(uint32_t pinset, bool value)
void stm32_gpiowrite(uint32_t pinset, bool value)
{
uint32_t base;
uint32_t bit;
@ -379,14 +379,14 @@ void stm32wb_gpiowrite(uint32_t pinset, bool value)
}
/****************************************************************************
* Name: stm32wb_gpioread
* Name: stm32_gpioread
*
* Description:
* Read one or zero from the selected GPIO pin
*
****************************************************************************/
bool stm32wb_gpioread(uint32_t pinset)
bool stm32_gpioread(uint32_t pinset)
{
uint32_t base;
unsigned int port;

36
arch/arm/src/stm32wb/stm32wb_gpio.h
View file

@ -52,7 +52,7 @@
# define STM32_NPORTS 4
#endif
/* Bit-encoded input to stm32wb_configgpio() */
/* Bit-encoded input to stm32_configgpio() */
/* Each port bit of the general-purpose I/O (GPIO) ports can be individually
* configured by software in several modes:
@ -257,12 +257,12 @@ EXTERN const uint32_t g_gpiobase[STM32_NPORTS];
****************************************************************************/
/****************************************************************************
* Name: stm32wb_configgpio
* Name: stm32_configgpio
*
* Description:
* Configure a GPIO pin based on bit-encoded description of the pin.
* Once it is configured as Alternative (GPIO_ALT|GPIO_CNF_AFPP|...)
* function, it must be unconfigured with stm32wb_unconfiggpio() with
* function, it must be unconfigured with stm32_unconfiggpio() with
* the same cfgset first before it can be set to non-alternative function.
*
* Returned Value:
@ -271,10 +271,10 @@ EXTERN const uint32_t g_gpiobase[STM32_NPORTS];
*
****************************************************************************/
int stm32wb_configgpio(uint32_t cfgset);
int stm32_configgpio(uint32_t cfgset);
/****************************************************************************
* Name: stm32wb_unconfiggpio
* Name: stm32_unconfiggpio
*
* Description:
* Unconfigure a GPIO pin based on bit-encoded description of the pin, set
@ -293,30 +293,30 @@ int stm32wb_configgpio(uint32_t cfgset);
*
****************************************************************************/
int stm32wb_unconfiggpio(uint32_t cfgset);
int stm32_unconfiggpio(uint32_t cfgset);
/****************************************************************************
* Name: stm32wb_gpiowrite
* Name: stm32_gpiowrite
*
* Description:
* Write one or zero to the selected GPIO pin
*
****************************************************************************/
void stm32wb_gpiowrite(uint32_t pinset, bool value);
void stm32_gpiowrite(uint32_t pinset, bool value);
/****************************************************************************
* Name: stm32wb_gpioread
* Name: stm32_gpioread
*
* Description:
* Read one or zero from the selected GPIO pin
*
****************************************************************************/
bool stm32wb_gpioread(uint32_t pinset);
bool stm32_gpioread(uint32_t pinset);
/****************************************************************************
* Name: stm32wb_gpiosetevent
* Name: stm32_gpiosetevent
*
* Description:
* Sets/clears GPIO based event and interrupt triggers.
@ -335,11 +335,11 @@ bool stm32wb_gpioread(uint32_t pinset);
*
****************************************************************************/
int stm32wb_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
int stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
bool event, xcpt_t func, void *arg);
/****************************************************************************
* Function: stm32wb_dumpgpio
* Function: stm32_dumpgpio
*
* Description:
* Dump all GPIO registers associated with the provided base address
@ -347,23 +347,23 @@ int stm32wb_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
int stm32wb_dumpgpio(uint32_t pinset, const char *msg);
int stm32_dumpgpio(uint32_t pinset, const char *msg);
#else
# define stm32wb_dumpgpio(p,m)
# define stm32_dumpgpio(p,m)
#endif
/****************************************************************************
* Function: stm32wb_gpioinit
* Function: stm32_gpioinit
*
* Description:
* Based on configuration within the .config file, it does:
* - Remaps positions of alternative functions.
*
* Typically called from stm32wb_start().
* Typically called from stm32_start().
*
****************************************************************************/
void stm32wb_gpioinit(void);
void stm32_gpioinit(void);
#undef EXTERN
#if defined(__cplusplus)

516
arch/arm/src/stm32wb/stm32wb_i2c.c
View file

File diff suppressed because it is too large Load diff

10
arch/arm/src/stm32wb/stm32wb_i2c.h
View file

@ -53,7 +53,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_i2cbus_initialize
* Name: stm32_i2cbus_initialize
*
* Description:
* Initialize the selected I2C port. And return a unique instance of struct
@ -69,16 +69,16 @@
*
****************************************************************************/
struct i2c_master_s *stm32wb_i2cbus_initialize(int port);
struct i2c_master_s *stm32_i2cbus_initialize(int port);
/****************************************************************************
* Name: stm32wb_i2cbus_uninitialize
* Name: stm32_i2cbus_uninitialize
*
* Description:
* De-initialize the selected I2C port, and power down the device.
*
* Input Parameters:
* Device structure as returned by the stm32wb_i2cbus_initialize()
* Device structure as returned by the stm32_i2cbus_initialize()
*
* Returned Value:
* OK on success, ERROR when internal reference count mismatch or dev
@ -86,6 +86,6 @@ struct i2c_master_s *stm32wb_i2cbus_initialize(int port);
*
****************************************************************************/
int stm32wb_i2cbus_uninitialize(struct i2c_master_s *dev);
int stm32_i2cbus_uninitialize(struct i2c_master_s *dev);
#endif /* __ARCH_ARM_SRC_STM32WB_STM32WB_I2C_H */

6
arch/arm/src/stm32wb/stm32wb_idle.c
View file

@ -119,12 +119,12 @@ static void up_idlepm(void)
/* Enter STOP mode */
BEGIN_IDLE();
stm32wb_pmstop(true);
stm32_pmstop(true);
END_IDLE();
/* Set correct clock again after returning from STOP */
stm32wb_clockenable();
stm32_clockenable();
/* Inform of all drivers of the new state */
@ -137,7 +137,7 @@ static void up_idlepm(void)
break;
case PM_SLEEP:
stm32wb_pmstandby();
stm32_pmstandby();
break;
default:

8
arch/arm/src/stm32wb/stm32wb_ipcc.c
View file

@ -40,14 +40,14 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_ipccreset
* Name: stm32_ipccreset
*
* Description:
* Reset the IPCC registers to default state
*
****************************************************************************/
void stm32wb_ipccreset(void)
void stm32_ipccreset(void)
{
uint32_t regval;
@ -77,14 +77,14 @@ void stm32wb_ipccreset(void)
}
/****************************************************************************
* Name: stm32wb_ipccenable
* Name: stm32_ipccenable
*
* Description:
* Enable the IPCC and start CPU2
*
****************************************************************************/
void stm32wb_ipccenable(void)
void stm32_ipccenable(void)
{
uint32_t regval;

36
arch/arm/src/stm32wb/stm32wb_ipcc.h
View file

@ -55,77 +55,77 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: stm32wb_ipccreset
* Name: stm32_ipccreset
*
* Description:
* Reset the IPCC registers to default state
*
****************************************************************************/
void stm32wb_ipccreset(void);
void stm32_ipccreset(void);
/****************************************************************************
* Name: stm32wb_ipccenable
* Name: stm32_ipccenable
*
* Description:
* Enable the IPCC and start CPU2
*
****************************************************************************/
void stm32wb_ipccenable(void);
void stm32_ipccenable(void);
/****************************************************************************
* Inline Functions
****************************************************************************/
/****************************************************************************
* Name: stm32wb_ipcc_rxactive
* Name: stm32_ipcc_rxactive
*
* Description:
* Check channel receive active flag.
*
****************************************************************************/
static inline bool stm32wb_ipcc_rxactive(uint8_t chan)
static inline bool stm32_ipcc_rxactive(uint8_t chan)
{
return (getreg32(STM32_IPCC_C2TOC1SR) & IPCC_C2TOC1SR_BIT(chan)) != 0;
}
/****************************************************************************
* Name: stm32wb_ipcc_txactive
* Name: stm32_ipcc_txactive
*
* Description:
* Check channel transmit active flag.
*
****************************************************************************/
static inline bool stm32wb_ipcc_txactive(uint8_t chan)
static inline bool stm32_ipcc_txactive(uint8_t chan)
{
return (getreg32(STM32_IPCC_C1TOC2SR) & IPCC_C1TOC2SR_BIT(chan)) != 0;
}
/****************************************************************************
* Name: stm32wb_ipcc_settxactive
* Name: stm32_ipcc_settxactive
*
* Description:
* Set channel transmit active flag.
*
****************************************************************************/
static inline void stm32wb_ipcc_settxactive(uint8_t chan)
static inline void stm32_ipcc_settxactive(uint8_t chan)
{
putreg32(IPCC_C1SCR_SET_BIT(chan), STM32_IPCC_C1SCR);
}
/****************************************************************************
* Name: stm32wb_ipcc_masktxf
* Name: stm32_ipcc_masktxf
*
* Description:
* Mask channel transmit free interrupt.
*
****************************************************************************/
static inline void stm32wb_ipcc_masktxf(uint8_t chan)
static inline void stm32_ipcc_masktxf(uint8_t chan)
{
uint32_t regval = getreg32(STM32_IPCC_C1MR);
regval |= IPCC_C1MR_FM_BIT(chan);
@ -133,14 +133,14 @@ static inline void stm32wb_ipcc_masktxf(uint8_t chan)
}
/****************************************************************************
* Name: stm32wb_ipcc_unmasktxf
* Name: stm32_ipcc_unmasktxf
*
* Description:
* Unmask channel transmit free interrupt.
*
****************************************************************************/
static inline void stm32wb_ipcc_unmasktxf(uint8_t chan)
static inline void stm32_ipcc_unmasktxf(uint8_t chan)
{
uint32_t regval = getreg32(STM32_IPCC_C1MR);
regval &= ~IPCC_C1MR_FM_BIT(chan);
@ -148,14 +148,14 @@ static inline void stm32wb_ipcc_unmasktxf(uint8_t chan)
}
/****************************************************************************
* Name: stm32wb_ipcc_maskrxo
* Name: stm32_ipcc_maskrxo
*
* Description:
* Mask channel receive occupied interrupt.
*
****************************************************************************/
static inline void stm32wb_ipcc_maskrxo(uint8_t chan)
static inline void stm32_ipcc_maskrxo(uint8_t chan)
{
uint32_t regval = getreg32(STM32_IPCC_C1MR);
regval |= IPCC_C1MR_OM_BIT(chan);
@ -163,14 +163,14 @@ static inline void stm32wb_ipcc_maskrxo(uint8_t chan)
}
/****************************************************************************
* Name: stm32wb_ipcc_maskrxo
* Name: stm32_ipcc_maskrxo
*
* Description:
* Unmask channel receive occupied interrupt.
*
****************************************************************************/
static inline void stm32wb_ipcc_unmaskrxo(uint8_t chan)
static inline void stm32_ipcc_unmaskrxo(uint8_t chan)
{
uint32_t regval = getreg32(STM32_IPCC_C1MR);
regval &= ~IPCC_C1MR_OM_BIT(chan);

38
arch/arm/src/stm32wb/stm32wb_irq.c
View file

@ -65,7 +65,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_dumpnvic
* Name: stm32_dumpnvic
*
* Description:
* Dump some interesting NVIC registers
@ -73,7 +73,7 @@
****************************************************************************/
#if defined(CONFIG_DEBUG_IRQ_INFO)
static void stm32wb_dumpnvic(const char *msg, int irq)
static void stm32_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;
@ -129,11 +129,11 @@ static void stm32wb_dumpnvic(const char *msg, int irq)
leave_critical_section(flags);
}
#else
# define stm32wb_dumpnvic(msg, irq)
# define stm32_dumpnvic(msg, irq)
#endif
/****************************************************************************
* Name: stm32wb_nmi, stm32wb_pendsv,stm32wb_pendsv, stm32wb_reserved
* Name: stm32_nmi, stm32_pendsv,stm32_pendsv, stm32_reserved
*
* Description:
* Handlers for various exceptions. None are handled and all are fatal
@ -143,7 +143,7 @@ static void stm32wb_dumpnvic(const char *msg, int irq)
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
static int stm32wb_nmi(int irq, void *context, void *arg)
static int stm32_nmi(int irq, void *context, void *arg)
{
up_irq_save();
_err("PANIC!!! NMI received\n");
@ -151,7 +151,7 @@ static int stm32wb_nmi(int irq, void *context, void *arg)
return 0;
}
static int stm32wb_pendsv(int irq, void *context, void *arg)
static int stm32_pendsv(int irq, void *context, void *arg)
{
up_irq_save();
_err("PANIC!!! PendSV received\n");
@ -159,7 +159,7 @@ static int stm32wb_pendsv(int irq, void *context, void *arg)
return 0;
}
static int stm32wb_reserved(int irq, void *context, void *arg)
static int stm32_reserved(int irq, void *context, void *arg)
{
up_irq_save();
_err("PANIC!!! Reserved interrupt\n");
@ -169,7 +169,7 @@ static int stm32wb_reserved(int irq, void *context, void *arg)
#endif
/****************************************************************************
* Name: stm32wb_prioritize_syscall
* Name: stm32_prioritize_syscall
*
* Description:
* Set the priority of an exception. This function may be needed
@ -177,7 +177,7 @@ static int stm32wb_reserved(int irq, void *context, void *arg)
*
****************************************************************************/
static inline void stm32wb_prioritize_syscall(int priority)
static inline void stm32_prioritize_syscall(int priority)
{
uint32_t regval;
@ -190,7 +190,7 @@ static inline void stm32wb_prioritize_syscall(int priority)
}
/****************************************************************************
* Name: stm32wb_irqinfo
* Name: stm32_irqinfo
*
* Description:
* Given an IRQ number, provide the register and bit setting to enable or
@ -198,7 +198,7 @@ static inline void stm32wb_prioritize_syscall(int priority)
*
****************************************************************************/
static int stm32wb_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
static int stm32_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
uintptr_t offset)
{
int n;
@ -328,7 +328,7 @@ void up_irqinitialize(void)
/* up_prioritize_irq(STM32_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
#endif
stm32wb_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
stm32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
/* If the MPU is enabled, then attach and enable the Memory Management
* Fault handler.
@ -342,19 +342,19 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
#ifdef CONFIG_DEBUG_FEATURES
irq_attach(STM32_IRQ_NMI, stm32wb_nmi, NULL);
irq_attach(STM32_IRQ_NMI, stm32_nmi, NULL);
#ifndef CONFIG_ARM_MPU
irq_attach(STM32_IRQ_MEMFAULT, arm_memfault, NULL);
#endif
irq_attach(STM32_IRQ_BUSFAULT, arm_busfault, NULL);
irq_attach(STM32_IRQ_USAGEFAULT, arm_usagefault, NULL);
irq_attach(STM32_IRQ_PENDSV, stm32wb_pendsv, NULL);
irq_attach(STM32_IRQ_PENDSV, stm32_pendsv, NULL);
arm_enable_dbgmonitor();
irq_attach(STM32_IRQ_DBGMONITOR, arm_dbgmonitor, NULL);
irq_attach(STM32_IRQ_RESERVED, stm32wb_reserved, NULL);
irq_attach(STM32_IRQ_RESERVED, stm32_reserved, NULL);
#endif
stm32wb_dumpnvic("initial", NR_IRQS);
stm32_dumpnvic("initial", NR_IRQS);
#ifndef CONFIG_SUPPRESS_INTERRUPTS
@ -379,7 +379,7 @@ void up_disable_irq(int irq)
uint32_t regval;
uint32_t bit;
if (stm32wb_irqinfo(irq, &regaddr, &bit, NVIC_CLRENA_OFFSET) == 0)
if (stm32_irqinfo(irq, &regaddr, &bit, NVIC_CLRENA_OFFSET) == 0)
{
/* Modify the appropriate bit in the register to disable the interrupt.
* For normal interrupts, we need to set the bit in the associated
@ -414,7 +414,7 @@ void up_enable_irq(int irq)
uint32_t regval;
uint32_t bit;
if (stm32wb_irqinfo(irq, &regaddr, &bit, NVIC_ENA_OFFSET) == 0)
if (stm32_irqinfo(irq, &regaddr, &bit, NVIC_ENA_OFFSET) == 0)
{
/* Modify the appropriate bit in the register to enable the interrupt.
* For normal interrupts, we need to set the bit in the associated
@ -491,7 +491,7 @@ int up_prioritize_irq(int irq, int priority)
regval |= (priority << shift);
putreg32(regval, regaddr);
stm32wb_dumpnvic("prioritize", irq);
stm32_dumpnvic("prioritize", irq);
return OK;
}
#endif

20
arch/arm/src/stm32wb/stm32wb_lowputc.c
View file

@ -32,7 +32,7 @@
#include "arm_internal.h"
#include "chip.h"
#include "stm32wb.h"
#include "stm32.h"
#include "stm32wb_rcc.h"
#include "stm32wb_gpio.h"
#include "stm32wb_uart.h"
@ -214,7 +214,7 @@ void arm_lowputc(char ch)
while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_ISR_OFFSET) &
USART_ISR_TXE) == 0);
#ifdef STM32_CONSOLE_RS485_DIR
stm32wb_gpiowrite(STM32_CONSOLE_RS485_DIR,
stm32_gpiowrite(STM32_CONSOLE_RS485_DIR,
STM32_CONSOLE_RS485_DIR_POLARITY);
#endif
@ -225,7 +225,7 @@ void arm_lowputc(char ch)
#ifdef STM32_CONSOLE_RS485_DIR
while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_ISR_OFFSET) &
USART_ISR_TC) == 0);
stm32wb_gpiowrite(STM32_CONSOLE_RS485_DIR,
stm32_gpiowrite(STM32_CONSOLE_RS485_DIR,
!STM32_CONSOLE_RS485_DIR_POLARITY);
#endif
@ -233,7 +233,7 @@ void arm_lowputc(char ch)
}
/****************************************************************************
* Name: stm32wb_lowsetup
* Name: stm32_lowsetup
*
* Description:
* This performs basic initialization of the USART used for the serial
@ -242,7 +242,7 @@ void arm_lowputc(char ch)
*
****************************************************************************/
void stm32wb_lowsetup(void)
void stm32_lowsetup(void)
{
#if defined(HAVE_UART)
#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
@ -258,19 +258,19 @@ void stm32wb_lowsetup(void)
/* Enable the console USART and configure GPIO pins needed for rx/tx.
*
* NOTE: Clocking for selected U[S]ARTs was already provided in
* stm32wb_rcc.c
* stm32_rcc.c
*/
#ifdef STM32_CONSOLE_TX
stm32wb_configgpio(STM32_CONSOLE_TX);
stm32_configgpio(STM32_CONSOLE_TX);
#endif
#ifdef STM32_CONSOLE_RX
stm32wb_configgpio(STM32_CONSOLE_RX);
stm32_configgpio(STM32_CONSOLE_RX);
#endif
#ifdef STM32_CONSOLE_RS485_DIR
stm32wb_configgpio(STM32_CONSOLE_RS485_DIR);
stm32wb_gpiowrite(STM32_CONSOLE_RS485_DIR,
stm32_configgpio(STM32_CONSOLE_RS485_DIR);
stm32_gpiowrite(STM32_CONSOLE_RS485_DIR,
!STM32_CONSOLE_RS485_DIR_POLARITY);
#endif

4
arch/arm/src/stm32wb/stm32wb_lowputc.h
View file

@ -47,7 +47,7 @@ extern "C"
#endif
/****************************************************************************
* Name: stm32wb_lowsetup
* Name: stm32_lowsetup
*
* Description:
* Called at the very beginning of _start.
@ -55,7 +55,7 @@ extern "C"
*
****************************************************************************/
void stm32wb_lowsetup(void);
void stm32_lowsetup(void);
#undef EXTERN
#if defined(__cplusplus)

330
arch/arm/src/stm32wb/stm32wb_mbox.c
View file

@ -48,14 +48,14 @@
/* Mailbox shared buffer fields */
#define stm32wb_mbox_shared \
(*(struct stm32wb_mbox_shared_buffer_s *)STM32_MBOX_SHARED_BASE)
#define stm32_mbox_shared \
(*(struct stm32_mbox_shared_buffer_s *)STM32_MBOX_SHARED_BASE)
#define stm32wb_mbox_ref_table (stm32wb_mbox_shared.ref_table)
#define stm32wb_mbox_di_table (stm32wb_mbox_shared.dev_info_table)
#define stm32wb_mbox_sys_table (stm32wb_mbox_shared.sys_table)
#define stm32wb_mbox_mm_table (stm32wb_mbox_shared.mm_table)
#define stm32wb_mbox_ble_table (stm32wb_mbox_shared.ble_table)
#define stm32_mbox_ref_table (stm32_mbox_shared.ref_table)
#define stm32_mbox_di_table (stm32_mbox_shared.dev_info_table)
#define stm32_mbox_sys_table (stm32_mbox_shared.sys_table)
#define stm32_mbox_mm_table (stm32_mbox_shared.mm_table)
#define stm32_mbox_ble_table (stm32_mbox_shared.ble_table)
/* Mailbox buffer sizes */
@ -72,19 +72,19 @@
/* Mailbox shared buffer structures */
begin_packed_struct struct stm32wb_mbox_safe_boot_info_table_s
begin_packed_struct struct stm32_mbox_safe_boot_info_table_s
{
uint32_t version;
} end_packed_struct;
begin_packed_struct struct stm32wb_mbox_fus_info_table_s
begin_packed_struct struct stm32_mbox_fus_info_table_s
{
uint32_t version;
uint32_t memory_size;
uint32_t fus_info;
} end_packed_struct;
begin_packed_struct struct stm32wb_mbox_wireless_fw_info_table_s
begin_packed_struct struct stm32_mbox_wireless_fw_info_table_s
{
uint32_t version;
uint32_t memory_size;
@ -92,14 +92,14 @@ begin_packed_struct struct stm32wb_mbox_wireless_fw_info_table_s
uint32_t reserved;
} end_packed_struct;
begin_packed_struct struct stm32wb_mbox_device_info_table_s
begin_packed_struct struct stm32_mbox_device_info_table_s
{
struct stm32wb_mbox_safe_boot_info_table_s safe_boot_info_table;
struct stm32wb_mbox_fus_info_table_s fus_info_table;
struct stm32wb_mbox_wireless_fw_info_table_s wireless_fw_info_table;
struct stm32_mbox_safe_boot_info_table_s safe_boot_info_table;
struct stm32_mbox_fus_info_table_s fus_info_table;
struct stm32_mbox_wireless_fw_info_table_s wireless_fw_info_table;
} end_packed_struct;
begin_packed_struct struct stm32wb_mbox_ble_table_s
begin_packed_struct struct stm32_mbox_ble_table_s
{
void *cmd_buffer;
void *cs_buffer;
@ -107,13 +107,13 @@ begin_packed_struct struct stm32wb_mbox_ble_table_s
void *acl_buffer;
} end_packed_struct;
begin_packed_struct struct stm32wb_mbox_sys_table_s
begin_packed_struct struct stm32_mbox_sys_table_s
{
void *cmd_buffer;
void *evt_queue;
} end_packed_struct;
begin_packed_struct struct stm32wb_mbox_mem_manager_table_s
begin_packed_struct struct stm32_mbox_mem_manager_table_s
{
void *ble_spare_buffer;
void *sys_spare_buffer;
@ -124,13 +124,13 @@ begin_packed_struct struct stm32wb_mbox_mem_manager_table_s
uint32_t traces_evtpool_size;
} end_packed_struct;
begin_packed_struct struct stm32wb_mbox_ref_table_s
begin_packed_struct struct stm32_mbox_ref_table_s
{
struct stm32wb_mbox_device_info_table_s *dev_info_table;
struct stm32wb_mbox_ble_table_s *ble_table;
struct stm32_mbox_device_info_table_s *dev_info_table;
struct stm32_mbox_ble_table_s *ble_table;
void *thread_table;
struct stm32wb_mbox_sys_table_s *sys_table;
struct stm32wb_mbox_mem_manager_table_s *mm_table;
struct stm32_mbox_sys_table_s *sys_table;
struct stm32_mbox_mem_manager_table_s *mm_table;
void *traces_table;
void *mac_802_15_4_table;
void *zigbee_table;
@ -140,20 +140,20 @@ begin_packed_struct struct stm32wb_mbox_ref_table_s
/* Mailbox shared buffer memory layout structure */
struct stm32wb_mbox_shared_buffer_s
struct stm32_mbox_shared_buffer_s
{
aligned_data(4) struct stm32wb_mbox_ref_table_s ref_table;
aligned_data(4) struct stm32_mbox_ref_table_s ref_table;
aligned_data(4) struct stm32wb_mbox_device_info_table_s dev_info_table;
aligned_data(4) struct stm32wb_mbox_ble_table_s ble_table;
aligned_data(4) struct stm32wb_mbox_sys_table_s sys_table;
aligned_data(4) struct stm32wb_mbox_mem_manager_table_s mm_table;
aligned_data(4) struct stm32_mbox_device_info_table_s dev_info_table;
aligned_data(4) struct stm32_mbox_ble_table_s ble_table;
aligned_data(4) struct stm32_mbox_sys_table_s sys_table;
aligned_data(4) struct stm32_mbox_mem_manager_table_s mm_table;
aligned_data(4) stm32wb_mbox_list_t evtfree_buffer;
aligned_data(4) stm32_mbox_list_t evtfree_buffer;
#ifdef CONFIG_STM32WB_BLE
aligned_data(4) stm32wb_mbox_list_t ble_evt_queue;
aligned_data(4) stm32_mbox_list_t ble_evt_queue;
#endif
aligned_data(4) stm32wb_mbox_list_t sys_evt_queue;
aligned_data(4) stm32_mbox_list_t sys_evt_queue;
#ifdef CONFIG_STM32WB_BLE
aligned_data(4) uint8_t ble_cs_buffer[STM32_MBOX_CS_BUF_SIZE];
@ -170,11 +170,11 @@ struct stm32wb_mbox_shared_buffer_s
/* Mailbox channel data type */
struct stm32wb_mbox_channel_s
struct stm32_mbox_channel_s
{
uint8_t ch_num;
stm32wb_mbox_list_t cmd_buf_queue;
struct stm32wb_mbox_cmd_s *cmd_buf;
stm32_mbox_list_t cmd_buf_queue;
struct stm32_mbox_cmd_s *cmd_buf;
bool ack_ready;
};
@ -182,18 +182,18 @@ struct stm32wb_mbox_channel_s
* Private Function prototypes
****************************************************************************/
static void stm32wb_ipcc_rxoisr(int irq, uint32_t *regs, void *arg);
static void stm32wb_ipcc_txfisr(int irq, uint32_t *regs, void *arg);
static void stm32_ipcc_rxoisr(int irq, uint32_t *regs, void *arg);
static void stm32_ipcc_txfisr(int irq, uint32_t *regs, void *arg);
static void stm32wb_mbox_rxworker(void *arg);
static void stm32wb_mbox_txworker(void *arg);
static void stm32_mbox_rxworker(void *arg);
static void stm32_mbox_txworker(void *arg);
static void stm32wb_mbox_eventfree(stm32wb_mbox_list_t *evt);
static void stm32wb_mbox_acksyscmd(void);
static void stm32_mbox_eventfree(stm32_mbox_list_t *evt);
static void stm32_mbox_acksyscmd(void);
static int stm32wb_mbox_txdata(struct stm32wb_mbox_channel_s *chan,
static int stm32_mbox_txdata(struct stm32_mbox_channel_s *chan,
uint8_t type, void *data, size_t len);
static bool stm32wb_mbox_txnext(struct stm32wb_mbox_channel_s *chan);
static bool stm32_mbox_txnext(struct stm32_mbox_channel_s *chan);
/****************************************************************************
* Private Data
@ -202,26 +202,26 @@ static bool stm32wb_mbox_txnext(struct stm32wb_mbox_channel_s *chan);
static struct work_s g_rx_evt_work;
static struct work_s g_tx_cmd_work;
static stm32wb_mbox_list_t g_rx_evt_queue;
static stm32wb_mbox_list_t g_tx_evtfree_queue;
static stm32_mbox_list_t g_rx_evt_queue;
static stm32_mbox_list_t g_tx_evtfree_queue;
static uint8_t g_free_buffers[CONFIG_STM32WB_MBOX_TX_CMD_QUEUE_LEN]
[STM32_MBOX_CMDPKT_BUF_SIZE];
static stm32wb_mbox_list_t g_free_buffers_pool;
static stm32_mbox_list_t g_free_buffers_pool;
static struct stm32wb_mbox_channel_s g_syscmd_channel;
static struct stm32_mbox_channel_s g_syscmd_channel;
#ifdef CONFIG_STM32WB_BLE
static struct stm32wb_mbox_channel_s g_blecmd_channel;
static struct stm32wb_mbox_channel_s g_bleacl_channel;
static struct stm32_mbox_channel_s g_blecmd_channel;
static struct stm32_mbox_channel_s g_bleacl_channel;
#endif
static stm32wb_mbox_evt_handler_t receive_evt_handler;
static stm32_mbox_evt_handler_t receive_evt_handler;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32wb_ipcc_rxoisr
* Name: stm32_ipcc_rxoisr
*
* Description:
* RX channel occupied interrupt handler (communication data posted
@ -229,15 +229,15 @@ static stm32wb_mbox_evt_handler_t receive_evt_handler;
*
****************************************************************************/
static void stm32wb_ipcc_rxoisr(int irq, uint32_t *regs, void *arg)
static void stm32_ipcc_rxoisr(int irq, uint32_t *regs, void *arg)
{
uint32_t clrmask = 0;
/* Pull events from system channel into processing queue */
if (stm32wb_ipcc_rxactive(STM32_MBOX_SYSEVT_CHANNEL))
if (stm32_ipcc_rxactive(STM32_MBOX_SYSEVT_CHANNEL))
{
stm32wb_mbox_list_moveall(&stm32wb_mbox_shared.sys_evt_queue,
stm32_mbox_list_moveall(&stm32_mbox_shared.sys_evt_queue,
&g_rx_evt_queue);
clrmask |= IPCC_C1SCR_CLR_BIT(STM32_MBOX_SYSEVT_CHANNEL);
@ -247,9 +247,9 @@ static void stm32wb_ipcc_rxoisr(int irq, uint32_t *regs, void *arg)
/* Pull events from BLE channel into processing queue */
if (stm32wb_ipcc_rxactive(STM32_MBOX_BLEEVT_CHANNEL))
if (stm32_ipcc_rxactive(STM32_MBOX_BLEEVT_CHANNEL))
{
stm32wb_mbox_list_moveall(&stm32wb_mbox_shared.ble_evt_queue,
stm32_mbox_list_moveall(&stm32_mbox_shared.ble_evt_queue,
&g_rx_evt_queue);
clrmask |= IPCC_C1SCR_CLR_BIT(STM32_MBOX_BLEEVT_CHANNEL);
@ -260,7 +260,7 @@ static void stm32wb_ipcc_rxoisr(int irq, uint32_t *regs, void *arg)
if (work_available(&g_rx_evt_work))
{
work_queue(HPWORK, &g_rx_evt_work, stm32wb_mbox_rxworker, NULL, 0);
work_queue(HPWORK, &g_rx_evt_work, stm32_mbox_rxworker, NULL, 0);
}
/* Clear active statuses */
@ -269,7 +269,7 @@ static void stm32wb_ipcc_rxoisr(int irq, uint32_t *regs, void *arg)
}
/****************************************************************************
* Name: stm32wb_ipcc_txfisr
* Name: stm32_ipcc_txfisr
*
* Description:
* TX channel free interrupt handler (communication data retrieved
@ -277,7 +277,7 @@ static void stm32wb_ipcc_rxoisr(int irq, uint32_t *regs, void *arg)
*
****************************************************************************/
static void stm32wb_ipcc_txfisr(int irq, uint32_t *regs, void *arg)
static void stm32_ipcc_txfisr(int irq, uint32_t *regs, void *arg)
{
uint32_t c1mr = getreg32(STM32_IPCC_C1MR);
uint32_t txfsrc;
@ -296,14 +296,14 @@ static void stm32wb_ipcc_txfisr(int irq, uint32_t *regs, void *arg)
{
/* Move all released events (if any) into transmission mailbox */
if (!stm32wb_mbox_list_is_empty(&g_tx_evtfree_queue))
if (!stm32_mbox_list_is_empty(&g_tx_evtfree_queue))
{
stm32wb_mbox_list_moveall(&g_tx_evtfree_queue,
&stm32wb_mbox_shared.evtfree_buffer);
stm32_mbox_list_moveall(&g_tx_evtfree_queue,
&stm32_mbox_shared.evtfree_buffer);
/* Start release channel transmission */
stm32wb_ipcc_settxactive(STM32_MBOX_EVT_RELEASE_CHANNEL);
stm32_ipcc_settxactive(STM32_MBOX_EVT_RELEASE_CHANNEL);
}
}
@ -327,7 +327,7 @@ static void stm32wb_ipcc_txfisr(int irq, uint32_t *regs, void *arg)
if (work_available(&g_tx_cmd_work))
{
work_queue(HPWORK, &g_tx_cmd_work, stm32wb_mbox_txworker, NULL, 0);
work_queue(HPWORK, &g_tx_cmd_work, stm32_mbox_txworker, NULL, 0);
}
}
@ -337,10 +337,10 @@ static void stm32wb_ipcc_txfisr(int irq, uint32_t *regs, void *arg)
}
/****************************************************************************
* Name: stm32wb_mbox_txworker
* Name: stm32_mbox_txworker
****************************************************************************/
static void stm32wb_mbox_txworker(void *arg)
static void stm32_mbox_txworker(void *arg)
{
bool handled;
@ -350,28 +350,28 @@ static void stm32wb_mbox_txworker(void *arg)
{
handled = false;
if (!stm32wb_ipcc_txactive(STM32_MBOX_SYSCMD_CHANNEL))
if (!stm32_ipcc_txactive(STM32_MBOX_SYSCMD_CHANNEL))
{
/* Process ack response before send new command */
if (g_syscmd_channel.ack_ready)
{
stm32wb_mbox_acksyscmd();
stm32_mbox_acksyscmd();
g_syscmd_channel.ack_ready = false;
}
handled = stm32wb_mbox_txnext(&g_syscmd_channel);
handled = stm32_mbox_txnext(&g_syscmd_channel);
}
#ifdef CONFIG_STM32WB_BLE
if (!stm32wb_ipcc_txactive(STM32_MBOX_BLECMD_CHANNEL))
if (!stm32_ipcc_txactive(STM32_MBOX_BLECMD_CHANNEL))
{
handled |= stm32wb_mbox_txnext(&g_blecmd_channel);
handled |= stm32_mbox_txnext(&g_blecmd_channel);
}
if (!stm32wb_ipcc_txactive(STM32_MBOX_BLEACL_CHANNEL))
if (!stm32_ipcc_txactive(STM32_MBOX_BLEACL_CHANNEL))
{
handled |= stm32wb_mbox_txnext(&g_bleacl_channel);
handled |= stm32_mbox_txnext(&g_bleacl_channel);
}
#endif
}
@ -379,12 +379,12 @@ static void stm32wb_mbox_txworker(void *arg)
}
/****************************************************************************
* Name: stm32wb_mbox_rxworker
* Name: stm32_mbox_rxworker
****************************************************************************/
static void stm32wb_mbox_rxworker(void *arg)
static void stm32_mbox_rxworker(void *arg)
{
stm32wb_mbox_list_t *evt;
stm32_mbox_list_t *evt;
irqstate_t flags;
while (1)
@ -393,7 +393,7 @@ static void stm32wb_mbox_rxworker(void *arg)
/* Pull an event from the queue */
evt = stm32wb_mbox_list_remove_head(&g_rx_evt_queue);
evt = stm32_mbox_list_remove_head(&g_rx_evt_queue);
leave_critical_section(flags);
@ -404,18 +404,18 @@ static void stm32wb_mbox_rxworker(void *arg)
/* Pass event to a callback function without a list header */
receive_evt_handler((struct stm32wb_mbox_evt_s *)(evt + 1));
receive_evt_handler((struct stm32_mbox_evt_s *)(evt + 1));
/* Free completed event. Released event needs to return to CPU2
* via release channel.
*/
stm32wb_mbox_eventfree((stm32wb_mbox_list_t *)evt);
stm32_mbox_eventfree((stm32_mbox_list_t *)evt);
}
}
/****************************************************************************
* Name: stm32wb_mbox_txdata
* Name: stm32_mbox_txdata
*
* Description:
* Send data over specified mailbox channel if possible. If the
@ -423,11 +423,11 @@ static void stm32wb_mbox_rxworker(void *arg)
*
****************************************************************************/
static int stm32wb_mbox_txdata(struct stm32wb_mbox_channel_s *chan,
static int stm32_mbox_txdata(struct stm32_mbox_channel_s *chan,
uint8_t type, void *data, size_t len)
{
irqstate_t flags;
struct stm32wb_mbox_cmd_s *pkt_buf;
struct stm32_mbox_cmd_s *pkt_buf;
flags = enter_critical_section();
@ -435,8 +435,8 @@ static int stm32wb_mbox_txdata(struct stm32wb_mbox_channel_s *chan,
* none of other waiting commands and none of unprocessed ack responses.
*/
if (stm32wb_mbox_list_is_empty(&chan->cmd_buf_queue) &&
!stm32wb_ipcc_txactive(chan->ch_num) && !chan->ack_ready)
if (stm32_mbox_list_is_empty(&chan->cmd_buf_queue) &&
!stm32_ipcc_txactive(chan->ch_num) && !chan->ack_ready)
{
/* Channel is ready, copy command into transmission buffer */
@ -446,8 +446,8 @@ static int stm32wb_mbox_txdata(struct stm32wb_mbox_channel_s *chan,
{
/* Otherwise get temp buffer for command */
pkt_buf = (struct stm32wb_mbox_cmd_s *)
stm32wb_mbox_list_remove_head(&g_free_buffers_pool);
pkt_buf = (struct stm32_mbox_cmd_s *)
stm32_mbox_list_remove_head(&g_free_buffers_pool);
}
leave_critical_section(flags);
@ -464,9 +464,9 @@ static int stm32wb_mbox_txdata(struct stm32wb_mbox_channel_s *chan,
{
/* Command is ready in mailbox buffer, start transmission now */
stm32wb_ipcc_settxactive(chan->ch_num);
stm32_ipcc_settxactive(chan->ch_num);
if (!stm32wb_mbox_list_is_empty(&chan->cmd_buf_queue) ||
if (!stm32_mbox_list_is_empty(&chan->cmd_buf_queue) ||
chan->ch_num == STM32_MBOX_SYSCMD_CHANNEL)
{
/* There are more commands awaiting, so unmask interrupt to get
@ -474,7 +474,7 @@ static int stm32wb_mbox_txdata(struct stm32wb_mbox_channel_s *chan,
* And the system channel needs to check ack on completion.
*/
stm32wb_ipcc_unmasktxf(chan->ch_num);
stm32_ipcc_unmasktxf(chan->ch_num);
}
}
else
@ -482,31 +482,31 @@ static int stm32wb_mbox_txdata(struct stm32wb_mbox_channel_s *chan,
/* Command is in temp buffer, push it into queue */
flags = enter_critical_section();
stm32wb_mbox_list_add_tail(&chan->cmd_buf_queue, &pkt_buf->list_hdr);
stm32_mbox_list_add_tail(&chan->cmd_buf_queue, &pkt_buf->list_hdr);
leave_critical_section(flags);
/* Unmask interrupt to get notified when channel gets free */
stm32wb_ipcc_unmasktxf(chan->ch_num);
stm32_ipcc_unmasktxf(chan->ch_num);
}
return OK;
}
/****************************************************************************
* Name: stm32wb_mbox_txnext
* Name: stm32_mbox_txnext
*
* Description:
* Send next command from the queue.
*
****************************************************************************/
static bool stm32wb_mbox_txnext(struct stm32wb_mbox_channel_s *chan)
static bool stm32_mbox_txnext(struct stm32_mbox_channel_s *chan)
{
struct stm32wb_mbox_cmd_s *pkt_buf;
struct stm32_mbox_cmd_s *pkt_buf;
pkt_buf = (struct stm32wb_mbox_cmd_s *)
stm32wb_mbox_list_remove_head(&chan->cmd_buf_queue);
pkt_buf = (struct stm32_mbox_cmd_s *)
stm32_mbox_list_remove_head(&chan->cmd_buf_queue);
if (pkt_buf != NULL)
{
@ -525,32 +525,32 @@ static bool stm32wb_mbox_txnext(struct stm32wb_mbox_channel_s *chan)
/* Start transmission */
stm32wb_ipcc_settxactive(chan->ch_num);
stm32_ipcc_settxactive(chan->ch_num);
if (!stm32wb_mbox_list_is_empty(&chan->cmd_buf_queue))
if (!stm32_mbox_list_is_empty(&chan->cmd_buf_queue))
{
/* Unmask TXF interrupt to get notified when completed */
stm32wb_ipcc_unmasktxf(chan->ch_num);
stm32_ipcc_unmasktxf(chan->ch_num);
}
/* Put back to pool the freed command buffer */
stm32wb_mbox_list_add_tail(&g_free_buffers_pool, &pkt_buf->list_hdr);
stm32_mbox_list_add_tail(&g_free_buffers_pool, &pkt_buf->list_hdr);
}
return pkt_buf != NULL;
}
/****************************************************************************
* Name: stm32wb_mbox_eventfree
* Name: stm32_mbox_eventfree
*
* Description:
* Free handled mailbox event.
*
****************************************************************************/
static void stm32wb_mbox_eventfree(stm32wb_mbox_list_t *evt)
static void stm32_mbox_eventfree(stm32_mbox_list_t *evt)
{
irqstate_t flags;
@ -558,48 +558,48 @@ static void stm32wb_mbox_eventfree(stm32wb_mbox_list_t *evt)
/* Collect releasing events in the global list */
stm32wb_mbox_list_add_tail(&g_tx_evtfree_queue, evt);
stm32_mbox_list_add_tail(&g_tx_evtfree_queue, evt);
/* Check if release channel is ready to process now */
if (!stm32wb_ipcc_txactive(STM32_MBOX_EVT_RELEASE_CHANNEL))
if (!stm32_ipcc_txactive(STM32_MBOX_EVT_RELEASE_CHANNEL))
{
/* Move all collected events into transmission queue */
stm32wb_mbox_list_moveall(&g_tx_evtfree_queue,
&stm32wb_mbox_shared.evtfree_buffer);
stm32_mbox_list_moveall(&g_tx_evtfree_queue,
&stm32_mbox_shared.evtfree_buffer);
/* Start transmission */
stm32wb_ipcc_settxactive(STM32_MBOX_EVT_RELEASE_CHANNEL);
stm32_ipcc_settxactive(STM32_MBOX_EVT_RELEASE_CHANNEL);
}
else
{
/* Unmask interrupt to get notified when channel gets free */
stm32wb_ipcc_unmasktxf(STM32_MBOX_EVT_RELEASE_CHANNEL);
stm32_ipcc_unmasktxf(STM32_MBOX_EVT_RELEASE_CHANNEL);
}
leave_critical_section(flags);
}
/****************************************************************************
* Name: stm32wb_mbox_acksyscmd
* Name: stm32_mbox_acksyscmd
*
* Description:
* Send ACK response event for completed system command.
*
****************************************************************************/
static void stm32wb_mbox_acksyscmd(void)
static void stm32_mbox_acksyscmd(void)
{
struct stm32wb_mbox_evt_s *evt;
struct stm32_mbox_evt_s *evt;
/* System command ACK response is placed at the same address as the
* processed command but without a list header.
*/
evt = (struct stm32wb_mbox_evt_s *)(&g_syscmd_channel.cmd_buf);
evt = (struct stm32_mbox_evt_s *)(&g_syscmd_channel.cmd_buf);
evt->type = STM32_MBOX_SYSACK;
receive_evt_handler(evt);
@ -610,7 +610,7 @@ static void stm32wb_mbox_acksyscmd(void)
****************************************************************************/
/****************************************************************************
* Name: stm32wb_mboxinitialize
* Name: stm32_mboxinitialize
*
* Description:
* Initialize mailbox driver memory.
@ -620,79 +620,79 @@ static void stm32wb_mbox_acksyscmd(void)
*
****************************************************************************/
void stm32wb_mboxinitialize(stm32wb_mbox_evt_handler_t evt_handler)
void stm32_mboxinitialize(stm32_mbox_evt_handler_t evt_handler)
{
int i;
/* Init mailbox shared data */
stm32wb_mbox_list_initialize(&stm32wb_mbox_shared.sys_evt_queue);
stm32wb_mbox_list_initialize(&stm32wb_mbox_shared.evtfree_buffer);
stm32_mbox_list_initialize(&stm32_mbox_shared.sys_evt_queue);
stm32_mbox_list_initialize(&stm32_mbox_shared.evtfree_buffer);
#ifdef CONFIG_STM32WB_BLE
stm32wb_mbox_list_initialize(&stm32wb_mbox_shared.ble_evt_queue);
stm32_mbox_list_initialize(&stm32_mbox_shared.ble_evt_queue);
#endif
stm32wb_mbox_ref_table.dev_info_table = &stm32wb_mbox_di_table;
stm32wb_mbox_ref_table.ble_table = &stm32wb_mbox_ble_table;
stm32wb_mbox_ref_table.sys_table = &stm32wb_mbox_sys_table;
stm32wb_mbox_ref_table.mm_table = &stm32wb_mbox_mm_table;
stm32_mbox_ref_table.dev_info_table = &stm32_mbox_di_table;
stm32_mbox_ref_table.ble_table = &stm32_mbox_ble_table;
stm32_mbox_ref_table.sys_table = &stm32_mbox_sys_table;
stm32_mbox_ref_table.mm_table = &stm32_mbox_mm_table;
stm32wb_mbox_sys_table.cmd_buffer = &stm32wb_mbox_shared.sys_cmd_buffer;
stm32wb_mbox_sys_table.evt_queue = &stm32wb_mbox_shared.sys_evt_queue;
stm32_mbox_sys_table.cmd_buffer = &stm32_mbox_shared.sys_cmd_buffer;
stm32_mbox_sys_table.evt_queue = &stm32_mbox_shared.sys_evt_queue;
stm32wb_mbox_mm_table.evtpool_buffer = &stm32wb_mbox_shared
stm32_mbox_mm_table.evtpool_buffer = &stm32_mbox_shared
.evtpool_buffer;
stm32wb_mbox_mm_table.evtpool_size = sizeof(stm32wb_mbox_shared
stm32_mbox_mm_table.evtpool_size = sizeof(stm32_mbox_shared
.evtpool_buffer);
stm32wb_mbox_mm_table.evtfree_buffer = &stm32wb_mbox_shared
stm32_mbox_mm_table.evtfree_buffer = &stm32_mbox_shared
.evtfree_buffer;
stm32wb_mbox_mm_table.sys_spare_buffer = &stm32wb_mbox_shared
stm32_mbox_mm_table.sys_spare_buffer = &stm32_mbox_shared
.sys_spare_buffer;
#ifdef CONFIG_STM32WB_BLE
stm32wb_mbox_mm_table.ble_spare_buffer = &stm32wb_mbox_shared
stm32_mbox_mm_table.ble_spare_buffer = &stm32_mbox_shared
.ble_spare_buffer;
#endif
#ifdef CONFIG_STM32WB_BLE
stm32wb_mbox_ble_table.cmd_buffer = &stm32wb_mbox_shared.ble_cmd_buffer;
stm32wb_mbox_ble_table.acl_buffer = &stm32wb_mbox_shared.ble_acl_buffer;
stm32wb_mbox_ble_table.cs_buffer = &stm32wb_mbox_shared.ble_cs_buffer;
stm32wb_mbox_ble_table.evt_queue = &stm32wb_mbox_shared.ble_evt_queue;
stm32_mbox_ble_table.cmd_buffer = &stm32_mbox_shared.ble_cmd_buffer;
stm32_mbox_ble_table.acl_buffer = &stm32_mbox_shared.ble_acl_buffer;
stm32_mbox_ble_table.cs_buffer = &stm32_mbox_shared.ble_cs_buffer;
stm32_mbox_ble_table.evt_queue = &stm32_mbox_shared.ble_evt_queue;
#endif
/* Init system channel data */
g_syscmd_channel.ch_num = STM32_MBOX_SYSCMD_CHANNEL;
g_syscmd_channel.cmd_buf = (struct stm32wb_mbox_cmd_s *)
stm32wb_mbox_shared.sys_cmd_buffer;
stm32wb_mbox_list_initialize(&g_syscmd_channel.cmd_buf_queue);
g_syscmd_channel.cmd_buf = (struct stm32_mbox_cmd_s *)
stm32_mbox_shared.sys_cmd_buffer;
stm32_mbox_list_initialize(&g_syscmd_channel.cmd_buf_queue);
#ifdef CONFIG_STM32WB_BLE
/* Init BLE command channel data */
g_blecmd_channel.ch_num = STM32_MBOX_BLECMD_CHANNEL;
g_blecmd_channel.cmd_buf = (struct stm32wb_mbox_cmd_s *)
stm32wb_mbox_shared.ble_cmd_buffer;
stm32wb_mbox_list_initialize(&g_blecmd_channel.cmd_buf_queue);
g_blecmd_channel.cmd_buf = (struct stm32_mbox_cmd_s *)
stm32_mbox_shared.ble_cmd_buffer;
stm32_mbox_list_initialize(&g_blecmd_channel.cmd_buf_queue);
/* Init BLE ACL channel data */
g_bleacl_channel.ch_num = STM32_MBOX_BLEACL_CHANNEL;
g_bleacl_channel.cmd_buf = (struct stm32wb_mbox_cmd_s *)
stm32wb_mbox_shared.ble_acl_buffer;
stm32wb_mbox_list_initialize(&g_bleacl_channel.cmd_buf_queue);
g_bleacl_channel.cmd_buf = (struct stm32_mbox_cmd_s *)
stm32_mbox_shared.ble_acl_buffer;
stm32_mbox_list_initialize(&g_bleacl_channel.cmd_buf_queue);
#endif
/* Init local (not shared) queues */
stm32wb_mbox_list_initialize(&g_rx_evt_queue);
stm32wb_mbox_list_initialize(&g_tx_evtfree_queue);
stm32_mbox_list_initialize(&g_rx_evt_queue);
stm32_mbox_list_initialize(&g_tx_evtfree_queue);
stm32wb_mbox_list_initialize(&g_free_buffers_pool);
stm32_mbox_list_initialize(&g_free_buffers_pool);
for (i = 0; i < CONFIG_STM32WB_MBOX_TX_CMD_QUEUE_LEN; i++)
{
stm32wb_mbox_list_add_tail(&g_free_buffers_pool,
(stm32wb_mbox_list_t *)g_free_buffers[i]);
stm32_mbox_list_add_tail(&g_free_buffers_pool,
(stm32_mbox_list_t *)g_free_buffers[i]);
}
/* Set event receive function */
@ -701,7 +701,7 @@ void stm32wb_mboxinitialize(stm32wb_mbox_evt_handler_t evt_handler)
}
/****************************************************************************
* Name: stm32wb_mboxenable
* Name: stm32_mboxenable
*
* Description:
* Enable mailbox hardware and start communication. The CPU2 responses
@ -709,16 +709,16 @@ void stm32wb_mboxinitialize(stm32wb_mbox_evt_handler_t evt_handler)
*
****************************************************************************/
void stm32wb_mboxenable(void)
void stm32_mboxenable(void)
{
uint32_t regval;
/* Setup RXO and TXF interrupts */
irq_attach(STM32_IRQ_IPCCRX, (xcpt_t)stm32wb_ipcc_rxoisr, NULL);
irq_attach(STM32_IRQ_IPCCRX, (xcpt_t)stm32_ipcc_rxoisr, NULL);
up_enable_irq(STM32_IRQ_IPCCRX);
irq_attach(STM32_IRQ_IPCCTX, (xcpt_t)stm32wb_ipcc_txfisr, NULL);
irq_attach(STM32_IRQ_IPCCTX, (xcpt_t)stm32_ipcc_txfisr, NULL);
up_enable_irq(STM32_IRQ_IPCCTX);
regval = getreg32(STM32_IPCC_C1CR);
@ -729,15 +729,15 @@ void stm32wb_mboxenable(void)
* to receive C2READY event via system channel.
*/
stm32wb_ipcc_unmaskrxo(STM32_MBOX_SYSEVT_CHANNEL);
stm32_ipcc_unmaskrxo(STM32_MBOX_SYSEVT_CHANNEL);
/* Enable IPCC hardware and boot up CPU2 */
stm32wb_ipccenable();
stm32_ipccenable();
}
/****************************************************************************
* Name: stm32wb_mbox_syscmd
* Name: stm32_mbox_syscmd
*
* Description:
* Send command over mailbox system channel. Command data must be
@ -745,15 +745,15 @@ void stm32wb_mboxenable(void)
*
****************************************************************************/
int stm32wb_mbox_syscmd(void *data, size_t len)
int stm32_mbox_syscmd(void *data, size_t len)
{
return stm32wb_mbox_txdata(&g_syscmd_channel, STM32_MBOX_SYSCMD,
return stm32_mbox_txdata(&g_syscmd_channel, STM32_MBOX_SYSCMD,
data, len);
}
#ifdef CONFIG_STM32WB_BLE
/****************************************************************************
* Name: stm32wb_mbox_blecmd
* Name: stm32_mbox_blecmd
*
* Description:
* Send command over mailbox BLE channel. Command data must be
@ -761,14 +761,14 @@ int stm32wb_mbox_syscmd(void *data, size_t len)
*
****************************************************************************/
int stm32wb_mbox_blecmd(void *data, size_t len)
int stm32_mbox_blecmd(void *data, size_t len)
{
return stm32wb_mbox_txdata(&g_blecmd_channel, STM32_MBOX_HCICMD,
return stm32_mbox_txdata(&g_blecmd_channel, STM32_MBOX_HCICMD,
data, len);
}
/****************************************************************************
* Name: stm32wb_mbox_bleacl
* Name: stm32_mbox_bleacl
*
* Description:
* Send BLE ACL data over mailbox BLE ACL channel. Data must be
@ -776,27 +776,27 @@ int stm32wb_mbox_blecmd(void *data, size_t len)
*
****************************************************************************/
int stm32wb_mbox_bleacl(void *data, size_t len)
int stm32_mbox_bleacl(void *data, size_t len)
{
return stm32wb_mbox_txdata(&g_bleacl_channel, STM32_MBOX_HCIACL,
return stm32_mbox_txdata(&g_bleacl_channel, STM32_MBOX_HCIACL,
data, len);
}
/****************************************************************************
* Name: stm32wb_mbox_bleinit
* Name: stm32_mbox_bleinit
*
* Description:
* Initialize and start BLE subsystem with provided configuration params.
*
****************************************************************************/
void stm32wb_mbox_bleinit(struct stm32wb_shci_ble_init_cfg_s *params)
void stm32_mbox_bleinit(struct stm32_shci_ble_init_cfg_s *params)
{
struct bt_hci_cmd_hdr_s *cmd;
/* Just borrow a temporary free buffer for command data */
cmd = (struct bt_hci_cmd_hdr_s *)stm32wb_mbox_shared.sys_spare_buffer;
cmd = (struct bt_hci_cmd_hdr_s *)stm32_mbox_shared.sys_spare_buffer;
/* Prepare command data */
@ -806,10 +806,10 @@ void stm32wb_mbox_bleinit(struct stm32wb_shci_ble_init_cfg_s *params)
/* Send BLE init command to CPU2 */
stm32wb_mbox_syscmd(cmd, sizeof(*cmd) + sizeof(*params));
stm32_mbox_syscmd(cmd, sizeof(*cmd) + sizeof(*params));
/* Unmask BLE event channel RXO interrupt */
stm32wb_ipcc_unmaskrxo(STM32_MBOX_BLEEVT_CHANNEL);
stm32_ipcc_unmaskrxo(STM32_MBOX_BLEEVT_CHANNEL);
}
#endif /* CONFIG_STM32WB_BLE */

32
arch/arm/src/stm32wb/stm32wb_mbox.h
View file

@ -77,7 +77,7 @@
/* Mailbox data transfer packets */
begin_packed_struct struct stm32wb_mbox_evt_s
begin_packed_struct struct stm32_mbox_evt_s
{
uint8_t type;
union
@ -87,9 +87,9 @@ begin_packed_struct struct stm32wb_mbox_evt_s
};
} end_packed_struct;
begin_packed_struct struct stm32wb_mbox_cmd_s
begin_packed_struct struct stm32_mbox_cmd_s
{
stm32wb_mbox_list_t list_hdr;
stm32_mbox_list_t list_hdr;
uint8_t type;
union
{
@ -100,14 +100,14 @@ begin_packed_struct struct stm32wb_mbox_cmd_s
/* Mailbox receive event handler type */
typedef int (*stm32wb_mbox_evt_handler_t)(struct stm32wb_mbox_evt_s *);
typedef int (*stm32_mbox_evt_handler_t)(struct stm32_mbox_evt_s *);
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: stm32wb_mboxinitialize
* Name: stm32_mboxinitialize
*
* Description:
* Initialize mailbox driver memory.
@ -117,10 +117,10 @@ typedef int (*stm32wb_mbox_evt_handler_t)(struct stm32wb_mbox_evt_s *);
*
****************************************************************************/
void stm32wb_mboxinitialize(stm32wb_mbox_evt_handler_t evt_handler);
void stm32_mboxinitialize(stm32_mbox_evt_handler_t evt_handler);
/****************************************************************************
* Name: stm32wb_mboxenable
* Name: stm32_mboxenable
*
* Description:
* Enable mailbox hardware and start communication. The CPU2 responses
@ -128,10 +128,10 @@ void stm32wb_mboxinitialize(stm32wb_mbox_evt_handler_t evt_handler);
*
****************************************************************************/
void stm32wb_mboxenable(void);
void stm32_mboxenable(void);
/****************************************************************************
* Name: stm32wb_mbox_syscmd
* Name: stm32_mbox_syscmd
*
* Description:
* Send command over mailbox system channel. Command data must be
@ -139,10 +139,10 @@ void stm32wb_mboxenable(void);
*
****************************************************************************/
int stm32wb_mbox_syscmd(void *data, size_t len);
int stm32_mbox_syscmd(void *data, size_t len);
/****************************************************************************
* Name: stm32wb_mbox_blecmd
* Name: stm32_mbox_blecmd
*
* Description:
* Send command over mailbox BLE channel. Command data must be
@ -150,10 +150,10 @@ int stm32wb_mbox_syscmd(void *data, size_t len);
*
****************************************************************************/
int stm32wb_mbox_blecmd(void *data, size_t len);
int stm32_mbox_blecmd(void *data, size_t len);
/****************************************************************************
* Name: stm32wb_mbox_bleacl
* Name: stm32_mbox_bleacl
*
* Description:
* Send BLE ACL data over mailbox BLE ACL channel. Data must be
@ -161,16 +161,16 @@ int stm32wb_mbox_blecmd(void *data, size_t len);
*
****************************************************************************/
int stm32wb_mbox_bleacl(void *data, size_t len);
int stm32_mbox_bleacl(void *data, size_t len);
/****************************************************************************
* Name: stm32wb_mbox_bleinit
* Name: stm32_mbox_bleinit
*
* Description:
* Initialize and start BLE subsystem with provided configuration params.
*
****************************************************************************/
void stm32wb_mbox_bleinit(struct stm32wb_shci_ble_init_cfg_s *params);
void stm32_mbox_bleinit(struct stm32_shci_ble_init_cfg_s *params);
#endif /* __ARCH_ARM_SRC_STM32WB_STM32WB_MBOX_H */

36
arch/arm/src/stm32wb/stm32wb_mbox_list.h
View file

@ -38,42 +38,42 @@
* a new list_moveall function.
*/
begin_packed_struct struct stm32wb_mbox_list_s
begin_packed_struct struct stm32_mbox_list_s
{
struct stm32wb_mbox_list_s *next;
struct stm32wb_mbox_list_s *prev;
struct stm32_mbox_list_s *next;
struct stm32_mbox_list_s *prev;
} end_packed_struct;
typedef struct stm32wb_mbox_list_s stm32wb_mbox_list_t;
typedef struct stm32_mbox_list_s stm32_mbox_list_t;
/****************************************************************************
* Inline Functions
****************************************************************************/
/****************************************************************************
* Name: stm32wb_mbox_list_initialize
* Name: stm32_mbox_list_initialize
*
* Description:
* Initialize internal fields.
*
****************************************************************************/
static inline void stm32wb_mbox_list_initialize(stm32wb_mbox_list_t *list)
static inline void stm32_mbox_list_initialize(stm32_mbox_list_t *list)
{
list->prev = list;
list->next = list;
}
/****************************************************************************
* Name: stm32wb_mbox_list_add_tail
* Name: stm32_mbox_list_add_tail
*
* Description:
* Add new node at the end of the list.
*
****************************************************************************/
static inline void stm32wb_mbox_list_add_tail(stm32wb_mbox_list_t *list,
stm32wb_mbox_list_t *item)
static inline void stm32_mbox_list_add_tail(stm32_mbox_list_t *list,
stm32_mbox_list_t *item)
{
item->prev = list->prev;
item->next = list;
@ -82,19 +82,19 @@ static inline void stm32wb_mbox_list_add_tail(stm32wb_mbox_list_t *list,
}
/****************************************************************************
* Name: stm32wb_mbox_list_remove_head
* Name: stm32_mbox_list_remove_head
*
* Description:
* Remove and return first node from the list head (if any).
*
****************************************************************************/
static inline stm32wb_mbox_list_t *
stm32wb_mbox_list_remove_head(stm32wb_mbox_list_t *list)
static inline stm32_mbox_list_t *
stm32_mbox_list_remove_head(stm32_mbox_list_t *list)
{
if (list->next != list)
{
stm32wb_mbox_list_t *item = list->next;
stm32_mbox_list_t *item = list->next;
item->next->prev = item->prev;
item->prev->next = item->next;
item->prev = NULL;
@ -108,20 +108,20 @@ stm32wb_mbox_list_remove_head(stm32wb_mbox_list_t *list)
}
/****************************************************************************
* Name: stm32wb_mbox_list_is_empty
* Name: stm32_mbox_list_is_empty
*
* Description:
* Check if the list is empty.
*
****************************************************************************/
static inline bool stm32wb_mbox_list_is_empty(stm32wb_mbox_list_t *list)
static inline bool stm32_mbox_list_is_empty(stm32_mbox_list_t *list)
{
return (list->next == list);
}
/****************************************************************************
* Name: stm32wb_mbox_list_moveall
* Name: stm32_mbox_list_moveall
*
* Description:
* Remove all nodes from source list and add them to the end of the
@ -129,8 +129,8 @@ static inline bool stm32wb_mbox_list_is_empty(stm32wb_mbox_list_t *list)
*
****************************************************************************/
static inline void stm32wb_mbox_list_moveall(stm32wb_mbox_list_t *src,
stm32wb_mbox_list_t *dst)
static inline void stm32_mbox_list_moveall(stm32_mbox_list_t *src,
stm32_mbox_list_t *dst)
{
if (src->next != src)
{

2
arch/arm/src/stm32wb/stm32wb_mbox_shci.h
View file

@ -119,7 +119,7 @@
/* STM32_SHCI_BLE_INIT command params */
begin_packed_struct struct stm32wb_shci_ble_init_cfg_s
begin_packed_struct struct stm32_shci_ble_init_cfg_s
{
void *ble_buf; /* Not used, must be NULL. */
uint32_t ble_buf_size; /* Not used, must be 0. */

8
arch/arm/src/stm32wb/stm32wb_mpuinit.c
View file

@ -41,7 +41,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_mpuinitialize
* Name: stm32_mpuinitialize
*
* Description:
* Configure the MPU to permit user-space access to only restricted SAM3U
@ -49,7 +49,7 @@
*
****************************************************************************/
void stm32wb_mpuinitialize(void)
void stm32_mpuinitialize(void)
{
uintptr_t datastart = MIN(USERSPACE->us_datastart, USERSPACE->us_bssstart);
uintptr_t dataend = MAX(USERSPACE->us_dataend, USERSPACE->us_bssend);
@ -74,7 +74,7 @@ void stm32wb_mpuinitialize(void)
}
/****************************************************************************
* Name: stm32wb_mpu_uheap
* Name: stm32_mpu_uheap
*
* Description:
* Map the user-heap region.
@ -83,7 +83,7 @@ void stm32wb_mpuinitialize(void)
*
****************************************************************************/
void stm32wb_mpu_uheap(uintptr_t start, size_t size)
void stm32_mpu_uheap(uintptr_t start, size_t size)
{
mpu_user_intsram(start, size);
}

12
arch/arm/src/stm32wb/stm32wb_mpuinit.h
View file

@ -34,7 +34,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_mpuinitialize
* Name: stm32_mpuinitialize
*
* Description:
* Configure the MPU to permit user-space access to only unrestricted MCU
@ -43,13 +43,13 @@
****************************************************************************/
#ifdef CONFIG_BUILD_PROTECTED
void stm32wb_mpuinitialize(void);
void stm32_mpuinitialize(void);
#else
# define stm32wb_mpuinitialize()
# define stm32_mpuinitialize()
#endif
/****************************************************************************
* Name: stm32wb_mpu_uheap
* Name: stm32_mpu_uheap
*
* Description:
* Map the user heap region.
@ -57,9 +57,9 @@ void stm32wb_mpuinitialize(void);
****************************************************************************/
#ifdef CONFIG_BUILD_PROTECTED
void stm32wb_mpu_uheap(uintptr_t start, size_t size);
void stm32_mpu_uheap(uintptr_t start, size_t size);
#else
# define stm32wb_mpu_uheap(start,size)
# define stm32_mpu_uheap(start,size)
#endif
#endif /* __ARCH_ARM_SRC_STM32WB_STM32WB_MPUINIT_H */

42
arch/arm/src/stm32wb/stm32wb_oneshot.c
View file

@ -45,20 +45,20 @@
* Private Function Prototypes
****************************************************************************/
static int stm32wb_oneshot_handler(int irq, void *context, void *arg);
static int stm32_oneshot_handler(int irq, void *context, void *arg);
/****************************************************************************
* Private Data
****************************************************************************/
static struct stm32wb_oneshot_s *g_oneshot[CONFIG_STM32WB_ONESHOT_MAXTIMERS];
static struct stm32_oneshot_s *g_oneshot[CONFIG_STM32WB_ONESHOT_MAXTIMERS];
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32wb_oneshot_handler
* Name: stm32_oneshot_handler
*
* Description:
* Common timer interrupt callback. When any oneshot timer interrupt
@ -73,9 +73,9 @@ static struct stm32wb_oneshot_s *g_oneshot[CONFIG_STM32WB_ONESHOT_MAXTIMERS];
*
****************************************************************************/
static int stm32wb_oneshot_handler(int irq, void *context, void *arg)
static int stm32_oneshot_handler(int irq, void *context, void *arg)
{
struct stm32wb_oneshot_s *oneshot = (struct stm32wb_oneshot_s *)arg;
struct stm32_oneshot_s *oneshot = (struct stm32_oneshot_s *)arg;
oneshot_handler_t oneshot_handler;
void *oneshot_arg;
@ -107,7 +107,7 @@ static int stm32wb_oneshot_handler(int irq, void *context, void *arg)
}
/****************************************************************************
* Name: stm32wb_allocate_handler
* Name: stm32_allocate_handler
*
* Description:
* Allocate a timer callback handler for the oneshot instance.
@ -121,7 +121,7 @@ static int stm32wb_oneshot_handler(int irq, void *context, void *arg)
*
****************************************************************************/
static inline int stm32wb_allocate_handler(struct stm32wb_oneshot_s *oneshot)
static inline int stm32_allocate_handler(struct stm32_oneshot_s *oneshot)
{
#if CONFIG_STM32WB_ONESHOT_MAXTIMERS > 1
int ret = -EBUSY;
@ -162,7 +162,7 @@ static inline int stm32wb_allocate_handler(struct stm32wb_oneshot_s *oneshot)
****************************************************************************/
/****************************************************************************
* Name: stm32wb_oneshot_initialize
* Name: stm32_oneshot_initialize
*
* Description:
* Initialize the oneshot timer wrapper
@ -180,7 +180,7 @@ static inline int stm32wb_allocate_handler(struct stm32wb_oneshot_s *oneshot)
*
****************************************************************************/
int stm32wb_oneshot_initialize(struct stm32wb_oneshot_s *oneshot,
int stm32_oneshot_initialize(struct stm32_oneshot_s *oneshot,
int chan, uint16_t resolution)
{
uint32_t frequency;
@ -193,7 +193,7 @@ int stm32wb_oneshot_initialize(struct stm32wb_oneshot_s *oneshot,
frequency = USEC_PER_SEC / (uint32_t)resolution;
oneshot->frequency = frequency;
oneshot->tch = stm32wb_tim_init(chan);
oneshot->tch = stm32_tim_init(chan);
if (!oneshot->tch)
{
tmrerr("ERROR: Failed to allocate TIM%d\n", chan);
@ -211,18 +211,18 @@ int stm32wb_oneshot_initialize(struct stm32wb_oneshot_s *oneshot,
/* Assign a callback handler to the oneshot */
return stm32wb_allocate_handler(oneshot);
return stm32_allocate_handler(oneshot);
}
/****************************************************************************
* Name: stm32wb_oneshot_max_delay
* Name: stm32_oneshot_max_delay
*
* Description:
* Determine the maximum delay of the one-shot timer (in microseconds)
*
****************************************************************************/
int stm32wb_oneshot_max_delay(struct stm32wb_oneshot_s *oneshot,
int stm32_oneshot_max_delay(struct stm32_oneshot_s *oneshot,
uint64_t *usec)
{
DEBUGASSERT(oneshot != NULL && usec != NULL);
@ -233,7 +233,7 @@ int stm32wb_oneshot_max_delay(struct stm32wb_oneshot_s *oneshot,
}
/****************************************************************************
* Name: stm32wb_oneshot_start
* Name: stm32_oneshot_start
*
* Description:
* Start the oneshot timer
@ -241,7 +241,7 @@ int stm32wb_oneshot_max_delay(struct stm32wb_oneshot_s *oneshot,
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* stm32wb_oneshot_initialize();
* stm32_oneshot_initialize();
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
@ -252,7 +252,7 @@ int stm32wb_oneshot_max_delay(struct stm32wb_oneshot_s *oneshot,
*
****************************************************************************/
int stm32wb_oneshot_start(struct stm32wb_oneshot_s *oneshot,
int stm32_oneshot_start(struct stm32_oneshot_s *oneshot,
oneshot_handler_t handler, void *arg,
const struct timespec *ts)
{
@ -273,7 +273,7 @@ int stm32wb_oneshot_start(struct stm32wb_oneshot_s *oneshot,
/* Yes.. then cancel it */
tmrinfo("Already running... cancelling\n");
stm32wb_oneshot_cancel(oneshot, NULL);
stm32_oneshot_cancel(oneshot, NULL);
}
/* Save the new handler and its argument */
@ -301,7 +301,7 @@ int stm32wb_oneshot_start(struct stm32wb_oneshot_s *oneshot,
/* Set up to receive the callback when the interrupt occurs */
STM32_TIM_SETISR(oneshot->tch, stm32wb_oneshot_handler, oneshot, 0);
STM32_TIM_SETISR(oneshot->tch, stm32_oneshot_handler, oneshot, 0);
/* Set timer period */
@ -325,7 +325,7 @@ int stm32wb_oneshot_start(struct stm32wb_oneshot_s *oneshot,
}
/****************************************************************************
* Name: stm32wb_oneshot_cancel
* Name: stm32_oneshot_cancel
*
* Description:
* Cancel the oneshot timer and return the time remaining on the timer.
@ -336,7 +336,7 @@ int stm32wb_oneshot_start(struct stm32wb_oneshot_s *oneshot,
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* stm32wb_oneshot_initialize();
* stm32_oneshot_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running. ts may be zero in which case the time remaining
@ -349,7 +349,7 @@ int stm32wb_oneshot_start(struct stm32wb_oneshot_s *oneshot,
*
****************************************************************************/
int stm32wb_oneshot_cancel(struct stm32wb_oneshot_s *oneshot,
int stm32_oneshot_cancel(struct stm32_oneshot_s *oneshot,
struct timespec *ts)
{
irqstate_t flags;

28
arch/arm/src/stm32wb/stm32wb_oneshot.h
View file

@ -67,20 +67,20 @@
typedef void (*oneshot_handler_t)(void *arg);
/* The oneshot client must allocate an instance of this structure and called
* stm32wb_oneshot_initialize() before using the oneshot facilities. The
* stm32_oneshot_initialize() before using the oneshot facilities. The
* client should not access the contents of this structure directly since
* the contents are subject to change.
*/
struct stm32wb_oneshot_s
struct stm32_oneshot_s
{
uint8_t chan; /* The timer/counter in use */
#if CONFIG_STM32WB_ONESHOT_MAXTIMERS > 1
uint8_t cbndx; /* Timer callback handler index */
#endif
volatile bool running; /* True: the timer is running */
struct stm32wb_tim_dev_s *tch; /* Pointer returned by
* stm32wb_tim_init() */
struct stm32_tim_dev_s *tch; /* Pointer returned by
* stm32_tim_init() */
volatile oneshot_handler_t handler; /* Oneshot expiration callback */
volatile void *arg; /* The argument that will accompany
* the callback */
@ -106,7 +106,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: stm32wb_oneshot_initialize
* Name: stm32_oneshot_initialize
*
* Description:
* Initialize the oneshot timer wrapper
@ -124,22 +124,22 @@ extern "C"
*
****************************************************************************/
int stm32wb_oneshot_initialize(struct stm32wb_oneshot_s *oneshot, int chan,
int stm32_oneshot_initialize(struct stm32_oneshot_s *oneshot, int chan,
uint16_t resolution);
/****************************************************************************
* Name: stm32wb_oneshot_max_delay
* Name: stm32_oneshot_max_delay
*
* Description:
* Determine the maximum delay of the one-shot timer (in microseconds)
*
****************************************************************************/
int stm32wb_oneshot_max_delay(struct stm32wb_oneshot_s *oneshot,
int stm32_oneshot_max_delay(struct stm32_oneshot_s *oneshot,
uint64_t *usec);
/****************************************************************************
* Name: stm32wb_oneshot_start
* Name: stm32_oneshot_start
*
* Description:
* Start the oneshot timer
@ -147,7 +147,7 @@ int stm32wb_oneshot_max_delay(struct stm32wb_oneshot_s *oneshot,
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* stm32wb_oneshot_initialize();
* stm32_oneshot_initialize();
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
@ -158,12 +158,12 @@ int stm32wb_oneshot_max_delay(struct stm32wb_oneshot_s *oneshot,
*
****************************************************************************/
int stm32wb_oneshot_start(struct stm32wb_oneshot_s *oneshot,
int stm32_oneshot_start(struct stm32_oneshot_s *oneshot,
oneshot_handler_t handler, void *arg,
const struct timespec *ts);
/****************************************************************************
* Name: stm32wb_oneshot_cancel
* Name: stm32_oneshot_cancel
*
* Description:
* Cancel the oneshot timer and return the time remaining on the timer.
@ -174,7 +174,7 @@ int stm32wb_oneshot_start(struct stm32wb_oneshot_s *oneshot,
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* stm32wb_oneshot_initialize();
* stm32_oneshot_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running.
@ -186,7 +186,7 @@ int stm32wb_oneshot_start(struct stm32wb_oneshot_s *oneshot,
*
****************************************************************************/
int stm32wb_oneshot_cancel(struct stm32wb_oneshot_s *oneshot,
int stm32_oneshot_cancel(struct stm32_oneshot_s *oneshot,
struct timespec *ts);
#undef EXTERN

78
arch/arm/src/stm32wb/stm32wb_oneshot_lowerhalf.c
View file

@ -45,32 +45,32 @@
* driver
*/
struct stm32wb_oneshot_lowerhalf_s
struct stm32_oneshot_lowerhalf_s
{
/* This is the part of the lower half driver that is visible to the upper-
* half client of the driver. This must be the first thing in this
* structure so that pointers to struct oneshot_lowerhalf_s are cast
* compatible to struct stm32wb_oneshot_lowerhalf_s and vice versa.
* compatible to struct stm32_oneshot_lowerhalf_s and vice versa.
*/
struct oneshot_lowerhalf_s lh; /* Common lower-half driver fields */
/* Private lower half data follows */
struct stm32wb_oneshot_s oneshot; /* STM32-specific oneshot state */
struct stm32_oneshot_s oneshot; /* STM32-specific oneshot state */
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static void stm32wb_oneshot_handler(void *arg);
static void stm32_oneshot_handler(void *arg);
static int stm32wb_max_delay(struct oneshot_lowerhalf_s *lower,
static int stm32_max_delay(struct oneshot_lowerhalf_s *lower,
struct timespec *ts);
static int stm32wb_start(struct oneshot_lowerhalf_s *lower,
static int stm32_start(struct oneshot_lowerhalf_s *lower,
const struct timespec *ts);
static int stm32wb_cancel(struct oneshot_lowerhalf_s *lower,
static int stm32_cancel(struct oneshot_lowerhalf_s *lower,
struct timespec *ts);
/****************************************************************************
@ -81,9 +81,9 @@ static int stm32wb_cancel(struct oneshot_lowerhalf_s *lower,
static const struct oneshot_operations_s g_oneshot_ops =
{
.max_delay = stm32wb_max_delay,
.start = stm32wb_start,
.cancel = stm32wb_cancel,
.max_delay = stm32_max_delay,
.start = stm32_start,
.cancel = stm32_cancel,
};
/****************************************************************************
@ -91,13 +91,13 @@ static const struct oneshot_operations_s g_oneshot_ops =
****************************************************************************/
/****************************************************************************
* Name: stm32wb_oneshot_handler
* Name: stm32_oneshot_handler
*
* Description:
* Timer expiration handler
*
* Input Parameters:
* arg - Should be the same argument provided when stm32wb_oneshot_start()
* arg - Should be the same argument provided when stm32_oneshot_start()
* was called.
*
* Returned Value:
@ -105,22 +105,22 @@ static const struct oneshot_operations_s g_oneshot_ops =
*
****************************************************************************/
static void stm32wb_oneshot_handler(void *arg)
static void stm32_oneshot_handler(void *arg)
{
struct stm32wb_oneshot_lowerhalf_s *priv =
(struct stm32wb_oneshot_lowerhalf_s *)arg;
struct stm32_oneshot_lowerhalf_s *priv =
(struct stm32_oneshot_lowerhalf_s *)arg;
DEBUGASSERT(priv != NULL);
/* Perhaps the callback was nullified in a race condition with
* stm32wb_cancel?
* stm32_cancel?
*/
oneshot_process_callback(&priv->lh);
}
/****************************************************************************
* Name: stm32wb_max_delay
* Name: stm32_max_delay
*
* Description:
* Determine the maximum delay of the one-shot timer (in microseconds)
@ -137,16 +137,16 @@ static void stm32wb_oneshot_handler(void *arg)
*
****************************************************************************/
static int stm32wb_max_delay(struct oneshot_lowerhalf_s *lower,
static int stm32_max_delay(struct oneshot_lowerhalf_s *lower,
struct timespec *ts)
{
struct stm32wb_oneshot_lowerhalf_s *priv =
(struct stm32wb_oneshot_lowerhalf_s *)lower;
struct stm32_oneshot_lowerhalf_s *priv =
(struct stm32_oneshot_lowerhalf_s *)lower;
uint64_t usecs;
int ret;
DEBUGASSERT(priv != NULL && ts != NULL);
ret = stm32wb_oneshot_max_delay(&priv->oneshot, &usecs);
ret = stm32_oneshot_max_delay(&priv->oneshot, &usecs);
if (ret >= 0)
{
uint64_t sec = usecs / 1000000;
@ -160,7 +160,7 @@ static int stm32wb_max_delay(struct oneshot_lowerhalf_s *lower,
}
/****************************************************************************
* Name: stm32wb_start
* Name: stm32_start
*
* Description:
* Start the oneshot timer
@ -179,11 +179,11 @@ static int stm32wb_max_delay(struct oneshot_lowerhalf_s *lower,
*
****************************************************************************/
static int stm32wb_start(struct oneshot_lowerhalf_s *lower,
static int stm32_start(struct oneshot_lowerhalf_s *lower,
const struct timespec *ts)
{
struct stm32wb_oneshot_lowerhalf_s *priv =
(struct stm32wb_oneshot_lowerhalf_s *)lower;
struct stm32_oneshot_lowerhalf_s *priv =
(struct stm32_oneshot_lowerhalf_s *)lower;
irqstate_t flags;
int ret;
@ -192,20 +192,20 @@ static int stm32wb_start(struct oneshot_lowerhalf_s *lower,
/* Save the callback information and start the timer */
flags = enter_critical_section();
ret = stm32wb_oneshot_start(&priv->oneshot,
stm32wb_oneshot_handler, priv, ts);
ret = stm32_oneshot_start(&priv->oneshot,
stm32_oneshot_handler, priv, ts);
leave_critical_section(flags);
if (ret < 0)
{
tmrerr("ERROR: stm32wb_oneshot_start failed: %d\n", flags);
tmrerr("ERROR: stm32_oneshot_start failed: %d\n", flags);
}
return ret;
}
/****************************************************************************
* Name: stm32wb_cancel
* Name: stm32_cancel
*
* Description:
* Cancel the oneshot timer and return the time remaining on the timer.
@ -228,11 +228,11 @@ static int stm32wb_start(struct oneshot_lowerhalf_s *lower,
*
****************************************************************************/
static int stm32wb_cancel(struct oneshot_lowerhalf_s *lower,
static int stm32_cancel(struct oneshot_lowerhalf_s *lower,
struct timespec *ts)
{
struct stm32wb_oneshot_lowerhalf_s *priv =
(struct stm32wb_oneshot_lowerhalf_s *)lower;
struct stm32_oneshot_lowerhalf_s *priv =
(struct stm32_oneshot_lowerhalf_s *)lower;
irqstate_t flags;
int ret;
@ -241,12 +241,12 @@ static int stm32wb_cancel(struct oneshot_lowerhalf_s *lower,
/* Cancel the timer */
flags = enter_critical_section();
ret = stm32wb_oneshot_cancel(&priv->oneshot, ts);
ret = stm32_oneshot_cancel(&priv->oneshot, ts);
leave_critical_section(flags);
if (ret < 0)
{
tmrerr("ERROR: stm32wb_oneshot_cancel failed: %d\n", flags);
tmrerr("ERROR: stm32_oneshot_cancel failed: %d\n", flags);
}
return ret;
@ -277,13 +277,13 @@ static int stm32wb_cancel(struct oneshot_lowerhalf_s *lower,
struct oneshot_lowerhalf_s *oneshot_initialize(int chan, uint16_t resolution)
{
struct stm32wb_oneshot_lowerhalf_s *priv;
struct stm32_oneshot_lowerhalf_s *priv;
int ret;
/* Allocate an instance of the lower half driver */
priv = (struct stm32wb_oneshot_lowerhalf_s *)
kmm_zalloc(sizeof(struct stm32wb_oneshot_lowerhalf_s));
priv = (struct stm32_oneshot_lowerhalf_s *)
kmm_zalloc(sizeof(struct stm32_oneshot_lowerhalf_s));
if (priv == NULL)
{
@ -297,10 +297,10 @@ struct oneshot_lowerhalf_s *oneshot_initialize(int chan, uint16_t resolution)
/* Initialize the contained STM32 oneshot timer */
ret = stm32wb_oneshot_initialize(&priv->oneshot, chan, resolution);
ret = stm32_oneshot_initialize(&priv->oneshot, chan, resolution);
if (ret < 0)
{
tmrerr("ERROR: stm32wb_oneshot_initialize failed: %d\n", ret);
tmrerr("ERROR: stm32_oneshot_initialize failed: %d\n", ret);
kmm_free(priv);
return NULL;
}

20
arch/arm/src/stm32wb/stm32wb_pm.h
View file

@ -48,7 +48,7 @@ extern "C"
#endif
/****************************************************************************
* Name: stm32wb_pmstop
* Name: stm32_pmstop
*
* Description:
* Enter STOP mode.
@ -66,10 +66,10 @@ extern "C"
*
****************************************************************************/
int stm32wb_pmstop(bool lpds);
int stm32_pmstop(bool lpds);
/****************************************************************************
* Name: stm32wb_pmstop2
* Name: stm32_pmstop2
*
* Description:
* Enter STOP2 mode.
@ -84,10 +84,10 @@ int stm32wb_pmstop(bool lpds);
*
****************************************************************************/
int stm32wb_pmstop2(void);
int stm32_pmstop2(void);
/****************************************************************************
* Name: stm32wb_pmstandby
* Name: stm32_pmstandby
*
* Description:
* Enter STANDBY mode.
@ -103,10 +103,10 @@ int stm32wb_pmstop2(void);
*
****************************************************************************/
int stm32wb_pmstandby(void);
int stm32_pmstandby(void);
/****************************************************************************
* Name: stm32wb_pmsleep
* Name: stm32_pmsleep
*
* Description:
* Enter SLEEP mode.
@ -122,10 +122,10 @@ int stm32wb_pmstandby(void);
*
****************************************************************************/
void stm32wb_pmsleep(bool sleeponexit);
void stm32_pmsleep(bool sleeponexit);
/****************************************************************************
* Name: stm32wb_pmlpr
* Name: stm32_pmlpr
*
* Description:
* Enter Low-Power Run (LPR) mode.
@ -140,7 +140,7 @@ void stm32wb_pmsleep(bool sleeponexit);
*
****************************************************************************/
int stm32wb_pmlpr(void);
int stm32_pmlpr(void);
#undef EXTERN
#ifdef __cplusplus

4
arch/arm/src/stm32wb/stm32wb_pmlpr.c
View file

@ -39,7 +39,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_pmlpr
* Name: stm32_pmlpr
*
* Description:
* Enter Low-Power Run (LPR) mode.
@ -54,7 +54,7 @@
*
****************************************************************************/
int stm32wb_pmlpr(void)
int stm32_pmlpr(void)
{
uint32_t regval;

4
arch/arm/src/stm32wb/stm32wb_pmsleep.c
View file

@ -37,7 +37,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_pmsleep
* Name: stm32_pmsleep
*
* Description:
* Enter SLEEP mode.
@ -53,7 +53,7 @@
*
****************************************************************************/
void stm32wb_pmsleep(bool sleeponexit)
void stm32_pmsleep(bool sleeponexit)
{
uint32_t regval;

4
arch/arm/src/stm32wb/stm32wb_pmstandby.c
View file

@ -37,7 +37,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_pmstandby
* Name: stm32_pmstandby
*
* Description:
* Enter STANDBY mode.
@ -53,7 +53,7 @@
*
****************************************************************************/
int stm32wb_pmstandby(void)
int stm32_pmstandby(void)
{
uint32_t regval;

8
arch/arm/src/stm32wb/stm32wb_pmstop.c
View file

@ -72,7 +72,7 @@ static int do_stop(void)
****************************************************************************/
/****************************************************************************
* Name: stm32wb_pmstop
* Name: stm32_pmstop
*
* Description:
* Enter STOP mode.
@ -90,7 +90,7 @@ static int do_stop(void)
*
****************************************************************************/
int stm32wb_pmstop(bool lpds)
int stm32_pmstop(bool lpds)
{
uint32_t regval;
@ -114,7 +114,7 @@ int stm32wb_pmstop(bool lpds)
}
/****************************************************************************
* Name: stm32wb_pmstop2
* Name: stm32_pmstop2
*
* Description:
* Enter STOP2 mode.
@ -129,7 +129,7 @@ int stm32wb_pmstop(bool lpds)
*
****************************************************************************/
int stm32wb_pmstop2(void)
int stm32_pmstop2(void)
{
uint32_t regval;

26
arch/arm/src/stm32wb/stm32wb_pwr.c
View file

@ -39,17 +39,17 @@
* Private Functions
****************************************************************************/
static inline uint16_t stm32wb_pwr_getreg(uint8_t offset)
static inline uint16_t stm32_pwr_getreg(uint8_t offset)
{
return (uint16_t)getreg32(STM32_PWR_BASE + (uint32_t)offset);
}
static inline void stm32wb_pwr_putreg(uint8_t offset, uint16_t value)
static inline void stm32_pwr_putreg(uint8_t offset, uint16_t value)
{
putreg32((uint32_t)value, STM32_PWR_BASE + (uint32_t)offset);
}
static inline void stm32wb_pwr_modifyreg(uint8_t offset, uint16_t clearbits,
static inline void stm32_pwr_modifyreg(uint8_t offset, uint16_t clearbits,
uint16_t setbits)
{
modifyreg32(STM32_PWR_BASE + (uint32_t)offset,
@ -61,7 +61,7 @@ static inline void stm32wb_pwr_modifyreg(uint8_t offset, uint16_t clearbits,
****************************************************************************/
/****************************************************************************
* Name: stm32wb_pwr_enablebkp
* Name: stm32_pwr_enablebkp
*
* Description:
* Enables access to the backup domain (RTC registers and backup
@ -75,14 +75,14 @@ static inline void stm32wb_pwr_modifyreg(uint8_t offset, uint16_t clearbits,
*
****************************************************************************/
bool stm32wb_pwr_enablebkp(bool writable)
bool stm32_pwr_enablebkp(bool writable)
{
uint16_t regval;
bool waswritable;
/* Get the current state of the STM32WB PWR control register 1 */
regval = stm32wb_pwr_getreg(STM32_PWR_CR1_OFFSET);
regval = stm32_pwr_getreg(STM32_PWR_CR1_OFFSET);
waswritable = ((regval & PWR_CR1_DBP) != 0);
/* Enable or disable the ability to write */
@ -92,14 +92,14 @@ bool stm32wb_pwr_enablebkp(bool writable)
/* Disable backup domain access */
regval &= ~PWR_CR1_DBP;
stm32wb_pwr_putreg(STM32_PWR_CR1_OFFSET, regval);
stm32_pwr_putreg(STM32_PWR_CR1_OFFSET, regval);
}
else if (!waswritable && writable)
{
/* Enable backup domain access */
regval |= PWR_CR1_DBP;
stm32wb_pwr_putreg(STM32_PWR_CR1_OFFSET, regval);
stm32_pwr_putreg(STM32_PWR_CR1_OFFSET, regval);
/* Enable does not happen right away */
@ -110,7 +110,7 @@ bool stm32wb_pwr_enablebkp(bool writable)
}
/****************************************************************************
* Name: stm32wb_pwr_enableusv
* Name: stm32_pwr_enableusv
*
* Description:
* Enables or disables the USB Supply Valid monitoring. Setting this bit
@ -125,14 +125,14 @@ bool stm32wb_pwr_enablebkp(bool writable)
*
****************************************************************************/
bool stm32wb_pwr_enableusv(bool set)
bool stm32_pwr_enableusv(bool set)
{
uint32_t regval;
bool was_set;
/* Get the current state of the STM32WB PWR control register 2 */
regval = stm32wb_pwr_getreg(STM32_PWR_CR2_OFFSET);
regval = stm32_pwr_getreg(STM32_PWR_CR2_OFFSET);
was_set = ((regval & PWR_CR2_USV) != 0);
/* Enable or disable the ability to write */
@ -142,14 +142,14 @@ bool stm32wb_pwr_enableusv(bool set)
/* Disable the Vddusb monitoring */
regval &= ~PWR_CR2_USV;
stm32wb_pwr_putreg(STM32_PWR_CR2_OFFSET, regval);
stm32_pwr_putreg(STM32_PWR_CR2_OFFSET, regval);
}
else if (!was_set && set)
{
/* Enable the Vddusb monitoring */
regval |= PWR_CR2_USV;
stm32wb_pwr_putreg(STM32_PWR_CR2_OFFSET, regval);
stm32_pwr_putreg(STM32_PWR_CR2_OFFSET, regval);
}
return was_set;

8
arch/arm/src/stm32wb/stm32wb_pwr.h
View file

@ -54,7 +54,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: stm32wb_pwr_enablebkp
* Name: stm32_pwr_enablebkp
*
* Description:
* Enables access to the backup domain (RTC registers, RTC backup data
@ -68,10 +68,10 @@ extern "C"
*
****************************************************************************/
bool stm32wb_pwr_enablebkp(bool writable);
bool stm32_pwr_enablebkp(bool writable);
/****************************************************************************
* Name: stm32wb_pwr_enableusv
* Name: stm32_pwr_enableusv
*
* Description:
* Enables or disables the USB Supply Valid monitoring. Setting this bit
@ -86,7 +86,7 @@ bool stm32wb_pwr_enablebkp(bool writable);
*
****************************************************************************/
bool stm32wb_pwr_enableusv(bool set);
bool stm32_pwr_enableusv(bool set);
/****************************************************************************
* Name: stm32_pwr_setvos

40
arch/arm/src/stm32wb/stm32wb_rcc.c
View file

@ -504,7 +504,7 @@ static inline void rcc_enableccip(void)
}
/****************************************************************************
* Name: stm32wb_stdclockconfig
* Name: stm32_stdclockconfig
*
* Description:
* Called to change to new clock based on settings in board.h
@ -514,7 +514,7 @@ static inline void rcc_enableccip(void)
****************************************************************************/
#ifndef CONFIG_ARCH_BOARD_STM32WB_CUSTOM_CLOCKCONFIG
static void stm32wb_stdclockconfig(void)
static void stm32_stdclockconfig(void)
{
uint32_t regval;
volatile int32_t timeout;
@ -604,7 +604,7 @@ static void stm32wb_stdclockconfig(void)
}
#else
# error stm32wb_stdclockconfig(), must have one of STM32_BOARD_USEHSI, STM32_BOARD_USEMSI, STM32_BOARD_USEHSE defined
# error stm32_stdclockconfig(), must have one of STM32_BOARD_USEHSI, STM32_BOARD_USEMSI, STM32_BOARD_USEHSE defined
#endif
@ -789,7 +789,7 @@ static void stm32wb_stdclockconfig(void)
#if defined(CONFIG_STM32WB_IWDG) || defined(CONFIG_STM32WB_RTC_LSICLOCK)
/* Low speed internal clock source LSI */
stm32wb_rcc_enable_lsi();
stm32_rcc_enable_lsi();
#endif
#if defined(STM32_USE_LSE)
@ -805,7 +805,7 @@ static void stm32wb_stdclockconfig(void)
* this for automatically trimming MSI, etc.
*/
stm32wb_rcc_enable_lse();
stm32_rcc_enable_lse();
# if defined(STM32_BOARD_USEMSI)
/* Now that LSE is up, auto trim the MSI */
@ -846,7 +846,7 @@ static inline void rcc_enableperipherals(void)
#ifdef STM32_USE_HSI48
/* Enable HSI48 clocking to support USB transfers or RNG */
stm32wb_enable_hsi48(STM32_HSI48_SYNCSRC);
stm32_enable_hsi48(STM32_HSI48_SYNCSRC);
#endif
}
@ -878,7 +878,7 @@ static inline void rcc_resetbkp(void)
/* Check if the RTC is already configured */
init_stat = stm32wb_rtc_is_initialized();
init_stat = stm32_rtc_is_initialized();
if (!init_stat)
{
uint32_t bkregs[STM32_RTC_BKCOUNT];
@ -895,7 +895,7 @@ static inline void rcc_resetbkp(void)
* backup data registers and backup SRAM).
*/
stm32wb_pwr_enablebkp(true);
stm32_pwr_enablebkp(true);
/* We might be changing RTCSEL - to ensure such changes work, we must
* reset the backup domain (having backed up the RTC_MAGIC token)
@ -914,7 +914,7 @@ static inline void rcc_resetbkp(void)
}
}
stm32wb_pwr_enablebkp(false);
stm32_pwr_enablebkp(false);
}
}
#else
@ -922,7 +922,7 @@ static inline void rcc_resetbkp(void)
#endif
/****************************************************************************
* Name: stm32wb_clockconfig
* Name: stm32_clockconfig
*
* Description:
* Called to establish the clock settings based on the values in board.h.
@ -932,7 +932,7 @@ static inline void rcc_resetbkp(void)
*
* If CONFIG_ARCH_BOARD_STM32WB_CUSTOM_CLOCKCONFIG is defined, then
* clocking will be enabled by an externally provided, board-specific
* function called stm32wb_board_clockconfig().
* function called stm32_board_clockconfig().
*
* Input Parameters:
* None
@ -942,7 +942,7 @@ static inline void rcc_resetbkp(void)
*
****************************************************************************/
void stm32wb_clockconfig(void)
void stm32_clockconfig(void)
{
/* Make sure that we are starting in the reset state */
@ -956,7 +956,7 @@ void stm32wb_clockconfig(void)
/* Invoke Board Custom Clock Configuration */
stm32wb_board_clockconfig();
stm32_board_clockconfig();
#else
@ -964,7 +964,7 @@ void stm32wb_clockconfig(void)
* board.h
*/
stm32wb_stdclockconfig();
stm32_stdclockconfig();
#endif
@ -974,7 +974,7 @@ void stm32wb_clockconfig(void)
}
/****************************************************************************
* Name: stm32wb_clockenable
* Name: stm32_clockenable
*
* Description:
* Re-enable the clock and restore the clock settings based on settings in
@ -984,12 +984,12 @@ void stm32wb_clockconfig(void)
* re-enable/re-start the PLL
*
* This functional performs a subset of the operations performed by
* stm32wb_clockconfig(): It does not reset any devices, and it does not
* stm32_clockconfig(): It does not reset any devices, and it does not
* reset the currently enabled peripheral clocks.
*
* If CONFIG_ARCH_BOARD_STM32WB_CUSTOM_CLOCKCONFIG is defined, then
* clocking will be enabled by an externally provided, board-specific
* function called stm32wb_board_clockconfig().
* function called stm32_board_clockconfig().
*
* Input Parameters:
* None
@ -1000,13 +1000,13 @@ void stm32wb_clockconfig(void)
****************************************************************************/
#ifdef CONFIG_PM
void stm32wb_clockenable(void)
void stm32_clockenable(void)
{
#if defined(CONFIG_ARCH_BOARD_STM32WB_CUSTOM_CLOCKCONFIG)
/* Invoke Board Custom Clock Configuration */
stm32wb_board_clockconfig();
stm32_board_clockconfig();
#else
@ -1014,7 +1014,7 @@ void stm32wb_clockenable(void)
* board.h
*/
stm32wb_stdclockconfig();
stm32_stdclockconfig();
#endif
}

42
arch/arm/src/stm32wb/stm32wb_rcc.h
View file

@ -68,7 +68,7 @@ typedef enum crs_syncsrc_e crs_syncsrc_t;
****************************************************************************/
/****************************************************************************
* Name: stm32wb_mcoconfig
* Name: stm32_mcoconfig
*
* Description:
* Selects the clock source to output and clock divider on MC pin
@ -84,7 +84,7 @@ typedef enum crs_syncsrc_e crs_syncsrc_t;
*
****************************************************************************/
static inline void stm32wb_mcoconfig(uint32_t source, uint32_t divider)
static inline void stm32_mcoconfig(uint32_t source, uint32_t divider)
{
uint32_t regval;
@ -107,7 +107,7 @@ static inline void stm32wb_mcoconfig(uint32_t source, uint32_t divider)
****************************************************************************/
/****************************************************************************
* Name: stm32wb_clockconfig
* Name: stm32_clockconfig
*
* Description:
* Called to establish the clock settings based on the values in board.h.
@ -117,7 +117,7 @@ static inline void stm32wb_mcoconfig(uint32_t source, uint32_t divider)
*
* If CONFIG_ARCH_BOARD_STM32WB_CUSTOM_CLOCKCONFIG is defined, then
* clocking will be enabled by an externally provided, board-specific
* function called stm32wb_board_clockconfig().
* function called stm32_board_clockconfig().
*
* Input Parameters:
* None
@ -127,10 +127,10 @@ static inline void stm32wb_mcoconfig(uint32_t source, uint32_t divider)
*
****************************************************************************/
void stm32wb_clockconfig(void);
void stm32_clockconfig(void);
/****************************************************************************
* Name: stm32wb_board_clockconfig
* Name: stm32_board_clockconfig
*
* Description:
* Any STM32WB board may replace the "standard" board clock configuration
@ -139,11 +139,11 @@ void stm32wb_clockconfig(void);
****************************************************************************/
#ifdef CONFIG_ARCH_BOARD_STM32WB_CUSTOM_CLOCKCONFIG
void stm32wb_board_clockconfig(void);
void stm32_board_clockconfig(void);
#endif
/****************************************************************************
* Name: stm32wb_clockenable
* Name: stm32_clockenable
*
* Description:
* Re-enable the clock and restore the clock settings based on settings in
@ -153,12 +153,12 @@ void stm32wb_board_clockconfig(void);
* re-start the PLL
*
* This functional performs a subset of the operations performed by
* stm32wb_clockconfig(): It does not reset any devices, and it does not
* stm32_clockconfig(): It does not reset any devices, and it does not
* reset the currently enabled peripheral clocks.
*
* If CONFIG_ARCH_BOARD_STM32WB_CUSTOM_CLOCKCONFIG is defined, then
* clocking will be enabled by an externally provided, board-specific
* function called stm32wb_board_clockconfig().
* function called stm32_board_clockconfig().
*
* Input Parameters:
* None
@ -169,11 +169,11 @@ void stm32wb_board_clockconfig(void);
****************************************************************************/
#ifdef CONFIG_PM
void stm32wb_clockenable(void);
void stm32_clockenable(void);
#endif
/****************************************************************************
* Name: stm32wb_rcc_enable_lse
* Name: stm32_rcc_enable_lse
*
* Description:
* Enable the External Low-Speed (LSE) Oscillator.
@ -186,30 +186,30 @@ void stm32wb_clockenable(void);
*
****************************************************************************/
void stm32wb_rcc_enable_lse(void);
void stm32_rcc_enable_lse(void);
/****************************************************************************
* Name: stm32wb_rcc_enable_lsi
* Name: stm32_rcc_enable_lsi
*
* Description:
* Enable the Internal Low-Speed (LSI) RC Oscillator.
*
****************************************************************************/
void stm32wb_rcc_enable_lsi(void);
void stm32_rcc_enable_lsi(void);
/****************************************************************************
* Name: stm32wb_rcc_disable_lsi
* Name: stm32_rcc_disable_lsi
*
* Description:
* Disable the Internal Low-Speed (LSI) RC Oscillator.
*
****************************************************************************/
void stm32wb_rcc_disable_lsi(void);
void stm32_rcc_disable_lsi(void);
/****************************************************************************
* Name: stm32wb_rcc_enable_hsi48
* Name: stm32_rcc_enable_hsi48
*
* Description:
* HSI48 clock signal is generated from an internal 48 MHz RC oscillator
@ -235,10 +235,10 @@ void stm32wb_rcc_disable_lsi(void);
*
****************************************************************************/
void stm32wb_rcc_enable_hsi48(crs_syncsrc_t syncsrc);
void stm32_rcc_enable_hsi48(crs_syncsrc_t syncsrc);
/****************************************************************************
* Name: stm32wb_rcc_disable_hsi48
* Name: stm32_rcc_disable_hsi48
*
* Description:
* Disable the HSI48 clock.
@ -251,7 +251,7 @@ void stm32wb_rcc_enable_hsi48(crs_syncsrc_t syncsrc);
*
****************************************************************************/
void stm32wb_rcc_disable_hsi48(void);
void stm32_rcc_disable_hsi48(void);
#undef EXTERN
#if defined(__cplusplus)

8
arch/arm/src/stm32wb/stm32wb_rcc_hsi48.c
View file

@ -35,7 +35,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_rcc_enable_hsi48
* Name: stm32_rcc_enable_hsi48
*
* Description:
* HSI48 clock signal is generated from an internal 48 MHz RC oscillator
@ -61,7 +61,7 @@
*
****************************************************************************/
void stm32wb_rcc_enable_hsi48(crs_syncsrc_t syncsrc)
void stm32_rcc_enable_hsi48(crs_syncsrc_t syncsrc)
{
uint32_t regval;
@ -130,7 +130,7 @@ void stm32wb_rcc_enable_hsi48(crs_syncsrc_t syncsrc)
}
/****************************************************************************
* Name: stm32wb_rcc_disable_hsi48
* Name: stm32_rcc_disable_hsi48
*
* Description:
* Disable the HSI48 clock.
@ -143,7 +143,7 @@ void stm32wb_rcc_enable_hsi48(crs_syncsrc_t syncsrc)
*
****************************************************************************/
void stm32wb_rcc_disable_hsi48(void)
void stm32_rcc_disable_hsi48(void)
{
uint32_t regval;

10
arch/arm/src/stm32wb/stm32wb_rcc_lse.c
View file

@ -54,14 +54,14 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_rcc_enable_lse
* Name: stm32_rcc_enable_lse
*
* Description:
* Enable the External Low-Speed (LSE) oscillator.
*
****************************************************************************/
void stm32wb_rcc_enable_lse(void)
void stm32_rcc_enable_lse(void)
{
bool writable;
uint32_t regval;
@ -78,7 +78,7 @@ void stm32wb_rcc_enable_lse(void)
* in the PWR CR register before to configuring the LSE.
*/
writable = stm32wb_pwr_enablebkp(true);
writable = stm32_pwr_enablebkp(true);
/* Enable the External Low-Speed (LSE) oscillator by setting the
* LSEON bit the RCC BDCR register.
@ -100,7 +100,7 @@ void stm32wb_rcc_enable_lse(void)
while (((regval = getreg32(STM32_RCC_BDCR)) & RCC_BDCR_LSERDY) == 0)
{
stm32wb_waste();
stm32_waste();
}
#if defined(CONFIG_STM32WB_RTC_LSECLOCK_RUN_DRV_CAPABILITY) && \
@ -121,6 +121,6 @@ void stm32wb_rcc_enable_lse(void)
/* Disable backup domain access if it was disabled on entry */
stm32wb_pwr_enablebkp(writable);
stm32_pwr_enablebkp(writable);
}
}

8
arch/arm/src/stm32wb/stm32wb_rcc_lsi.c
View file

@ -34,14 +34,14 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_rcc_enable_lsi
* Name: stm32_rcc_enable_lsi
*
* Description:
* Enable the Internal Low-Speed (LSI) RC Oscillator.
*
****************************************************************************/
void stm32wb_rcc_enable_lsi(void)
void stm32_rcc_enable_lsi(void)
{
/* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION
* bit the RCC CSR register.
@ -55,14 +55,14 @@ void stm32wb_rcc_enable_lsi(void)
}
/****************************************************************************
* Name: stm32wb_rcc_disable_lsi
* Name: stm32_rcc_disable_lsi
*
* Description:
* Disable the Internal Low-Speed (LSI) RC Oscillator.
*
****************************************************************************/
void stm32wb_rcc_disable_lsi(void)
void stm32_rcc_disable_lsi(void)
{
/* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION
* bit the RCC CSR register.

90
arch/arm/src/stm32wb/stm32wb_rtc.c
View file

@ -199,7 +199,7 @@ static void rtc_wprunlock(void)
{
/* Enable write access to the backup domain. */
stm32wb_pwr_enablebkp(true);
stm32_pwr_enablebkp(true);
/* The following steps are required to unlock the write protection on
* all the RTC registers (except for RTC_ISR[13:8], RTC_TAFCR, and
@ -237,7 +237,7 @@ static inline void rtc_wprlock(void)
/* Disable write access to the backup domain. */
stm32wb_pwr_enablebkp(false);
stm32_pwr_enablebkp(false);
}
/****************************************************************************
@ -436,7 +436,7 @@ static void rtc_resume(void)
}
/****************************************************************************
* Name: stm32wb_rtc_alarm_handler
* Name: stm32_rtc_alarm_handler
*
* Description:
* RTC ALARM interrupt service routine through the EXTI line
@ -451,7 +451,7 @@ static void rtc_resume(void)
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
static int stm32wb_rtc_alarm_handler(int irq, void *context,
static int stm32_rtc_alarm_handler(int irq, void *context,
void *rtc_handler_arg)
{
struct alm_cbinfo_s *cbinfo;
@ -465,7 +465,7 @@ static int stm32wb_rtc_alarm_handler(int irq, void *context,
* backup data registers and backup SRAM).
*/
stm32wb_pwr_enablebkp(true);
stm32_pwr_enablebkp(true);
/* Check for EXTI from Alarm A or B and handle according */
@ -531,7 +531,7 @@ static int stm32wb_rtc_alarm_handler(int irq, void *context,
* data registers and backup SRAM).
*/
stm32wb_pwr_enablebkp(false);
stm32_pwr_enablebkp(false);
return ret;
}
@ -737,14 +737,14 @@ static inline void rtc_enable_alarm(void)
* 3. Configure the RTC to generate RTC alarms (Alarm A or Alarm B).
*/
stm32wb_exti_alarm(true, false, true, stm32wb_rtc_alarm_handler, NULL);
stm32_exti_alarm(true, false, true, stm32_rtc_alarm_handler, NULL);
g_alarm_enabled = true;
}
}
#endif
/****************************************************************************
* Name: stm32wb_rtc_getalarmdatetime
* Name: stm32_rtc_getalarmdatetime
*
* Description:
* Get the current date and time for a RTC alarm.
@ -759,7 +759,7 @@ static inline void rtc_enable_alarm(void)
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
static int stm32wb_rtc_getalarmdatetime(rtc_alarmreg_t reg,
static int stm32_rtc_getalarmdatetime(rtc_alarmreg_t reg,
struct tm *tp)
{
uint32_t data;
@ -800,7 +800,7 @@ static int stm32wb_rtc_getalarmdatetime(rtc_alarmreg_t reg,
****************************************************************************/
/****************************************************************************
* Name: stm32wb_rtc_is_initialized
* Name: stm32_rtc_is_initialized
*
* Description:
* Returns 'true' if the RTC has been initialized
@ -816,7 +816,7 @@ static int stm32wb_rtc_getalarmdatetime(rtc_alarmreg_t reg,
*
****************************************************************************/
bool stm32wb_rtc_is_initialized(void)
bool stm32_rtc_is_initialized(void)
{
uint32_t regval;
@ -851,14 +851,14 @@ int up_rtc_initialize(void)
* backed, we don't need or want to re-initialize on each reset.
*/
init_stat = stm32wb_rtc_is_initialized();
init_stat = stm32_rtc_is_initialized();
if (!init_stat)
{
/* Enable write access to the backup domain (RTC registers, RTC
* backup data registers and backup SRAM).
*/
stm32wb_pwr_enablebkp(true);
stm32_pwr_enablebkp(true);
#if defined(CONFIG_STM32WB_RTC_HSECLOCK)
modifyreg32(STM32_RCC_BDCR, RCC_BDCR_RTCSEL_MASK,
@ -893,7 +893,7 @@ int up_rtc_initialize(void)
* RTC backup data registers and backup SRAM).
*/
stm32wb_pwr_enablebkp(false);
stm32_pwr_enablebkp(false);
rtc_dumpregs("After Failed Initialization");
@ -960,7 +960,7 @@ int up_rtc_initialize(void)
* RTC backup data registers and backup SRAM).
*/
stm32wb_pwr_enablebkp(false);
stm32_pwr_enablebkp(false);
}
}
else
@ -969,7 +969,7 @@ int up_rtc_initialize(void)
* backup data registers and backup SRAM).
*/
stm32wb_pwr_enablebkp(true);
stm32_pwr_enablebkp(true);
/* Write protection for RTC registers does not need to be disabled. */
@ -979,7 +979,7 @@ int up_rtc_initialize(void)
* data registers and backup SRAM).
*/
stm32wb_pwr_enablebkp(false);
stm32_pwr_enablebkp(false);
}
g_rtc_enabled = true;
@ -989,7 +989,7 @@ int up_rtc_initialize(void)
}
/****************************************************************************
* Name: stm32wb_rtc_getdatetime_with_subseconds
* Name: stm32_rtc_getdatetime_with_subseconds
*
* Description:
* Get the current date and time from the date/time RTC. This interface
@ -1009,7 +1009,7 @@ int up_rtc_initialize(void)
*
****************************************************************************/
int stm32wb_rtc_getdatetime_with_subseconds(struct tm *tp,
int stm32_rtc_getdatetime_with_subseconds(struct tm *tp,
long *nsec)
{
#ifdef CONFIG_STM32WB_HAVE_RTC_SUBSECONDS
@ -1140,7 +1140,7 @@ int stm32wb_rtc_getdatetime_with_subseconds(struct tm *tp,
int up_rtc_getdatetime(struct tm *tp)
{
return stm32wb_rtc_getdatetime_with_subseconds(tp, NULL);
return stm32_rtc_getdatetime_with_subseconds(tp, NULL);
}
/****************************************************************************
@ -1174,12 +1174,12 @@ int up_rtc_getdatetime(struct tm *tp)
# endif
int up_rtc_getdatetime_with_subseconds(struct tm *tp, long *nsec)
{
return stm32wb_rtc_getdatetime_with_subseconds(tp, nsec);
return stm32_rtc_getdatetime_with_subseconds(tp, nsec);
}
#endif
/****************************************************************************
* Name: stm32wb_rtc_setdatetime
* Name: stm32_rtc_setdatetime
*
* Description:
* Set the RTC to the provided time. RTC implementations which provide
@ -1194,7 +1194,7 @@ int up_rtc_getdatetime_with_subseconds(struct tm *tp, long *nsec)
*
****************************************************************************/
int stm32wb_rtc_setdatetime(const struct tm *tp)
int stm32_rtc_setdatetime(const struct tm *tp)
{
uint32_t tr;
uint32_t dr;
@ -1257,9 +1257,9 @@ int stm32wb_rtc_setdatetime(const struct tm *tp)
if (getreg32(RTC_MAGIC_REG) != RTC_MAGIC_TIME_SET)
{
stm32wb_pwr_enablebkp(true);
stm32_pwr_enablebkp(true);
putreg32(RTC_MAGIC_TIME_SET, RTC_MAGIC_REG);
stm32wb_pwr_enablebkp(false);
stm32_pwr_enablebkp(false);
}
/* Re-enable the write protection for RTC registers */
@ -1270,7 +1270,7 @@ int stm32wb_rtc_setdatetime(const struct tm *tp)
}
/****************************************************************************
* Name: stm32wb_rtc_havesettime
* Name: stm32_rtc_havesettime
*
* Description:
* Check if RTC time has been set.
@ -1280,7 +1280,7 @@ int stm32wb_rtc_setdatetime(const struct tm *tp)
*
****************************************************************************/
bool stm32wb_rtc_havesettime(void)
bool stm32_rtc_havesettime(void)
{
return getreg32(RTC_MAGIC_REG) == RTC_MAGIC_TIME_SET;
}
@ -1309,11 +1309,11 @@ int up_rtc_settime(const struct timespec *tp)
*/
gmtime_r(&tp->tv_sec, &newtime);
return stm32wb_rtc_setdatetime(&newtime);
return stm32_rtc_setdatetime(&newtime);
}
/****************************************************************************
* Name: stm32wb_rtc_setalarm
* Name: stm32_rtc_setalarm
*
* Description:
* Set an alarm to an absolute time using associated hardware.
@ -1327,7 +1327,7 @@ int up_rtc_settime(const struct timespec *tp)
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
int stm32wb_rtc_setalarm(struct alm_setalarm_s *alminfo)
int stm32_rtc_setalarm(struct alm_setalarm_s *alminfo)
{
struct alm_cbinfo_s *cbinfo;
rtc_alarmreg_t alarmreg;
@ -1402,7 +1402,7 @@ int stm32wb_rtc_setalarm(struct alm_setalarm_s *alminfo)
#endif
/****************************************************************************
* Name: stm32wb_rtc_cancelalarm
* Name: stm32_rtc_cancelalarm
*
* Description:
* Cancel an alarm.
@ -1416,7 +1416,7 @@ int stm32wb_rtc_setalarm(struct alm_setalarm_s *alminfo)
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
int stm32wb_rtc_cancelalarm(enum alm_id_e alarmid)
int stm32_rtc_cancelalarm(enum alm_id_e alarmid)
{
int ret = -EINVAL;
@ -1502,7 +1502,7 @@ errout_with_wprunlock:
#endif
/****************************************************************************
* Name: stm32wb_rtc_rdalarm
* Name: stm32_rtc_rdalarm
*
* Description:
* Query an alarm configured in hardware.
@ -1516,7 +1516,7 @@ errout_with_wprunlock:
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
int stm32wb_rtc_rdalarm(struct alm_rdalarm_s *alminfo)
int stm32_rtc_rdalarm(struct alm_rdalarm_s *alminfo)
{
rtc_alarmreg_t alarmreg;
int ret = -EINVAL;
@ -1529,7 +1529,7 @@ int stm32wb_rtc_rdalarm(struct alm_rdalarm_s *alminfo)
case RTC_ALARMA:
{
alarmreg = STM32_RTC_ALRMAR;
ret = stm32wb_rtc_getalarmdatetime(alarmreg,
ret = stm32_rtc_getalarmdatetime(alarmreg,
(struct tm *)alminfo->ar_time);
}
break;
@ -1538,7 +1538,7 @@ int stm32wb_rtc_rdalarm(struct alm_rdalarm_s *alminfo)
case RTC_ALARMB:
{
alarmreg = STM32_RTC_ALRMBR;
ret = stm32wb_rtc_getalarmdatetime(alarmreg,
ret = stm32_rtc_getalarmdatetime(alarmreg,
(struct tm *)alminfo->ar_time);
}
break;
@ -1554,7 +1554,7 @@ int stm32wb_rtc_rdalarm(struct alm_rdalarm_s *alminfo)
#endif
/****************************************************************************
* Name: stm32wb_rtc_wakeup_handler
* Name: stm32_rtc_wakeup_handler
*
* Description:
* RTC WAKEUP interrupt service routine through the EXTI line
@ -1568,17 +1568,17 @@ int stm32wb_rtc_rdalarm(struct alm_rdalarm_s *alminfo)
****************************************************************************/
#ifdef CONFIG_RTC_PERIODIC
static int stm32wb_rtc_wakeup_handler(int irq, void *context, void *arg)
static int stm32_rtc_wakeup_handler(int irq, void *context, void *arg)
{
uint32_t regval = 0;
stm32wb_pwr_enablebkp(true);
stm32_pwr_enablebkp(true);
regval = getreg32(STM32_RTC_ISR);
regval &= ~RTC_ISR_WUTF;
putreg32(regval, STM32_RTC_ISR);
stm32wb_pwr_enablebkp(false);
stm32_pwr_enablebkp(false);
if (g_wakeupcb != NULL)
{
@ -1602,7 +1602,7 @@ static inline void rtc_enable_wakeup(void)
{
if (!g_wakeup_enabled)
{
stm32wb_exti_wakeup(true, false, true, stm32wb_rtc_wakeup_handler,
stm32_exti_wakeup(true, false, true, stm32_rtc_wakeup_handler,
NULL);
g_wakeup_enabled = true;
}
@ -1630,7 +1630,7 @@ static inline void rtc_set_wcksel(unsigned int wucksel)
#endif
/****************************************************************************
* Name: stm32wb_rtc_setperiodic
* Name: stm32_rtc_setperiodic
*
* Description:
* Set a periodic RTC wakeup
@ -1645,7 +1645,7 @@ static inline void rtc_set_wcksel(unsigned int wucksel)
****************************************************************************/
#ifdef CONFIG_RTC_PERIODIC
int stm32wb_rtc_setperiodic(const struct timespec *period,
int stm32_rtc_setperiodic(const struct timespec *period,
wakeupcb_t callback)
{
unsigned int wutr_val;
@ -1774,7 +1774,7 @@ int stm32wb_rtc_setperiodic(const struct timespec *period,
#endif
/****************************************************************************
* Name: stm32wb_rtc_cancelperiodic
* Name: stm32_rtc_cancelperiodic
*
* Description:
* Cancel a periodic wakeup
@ -1787,7 +1787,7 @@ int stm32wb_rtc_setperiodic(const struct timespec *period,
****************************************************************************/
#ifdef CONFIG_RTC_PERIODIC
int stm32wb_rtc_cancelperiodic(void)
int stm32_rtc_cancelperiodic(void)
{
int ret = OK;
int timeout = 0;

42
arch/arm/src/stm32wb/stm32wb_rtc.h
View file

@ -120,7 +120,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: stm32wb_rtc_is_initialized
* Name: stm32_rtc_is_initialized
*
* Description:
* Returns 'true' if the RTC has been initialized
@ -135,10 +135,10 @@ extern "C"
*
****************************************************************************/
bool stm32wb_rtc_is_initialized(void);
bool stm32_rtc_is_initialized(void);
/****************************************************************************
* Name: stm32wb_rtc_getdatetime_with_subseconds
* Name: stm32_rtc_getdatetime_with_subseconds
*
* Description:
* Get the current date and time from the date/time RTC. This interface
@ -159,11 +159,11 @@ bool stm32wb_rtc_is_initialized(void);
****************************************************************************/
#ifdef CONFIG_STM32WB_HAVE_RTC_SUBSECONDS
int stm32wb_rtc_getdatetime_with_subseconds(struct tm *tp, long *nsec);
int stm32_rtc_getdatetime_with_subseconds(struct tm *tp, long *nsec);
#endif
/****************************************************************************
* Name: stm32wb_rtc_setdatetime
* Name: stm32_rtc_setdatetime
*
* Description:
* Set the RTC to the provided time. RTC implementations which provide
@ -180,11 +180,11 @@ int stm32wb_rtc_getdatetime_with_subseconds(struct tm *tp, long *nsec);
#ifdef CONFIG_RTC_DATETIME
struct tm;
int stm32wb_rtc_setdatetime(const struct tm *tp);
int stm32_rtc_setdatetime(const struct tm *tp);
#endif
/****************************************************************************
* Name: stm32wb_rtc_havesettime
* Name: stm32_rtc_havesettime
*
* Description:
* Check if RTC time has been set.
@ -194,11 +194,11 @@ int stm32wb_rtc_setdatetime(const struct tm *tp);
*
****************************************************************************/
bool stm32wb_rtc_havesettime(void);
bool stm32_rtc_havesettime(void);
#ifdef CONFIG_RTC_ALARM
/****************************************************************************
* Name: stm32wb_rtc_setalarm
* Name: stm32_rtc_setalarm
*
* Description:
* Set an alarm to an absolute time using associated hardware.
@ -211,10 +211,10 @@ bool stm32wb_rtc_havesettime(void);
*
****************************************************************************/
int stm32wb_rtc_setalarm(struct alm_setalarm_s *alminfo);
int stm32_rtc_setalarm(struct alm_setalarm_s *alminfo);
/****************************************************************************
* Name: stm32wb_rtc_rdalarm
* Name: stm32_rtc_rdalarm
*
* Description:
* Query an alarm configured in hardware.
@ -227,10 +227,10 @@ int stm32wb_rtc_setalarm(struct alm_setalarm_s *alminfo);
*
****************************************************************************/
int stm32wb_rtc_rdalarm(struct alm_rdalarm_s *alminfo);
int stm32_rtc_rdalarm(struct alm_rdalarm_s *alminfo);
/****************************************************************************
* Name: stm32wb_rtc_cancelalarm
* Name: stm32_rtc_cancelalarm
*
* Description:
* Cancel an alarm.
@ -243,13 +243,13 @@ int stm32wb_rtc_rdalarm(struct alm_rdalarm_s *alminfo);
*
****************************************************************************/
int stm32wb_rtc_cancelalarm(enum alm_id_e alarmid);
int stm32_rtc_cancelalarm(enum alm_id_e alarmid);
#endif /* CONFIG_RTC_ALARM */
#ifdef CONFIG_RTC_PERIODIC
/****************************************************************************
* Name: stm32wb_rtc_setperiodic
* Name: stm32_rtc_setperiodic
*
* Description:
* Set a periodic RTC wakeup
@ -263,11 +263,11 @@ int stm32wb_rtc_cancelalarm(enum alm_id_e alarmid);
*
****************************************************************************/
int stm32wb_rtc_setperiodic(const struct timespec *period,
int stm32_rtc_setperiodic(const struct timespec *period,
wakeupcb_t callback);
/****************************************************************************
* Name: stm32wb_rtc_cancelperiodic
* Name: stm32_rtc_cancelperiodic
*
* Description:
* Cancel a periodic wakeup
@ -279,11 +279,11 @@ int stm32wb_rtc_setperiodic(const struct timespec *period,
*
****************************************************************************/
int stm32wb_rtc_cancelperiodic(void);
int stm32_rtc_cancelperiodic(void);
#endif /* CONFIG_RTC_PERIODIC */
/****************************************************************************
* Name: stm32wb_rtc_lowerhalf
* Name: stm32_rtc_lowerhalf
*
* Description:
* Instantiate the RTC lower half driver for the STM32WB. General usage:
@ -292,7 +292,7 @@ int stm32wb_rtc_cancelperiodic(void);
* #include "stm32wb_rtc.h>
*
* struct rtc_lowerhalf_s *lower;
* lower = stm32wb_rtc_lowerhalf();
* lower = stm32_rtc_lowerhalf();
* rtc_initialize(0, lower);
*
* Input Parameters:
@ -306,7 +306,7 @@ int stm32wb_rtc_cancelperiodic(void);
#ifdef CONFIG_RTC_DRIVER
struct rtc_lowerhalf_s;
struct rtc_lowerhalf_s *stm32wb_rtc_lowerhalf(void);
struct rtc_lowerhalf_s *stm32_rtc_lowerhalf(void);
#endif
#undef EXTERN

152
arch/arm/src/stm32wb/stm32wb_rtc_lowerhalf.c
View file

@ -52,7 +52,7 @@
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
struct stm32wb_cbinfo_s
struct stm32_cbinfo_s
{
volatile rtc_alarm_callback_t cb; /* Callback when the alarm expires */
volatile void *priv; /* Private argument for callback */
@ -64,7 +64,7 @@ struct stm32wb_cbinfo_s
* with struct rtc_lowerhalf_s.
*/
struct stm32wb_lowerhalf_s
struct stm32_lowerhalf_s
{
/* This is the contained reference to the read-only, lower-half
* operations vtable (which may lie in FLASH or ROM)
@ -81,7 +81,7 @@ struct stm32wb_lowerhalf_s
#ifdef CONFIG_RTC_ALARM
/* Alarm callback information */
struct stm32wb_cbinfo_s cbinfo[STM32_NALARMS];
struct stm32_cbinfo_s cbinfo[STM32_NALARMS];
#endif
#ifdef CONFIG_RTC_PERIODIC
@ -97,29 +97,29 @@ struct stm32wb_lowerhalf_s
/* Prototypes for static methods in struct rtc_ops_s */
static int stm32wb_rdtime(struct rtc_lowerhalf_s *lower,
static int stm32_rdtime(struct rtc_lowerhalf_s *lower,
struct rtc_time *rtctime);
static int stm32wb_settime(struct rtc_lowerhalf_s *lower,
static int stm32_settime(struct rtc_lowerhalf_s *lower,
const struct rtc_time *rtctime);
static bool stm32wb_havesettime(struct rtc_lowerhalf_s *lower);
static bool stm32_havesettime(struct rtc_lowerhalf_s *lower);
#ifdef CONFIG_RTC_ALARM
static int stm32wb_setalarm(struct rtc_lowerhalf_s *lower,
static int stm32_setalarm(struct rtc_lowerhalf_s *lower,
const struct lower_setalarm_s *alarminfo);
static int
stm32wb_setrelative(struct rtc_lowerhalf_s *lower,
stm32_setrelative(struct rtc_lowerhalf_s *lower,
const struct lower_setrelative_s *alarminfo);
static int stm32wb_cancelalarm(struct rtc_lowerhalf_s *lower, int alarmid);
static int stm32wb_rdalarm(struct rtc_lowerhalf_s *lower,
static int stm32_cancelalarm(struct rtc_lowerhalf_s *lower, int alarmid);
static int stm32_rdalarm(struct rtc_lowerhalf_s *lower,
struct lower_rdalarm_s *alarminfo);
#endif
#ifdef CONFIG_RTC_PERIODIC
static int
stm32wb_setperiodic(struct rtc_lowerhalf_s *lower,
stm32_setperiodic(struct rtc_lowerhalf_s *lower,
const struct lower_setperiodic_s *alarminfo);
static int
stm32wb_cancelperiodic(struct rtc_lowerhalf_s *lower, int id);
stm32_cancelperiodic(struct rtc_lowerhalf_s *lower, int id);
#endif
/****************************************************************************
@ -130,24 +130,24 @@ stm32wb_cancelperiodic(struct rtc_lowerhalf_s *lower, int id);
static const struct rtc_ops_s g_rtc_ops =
{
.rdtime = stm32wb_rdtime,
.settime = stm32wb_settime,
.havesettime = stm32wb_havesettime,
.rdtime = stm32_rdtime,
.settime = stm32_settime,
.havesettime = stm32_havesettime,
#ifdef CONFIG_RTC_ALARM
.setalarm = stm32wb_setalarm,
.setrelative = stm32wb_setrelative,
.cancelalarm = stm32wb_cancelalarm,
.rdalarm = stm32wb_rdalarm,
.setalarm = stm32_setalarm,
.setrelative = stm32_setrelative,
.cancelalarm = stm32_cancelalarm,
.rdalarm = stm32_rdalarm,
#endif
#ifdef CONFIG_RTC_PERIODIC
.setperiodic = stm32wb_setperiodic,
.cancelperiodic = stm32wb_cancelperiodic,
.setperiodic = stm32_setperiodic,
.cancelperiodic = stm32_cancelperiodic,
#endif
};
/* STM32WB RTC device state */
static struct stm32wb_lowerhalf_s g_rtc_lowerhalf =
static struct stm32_lowerhalf_s g_rtc_lowerhalf =
{
.ops = &g_rtc_ops,
.devlock = NXMUTEX_INITIALIZER,
@ -158,7 +158,7 @@ static struct stm32wb_lowerhalf_s g_rtc_lowerhalf =
****************************************************************************/
/****************************************************************************
* Name: stm32wb_alarm_callback
* Name: stm32_alarm_callback
*
* Description:
* This is the function that is called from the RTC driver when the alarm
@ -173,17 +173,17 @@ static struct stm32wb_lowerhalf_s g_rtc_lowerhalf =
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
static void stm32wb_alarm_callback(void *arg, unsigned int alarmid)
static void stm32_alarm_callback(void *arg, unsigned int alarmid)
{
struct stm32wb_lowerhalf_s *lower;
struct stm32wb_cbinfo_s *cbinfo;
struct stm32_lowerhalf_s *lower;
struct stm32_cbinfo_s *cbinfo;
rtc_alarm_callback_t cb;
void *priv;
DEBUGASSERT(arg != NULL);
DEBUGASSERT(alarmid == RTC_ALARMA || alarmid == RTC_ALARMB);
lower = (struct stm32wb_lowerhalf_s *)arg;
lower = (struct stm32_lowerhalf_s *)arg;
cbinfo = &lower->cbinfo[alarmid];
/* Sample and clear the callback information to minimize the window in
@ -206,7 +206,7 @@ static void stm32wb_alarm_callback(void *arg, unsigned int alarmid)
#endif /* CONFIG_RTC_ALARM */
/****************************************************************************
* Name: stm32wb_rdtime
* Name: stm32_rdtime
*
* Description:
* Implements the rdtime() method of the RTC driver interface
@ -221,13 +221,13 @@ static void stm32wb_alarm_callback(void *arg, unsigned int alarmid)
*
****************************************************************************/
static int stm32wb_rdtime(struct rtc_lowerhalf_s *lower,
static int stm32_rdtime(struct rtc_lowerhalf_s *lower,
struct rtc_time *rtctime)
{
struct stm32wb_lowerhalf_s *priv;
struct stm32_lowerhalf_s *priv;
int ret;
priv = (struct stm32wb_lowerhalf_s *)lower;
priv = (struct stm32_lowerhalf_s *)lower;
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
@ -246,7 +246,7 @@ static int stm32wb_rdtime(struct rtc_lowerhalf_s *lower,
}
/****************************************************************************
* Name: stm32wb_settime
* Name: stm32_settime
*
* Description:
* Implements the settime() method of the RTC driver interface
@ -261,13 +261,13 @@ static int stm32wb_rdtime(struct rtc_lowerhalf_s *lower,
*
****************************************************************************/
static int stm32wb_settime(struct rtc_lowerhalf_s *lower,
static int stm32_settime(struct rtc_lowerhalf_s *lower,
const struct rtc_time *rtctime)
{
struct stm32wb_lowerhalf_s *priv;
struct stm32_lowerhalf_s *priv;
int ret;
priv = (struct stm32wb_lowerhalf_s *)lower;
priv = (struct stm32_lowerhalf_s *)lower;
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
@ -279,14 +279,14 @@ static int stm32wb_settime(struct rtc_lowerhalf_s *lower,
* compatible with struct tm.
*/
ret = stm32wb_rtc_setdatetime((const struct tm *)rtctime);
ret = stm32_rtc_setdatetime((const struct tm *)rtctime);
nxmutex_unlock(&priv->devlock);
return ret;
}
/****************************************************************************
* Name: stm32wb_havesettime
* Name: stm32_havesettime
*
* Description:
* Implements the havesettime() method of the RTC driver interface
@ -299,13 +299,13 @@ static int stm32wb_settime(struct rtc_lowerhalf_s *lower,
*
****************************************************************************/
static bool stm32wb_havesettime(struct rtc_lowerhalf_s *lower)
static bool stm32_havesettime(struct rtc_lowerhalf_s *lower)
{
return stm32wb_rtc_havesettime();
return stm32_rtc_havesettime();
}
/****************************************************************************
* Name: stm32wb_setalarm
* Name: stm32_setalarm
*
* Description:
* Set a new alarm. This function implements the setalarm() method of the
@ -322,11 +322,11 @@ static bool stm32wb_havesettime(struct rtc_lowerhalf_s *lower)
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
static int stm32wb_setalarm(struct rtc_lowerhalf_s *lower,
static int stm32_setalarm(struct rtc_lowerhalf_s *lower,
const struct lower_setalarm_s *alarminfo)
{
struct stm32wb_lowerhalf_s *priv;
struct stm32wb_cbinfo_s *cbinfo;
struct stm32_lowerhalf_s *priv;
struct stm32_cbinfo_s *cbinfo;
struct alm_setalarm_s lowerinfo;
int ret;
@ -334,7 +334,7 @@ static int stm32wb_setalarm(struct rtc_lowerhalf_s *lower,
DEBUGASSERT(lower != NULL && alarminfo != NULL);
DEBUGASSERT(alarminfo->id == RTC_ALARMA || alarminfo->id == RTC_ALARMB);
priv = (struct stm32wb_lowerhalf_s *)lower;
priv = (struct stm32_lowerhalf_s *)lower;
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
@ -355,13 +355,13 @@ static int stm32wb_setalarm(struct rtc_lowerhalf_s *lower,
/* Set the alarm */
lowerinfo.as_id = alarminfo->id;
lowerinfo.as_cb = stm32wb_alarm_callback;
lowerinfo.as_cb = stm32_alarm_callback;
lowerinfo.as_arg = priv;
memcpy(&lowerinfo.as_time, &alarminfo->time, sizeof(struct tm));
/* And set the alarm */
ret = stm32wb_rtc_setalarm(&lowerinfo);
ret = stm32_rtc_setalarm(&lowerinfo);
if (ret < 0)
{
cbinfo->cb = NULL;
@ -375,7 +375,7 @@ static int stm32wb_setalarm(struct rtc_lowerhalf_s *lower,
#endif
/****************************************************************************
* Name: stm32wb_setrelative
* Name: stm32_setrelative
*
* Description:
* Set a new alarm relative to the current time. This function implements
@ -393,7 +393,7 @@ static int stm32wb_setalarm(struct rtc_lowerhalf_s *lower,
#ifdef CONFIG_RTC_ALARM
static int
stm32wb_setrelative(struct rtc_lowerhalf_s *lower,
stm32_setrelative(struct rtc_lowerhalf_s *lower,
const struct lower_setrelative_s *alarminfo)
{
struct lower_setalarm_s setalarm;
@ -439,7 +439,7 @@ stm32wb_setrelative(struct rtc_lowerhalf_s *lower,
setalarm.cb = alarminfo->cb;
setalarm.priv = alarminfo->priv;
ret = stm32wb_setalarm(lower, &setalarm);
ret = stm32_setalarm(lower, &setalarm);
}
leave_critical_section(flags);
@ -450,7 +450,7 @@ stm32wb_setrelative(struct rtc_lowerhalf_s *lower,
#endif
/****************************************************************************
* Name: stm32wb_cancelalarm
* Name: stm32_cancelalarm
*
* Description:
* Cancel the current alarm. This function implements the cancelalarm()
@ -467,15 +467,15 @@ stm32wb_setrelative(struct rtc_lowerhalf_s *lower,
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
static int stm32wb_cancelalarm(struct rtc_lowerhalf_s *lower, int alarmid)
static int stm32_cancelalarm(struct rtc_lowerhalf_s *lower, int alarmid)
{
struct stm32wb_lowerhalf_s *priv;
struct stm32wb_cbinfo_s *cbinfo;
struct stm32_lowerhalf_s *priv;
struct stm32_cbinfo_s *cbinfo;
int ret;
DEBUGASSERT(lower != NULL);
DEBUGASSERT(alarmid == RTC_ALARMA || alarmid == RTC_ALARMB);
priv = (struct stm32wb_lowerhalf_s *)lower;
priv = (struct stm32_lowerhalf_s *)lower;
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
@ -496,7 +496,7 @@ static int stm32wb_cancelalarm(struct rtc_lowerhalf_s *lower, int alarmid)
/* Then cancel the alarm */
ret = stm32wb_rtc_cancelalarm((enum alm_id_e)alarmid);
ret = stm32_rtc_cancelalarm((enum alm_id_e)alarmid);
}
nxmutex_unlock(&priv->devlock);
@ -505,7 +505,7 @@ static int stm32wb_cancelalarm(struct rtc_lowerhalf_s *lower, int alarmid)
#endif
/****************************************************************************
* Name: stm32wb_rdalarm
* Name: stm32_rdalarm
*
* Description:
* Query the RTC alarm.
@ -521,7 +521,7 @@ static int stm32wb_cancelalarm(struct rtc_lowerhalf_s *lower, int alarmid)
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
static int stm32wb_rdalarm(struct rtc_lowerhalf_s *lower,
static int stm32_rdalarm(struct rtc_lowerhalf_s *lower,
struct lower_rdalarm_s *alarminfo)
{
struct alm_rdalarm_s lowerinfo;
@ -542,7 +542,7 @@ static int stm32wb_rdalarm(struct rtc_lowerhalf_s *lower,
lowerinfo.ar_id = alarminfo->id;
lowerinfo.ar_time = alarminfo->time;
ret = stm32wb_rtc_rdalarm(&lowerinfo);
ret = stm32_rtc_rdalarm(&lowerinfo);
leave_critical_section(flags);
}
@ -552,7 +552,7 @@ static int stm32wb_rdalarm(struct rtc_lowerhalf_s *lower,
#endif
/****************************************************************************
* Name: stm32wb_periodic_callback
* Name: stm32_periodic_callback
*
* Description:
* This is the function that is called from the RTC driver when the
@ -568,14 +568,14 @@ static int stm32wb_rdalarm(struct rtc_lowerhalf_s *lower,
****************************************************************************/
#ifdef CONFIG_RTC_PERIODIC
static int stm32wb_periodic_callback(void)
static int stm32_periodic_callback(void)
{
struct stm32wb_lowerhalf_s *lower;
struct stm32_lowerhalf_s *lower;
struct lower_setperiodic_s *cbinfo;
rtc_wakeup_callback_t cb;
void *priv;
lower = (struct stm32wb_lowerhalf_s *)&g_rtc_lowerhalf;
lower = (struct stm32_lowerhalf_s *)&g_rtc_lowerhalf;
cbinfo = &lower->periodic;
cb = (rtc_wakeup_callback_t)cbinfo->cb;
@ -593,7 +593,7 @@ static int stm32wb_periodic_callback(void)
#endif /* CONFIG_RTC_PERIODIC */
/****************************************************************************
* Name: stm32wb_setperiodic
* Name: stm32_setperiodic
*
* Description:
* Set a new periodic wakeup relative to the current time, with a given
@ -612,14 +612,14 @@ static int stm32wb_periodic_callback(void)
#ifdef CONFIG_RTC_PERIODIC
static int
stm32wb_setperiodic(struct rtc_lowerhalf_s *lower,
stm32_setperiodic(struct rtc_lowerhalf_s *lower,
const struct lower_setperiodic_s *alarminfo)
{
struct stm32wb_lowerhalf_s *priv;
struct stm32_lowerhalf_s *priv;
int ret;
DEBUGASSERT(lower != NULL && alarminfo != NULL);
priv = (struct stm32wb_lowerhalf_s *)lower;
priv = (struct stm32_lowerhalf_s *)lower;
ret = nxmutex_lock(&priv->devlock);
if (ret < 0)
@ -628,8 +628,8 @@ stm32wb_setperiodic(struct rtc_lowerhalf_s *lower,
}
memcpy(&priv->periodic, alarminfo, sizeof(struct lower_setperiodic_s));
ret = stm32wb_rtc_setperiodic(&alarminfo->period,
stm32wb_periodic_callback);
ret = stm32_rtc_setperiodic(&alarminfo->period,
stm32_periodic_callback);
nxmutex_unlock(&priv->devlock);
return ret;
@ -637,7 +637,7 @@ stm32wb_setperiodic(struct rtc_lowerhalf_s *lower,
#endif
/****************************************************************************
* Name: stm32wb_cancelperiodic
* Name: stm32_cancelperiodic
*
* Description:
* Cancel the current periodic wakeup activity. This function implements
@ -653,13 +653,13 @@ stm32wb_setperiodic(struct rtc_lowerhalf_s *lower,
****************************************************************************/
#ifdef CONFIG_RTC_PERIODIC
static int stm32wb_cancelperiodic(struct rtc_lowerhalf_s *lower, int id)
static int stm32_cancelperiodic(struct rtc_lowerhalf_s *lower, int id)
{
struct stm32wb_lowerhalf_s *priv;
struct stm32_lowerhalf_s *priv;
int ret;
DEBUGASSERT(lower != NULL);
priv = (struct stm32wb_lowerhalf_s *)lower;
priv = (struct stm32_lowerhalf_s *)lower;
DEBUGASSERT(id == 0);
@ -669,7 +669,7 @@ static int stm32wb_cancelperiodic(struct rtc_lowerhalf_s *lower, int id)
return ret;
}
ret = stm32wb_rtc_cancelperiodic();
ret = stm32_rtc_cancelperiodic();
nxmutex_unlock(&priv->devlock);
return ret;
@ -681,7 +681,7 @@ static int stm32wb_cancelperiodic(struct rtc_lowerhalf_s *lower, int id)
****************************************************************************/
/****************************************************************************
* Name: stm32wb_rtc_lowerhalf
* Name: stm32_rtc_lowerhalf
*
* Description:
* Instantiate the RTC lower half driver for the STM32. General usage:
@ -690,7 +690,7 @@ static int stm32wb_cancelperiodic(struct rtc_lowerhalf_s *lower, int id)
* #include "stm32wb_rtc.h>
*
* struct rtc_lowerhalf_s *lower;
* lower = stm32wb_rtc_lowerhalf();
* lower = stm32_rtc_lowerhalf();
* rtc_initialize(0, lower);
*
* Input Parameters:
@ -702,7 +702,7 @@ static int stm32wb_cancelperiodic(struct rtc_lowerhalf_s *lower, int id)
*
****************************************************************************/
struct rtc_lowerhalf_s *stm32wb_rtc_lowerhalf(void)
struct rtc_lowerhalf_s *stm32_rtc_lowerhalf(void)
{
return (struct rtc_lowerhalf_s *)&g_rtc_lowerhalf;
}

574
arch/arm/src/stm32wb/stm32wb_serial.c
View file

File diff suppressed because it is too large Load diff

166
arch/arm/src/stm32wb/stm32wb_spi.c
View file

@ -21,22 +21,22 @@
****************************************************************************/
/****************************************************************************
* The external functions, stm32wb_spi1/2select and stm32wb_spi1/2status
* The external functions, stm32_spi1/2select and stm32_spi1/2status
* must be provided by board-specific logic. They are implementations of the
* select and status methods of the SPI interface defined by struct spi_ops_s
* (see include/nuttx/spi/spi.h). All other methods (including
* stm32wb_spibus_initialize()) are provided by common STM32 logic. To use
* stm32_spibus_initialize()) are provided by common STM32 logic. To use
* this common SPI logic on your board:
*
* 1. Provide logic in stm32wb_board_initialize() to configure SPI chip
* 1. Provide logic in stm32_board_initialize() to configure SPI chip
* select pins.
* 2. Provide stm32wb_spi1/2select() and stm32wb_spi1/2status()
* 2. Provide stm32_spi1/2select() and stm32_spi1/2status()
* functions in your board-specific logic. These functions will perform
* chip selection and status operations using GPIOs in the way your
* board is configured.
* 3. Add a calls to stm32wb_spibus_initialize() in your low level
* 3. Add a calls to stm32_spibus_initialize() in your low level
* application initialization logic
* 4. The handle returned by stm32wb_spibus_initialize() may then be used
* 4. The handle returned by stm32_spibus_initialize() may then be used
* to bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
@ -73,7 +73,7 @@
#include "arm_internal.h"
#include "chip.h"
#include "stm32wb.h"
#include "stm32.h"
#include "stm32wb_gpio.h"
#include "stm32wb_dma.h"
#include "stm32wb_spi.h"
@ -131,7 +131,7 @@
* Private Types
****************************************************************************/
struct stm32wb_spidev_s
struct stm32_spidev_s
{
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
uint32_t spibase; /* SPIn base address */
@ -172,34 +172,34 @@ struct stm32wb_spidev_s
/* Helpers */
static inline uint16_t spi_getreg(struct stm32wb_spidev_s *priv,
static inline uint16_t spi_getreg(struct stm32_spidev_s *priv,
uint8_t offset);
static inline void spi_putreg(struct stm32wb_spidev_s *priv,
static inline void spi_putreg(struct stm32_spidev_s *priv,
uint8_t offset, uint16_t value);
static inline uint16_t spi_readword(struct stm32wb_spidev_s *priv);
static inline void spi_writeword(struct stm32wb_spidev_s *priv,
static inline uint16_t spi_readword(struct stm32_spidev_s *priv);
static inline void spi_writeword(struct stm32_spidev_s *priv,
uint16_t byte);
static inline bool spi_16bitmode(struct stm32wb_spidev_s *priv);
static inline bool spi_16bitmode(struct stm32_spidev_s *priv);
/* DMA support */
#ifdef CONFIG_STM32WB_SPI_DMA
static int spi_dmarxwait(struct stm32wb_spidev_s *priv);
static int spi_dmatxwait(struct stm32wb_spidev_s *priv);
static inline void spi_dmarxwakeup(struct stm32wb_spidev_s *priv);
static inline void spi_dmatxwakeup(struct stm32wb_spidev_s *priv);
static int spi_dmarxwait(struct stm32_spidev_s *priv);
static int spi_dmatxwait(struct stm32_spidev_s *priv);
static inline void spi_dmarxwakeup(struct stm32_spidev_s *priv);
static inline void spi_dmatxwakeup(struct stm32_spidev_s *priv);
static void spi_dmarxcallback(DMA_HANDLE handle, uint8_t isr,
void *arg);
static void spi_dmatxcallback(DMA_HANDLE handle, uint8_t isr,
void *arg);
static void spi_dmarxsetup(struct stm32wb_spidev_s *priv,
static void spi_dmarxsetup(struct stm32_spidev_s *priv,
void *rxbuffer, void *rxdummy,
size_t nwords);
static void spi_dmatxsetup(struct stm32wb_spidev_s *priv,
static void spi_dmatxsetup(struct stm32_spidev_s *priv,
const void *txbuffer,
const void *txdummy, size_t nwords);
static inline void spi_dmarxstart(struct stm32wb_spidev_s *priv);
static inline void spi_dmatxstart(struct stm32wb_spidev_s *priv);
static inline void spi_dmarxstart(struct stm32_spidev_s *priv);
static inline void spi_dmatxstart(struct stm32_spidev_s *priv);
#endif
/* SPI methods */
@ -230,7 +230,7 @@ static void spi_recvblock(struct spi_dev_s *dev,
/* Initialization */
static void spi_bus_initialize(struct stm32wb_spidev_s *priv);
static void spi_bus_initialize(struct stm32_spidev_s *priv);
/* PM interface */
@ -247,16 +247,16 @@ static int spi_pm_prepare(struct pm_callback_s *cb, int domain,
static const struct spi_ops_s g_spi1ops =
{
.lock = spi_lock,
.select = stm32wb_spi1select,
.select = stm32_spi1select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
.setbits = spi_setbits,
#ifdef CONFIG_SPI_HWFEATURES
.hwfeatures = spi_hwfeatures,
#endif
.status = stm32wb_spi1status,
.status = stm32_spi1status,
#ifdef CONFIG_SPI_CMDDATA
.cmddata = stm32wb_spi1cmddata,
.cmddata = stm32_spi1cmddata,
#endif
.send = spi_send,
#ifdef CONFIG_SPI_EXCHANGE
@ -269,13 +269,13 @@ static const struct spi_ops_s g_spi1ops =
.trigger = spi_trigger,
#endif
#ifdef CONFIG_SPI_CALLBACK
.registercallback = stm32wb_spi1register, /* Provided externally */
.registercallback = stm32_spi1register, /* Provided externally */
#else
.registercallback = 0, /* Not implemented */
#endif
};
static struct stm32wb_spidev_s g_spi1dev =
static struct stm32_spidev_s g_spi1dev =
{
.spidev =
{
@ -305,16 +305,16 @@ static struct stm32wb_spidev_s g_spi1dev =
static const struct spi_ops_s g_spi2ops =
{
.lock = spi_lock,
.select = stm32wb_spi2select,
.select = stm32_spi2select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
.setbits = spi_setbits,
#ifdef CONFIG_SPI_HWFEATURES
.hwfeatures = spi_hwfeatures,
#endif
.status = stm32wb_spi2status,
.status = stm32_spi2status,
#ifdef CONFIG_SPI_CMDDATA
.cmddata = stm32wb_spi2cmddata,
.cmddata = stm32_spi2cmddata,
#endif
.send = spi_send,
#ifdef CONFIG_SPI_EXCHANGE
@ -327,13 +327,13 @@ static const struct spi_ops_s g_spi2ops =
.trigger = spi_trigger,
#endif
#ifdef CONFIG_SPI_CALLBACK
.registercallback = stm32wb_spi2register, /* provided externally */
.registercallback = stm32_spi2register, /* provided externally */
#else
.registercallback = 0, /* not implemented */
#endif
};
static struct stm32wb_spidev_s g_spi2dev =
static struct stm32_spidev_s g_spi2dev =
{
.spidev =
{
@ -376,7 +376,7 @@ static struct stm32wb_spidev_s g_spi2dev =
*
****************************************************************************/
static inline uint16_t spi_getreg(struct stm32wb_spidev_s *priv,
static inline uint16_t spi_getreg(struct stm32_spidev_s *priv,
uint8_t offset)
{
return getreg16(priv->spibase + offset);
@ -398,7 +398,7 @@ static inline uint16_t spi_getreg(struct stm32wb_spidev_s *priv,
*
****************************************************************************/
static inline void spi_putreg(struct stm32wb_spidev_s *priv,
static inline void spi_putreg(struct stm32_spidev_s *priv,
uint8_t offset, uint16_t value)
{
putreg16(value, priv->spibase + offset);
@ -419,7 +419,7 @@ static inline void spi_putreg(struct stm32wb_spidev_s *priv,
*
****************************************************************************/
static inline uint8_t spi_getreg8(struct stm32wb_spidev_s *priv,
static inline uint8_t spi_getreg8(struct stm32_spidev_s *priv,
uint8_t offset)
{
return getreg8(priv->spibase + offset);
@ -438,7 +438,7 @@ static inline uint8_t spi_getreg8(struct stm32wb_spidev_s *priv,
*
****************************************************************************/
static inline void spi_putreg8(struct stm32wb_spidev_s *priv,
static inline void spi_putreg8(struct stm32_spidev_s *priv,
uint8_t offset, uint8_t value)
{
putreg8(value, priv->spibase + offset);
@ -458,7 +458,7 @@ static inline void spi_putreg8(struct stm32wb_spidev_s *priv,
*
****************************************************************************/
static inline uint16_t spi_readword(struct stm32wb_spidev_s *priv)
static inline uint16_t spi_readword(struct stm32_spidev_s *priv)
{
/* Wait until the receive buffer is not empty */
@ -483,7 +483,7 @@ static inline uint16_t spi_readword(struct stm32wb_spidev_s *priv)
*
****************************************************************************/
static inline uint8_t spi_readbyte(struct stm32wb_spidev_s *priv)
static inline uint8_t spi_readbyte(struct stm32_spidev_s *priv)
{
/* Wait until the receive buffer is not empty */
@ -509,7 +509,7 @@ static inline uint8_t spi_readbyte(struct stm32wb_spidev_s *priv)
*
****************************************************************************/
static inline void spi_writeword(struct stm32wb_spidev_s *priv,
static inline void spi_writeword(struct stm32_spidev_s *priv,
uint16_t word)
{
/* Wait until the transmit buffer is empty */
@ -536,7 +536,7 @@ static inline void spi_writeword(struct stm32wb_spidev_s *priv,
*
****************************************************************************/
static inline void spi_writebyte(struct stm32wb_spidev_s *priv,
static inline void spi_writebyte(struct stm32_spidev_s *priv,
uint8_t byte)
{
/* Wait until the transmit buffer is empty */
@ -562,7 +562,7 @@ static inline void spi_writebyte(struct stm32wb_spidev_s *priv,
*
****************************************************************************/
static inline bool spi_16bitmode(struct stm32wb_spidev_s *priv)
static inline bool spi_16bitmode(struct stm32_spidev_s *priv)
{
return (priv->nbits > 8);
}
@ -576,7 +576,7 @@ static inline bool spi_16bitmode(struct stm32wb_spidev_s *priv)
****************************************************************************/
#ifdef CONFIG_STM32WB_SPI_DMA
static int spi_dmarxwait(struct stm32wb_spidev_s *priv)
static int spi_dmarxwait(struct stm32_spidev_s *priv)
{
int ret;
@ -609,7 +609,7 @@ static int spi_dmarxwait(struct stm32wb_spidev_s *priv)
****************************************************************************/
#ifdef CONFIG_STM32WB_SPI_DMA
static int spi_dmatxwait(struct stm32wb_spidev_s *priv)
static int spi_dmatxwait(struct stm32_spidev_s *priv)
{
int ret;
@ -642,7 +642,7 @@ static int spi_dmatxwait(struct stm32wb_spidev_s *priv)
****************************************************************************/
#ifdef CONFIG_STM32WB_SPI_DMA
static inline void spi_dmarxwakeup(struct stm32wb_spidev_s *priv)
static inline void spi_dmarxwakeup(struct stm32_spidev_s *priv)
{
nxsem_post(&priv->rxsem);
}
@ -657,7 +657,7 @@ static inline void spi_dmarxwakeup(struct stm32wb_spidev_s *priv)
****************************************************************************/
#ifdef CONFIG_STM32WB_SPI_DMA
static inline void spi_dmatxwakeup(struct stm32wb_spidev_s *priv)
static inline void spi_dmatxwakeup(struct stm32_spidev_s *priv)
{
nxsem_post(&priv->txsem);
}
@ -674,7 +674,7 @@ static inline void spi_dmatxwakeup(struct stm32wb_spidev_s *priv)
#ifdef CONFIG_STM32WB_SPI_DMA
static void spi_dmarxcallback(DMA_HANDLE handle, uint8_t isr, void *arg)
{
struct stm32wb_spidev_s *priv = (struct stm32wb_spidev_s *)arg;
struct stm32_spidev_s *priv = (struct stm32_spidev_s *)arg;
/* Wake-up the SPI driver */
@ -694,7 +694,7 @@ static void spi_dmarxcallback(DMA_HANDLE handle, uint8_t isr, void *arg)
#ifdef CONFIG_STM32WB_SPI_DMA
static void spi_dmatxcallback(DMA_HANDLE handle, uint8_t isr, void *arg)
{
struct stm32wb_spidev_s *priv = (struct stm32wb_spidev_s *)arg;
struct stm32_spidev_s *priv = (struct stm32_spidev_s *)arg;
/* Wake-up the SPI driver */
@ -712,7 +712,7 @@ static void spi_dmatxcallback(DMA_HANDLE handle, uint8_t isr, void *arg)
****************************************************************************/
#ifdef CONFIG_STM32WB_SPI_DMA
static void spi_dmarxsetup(struct stm32wb_spidev_s *priv,
static void spi_dmarxsetup(struct stm32_spidev_s *priv,
void *rxbuffer, void *rxdummy, size_t nwords)
{
/* 8- or 16-bit mode? */
@ -748,7 +748,7 @@ static void spi_dmarxsetup(struct stm32wb_spidev_s *priv,
/* Configure the RX DMA */
stm32wb_dmasetup(priv->rxdma, priv->spibase + STM32_SPI_DR_OFFSET,
stm32_dmasetup(priv->rxdma, priv->spibase + STM32_SPI_DR_OFFSET,
(uint32_t)rxbuffer, nwords, priv->rxccr);
}
#endif
@ -762,7 +762,7 @@ static void spi_dmarxsetup(struct stm32wb_spidev_s *priv,
****************************************************************************/
#ifdef CONFIG_STM32WB_SPI_DMA
static void spi_dmatxsetup(struct stm32wb_spidev_s *priv,
static void spi_dmatxsetup(struct stm32_spidev_s *priv,
const void *txbuffer, const void *txdummy,
size_t nwords)
{
@ -799,7 +799,7 @@ static void spi_dmatxsetup(struct stm32wb_spidev_s *priv,
/* Setup the TX DMA */
stm32wb_dmasetup(priv->txdma, priv->spibase + STM32_SPI_DR_OFFSET,
stm32_dmasetup(priv->txdma, priv->spibase + STM32_SPI_DR_OFFSET,
(uint32_t)txbuffer, nwords, priv->txccr);
}
#endif
@ -813,10 +813,10 @@ static void spi_dmatxsetup(struct stm32wb_spidev_s *priv,
****************************************************************************/
#ifdef CONFIG_STM32WB_SPI_DMA
static inline void spi_dmarxstart(struct stm32wb_spidev_s *priv)
static inline void spi_dmarxstart(struct stm32_spidev_s *priv)
{
priv->rxresult = 0;
stm32wb_dmastart(priv->rxdma, spi_dmarxcallback, priv, false);
stm32_dmastart(priv->rxdma, spi_dmarxcallback, priv, false);
}
#endif
@ -829,10 +829,10 @@ static inline void spi_dmarxstart(struct stm32wb_spidev_s *priv)
****************************************************************************/
#ifdef CONFIG_STM32WB_SPI_DMA
static inline void spi_dmatxstart(struct stm32wb_spidev_s *priv)
static inline void spi_dmatxstart(struct stm32_spidev_s *priv)
{
priv->txresult = 0;
stm32wb_dmastart(priv->txdma, spi_dmatxcallback, priv, false);
stm32_dmastart(priv->txdma, spi_dmatxcallback, priv, false);
}
#endif
@ -852,7 +852,7 @@ static inline void spi_dmatxstart(struct stm32wb_spidev_s *priv)
*
****************************************************************************/
static void spi_modifycr(uint32_t addr, struct stm32wb_spidev_s *priv,
static void spi_modifycr(uint32_t addr, struct stm32_spidev_s *priv,
uint16_t setbits, uint16_t clrbits)
{
uint16_t cr;
@ -886,7 +886,7 @@ static void spi_modifycr(uint32_t addr, struct stm32wb_spidev_s *priv,
static int spi_lock(struct spi_dev_s *dev, bool lock)
{
struct stm32wb_spidev_s *priv = (struct stm32wb_spidev_s *)dev;
struct stm32_spidev_s *priv = (struct stm32_spidev_s *)dev;
int ret;
if (lock)
@ -918,7 +918,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
{
struct stm32wb_spidev_s *priv = (struct stm32wb_spidev_s *)dev;
struct stm32_spidev_s *priv = (struct stm32_spidev_s *)dev;
uint16_t setbits;
uint32_t actual;
@ -1026,7 +1026,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
{
struct stm32wb_spidev_s *priv = (struct stm32wb_spidev_s *)dev;
struct stm32_spidev_s *priv = (struct stm32_spidev_s *)dev;
uint16_t setbits;
uint16_t clrbits;
@ -1094,7 +1094,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
static void spi_setbits(struct spi_dev_s *dev, int nbits)
{
struct stm32wb_spidev_s *priv = (struct stm32wb_spidev_s *)dev;
struct stm32_spidev_s *priv = (struct stm32_spidev_s *)dev;
uint16_t setbits;
uint16_t clrbits;
@ -1162,7 +1162,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
static int spi_hwfeatures(struct spi_dev_s *dev, spi_hwfeatures_t features)
{
#if defined(CONFIG_SPI_BITORDER) || defined(CONFIG_SPI_TRIGGER)
struct stm32wb_spidev_s *priv = (struct stm32wb_spidev_s *)dev;
struct stm32_spidev_s *priv = (struct stm32_spidev_s *)dev;
#endif
#ifdef CONFIG_SPI_BITORDER
@ -1226,7 +1226,7 @@ static int spi_hwfeatures(struct spi_dev_s *dev, spi_hwfeatures_t features)
static uint32_t spi_send(struct spi_dev_s *dev, uint32_t wd)
{
struct stm32wb_spidev_s *priv = (struct stm32wb_spidev_s *)dev;
struct stm32_spidev_s *priv = (struct stm32_spidev_s *)dev;
uint32_t regval;
uint32_t ret;
@ -1300,7 +1300,7 @@ static void spi_exchange_nodma(struct spi_dev_s *dev,
size_t nwords)
#endif
{
struct stm32wb_spidev_s *priv = (struct stm32wb_spidev_s *)dev;
struct stm32_spidev_s *priv = (struct stm32_spidev_s *)dev;
DEBUGASSERT(priv && priv->spibase);
spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
@ -1401,14 +1401,14 @@ static void spi_exchange_nodma(struct spi_dev_s *dev,
static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
void *rxbuffer, size_t nwords)
{
struct stm32wb_spidev_s *priv = (struct stm32wb_spidev_s *)dev;
struct stm32_spidev_s *priv = (struct stm32_spidev_s *)dev;
int ret;
#ifdef CONFIG_STM32WB_DMACAPABLE
if ((txbuffer != NULL &&
!stm32wb_dmacapable((uint32_t)txbuffer, nwords, priv->txccr)) ||
!stm32_dmacapable((uint32_t)txbuffer, nwords, priv->txccr)) ||
(rxbuffer != NULL &&
!stm32wb_dmacapable((uint32_t)rxbuffer, nwords, priv->rxccr)))
!stm32_dmacapable((uint32_t)rxbuffer, nwords, priv->rxccr)))
{
/* Unsupported memory region, fall back to non-DMA method. */
@ -1596,8 +1596,8 @@ static void spi_recvblock(struct spi_dev_s *dev, void *rxbuffer,
static int spi_pm_prepare(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate)
{
struct stm32wb_spidev_s *priv = (struct stm32wb_spidev_s *)((char *)cb -
offsetof(struct stm32wb_spidev_s, pm_cb));
struct stm32_spidev_s *priv = (struct stm32_spidev_s *)((char *)cb -
offsetof(struct stm32_spidev_s, pm_cb));
/* Logic to prepare for a reduced power state goes here. */
@ -1647,7 +1647,7 @@ static int spi_pm_prepare(struct pm_callback_s *cb, int domain,
*
****************************************************************************/
static void spi_bus_initialize(struct stm32wb_spidev_s *priv)
static void spi_bus_initialize(struct stm32_spidev_s *priv)
{
uint16_t setbits;
uint16_t clrbits;
@ -1689,16 +1689,16 @@ static void spi_bus_initialize(struct stm32wb_spidev_s *priv)
spi_putreg(priv, STM32_SPI_CRCPR_OFFSET, 7);
#ifdef CONFIG_STM32WB_SPI_DMA
/* Get DMA channels. NOTE: stm32wb_dmachannel() will always assign the DMA
* channel. If the channel is not available, then stm32wb_dmachannel()
/* Get DMA channels. NOTE: stm32_dmachannel() will always assign the DMA
* channel. If the channel is not available, then stm32_dmachannel()
* will block and wait until the channel becomes available. WARNING: If
* you have another device sharing a DMA channel with SPI and the code
* never releases that channel, then the call to stm32wb_dmachannel() will
* never releases that channel, then the call to stm32_dmachannel() will
* hang forever in this function! Don't let your design do that!
*/
priv->rxdma = stm32wb_dmachannel(priv->rxch);
priv->txdma = stm32wb_dmachannel(priv->txch);
priv->rxdma = stm32_dmachannel(priv->rxch);
priv->txdma = stm32_dmachannel(priv->txch);
DEBUGASSERT(priv->rxdma && priv->txdma);
spi_modifycr(STM32_SPI_CR2_OFFSET, priv,
@ -1723,7 +1723,7 @@ static void spi_bus_initialize(struct stm32wb_spidev_s *priv)
****************************************************************************/
/****************************************************************************
* Name: stm32wb_spibus_initialize
* Name: stm32_spibus_initialize
*
* Description:
* Initialize the selected SPI bus
@ -1736,9 +1736,9 @@ static void spi_bus_initialize(struct stm32wb_spidev_s *priv)
*
****************************************************************************/
struct spi_dev_s *stm32wb_spibus_initialize(int bus)
struct spi_dev_s *stm32_spibus_initialize(int bus)
{
struct stm32wb_spidev_s *priv = NULL;
struct stm32_spidev_s *priv = NULL;
irqstate_t flags = enter_critical_section();
@ -1755,9 +1755,9 @@ struct spi_dev_s *stm32wb_spibus_initialize(int bus)
{
/* Configure SPI1 pins: SCK, MISO, and MOSI */
stm32wb_configgpio(GPIO_SPI1_SCK);
stm32wb_configgpio(GPIO_SPI1_MISO);
stm32wb_configgpio(GPIO_SPI1_MOSI);
stm32_configgpio(GPIO_SPI1_SCK);
stm32_configgpio(GPIO_SPI1_MISO);
stm32_configgpio(GPIO_SPI1_MOSI);
/* Set up default configuration: Master, 8-bit, etc. */
@ -1780,9 +1780,9 @@ struct spi_dev_s *stm32wb_spibus_initialize(int bus)
{
/* Configure SPI2 pins: SCK, MISO, and MOSI */
stm32wb_configgpio(GPIO_SPI2_SCK);
stm32wb_configgpio(GPIO_SPI2_MISO);
stm32wb_configgpio(GPIO_SPI2_MOSI);
stm32_configgpio(GPIO_SPI2_SCK);
stm32_configgpio(GPIO_SPI2_MISO);
stm32_configgpio(GPIO_SPI2_MOSI);
/* Set up default configuration: Master, 8-bit, etc. */

40
arch/arm/src/stm32wb/stm32wb_spi.h
View file

@ -58,7 +58,7 @@ struct spi_dev_s;
****************************************************************************/
/****************************************************************************
* Name: stm32wb_spibus_initialize
* Name: stm32_spibus_initialize
*
* Description:
* Initialize the selected SPI bus
@ -71,33 +71,33 @@ struct spi_dev_s;
*
****************************************************************************/
struct spi_dev_s *stm32wb_spibus_initialize(int bus);
struct spi_dev_s *stm32_spibus_initialize(int bus);
/****************************************************************************
* Name: stm32wb_spi1/2/...select and stm32wb_spi1/2/...status
* Name: stm32_spi1/2/...select and stm32_spi1/2/...status
*
* Description:
* The external functions, stm32wb_spi1/2/...select,
* stm32wb_spi1/2/...status, and stm32wb_spi1/2/...cmddata must be
* The external functions, stm32_spi1/2/...select,
* stm32_spi1/2/...status, and stm32_spi1/2/...cmddata must be
* provided by board-specific logic. These are implementations of the
* select, status, and cmddata methods of the SPI interface defined by
* struct spi_ops_s (see include/nuttx/spi/spi.h). All other methods
* (including stm32wb_spibus_initialize()) are provided by common
* (including stm32_spibus_initialize()) are provided by common
* STM32 logic. To use this common SPI logic on your board:
*
* 1. Provide logic in stm32wb_board_initialize() to configure SPI chip
* 1. Provide logic in stm32_board_initialize() to configure SPI chip
* select pins.
* 2. Provide stm32wb_spi1/2/...select() and stm32wb_spi1/2/...status()
* 2. Provide stm32_spi1/2/...select() and stm32_spi1/2/...status()
* functions in your board-specific logic. These functions will perform
* chip selection and status operations using GPIOs in the way your
* board is configured.
* 3. If CONFIG_SPI_CMDDATA is defined in your NuttX configuration file,
* then provide stm32wb_spi1/2/...cmddata() functions in your
* then provide stm32_spi1/2/...cmddata() functions in your
* board-specific logic. These functions will perform cmd/data selection
* operations using GPIOs in the way your board is configured.
* 4. Add a calls to stm32wb_spibus_initialize() in your low level
* 4. Add a calls to stm32_spibus_initialize() in your low level
* application initialization logic
* 5. The handle returned by stm32wb_spibus_initialize() may then be used
* 5. The handle returned by stm32_spibus_initialize() may then be used
* to bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
@ -105,21 +105,21 @@ struct spi_dev_s *stm32wb_spibus_initialize(int bus);
****************************************************************************/
#ifdef CONFIG_STM32WB_SPI1
void stm32wb_spi1select(struct spi_dev_s *dev,
void stm32_spi1select(struct spi_dev_s *dev,
uint32_t devid, bool selected);
uint8_t stm32wb_spi1status(struct spi_dev_s *dev, uint32_t devid);
int stm32wb_spi1cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd);
uint8_t stm32_spi1status(struct spi_dev_s *dev, uint32_t devid);
int stm32_spi1cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_STM32WB_SPI2
void stm32wb_spi2select(struct spi_dev_s *dev,
void stm32_spi2select(struct spi_dev_s *dev,
uint32_t devid, bool selected);
uint8_t stm32wb_spi2status(struct spi_dev_s *dev, uint32_t devid);
int stm32wb_spi2cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd);
uint8_t stm32_spi2status(struct spi_dev_s *dev, uint32_t devid);
int stm32_spi2cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
/****************************************************************************
* Name: stm32wb_spi1/2/...register
* Name: stm32_spi1/2/...register
*
* Description:
* If the board supports a card detect callback to inform the SPI-based
@ -140,12 +140,12 @@ int stm32wb_spi2cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd);
#ifdef CONFIG_SPI_CALLBACK
#ifdef CONFIG_STM32WB_SPI1
int stm32wb_spi1register(struct spi_dev_s *dev, spi_mediachange_t callback,
int stm32_spi1register(struct spi_dev_s *dev, spi_mediachange_t callback,
void *arg);
#endif
#ifdef CONFIG_STM32WB_SPI2
int stm32wb_spi2register(struct spi_dev_s *dev, spi_mediachange_t callback,
int stm32_spi2register(struct spi_dev_s *dev, spi_mediachange_t callback,
void *arg);
#endif
#endif

12
arch/arm/src/stm32wb/stm32wb_start.c
View file

@ -164,15 +164,15 @@ void __start(void)
/* Configure the UART so that we can get debug output as soon as possible */
stm32wb_clockconfig();
stm32_clockconfig();
#ifdef CONFIG_STM32WB_IPCC
stm32wb_ipccreset();
stm32_ipccreset();
#endif
arm_fpuconfig();
/* Todo: stm32wb_lowsetup(); */
/* Todo: stm32_lowsetup(); */
stm32wb_gpioinit();
stm32_gpioinit();
showprogress('A');
/* Clear .bss. We'll do this inline (vs. calling memset) just to be
@ -223,13 +223,13 @@ void __start(void)
*/
#ifdef CONFIG_BUILD_PROTECTED
stm32wb_userspace();
stm32_userspace();
showprogress('E');
#endif
/* Initialize onboard resources */
stm32wb_board_initialize();
stm32_board_initialize();
showprogress('F');
/* Then start NuttX */

4
arch/arm/src/stm32wb/stm32wb_start.h
View file

@ -32,7 +32,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_board_initialize
* Name: stm32_board_initialize
*
* Description:
* All STM32WB architectures must provide the following entry point. This
@ -42,6 +42,6 @@
*
****************************************************************************/
void stm32wb_board_initialize(void);
void stm32_board_initialize(void);
#endif /* __ARCH_ARM_SRC_STM32WB_STM32WB_START_H */

94
arch/arm/src/stm32wb/stm32wb_tickless.c
View file

@ -52,7 +52,7 @@
* There are two interrupts generated from our timer, the overflow interrupt
* which drives the timing handler and the capture/compare interrupt which
* drives the interval handler. There are some low level timer control
* functions implemented here because the API of stm32wb_tim.c does not
* functions implemented here because the API of stm32_tim.c does not
* provide adequate control over capture/compare interrupts.
*
****************************************************************************/
@ -96,13 +96,13 @@
* Private Types
****************************************************************************/
struct stm32wb_tickless_s
struct stm32_tickless_s
{
uint8_t timer; /* The timer/counter in use */
uint8_t channel; /* The timer channel to use
* for intervals */
struct stm32wb_tim_dev_s *tch; /* Pointer returned by
* stm32wb_tim_init() */
struct stm32_tim_dev_s *tch; /* Pointer returned by
* stm32_tim_init() */
uint32_t frequency;
uint32_t overflow; /* Timer counter overflow */
volatile bool pending; /* True: pending task */
@ -114,93 +114,93 @@ struct stm32wb_tickless_s
* Private Data
****************************************************************************/
static struct stm32wb_tickless_s g_tickless;
static struct stm32_tickless_s g_tickless;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32wb_getreg16
* Name: stm32_getreg16
*
* Description:
* Get a 16-bit register value by offset
*
****************************************************************************/
static inline uint16_t stm32wb_getreg16(uint8_t offset)
static inline uint16_t stm32_getreg16(uint8_t offset)
{
return getreg16(g_tickless.base + offset);
}
/****************************************************************************
* Name: stm32wb_putreg16
* Name: stm32_putreg16
*
* Description:
* Put a 16-bit register value by offset
*
****************************************************************************/
static inline void stm32wb_putreg16(uint8_t offset, uint16_t value)
static inline void stm32_putreg16(uint8_t offset, uint16_t value)
{
putreg16(value, g_tickless.base + offset);
}
/****************************************************************************
* Name: stm32wb_modifyreg16
* Name: stm32_modifyreg16
*
* Description:
* Modify a 16-bit register value by offset
*
****************************************************************************/
static inline void stm32wb_modifyreg16(uint8_t offset, uint16_t clearbits,
static inline void stm32_modifyreg16(uint8_t offset, uint16_t clearbits,
uint16_t setbits)
{
modifyreg16(g_tickless.base + offset, clearbits, setbits);
}
/****************************************************************************
* Name: stm32wb_tickless_enableint
* Name: stm32_tickless_enableint
****************************************************************************/
static inline void stm32wb_tickless_enableint(int channel)
static inline void stm32_tickless_enableint(int channel)
{
stm32wb_modifyreg16(STM32_TIM_DIER_OFFSET, 0, 1 << channel);
stm32_modifyreg16(STM32_TIM_DIER_OFFSET, 0, 1 << channel);
}
/****************************************************************************
* Name: stm32wb_tickless_disableint
* Name: stm32_tickless_disableint
****************************************************************************/
static inline void stm32wb_tickless_disableint(int channel)
static inline void stm32_tickless_disableint(int channel)
{
stm32wb_modifyreg16(STM32_TIM_DIER_OFFSET, 1 << channel, 0);
stm32_modifyreg16(STM32_TIM_DIER_OFFSET, 1 << channel, 0);
}
/****************************************************************************
* Name: stm32wb_tickless_ackint
* Name: stm32_tickless_ackint
****************************************************************************/
static inline void stm32wb_tickless_ackint(int channel)
static inline void stm32_tickless_ackint(int channel)
{
stm32wb_putreg16(STM32_TIM_SR_OFFSET, ~(1 << channel));
stm32_putreg16(STM32_TIM_SR_OFFSET, ~(1 << channel));
}
/****************************************************************************
* Name: stm32wb_tickless_getint
* Name: stm32_tickless_getint
****************************************************************************/
static inline uint16_t stm32wb_tickless_getint(void)
static inline uint16_t stm32_tickless_getint(void)
{
return stm32wb_getreg16(STM32_TIM_SR_OFFSET);
return stm32_getreg16(STM32_TIM_SR_OFFSET);
}
/****************************************************************************
* Name: stm32wb_tickless_setchannel
* Name: stm32_tickless_setchannel
****************************************************************************/
static int stm32wb_tickless_setchannel(uint8_t channel)
static int stm32_tickless_setchannel(uint8_t channel)
{
uint16_t ccmr_orig = 0;
uint16_t ccmr_val = 0;
@ -216,7 +216,7 @@ static int stm32wb_tickless_setchannel(uint8_t channel)
/* Assume that channel is disabled and polarity is active high */
ccer_val = stm32wb_getreg16(STM32_TIM_CCER_OFFSET);
ccer_val = stm32_getreg16(STM32_TIM_CCER_OFFSET);
ccer_val &= ~(GTIM_CCER_CCXE(channel) | GTIM_CCER_CCXP(channel));
/* Frozen mode because we don't want to change the GPIO, preload register
@ -234,17 +234,17 @@ static int stm32wb_tickless_setchannel(uint8_t channel)
ccmr_offset = STM32_TIM_CCMR2_OFFSET;
}
ccmr_orig = stm32wb_getreg16(ccmr_offset);
ccmr_orig = stm32_getreg16(ccmr_offset);
ccmr_orig &= ~(GTIM_CCMR_OCXM_MASK(channel) | GTIM_CCMR_OCXPE(channel));
ccmr_orig |= ccmr_val;
stm32wb_putreg16(ccmr_offset, ccmr_orig);
stm32wb_putreg16(STM32_TIM_CCER_OFFSET, ccer_val);
stm32_putreg16(ccmr_offset, ccmr_orig);
stm32_putreg16(STM32_TIM_CCER_OFFSET, ccer_val);
return OK;
}
/****************************************************************************
* Name: stm32wb_interval_handler
* Name: stm32_interval_handler
*
* Description:
* Called when the timer counter matches the compare register
@ -261,14 +261,14 @@ static int stm32wb_tickless_setchannel(uint8_t channel)
*
****************************************************************************/
static void stm32wb_interval_handler(void)
static void stm32_interval_handler(void)
{
tmrinfo("Expired...\n");
/* Disable the compare interrupt now. */
stm32wb_tickless_disableint(g_tickless.channel);
stm32wb_tickless_ackint(g_tickless.channel);
stm32_tickless_disableint(g_tickless.channel);
stm32_tickless_ackint(g_tickless.channel);
g_tickless.pending = false;
@ -276,7 +276,7 @@ static void stm32wb_interval_handler(void)
}
/****************************************************************************
* Name: stm32wb_timing_handler
* Name: stm32_timing_handler
*
* Description:
* Timer interrupt callback. When the freerun timer counter overflows,
@ -290,7 +290,7 @@ static void stm32wb_interval_handler(void)
*
****************************************************************************/
static void stm32wb_timing_handler(void)
static void stm32_timing_handler(void)
{
g_tickless.overflow++;
@ -298,7 +298,7 @@ static void stm32wb_timing_handler(void)
}
/****************************************************************************
* Name: stm32wb_tickless_handler
* Name: stm32_tickless_handler
*
* Description:
* Generic interrupt handler for this timer. It checks the source of the
@ -312,18 +312,18 @@ static void stm32wb_timing_handler(void)
*
****************************************************************************/
static int stm32wb_tickless_handler(int irq, void *context, void *arg)
static int stm32_tickless_handler(int irq, void *context, void *arg)
{
int interrupt_flags = stm32wb_tickless_getint();
int interrupt_flags = stm32_tickless_getint();
if (interrupt_flags & GTIM_SR_UIF)
{
stm32wb_timing_handler();
stm32_timing_handler();
}
if (interrupt_flags & (1 << g_tickless.channel))
{
stm32wb_interval_handler();
stm32_interval_handler();
}
return OK;
@ -402,7 +402,7 @@ void up_timer_initialize(void)
tmrinfo("timer=%d channel=%d frequency=%lu Hz\n",
g_tickless.timer, g_tickless.channel, g_tickless.frequency);
g_tickless.tch = stm32wb_tim_init(g_tickless.timer);
g_tickless.tch = stm32_tim_init(g_tickless.timer);
if (!g_tickless.tch)
{
tmrerr("ERROR: Failed to allocate TIM%d\n", g_tickless.timer);
@ -413,7 +413,7 @@ void up_timer_initialize(void)
/* Set up to receive the callback when the counter overflow occurs */
STM32_TIM_SETISR(g_tickless.tch, stm32wb_tickless_handler, NULL, 0);
STM32_TIM_SETISR(g_tickless.tch, stm32_tickless_handler, NULL, 0);
/* Initialize interval to zero */
@ -421,7 +421,7 @@ void up_timer_initialize(void)
/* Setup compare channel for the interval timing */
stm32wb_tickless_setchannel(g_tickless.channel);
stm32_tickless_setchannel(g_tickless.channel);
/* Set timer period */
@ -493,7 +493,7 @@ int up_timer_gettime(struct timespec *ts)
DEBUGASSERT(g_tickless.tch && ts);
/* Temporarily disable the overflow counter. NOTE that we have to be
* careful here because stm32wb_tc_getpending() will reset the pending
* careful here because stm32_tc_getpending() will reset the pending
* interrupt status. If we do not handle the overflow here then, it will
* be lost.
*/
@ -679,7 +679,7 @@ int up_timer_cancel(struct timespec *ts)
/* Disable the interrupt. */
stm32wb_tickless_disableint(g_tickless.channel);
stm32_tickless_disableint(g_tickless.channel);
count = STM32_TIM_GETCOUNTER(g_tickless.tch);
period = g_tickless.period;
@ -829,8 +829,8 @@ int up_timer_start(const struct timespec *ts)
* occurs.
*/
stm32wb_tickless_ackint(g_tickless.channel);
stm32wb_tickless_enableint(g_tickless.channel);
stm32_tickless_ackint(g_tickless.channel);
stm32_tickless_enableint(g_tickless.channel);
g_tickless.pending = true;
leave_critical_section(flags);

436
arch/arm/src/stm32wb/stm32wb_tim.c
View file

File diff suppressed because it is too large Load diff

60
arch/arm/src/stm32wb/stm32wb_tim.h
View file

@ -101,14 +101,14 @@ extern "C"
/* TIM Device Structure */
struct stm32wb_tim_dev_s
struct stm32_tim_dev_s
{
struct stm32wb_tim_ops_s *ops;
struct stm32_tim_ops_s *ops;
};
/* TIM Modes of Operation */
enum stm32wb_tim_mode_e
enum stm32_tim_mode_e
{
STM32_TIM_MODE_UNUSED = -1,
@ -145,7 +145,7 @@ enum stm32wb_tim_mode_e
/* TIM Channel Modes */
enum stm32wb_tim_channel_e
enum stm32_tim_channel_e
{
STM32_TIM_CH_DISABLED = 0x00,
@ -178,37 +178,37 @@ enum stm32wb_tim_channel_e
/* TIM Operations */
struct stm32wb_tim_ops_s
struct stm32_tim_ops_s
{
void (*enable)(struct stm32wb_tim_dev_s *dev);
void (*disable)(struct stm32wb_tim_dev_s *dev);
int (*setmode)(struct stm32wb_tim_dev_s *dev,
enum stm32wb_tim_mode_e mode);
int (*setfreq)(struct stm32wb_tim_dev_s *dev, uint32_t freq);
int (*setclock)(struct stm32wb_tim_dev_s *dev, uint32_t freq);
uint32_t (*getclock)(struct stm32wb_tim_dev_s *dev);
void (*setperiod)(struct stm32wb_tim_dev_s *dev, uint32_t period);
uint32_t (*getperiod)(struct stm32wb_tim_dev_s *dev);
uint32_t (*getcounter)(struct stm32wb_tim_dev_s *dev);
uint32_t (*getwidth)(struct stm32wb_tim_dev_s *dev);
int (*setchannel)(struct stm32wb_tim_dev_s *dev, uint8_t channel,
enum stm32wb_tim_channel_e mode);
int (*setcompare)(struct stm32wb_tim_dev_s *dev, uint8_t channel,
void (*enable)(struct stm32_tim_dev_s *dev);
void (*disable)(struct stm32_tim_dev_s *dev);
int (*setmode)(struct stm32_tim_dev_s *dev,
enum stm32_tim_mode_e mode);
int (*setfreq)(struct stm32_tim_dev_s *dev, uint32_t freq);
int (*setclock)(struct stm32_tim_dev_s *dev, uint32_t freq);
uint32_t (*getclock)(struct stm32_tim_dev_s *dev);
void (*setperiod)(struct stm32_tim_dev_s *dev, uint32_t period);
uint32_t (*getperiod)(struct stm32_tim_dev_s *dev);
uint32_t (*getcounter)(struct stm32_tim_dev_s *dev);
uint32_t (*getwidth)(struct stm32_tim_dev_s *dev);
int (*setchannel)(struct stm32_tim_dev_s *dev, uint8_t channel,
enum stm32_tim_channel_e mode);
int (*setcompare)(struct stm32_tim_dev_s *dev, uint8_t channel,
uint32_t compare);
uint32_t (*getcapture)(struct stm32wb_tim_dev_s *dev, uint8_t channel);
uint32_t (*getcapture)(struct stm32_tim_dev_s *dev, uint8_t channel);
/* Timer interrupts */
int (*setisr)(struct stm32wb_tim_dev_s *dev,
int (*setisr)(struct stm32_tim_dev_s *dev,
xcpt_t handler, void *arg, int source);
void (*enableint)(struct stm32wb_tim_dev_s *dev, int source);
void (*disableint)(struct stm32wb_tim_dev_s *dev, int source);
void (*ackint)(struct stm32wb_tim_dev_s *dev, int source);
int (*checkint)(struct stm32wb_tim_dev_s *dev, int source);
void (*enableint)(struct stm32_tim_dev_s *dev, int source);
void (*disableint)(struct stm32_tim_dev_s *dev, int source);
void (*ackint)(struct stm32_tim_dev_s *dev, int source);
int (*checkint)(struct stm32_tim_dev_s *dev, int source);
/* Debug */
void (*dump_regs)(struct stm32wb_tim_dev_s *dev);
void (*dump_regs)(struct stm32_tim_dev_s *dev);
};
/****************************************************************************
@ -217,14 +217,14 @@ struct stm32wb_tim_ops_s
/* Power-up timer and get its structure */
struct stm32wb_tim_dev_s *stm32wb_tim_init(int timer);
struct stm32_tim_dev_s *stm32_tim_init(int timer);
/* Power-down timer, mark it as unused */
int stm32wb_tim_deinit(struct stm32wb_tim_dev_s *dev);
int stm32_tim_deinit(struct stm32_tim_dev_s *dev);
/****************************************************************************
* Name: stm32wb_timer_initialize
* Name: stm32_timer_initialize
*
* Description:
* Bind the configuration timer to a timer lower half instance and
@ -242,7 +242,7 @@ int stm32wb_tim_deinit(struct stm32wb_tim_dev_s *dev);
****************************************************************************/
#ifdef CONFIG_TIMER
int stm32wb_timer_initialize(const char *devpath, int timer);
int stm32_timer_initialize(const char *devpath, int timer);
#endif
#undef EXTERN

84
arch/arm/src/stm32wb/stm32wb_tim_lowerhalf.c
View file

@ -58,10 +58,10 @@
* timer_lowerhalf_s structure.
*/
struct stm32wb_lowerhalf_s
struct stm32_lowerhalf_s
{
const struct timer_ops_s *ops; /* Lower half operations */
struct stm32wb_tim_dev_s *tim; /* stm32 timer driver */
struct stm32_tim_dev_s *tim; /* stm32 timer driver */
tccb_t callback; /* Current upper half interrupt callback */
void *arg; /* Argument passed to upper half callback */
bool started; /* True: Timer has been started */
@ -74,17 +74,17 @@ struct stm32wb_lowerhalf_s
/* Interrupt handling *******************************************************/
static int stm32wb_timer_handler(int irq, void *context, void *arg);
static int stm32_timer_handler(int irq, void *context, void *arg);
/* "Lower half" driver methods **********************************************/
static int stm32wb_start(struct timer_lowerhalf_s *lower);
static int stm32wb_stop(struct timer_lowerhalf_s *lower);
static int stm32wb_getstatus(struct timer_lowerhalf_s *lower,
static int stm32_start(struct timer_lowerhalf_s *lower);
static int stm32_stop(struct timer_lowerhalf_s *lower);
static int stm32_getstatus(struct timer_lowerhalf_s *lower,
struct timer_status_s *status);
static int stm32wb_settimeout(struct timer_lowerhalf_s *lower,
static int stm32_settimeout(struct timer_lowerhalf_s *lower,
uint32_t timeout);
static void stm32wb_setcallback(struct timer_lowerhalf_s *lower,
static void stm32_setcallback(struct timer_lowerhalf_s *lower,
tccb_t callback, void *arg);
/****************************************************************************
@ -95,16 +95,16 @@ static void stm32wb_setcallback(struct timer_lowerhalf_s *lower,
static const struct timer_ops_s g_timer_ops =
{
.start = stm32wb_start,
.stop = stm32wb_stop,
.getstatus = stm32wb_getstatus,
.settimeout = stm32wb_settimeout,
.setcallback = stm32wb_setcallback,
.start = stm32_start,
.stop = stm32_stop,
.getstatus = stm32_getstatus,
.settimeout = stm32_settimeout,
.setcallback = stm32_setcallback,
.ioctl = NULL,
};
#ifdef CONFIG_STM32WB_TIM1
static struct stm32wb_lowerhalf_s g_tim1_lowerhalf =
static struct stm32_lowerhalf_s g_tim1_lowerhalf =
{
.ops = &g_timer_ops,
.resolution = STM32_TIM1_RES,
@ -112,7 +112,7 @@ static struct stm32wb_lowerhalf_s g_tim1_lowerhalf =
#endif
#ifdef CONFIG_STM32WB_TIM2
static struct stm32wb_lowerhalf_s g_tim2_lowerhalf =
static struct stm32_lowerhalf_s g_tim2_lowerhalf =
{
.ops = &g_timer_ops,
.resolution = STM32_TIM2_RES,
@ -120,7 +120,7 @@ static struct stm32wb_lowerhalf_s g_tim2_lowerhalf =
#endif
#ifdef CONFIG_STM32WB_TIM16
static struct stm32wb_lowerhalf_s g_tim16_lowerhalf =
static struct stm32_lowerhalf_s g_tim16_lowerhalf =
{
.ops = &g_timer_ops,
.resolution = STM32_TIM16_RES,
@ -128,7 +128,7 @@ static struct stm32wb_lowerhalf_s g_tim16_lowerhalf =
#endif
#ifdef CONFIG_STM32WB_TIM17
static struct stm32wb_lowerhalf_s g_tim17_lowerhalf =
static struct stm32_lowerhalf_s g_tim17_lowerhalf =
{
.ops = &g_timer_ops,
.resolution = STM32_TIM17_RES,
@ -140,7 +140,7 @@ static struct stm32wb_lowerhalf_s g_tim17_lowerhalf =
****************************************************************************/
/****************************************************************************
* Name: stm32wb_timer_handler
* Name: stm32_timer_handler
*
* Description:
* timer interrupt handler
@ -151,9 +151,9 @@ static struct stm32wb_lowerhalf_s g_tim17_lowerhalf =
*
****************************************************************************/
static int stm32wb_timer_handler(int irq, void *context, void *arg)
static int stm32_timer_handler(int irq, void *context, void *arg)
{
struct stm32wb_lowerhalf_s *lower = (struct stm32wb_lowerhalf_s *)arg;
struct stm32_lowerhalf_s *lower = (struct stm32_lowerhalf_s *)arg;
uint32_t next_interval_us = 0;
STM32_TIM_ACKINT(lower->tim, GTIM_DIER_UIE);
@ -167,14 +167,14 @@ static int stm32wb_timer_handler(int irq, void *context, void *arg)
}
else
{
stm32wb_stop((struct timer_lowerhalf_s *)lower);
stm32_stop((struct timer_lowerhalf_s *)lower);
}
return OK;
}
/****************************************************************************
* Name: stm32wb_start
* Name: stm32_start
*
* Description:
* Start the timer, resetting the time to the current timeout,
@ -188,9 +188,9 @@ static int stm32wb_timer_handler(int irq, void *context, void *arg)
*
****************************************************************************/
static int stm32wb_start(struct timer_lowerhalf_s *lower)
static int stm32_start(struct timer_lowerhalf_s *lower)
{
struct stm32wb_lowerhalf_s *priv = (struct stm32wb_lowerhalf_s *)lower;
struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
if (!priv->started)
{
@ -198,7 +198,7 @@ static int stm32wb_start(struct timer_lowerhalf_s *lower)
if (priv->callback != NULL)
{
STM32_TIM_SETISR(priv->tim, stm32wb_timer_handler, priv, 0);
STM32_TIM_SETISR(priv->tim, stm32_timer_handler, priv, 0);
STM32_TIM_ENABLEINT(priv->tim, GTIM_DIER_UIE);
}
@ -212,7 +212,7 @@ static int stm32wb_start(struct timer_lowerhalf_s *lower)
}
/****************************************************************************
* Name: stm32wb_stop
* Name: stm32_stop
*
* Description:
* Stop the timer
@ -226,9 +226,9 @@ static int stm32wb_start(struct timer_lowerhalf_s *lower)
*
****************************************************************************/
static int stm32wb_stop(struct timer_lowerhalf_s *lower)
static int stm32_stop(struct timer_lowerhalf_s *lower)
{
struct stm32wb_lowerhalf_s *priv = (struct stm32wb_lowerhalf_s *)lower;
struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
if (priv->started)
{
@ -245,7 +245,7 @@ static int stm32wb_stop(struct timer_lowerhalf_s *lower)
}
/****************************************************************************
* Name: stm32wb_getstatus
* Name: stm32_getstatus
*
* Description:
* get timer status
@ -260,10 +260,10 @@ static int stm32wb_stop(struct timer_lowerhalf_s *lower)
*
****************************************************************************/
static int stm32wb_getstatus(struct timer_lowerhalf_s *lower,
static int stm32_getstatus(struct timer_lowerhalf_s *lower,
struct timer_status_s *status)
{
struct stm32wb_lowerhalf_s *priv = (struct stm32wb_lowerhalf_s *)lower;
struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
uint64_t maxtimeout;
uint32_t timeout;
uint32_t clock;
@ -311,7 +311,7 @@ static int stm32wb_getstatus(struct timer_lowerhalf_s *lower,
}
/****************************************************************************
* Name: stm32wb_settimeout
* Name: stm32_settimeout
*
* Description:
* Set a new timeout value (and reset the timer)
@ -326,10 +326,10 @@ static int stm32wb_getstatus(struct timer_lowerhalf_s *lower,
*
****************************************************************************/
static int stm32wb_settimeout(struct timer_lowerhalf_s *lower,
static int stm32_settimeout(struct timer_lowerhalf_s *lower,
uint32_t timeout)
{
struct stm32wb_lowerhalf_s *priv = (struct stm32wb_lowerhalf_s *)lower;
struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
uint64_t maxtimeout;
if (priv->started)
@ -354,7 +354,7 @@ static int stm32wb_settimeout(struct timer_lowerhalf_s *lower,
}
/****************************************************************************
* Name: stm32wb_sethandler
* Name: stm32_sethandler
*
* Description:
* Call this user provided timeout handler.
@ -373,10 +373,10 @@ static int stm32wb_settimeout(struct timer_lowerhalf_s *lower,
*
****************************************************************************/
static void stm32wb_setcallback(struct timer_lowerhalf_s *lower,
static void stm32_setcallback(struct timer_lowerhalf_s *lower,
tccb_t callback, void *arg)
{
struct stm32wb_lowerhalf_s *priv = (struct stm32wb_lowerhalf_s *)lower;
struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
irqstate_t flags = enter_critical_section();
/* Save the new callback */
@ -386,7 +386,7 @@ static void stm32wb_setcallback(struct timer_lowerhalf_s *lower,
if (callback != NULL && priv->started)
{
STM32_TIM_SETISR(priv->tim, stm32wb_timer_handler, priv, 0);
STM32_TIM_SETISR(priv->tim, stm32_timer_handler, priv, 0);
STM32_TIM_ENABLEINT(priv->tim, GTIM_DIER_UIE);
}
else
@ -403,7 +403,7 @@ static void stm32wb_setcallback(struct timer_lowerhalf_s *lower,
****************************************************************************/
/****************************************************************************
* Name: stm32wb_timer_initialize
* Name: stm32_timer_initialize
*
* Description:
* Bind the configuration timer to a timer lower half instance and
@ -420,9 +420,9 @@ static void stm32wb_setcallback(struct timer_lowerhalf_s *lower,
*
****************************************************************************/
int stm32wb_timer_initialize(const char *devpath, int timer)
int stm32_timer_initialize(const char *devpath, int timer)
{
struct stm32wb_lowerhalf_s *lower;
struct stm32_lowerhalf_s *lower;
switch (timer)
{
@ -458,7 +458,7 @@ int stm32wb_timer_initialize(const char *devpath, int timer)
lower->started = false;
lower->callback = NULL;
lower->tim = stm32wb_tim_init(timer);
lower->tim = stm32_tim_init(timer);
if (lower->tim == NULL)
{

6
arch/arm/src/stm32wb/stm32wb_timerisr.c
View file

@ -77,7 +77,7 @@
****************************************************************************/
/****************************************************************************
* Function: stm32wb_timerisr
* Function: stm32_timerisr
*
* Description:
* The timer ISR will perform a variety of services for various portions
@ -85,7 +85,7 @@
*
****************************************************************************/
static int stm32wb_timerisr(int irq, uint32_t *regs, void *arg)
static int stm32_timerisr(int irq, uint32_t *regs, void *arg)
{
/* Process timer interrupt */
@ -135,7 +135,7 @@ void up_timer_initialize(void)
/* Attach the timer interrupt vector */
irq_attach(STM32_IRQ_SYSTICK, (xcpt_t)stm32wb_timerisr, NULL);
irq_attach(STM32_IRQ_SYSTICK, (xcpt_t)stm32_timerisr, NULL);
/* Enable SysTick interrupts */

4
arch/arm/src/stm32wb/stm32wb_uart.h
View file

@ -151,7 +151,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: stm32wb_serial_dma_poll
* Name: stm32_serial_dma_poll
*
* Description:
* Must be called periodically if any STM32WB UART is configured for DMA.
@ -164,7 +164,7 @@ extern "C"
****************************************************************************/
#ifdef SERIAL_HAVE_RXDMA
void stm32wb_serial_dma_poll(void);
void stm32_serial_dma_poll(void);
#endif
#undef EXTERN

2
arch/arm/src/stm32wb/stm32wb_uid.c
View file

@ -35,7 +35,7 @@
* Public Functions
****************************************************************************/
void stm32wb_get_uniqueid(uint8_t uniqueid[12])
void stm32_get_uniqueid(uint8_t uniqueid[12])
{
int i;

2
arch/arm/src/stm32wb/stm32wb_uid.h
View file

@ -33,6 +33,6 @@
* Public Function Prototypes
****************************************************************************/
void stm32wb_get_uniqueid(uint8_t uniqueid[12]);
void stm32_get_uniqueid(uint8_t uniqueid[12]);
#endif /* __ARCH_ARM_SRC_STM32WB_STM32WB_UID_H */

6
arch/arm/src/stm32wb/stm32wb_userspace.c
View file

@ -41,7 +41,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_userspace
* Name: stm32_userspace
*
* Description:
* For the case of the separate user-/kernel-space build, perform whatever
@ -51,7 +51,7 @@
*
****************************************************************************/
void stm32wb_userspace(void)
void stm32_userspace(void)
{
uint8_t *src;
uint8_t *dest;
@ -87,7 +87,7 @@ void stm32wb_userspace(void)
/* Configure the MPU to permit user-space access to its FLASH and RAM */
stm32wb_mpuinitialize();
stm32_mpuinitialize();
}
#endif /* CONFIG_BUILD_PROTECTED */

4
arch/arm/src/stm32wb/stm32wb_userspace.h
View file

@ -34,7 +34,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_userspace
* Name: stm32_userspace
*
* Description:
* For the case of the separate user-/kernel-space build, perform whatever
@ -45,7 +45,7 @@
****************************************************************************/
#ifdef CONFIG_BUILD_PROTECTED
void stm32wb_userspace(void);
void stm32_userspace(void);
#endif
#endif /* __ARCH_ARM_SRC_STM32W_STM32W_USERSPACE_H */

2
arch/arm/src/stm32wb/stm32wb_waste.c
View file

@ -40,7 +40,7 @@ uint32_t g_waste_counter;
* Public Functions
****************************************************************************/
void stm32wb_waste(void)
void stm32_waste(void)
{
g_waste_counter++;
}

4
arch/arm/src/stm32wb/stm32wb_waste.h
View file

@ -46,7 +46,7 @@ extern "C"
/* Waste CPU Time
*
* stm32wb_waste() is the logic that will be executed when portions of
* stm32_waste() is the logic that will be executed when portions of
* kernel or user-app is polling some register or similar, waiting for
* desired status. This time is wasted away. This function offers a
* measure of badly written piece of software or some undesired behavior.
@ -55,7 +55,7 @@ extern "C"
* cannot be used for other purposes (yet).
*/
void stm32wb_waste(void);
void stm32_waste(void);
#undef EXTERN
#if defined(__cplusplus)

4
boards/arm/stm32wb/flipperzero/include/board.h
View file

@ -113,7 +113,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: stm32wb_board_initialize
* Name: stm32_board_initialize
*
* Description:
* All STM32WB architectures must provide the following entry point.
@ -123,7 +123,7 @@ extern "C"
*
****************************************************************************/
void stm32wb_board_initialize(void);
void stm32_board_initialize(void);
#undef EXTERN
#if defined(__cplusplus)

4
boards/arm/stm32wb/flipperzero/src/flipperzero.h
View file

@ -82,7 +82,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_spidev_initialize
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins.
@ -90,7 +90,7 @@
****************************************************************************/
#ifdef CONFIG_SPI
void weak_function stm32wb_spidev_initialize(void);
void weak_function stm32_spidev_initialize(void);
#endif
#endif /* __ASSEMBLY__ */

16
boards/arm/stm32wb/flipperzero/src/stm32_boot.c
View file

@ -58,7 +58,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_board_initialize
* Name: stm32_board_initialize
*
* Description:
* All STM32WB architectures must provide the following entry point. This
@ -68,16 +68,16 @@
*
****************************************************************************/
void stm32wb_board_initialize(void)
void stm32_board_initialize(void)
{
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak
* function stm32_spidev_initialize() has been brought into the link.
*/
#ifdef CONFIG_SPI
if (stm32wb_spidev_initialize)
if (stm32_spidev_initialize)
{
stm32wb_spidev_initialize();
stm32_spidev_initialize();
}
#endif
@ -142,7 +142,7 @@ void board_late_initialize(void)
#ifdef CONFIG_RTC_DRIVER
/* Instantiate the STM32WB lower-half RTC driver */
rtclower = stm32wb_rtc_lowerhalf();
rtclower = stm32_rtc_lowerhalf();
if (!rtclower)
{
serr("ERROR: Failed to instantiate the RTC lower-half driver\n");
@ -166,7 +166,7 @@ void board_late_initialize(void)
#ifdef CONFIG_TIMER
/* Initialize and register the timer driver */
ret = stm32wb_timer_initialize("/dev/timer0", 1);
ret = stm32_timer_initialize("/dev/timer0", 1);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to register the timer driver: %d\n",
@ -186,7 +186,7 @@ void board_late_initialize(void)
#ifdef CONFIG_STM32WB_BLE
/* Initialize and register BLE HCI driver */
stm32wb_blehci_initialize();
stm32_blehci_initialize();
#endif
}
#endif
@ -206,7 +206,7 @@ int board_uniqueid(uint8_t *uniqueid)
return -EINVAL;
}
stm32wb_get_uniqueid(uniqueid);
stm32_get_uniqueid(uniqueid);
return OK;
}
#endif

54
boards/arm/stm32wb/flipperzero/src/stm32_lcd_st7565.c
View file

@ -55,14 +55,14 @@
* Private Function Prototypes
****************************************************************************/
static void stm32wb_st7565_reset(struct st7565_lcd_s *lcd, bool on);
static void stm32wb_st7565_select(struct st7565_lcd_s *lcd);
static void stm32wb_st7565_deselect(struct st7565_lcd_s *lcd);
static void stm32wb_st7565_cmddata(struct st7565_lcd_s *lcd,
static void stm32_st7565_reset(struct st7565_lcd_s *lcd, bool on);
static void stm32_st7565_select(struct st7565_lcd_s *lcd);
static void stm32_st7565_deselect(struct st7565_lcd_s *lcd);
static void stm32_st7565_cmddata(struct st7565_lcd_s *lcd,
const uint8_t cmd);
static int stm32wb_st7565_senddata(struct st7565_lcd_s *lcd,
static int stm32_st7565_senddata(struct st7565_lcd_s *lcd,
const uint8_t *data, int size);
static int stm32wb_st7565_backlight(struct st7565_lcd_s *lcd, int level);
static int stm32_st7565_backlight(struct st7565_lcd_s *lcd, int level);
/****************************************************************************
* Private Data
@ -73,43 +73,43 @@ static struct lcd_dev_s *g_lcddev;
static struct st7565_lcd_s g_st7565_dev =
{
.reset = stm32wb_st7565_reset,
.select = stm32wb_st7565_select,
.deselect = stm32wb_st7565_deselect,
.cmddata = stm32wb_st7565_cmddata,
.senddata = stm32wb_st7565_senddata,
.backlight = stm32wb_st7565_backlight
.reset = stm32_st7565_reset,
.select = stm32_st7565_select,
.deselect = stm32_st7565_deselect,
.cmddata = stm32_st7565_cmddata,
.senddata = stm32_st7565_senddata,
.backlight = stm32_st7565_backlight
};
static void stm32wb_st7565_reset(struct st7565_lcd_s *lcd, bool on)
static void stm32_st7565_reset(struct st7565_lcd_s *lcd, bool on)
{
stm32wb_gpiowrite(STM32_LCD_RST, !on);
stm32_gpiowrite(STM32_LCD_RST, !on);
}
static void stm32wb_st7565_select(struct st7565_lcd_s *lcd)
static void stm32_st7565_select(struct st7565_lcd_s *lcd)
{
stm32wb_gpiowrite(STM32_LCD_CS, 0);
stm32_gpiowrite(STM32_LCD_CS, 0);
}
static void stm32wb_st7565_deselect(struct st7565_lcd_s *lcd)
static void stm32_st7565_deselect(struct st7565_lcd_s *lcd)
{
stm32wb_gpiowrite(STM32_LCD_CS, 1);
stm32_gpiowrite(STM32_LCD_CS, 1);
}
static void stm32wb_st7565_cmddata(struct st7565_lcd_s *lcd,
static void stm32_st7565_cmddata(struct st7565_lcd_s *lcd,
const uint8_t cmd)
{
stm32wb_gpiowrite(STM32_LCD_A0, !cmd);
stm32_gpiowrite(STM32_LCD_A0, !cmd);
}
static int stm32wb_st7565_senddata(struct st7565_lcd_s *lcd,
static int stm32_st7565_senddata(struct st7565_lcd_s *lcd,
const uint8_t *data, int size)
{
SPI_SNDBLOCK(g_spidev, data, size);
return 0;
}
static int stm32wb_st7565_backlight(struct st7565_lcd_s *lcd, int level)
static int stm32_st7565_backlight(struct st7565_lcd_s *lcd, int level)
{
return 0;
}
@ -124,10 +124,10 @@ static int stm32wb_st7565_backlight(struct st7565_lcd_s *lcd, int level)
int board_lcd_initialize(void)
{
stm32wb_configgpio(STM32_LCD_RST);
stm32wb_configgpio(STM32_LCD_A0);
stm32_configgpio(STM32_LCD_RST);
stm32_configgpio(STM32_LCD_A0);
g_spidev = stm32wb_spibus_initialize(STM32_LCD_SPINO);
g_spidev = stm32_spibus_initialize(STM32_LCD_SPINO);
if (!g_spidev)
{
@ -139,9 +139,9 @@ int board_lcd_initialize(void)
g_spidev->ops->setbits(g_spidev, 8);
g_spidev->ops->setfrequency(g_spidev, 1000000);
stm32wb_gpiowrite(STM32_LCD_RST, 0);
stm32_gpiowrite(STM32_LCD_RST, 0);
up_mdelay(1);
stm32wb_gpiowrite(STM32_LCD_RST, 1);
stm32_gpiowrite(STM32_LCD_RST, 1);
return OK;
}

28
boards/arm/stm32wb/flipperzero/src/stm32_spi.c
View file

@ -40,45 +40,45 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_spidev_initialize
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins.
*
****************************************************************************/
void weak_function stm32wb_spidev_initialize(void)
void weak_function stm32_spidev_initialize(void)
{
/* NOTE: Clocking was already provided in stm32wb_rcc.c.
/* NOTE: Clocking was already provided in stm32_rcc.c.
* Here, we only initialize chip select pins unique to the board
* architecture.
*/
#ifdef CONFIG_LCD_ST7565
stm32wb_configgpio(STM32_LCD_CS); /* ST7565 chip select */
stm32_configgpio(STM32_LCD_CS); /* ST7565 chip select */
#endif
}
/****************************************************************************
* Name: stm32wb_spi1/2select and stm32wb_spi1/2status
* Name: stm32_spi1/2select and stm32_spi1/2status
*
* Description:
* The external functions, stm32wb_spi1/2select and stm32wb_spi1/2status
* The external functions, stm32_spi1/2select and stm32_spi1/2status
* must be provided by board-specific logic. They are implementations of
* the select and status methods of the SPI interface defined by struct
* spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including
* stm32wb_spibus_initialize()) are provided by common STM32 logic.
* stm32_spibus_initialize()) are provided by common STM32 logic.
* To use this common SPI logic on your board:
*
* 1. Provide logic in stm32wb_boardinitialize() to configure SPI chip
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip
* select pins.
* 2. Provide stm32wb_spi1/2select() and stm32wb_spi1/2status() functions
* 2. Provide stm32_spi1/2select() and stm32_spi1/2status() functions
* in your board-specific logic. These functions will perform chip
* selection and status operations using GPIOs in the way your board is
* configured.
* 3. Add a calls to stm32wb_spibus_initialize() in your low level
* 3. Add a calls to stm32_spibus_initialize() in your low level
* application initialization logic
* 4. The handle returned by stm32wb_spibus_initialize() may then be used
* 4. The handle returned by stm32_spibus_initialize() may then be used
* to bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
@ -86,17 +86,17 @@ void weak_function stm32wb_spidev_initialize(void)
****************************************************************************/
#ifdef CONFIG_STM32WB_SPI2
void stm32wb_spi2select(struct spi_dev_s *dev, uint32_t devid, bool selected)
void stm32_spi2select(struct spi_dev_s *dev, uint32_t devid, bool selected)
{
#ifdef CONFIG_LCD_ST7565
if (devid == SPIDEV_DISPLAY(0))
{
stm32wb_gpiowrite(STM32_LCD_CS, !selected);
stm32_gpiowrite(STM32_LCD_CS, !selected);
}
#endif
}
uint8_t stm32wb_spi2status(struct spi_dev_s *dev, uint32_t devid)
uint8_t stm32_spi2status(struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}

4
boards/arm/stm32wb/nucleo-wb55rg/include/board.h
View file

@ -183,7 +183,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: stm32wb_board_initialize
* Name: stm32_board_initialize
*
* Description:
* All STM32WB architectures must provide the following entry point.
@ -193,7 +193,7 @@ extern "C"
*
****************************************************************************/
void stm32wb_board_initialize(void);
void stm32_board_initialize(void);
#undef EXTERN
#if defined(__cplusplus)

20
boards/arm/stm32wb/nucleo-wb55rg/src/stm32_autoleds.c
View file

@ -34,7 +34,7 @@
#include "chip.h"
#include "arm_internal.h"
#include "stm32wb.h"
#include "stm32.h"
#include "nucleo-wb55rg.h"
#ifdef CONFIG_ARCH_LEDS
@ -51,9 +51,9 @@ void board_autoled_initialize(void)
{
/* Configure LEDs GPIO for output. Initial state is OFF */
stm32wb_configgpio(GPIO_LED1);
stm32wb_configgpio(GPIO_LED2);
stm32wb_configgpio(GPIO_LED3);
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
stm32_configgpio(GPIO_LED3);
}
/****************************************************************************
@ -68,15 +68,15 @@ void board_autoled_on(int led)
break;
case BOARD_LED1:
stm32wb_gpiowrite(GPIO_LED1, true);
stm32_gpiowrite(GPIO_LED1, true);
break;
case BOARD_LED2:
stm32wb_gpiowrite(GPIO_LED2, true);
stm32_gpiowrite(GPIO_LED2, true);
break;
case BOARD_LED3:
stm32wb_gpiowrite(GPIO_LED3, true);
stm32_gpiowrite(GPIO_LED3, true);
break;
}
}
@ -93,15 +93,15 @@ void board_autoled_off(int led)
break;
case BOARD_LED1:
stm32wb_gpiowrite(GPIO_LED1, false);
stm32_gpiowrite(GPIO_LED1, false);
break;
case BOARD_LED2:
stm32wb_gpiowrite(GPIO_LED2, false);
stm32_gpiowrite(GPIO_LED2, false);
break;
case BOARD_LED3:
stm32wb_gpiowrite(GPIO_LED3, false);
stm32_gpiowrite(GPIO_LED3, false);
break;
}
}

12
boards/arm/stm32wb/nucleo-wb55rg/src/stm32_boot.c
View file

@ -58,7 +58,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32wb_board_initialize
* Name: stm32_board_initialize
*
* Description:
* All STM32WB architectures must provide the following entry point. This
@ -68,7 +68,7 @@
*
****************************************************************************/
void stm32wb_board_initialize(void)
void stm32_board_initialize(void)
{
/* Configure on-board LEDs if LED support has been selected. */
@ -131,7 +131,7 @@ void board_late_initialize(void)
#ifdef CONFIG_RTC_DRIVER
/* Instantiate the STM32WB lower-half RTC driver */
rtclower = stm32wb_rtc_lowerhalf();
rtclower = stm32_rtc_lowerhalf();
if (!rtclower)
{
serr("ERROR: Failed to instantiate the RTC lower-half driver\n");
@ -155,7 +155,7 @@ void board_late_initialize(void)
#ifdef CONFIG_TIMER
/* Initialize and register the timer driver */
ret = stm32wb_timer_initialize("/dev/timer0", 1);
ret = stm32_timer_initialize("/dev/timer0", 1);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to register the timer driver: %d\n",
@ -167,7 +167,7 @@ void board_late_initialize(void)
#ifdef CONFIG_STM32WB_BLE
/* Initialize and register BLE HCI driver */
stm32wb_blehci_initialize();
stm32_blehci_initialize();
#endif
UNUSED(ret);
}
@ -188,7 +188,7 @@ int board_uniqueid(uint8_t *uniqueid)
return -EINVAL;
}
stm32wb_get_uniqueid(uniqueid);
stm32_get_uniqueid(uniqueid);
return OK;
}
#endif

32
boards/arm/stm32wb/nucleo-wb55rg/src/stm32_userleds.c
View file

@ -35,7 +35,7 @@
#include "chip.h"
#include "arm_internal.h"
#include "stm32wb.h"
#include "stm32.h"
#include "nucleo-wb55rg.h"
#ifndef CONFIG_ARCH_LEDS
@ -94,8 +94,8 @@ static void led_pm_notify(struct pm_callback_s *cb, int domain,
{
/* Entering IDLE mode - Turn leds off */
stm32wb_gpiowrite(GPIO_LED_RED, 0);
stm32wb_gpiowrite(GPIO_LED_GREEN, 0);
stm32_gpiowrite(GPIO_LED_RED, 0);
stm32_gpiowrite(GPIO_LED_GREEN, 0);
}
break;
@ -103,8 +103,8 @@ static void led_pm_notify(struct pm_callback_s *cb, int domain,
{
/* Entering STANDBY mode - Logic for PM_STANDBY goes here */
stm32wb_gpiowrite(GPIO_LED_RED, 0);
stm32wb_gpiowrite(GPIO_LED_GREEN, 0);
stm32_gpiowrite(GPIO_LED_RED, 0);
stm32_gpiowrite(GPIO_LED_GREEN, 0);
}
break;
@ -112,8 +112,8 @@ static void led_pm_notify(struct pm_callback_s *cb, int domain,
{
/* Entering SLEEP mode - Logic for PM_SLEEP goes here */
stm32wb_gpiowrite(GPIO_LED_RED, 0);
stm32wb_gpiowrite(GPIO_LED_GREEN, 0);
stm32_gpiowrite(GPIO_LED_RED, 0);
stm32_gpiowrite(GPIO_LED_GREEN, 0);
}
break;
@ -160,9 +160,9 @@ static int led_pm_prepare(struct pm_callback_s *cb, int domain,
uint32_t board_userled_initialize(void)
{
stm32wb_configgpio(GPIO_LED_RED);
stm32wb_configgpio(GPIO_LED_GREEN);
stm32wb_configgpio(GPIO_LED_BLUE);
stm32_configgpio(GPIO_LED_RED);
stm32_configgpio(GPIO_LED_GREEN);
stm32_configgpio(GPIO_LED_BLUE);
return BOARD_NLEDS;
}
@ -178,15 +178,15 @@ void board_userled(int led, bool ledon)
break;
case BOARD_LED_RED:
stm32wb_gpiowrite(GPIO_LED_RED, ledon);
stm32_gpiowrite(GPIO_LED_RED, ledon);
break;
case GPIO_LED_GREEN:
stm32wb_gpiowrite(GPIO_LED_GREEN, ledon);
stm32_gpiowrite(GPIO_LED_GREEN, ledon);
break;
case GPIO_LED_BLUE:
stm32wb_gpiowrite(GPIO_LED_BLUE, ledon);
stm32_gpiowrite(GPIO_LED_BLUE, ledon);
break;
}
}
@ -197,9 +197,9 @@ void board_userled(int led, bool ledon)
void board_userled_all(uint32_t ledset)
{
stm32wb_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) != 0);
stm32wb_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) != 0);
stm32wb_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) != 0);
stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) != 0);
stm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) != 0);
stm32_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) != 0);
}
/****************************************************************************