Replace the global `g_lock` with a per-filesystem `fs->fs_lock`
to improve concurrency for multi-mount scenarios.
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
The esp32s3-devkit:usbmsc config uses CONFIG_ESPRESSIF_SIMPLE_BOOT, so
the image is packaged with "esptool elf2image --ram-only-header". With
esptool v5.2.0, that path asserts that each flash segment satisfies
(f.tell() + 8 + BOOTLOADER_FLASH_OFFSET) % IROM_ALIGN
== segment.addr % IROM_ALIGN
When .flash.text lands right on a 64 KB (IROM_ALIGN) boundary the
assertion cannot be satisfied and elf2image fails with AssertionError,
even though NuttX itself links cleanly.
usbmsc is a plain C test and does not need the C++ runtime. Disabling
CONFIG_HAVE_CXX / CONFIG_HAVE_CXXINITIALIZE moves .flash.text off the
IROM_ALIGN boundary so the SIMPLE_BOOT image can be generated, without
changing the boot mode or the test's intent.
Signed-off-by: yukangzhi <yukangzhi@xiaomi.com>
The _inode_checkpath function uses `namelen < NAME_MAX` to validate
path segment lengths. When a filename is exactly NAME_MAX characters
long and is followed by more path segments (e.g. /dir/), the loop
exits with namelen == NAME_MAX before processing the '/' separator,
causing a spurious ENAMETOOLONG error.
Per POSIX, NAME_MAX is the maximum number of bytes in a filename not
including the terminating null, so a filename of exactly NAME_MAX
characters is valid. Change the condition to `namelen <= NAME_MAX`
so the loop can process the trailing '/' separator and correctly
reset namelen for the next path segment.
Signed-off-by: wangxingxing <wangxingxing@xiaomi.com>
Add a helper _inode_checkpath() that validates the path before the
search: it returns -ENOENT for an empty path and -ENAMETOOLONG when any
single path component exceeds NAME_MAX or the whole path exceeds
PATH_MAX. inode_search() now runs this check first so that oversized
paths and file names are rejected with the correct POSIX error code.
Signed-off-by: guohao15 <guohao15@xiaomi.com>
Add support for resolving relative path components (in particular the
".." parent references) during the inode search. A helper
_compute_path_depth() computes the remaining path depth so that a mount
point is only treated as the terminal node when the depth is positive,
and "../" components walk back up to the parent inode.
Signed-off-by: zhaoxingyu1 <zhaoxingyu1@xiaomi.com>
Replace the fs_heap_asprintf()/fs_heap_free() based allocation of the
path buffer in the inode search with the lib_get_tempbuffer()/
lib_put_tempbuffer() pool. Fixed PATH_MAX sized temporary buffers avoid
per-call heap allocation and keep the buffer allocator consistent with
the rest of the path-resolution code.
Signed-off-by: zhaoxingyu1 <zhaoxingyu1@xiaomi.com>
While walking the path components, a non-final component must refer to a
directory. When descending into a child, verify the parent inode is a
pseudo directory; if it is not, stop the search and return -ENOTDIR as
required by POSIX for a path prefix that is not a directory.
Signed-off-by: zhengyu16 <zhengyu16@xiaomi.com>
An empty pathname does not name any inode. Return -ENOENT early in
inode_search() when the path is an empty string, instead of continuing
into the search logic with a zero-length path.
Signed-off-by: zhengyu16 <zhengyu16@xiaomi.com>
When resolving a symbolic link target, call the public inode_search()
instead of the internal _inode_search() so that the link target path is
first formatted (leading '/' handling and relative-path conversion)
before the lookup. This ensures link targets are resolved through the
same normalization path as ordinary lookups.
Signed-off-by: zhengyu16 <zhengyu16@xiaomi.com>
The SDK ships no bare RTL8721F.rdev profile (unlike RTL8721Dx /
RTL8720F); it splits by flash type into RTL8721F_NOR.rdev /
RTL8721F_NAND.rdev. The default (AMEBA_PY_SOC = RTL8721F) therefore
failed the cmake `flash` target with "profile not found:
RTL8721F.rdev".
Override AMEBA_FLASH_PROFILE to RTL8721F_NOR to match the EVB flash
type and boards/arm/rtl8721f/rtl8721f_evb/scripts/Make.defs.
Assisted-by: Claude <noreply@anthropic.com>
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
ameba_setup_env.sh resolved the system interpreter via `command -v
python3`. Once a previous run put $SHIMBIN at the front of PATH, that
lookup returned $SHIMBIN/python3 and `ln -sf shim shim` created a
self-referential symlink, breaking every subsequent cmake reconfigure
with "Too many levels of symbolic links".
Scan PATH for the first python3 that is not inside $SHIMBIN and
canonicalise it with readlink -f, so the shim always points at a real
interpreter. Idempotent across reconfigures.
Assisted-by: Claude <noreply@anthropic.com>
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
The shared CMake build hardcoded a single ROM symbol linker script
(ameba_rom_symbol_acut_s.ld), so a CMake build of rtl8721f failed to
link: __rom_bss_start_ns__ / __rom_bss_end_ns__ and the rtw_* WiFi ROM
symbols were left undefined. The make build already appends rtl8721f's
four ROM symbol scripts (secure + wifi + os + NS) in
arch/arm/src/rtl8721f/ameba_board.mk; the CMake path did not.
Make the ROM symbol script set per-IC:
- ameba_gen_ldscript.sh now takes one or more ROM ld files as trailing
arguments and cat's them in order (was a single fixed argument).
- ameba_board.cmake keeps the previous single-script default and lets an
arch CMakeLists override it via AMEBA_ROM_LDS; the list is resolved to
full paths and passed to the generator.
- rtl8721f/CMakeLists.txt sets AMEBA_ROM_LDS to its four ROM symbol
scripts, matching its ameba_board.mk cat order.
rtl8721dx and rtl8720f are unchanged (still the single default script).
Verified on rtl8721f: the nsh CMake build now links the nuttx ELF
cleanly with no undefined NS-BSS or rtw_* symbols.
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Assisted-by: Claude <noreply@anthropic.com>
The generic ARMv7-M user SRAM helper marks memory shareable. STM32H7
Protected user data and heaps can reside in cacheable AXI or D2 SRAM, where
userspace synchronization needs LDREX/STREX to use the CPU-local exclusive
monitor.
Map protected user SRAM as Normal, cacheable, and non-shareable. Dual-core
RPTUN SRAM remains unaffected because it is mapped separately with explicit
shareable attributes.
Tested by booting a Protected image and running user and kernel work-queue
stress tests on an STM32H7 PX4 FMUv6C.
Assisted-by: Codex:GPT-5
Signed-off-by: DuoYuWang <thirteenking.wang@gmail.com>
up_allocate_heap() calculates the available user heap from SRAM_END but
previously placed the aligned region relative to SRAM123_END. That mixes
the selected primary SRAM with a fixed D2 SRAM boundary and leaves
SRAM123_END undefined for dual-core M7 and M4 configurations.
Place the user heap relative to SRAM_END so its size, MPU alignment, and
location all refer to the SRAM region selected by the chip configuration.
Tested by building and booting a Protected image on an STM32H7 PX4 FMUv6C.
Assisted-by: Codex:GPT-5
Signed-off-by: DuoYuWang <thirteenking.wang@gmail.com>
The unique ID on STM32 Cortex-M33 parts is stored in flash information
memory, which cannot be accessed while the instruction cache is enabled.
Add an ICACHE state helper, temporarily disable the instruction cache
while reading the UID using 32-bit accesses, and restore it only when it
was originally enabled. This preserves the caller's cache state and
prevents a bus fault during UID access.
Assisted-by: Codex:gpt-5
Signed-off-by: jsanchez-2g <jsanchez@2g-eng.com>
Add WWDG driver support for STM32H5.
Enable the WWDG peripheral clock when WWDG is enabled.
It's based on STM32H7. This contribution has been
reduced to the minimum number of changes from the
H7 version.
Signed-off-by: Liam Howatt <liamhowatt@geotab.com>
Co-authored-by: Liam Howatt <liamhowatt@geotab.com>
CI feeds nxstyle the diff hunks with three lines of context, so style errors
that are older than this change, in the lines around the hunks, fail the
check job. They are a switch body indented two columns too deep, an
initializer brace one level in, and two declarations with no blank line
after them.
Whitespace only, no change in behaviour.
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
The ET_DYN path computes run-time addresses from link-time ones in five
places, each open-coding the arithmetic, and two of them disagree about
how: libelf_relocatedyn() adds textalloc to a relocation's r_offset in
one branch and subtracts datasec before adding datastart in the next,
while the value translation a few lines further down picks between those
two forms with an explicit test on datasec.
Collect that into libelf_addr(), which makes the test once: an address
below the data segment's link-time base belongs to text, anything at or
above it to data.
This changes nothing today. libelf_elfsize() sets
segpad = datasec - (text_vaddr + textsize)
and libelf_load() then places
datastart = textalloc + textsize + segpad
so datastart - datasec is textalloc, and the data branch reduces to
textalloc + vaddr -- exactly what the text branch returns, and exactly
what adding a single load bias did before. The two forms are the same
arithmetic written twice.
They stop being the same once text and data are placed independently,
which is what an FDPIC object requires: its two PT_LOAD segments are
relocated separately so that the read-only one can be mapped in place on
the media while only the writable one is copied. Having the translation
in one function is what makes that possible without auditing every
open-coded expression again.
Built for mps3-an547:picostest, which is CONFIG_ELF with CONFIG_PIC, and
boots identically to the same configuration without this change.
Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
Implement atomic_lock/atomic_unlock using hwspinlock when
CONFIG_LIBC_ATOMIC_HWSPINLOCK is selected, and using up_irq_save/
up_irq_restore when CONFIG_LIBC_ATOMIC_IRQ is selected. Rename
arch_atomic_irq.c to arch_atomic.c.
The 64-bit atomic operations use spinlock (spin_lock_irqsave)
regardless of the selected backend, ensuring multi-core safety.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
Add hardware spinlock driver implementations for cxd56, rp2040, and
lc823450 chips. These drivers provide the hwspinlock_ops_s interface
used by the atomic hwspinlock backend.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
Use irq-based critical sections instead of spinlock_irq to avoid
potential deadlock in atomic contexts.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
Adds GPIO defconfig on M5Stack Tab5. The example has one GPIO output
and one GPIO interrupt.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Add an lstat method to mountpt_operations so that mounted file systems
can report link metadata without dereferencing symbolic links.
In mountptrename() and stat_recursive(), prefer lstat() over stat()
when it is available so that rename() and the non-following stat path
operate on the link itself rather than its target, matching POSIX
semantics.
Signed-off-by: zhengyu16 <zhengyu16@xiaomi.com>
resolve rename{7}:
On a call to rename(old, new), when the old argument points to the pathname of a directory, if the directory named by the new argument exists and is empty it shall be removed and old renamed to new.
resolve rename{23}:
EEXIST or ENOTEMPTY in errno and a return value of -1 on a call to rename(old, new) when the link named by new is a directory containing
entries other than dot and dot-dot. The named files are not changed.
Signed-off-by: zhengyu16 <zhengyu16@xiaomi.com>
1. add three func to mountpt_operations:
link
symlink
readlink
2. modify fs_link、fs_symlink、fs_readlink for mountpt
Signed-off-by: zhengyu16 <zhengyu16@xiaomi.com>
The link support is no longer limited to the pseudo file system and now
covers both soft (symbolic) links and hard links across the VFS. Rename
the configuration option PSEUDOFS_SOFTLINKS to the more accurate FS_LINKS
and update all references in the source, headers, Kconfig, documentation
and board defconfigs accordingly.
This is a configuration rename; any out-of-tree defconfig that still
selects PSEUDOFS_SOFTLINKS must be updated to FS_LINKS.
Signed-off-by: zhengyu16 <zhengyu16@xiaomi.com>
Wire the shared Ameba RTC driver (arch/arm/src/common/ameba/ameba_rtc.c)
into RTL8721F (amebagreen2). The driver is chip-agnostic and reads only
per-chip macros from ameba_rtc_chip.h; RTL8721F differs from amebadplus
only in the RTC interrupt vector (RTL8721F_IRQ_RTC, vector 41). The
APBPeriph_RTC masks and RTC_BASE_YEAR (1900) are identical across all
current Ameba chips.
- ameba_rtc_chip.h: per-chip RTC IRQ / clock masks / base year
- Make.defs, ameba_board.mk: compile ameba_rtc.c and the fwlib RAM
RTC source when CONFIG_AMEBA_RTC=y
- board: rtl8721f_rtc.c registers /dev/rtc0 from bringup
- configs/rtc: examples/alarm profile
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Assisted-by: Claude <noreply@anthropic.com>
Wire the shared Ameba RTC driver (arch/arm/src/common/ameba/ameba_rtc.c)
into RTL8720F. The driver is chip-agnostic and reads only per-chip macros
from ameba_rtc_chip.h; RTL8720F differs from amebadplus only in the RTC
interrupt vector (RTL8720F_IRQ_RTC, vector 33). The APBPeriph_RTC masks
and RTC_BASE_YEAR (1900) are identical across all current Ameba chips.
- ameba_rtc_chip.h: per-chip RTC IRQ / clock masks / base year
- Make.defs, ameba_board.mk: compile ameba_rtc.c and the fwlib RAM
RTC source when CONFIG_AMEBA_RTC=y
- board: rtl8720f_rtc.c registers /dev/rtc0 from bringup
- configs/rtc: examples/alarm profile
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Assisted-by: Claude <noreply@anthropic.com>
Expose the Ameba on-chip RTC as a NuttX date/time RTC at /dev/rtc0
(rdtime/settime) with a single one-shot alarm (setalarm/rdalarm/
cancelalarm/setrelative) that fires the RTC interrupt and the upper-half
callback. The same hardware also backs the arch date/time RTC hooks
(up_rtc_initialize/getdatetime/settime, g_rtc_enabled) so the NuttX
system time is seeded from it.
The driver sits on the SDK fwlib RTC API (mirrored structures + local
externs, no vendor headers pulled into the NuttX include world). The
fwlib RTC API lives in the RAM source ameba_rtc.c, so it is added to the
board fwlib build under CONFIG_AMEBA_RTC. The hardware keeps a year plus
a day-of-year (no month/day register); the driver bridges that to the
NuttX month/day calendar with the libc UTC routines (timegm/gmtime_r),
which is exact and reversible.
The only per-chip fact -- the RTC interrupt vector -- lives in the
per-chip ameba_rtc_chip.h; the shared driver is never edited for a new
Ameba chip. A configs/rtc profile (examples/alarm) is added for
verification.
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Assisted-by: Claude <noreply@anthropic.com>
List every peripheral implemented by STM32U3C5, and update the common GPIO, EXTI
and USART driver paths after the Cortex-M33 migration.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
Replace the enumerated STM32U3/U5 chip conditions in the common M33
source lists and the RCC dispatch header with a single STM32_COMMON_M33
symbol, following the existing STM32_COMMON_* convention.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
Rename the U3 and U5 family-local Cortex-M33 RCC headers to
stm32_rcc_m33.h and dispatch to that private name for the two families
in the common RCC header.
This lets the shared M33 USART implementation use one include name
while RCC registers and clock definitions remain family-local. Extend
the stm32_ports.rst naming rules with the M33 header, source, and
Kconfig symbol conventions.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
Rename the shared U3/U5 heap allocator to stm32_allocateheap_m33_v1.c
and keep its direct family selection in Make and CMake.
Size the primary region from a now-mandatory STM32_PRIMARY_SRAM_SIZE,
provided by the U5 chip header as the SRAM1 size, and drop the
U5-specific SRAM bank descriptions so the allocator carries no family
conditionals.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
Rename the shared U3/U5 reset handler to stm32_start_m33_v1.c and keep
its direct family selection in Make and CMake.
Include stm32_userspace.h only under CONFIG_BUILD_PROTECTED and define
the SRAM2 span only when CONFIG_STM32_SRAM2_INIT requests the parity
initialization, so families without SRAM2 parity or userspace support
can use the file unchanged.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
Rename the shared U3/U5 USART sources to stm32_serial_m33_v3.c and
stm32_lowputc_usart_m33_v3.c and gate them with a new
STM32_HAVE_IP_USART_M33_V3 symbol selected by the U3 and U5 peripheral
options. Rename the USART hardware header to stm32_uart_m33_v3.h with
its register map unchanged.
Store each port's RCC enable register and bit in the serial
descriptor, provided by the family RCC headers as
STM32_<port>_FREQUENCY, _RCC_REG and _RCC_EN, so common clock control
needs no family-specific switch. Correct the LPUART1 RX DMA map name
to DMAMAP_LPUART1_RX.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
Rename the U3/U5 GPIO and EXTI sources to stm32_gpio_m33_v1.c and
stm32_exti_gpio_m33_v1.c and gate them with new
STM32_HAVE_IP_GPIO_M33_V1 and STM32_HAVE_IP_EXTI_M33_V1 symbols
selected by the U3 and U5 peripheral options.
Rename the GPIO and EXTI hardware headers to stm32_gpio_m33_v1.h and
stm32_exti_m33_v1.h with their register maps unchanged, dispatch to
them from the common GPIO and EXTI hardware headers by the new IP
symbols, and widen STM32_EXTI_EXTICR_PORT_MASK to the full 8-bit
EXTICR port-select field.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
Remove the disabled CONFIG_STM32_SYSTICK_HCLKd8 reload path and the
non-functional clock-source write. SysTick always runs from HCLK on
these devices, so compute the reload value from STM32_HCLK_FREQUENCY
only.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
Iterate the NVIC interrupt enable and priority registers from
STM32_IRQ_NEXTINTS instead of dumping a hardcoded U3/U5 register list,
so the helper works unchanged for any interrupt count.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
Rename the U3/U5 idle, NVIC, and SysTick sources to the Cortex-M33 v1
naming convention: stm32_idle_m33_v1.c, stm32_irq_m33_v1.c, and
stm32_timerisr_m33_v1.c, and move them into their own Make and CMake
block, still selected by the direct U3/U5 family condition.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
Switch all three esp32p4 boards' nsh defconfigs (esp32p4-function-ev-board,
esp32p4-pico-wifi-wareshare, esp32p4-tab5) from nsh_main to nxinit
(init_main) as the system init entry point, matching the esp32s3 boards'
existing nxinit configs for consistency across Espressif boards.
- Add boards/risc-v/esp32p4/common/src/etc/init.d/init.rc, copied from
the esp32s3 common version: registers a "console sh" service (nsh)
guarded by CONFIG_SYSTEM_NSH, plus adbd/fastbootd service stubs
guarded by their own Kconfig symbols for future reuse; "on init"
starts whichever services are enabled.
- boards/risc-v/esp32p4/common/src/Make.defs: ship init.rc via ROMFS
(RCSRCS) when CONFIG_SYSTEM_NXINIT=y, alongside the existing
rc.sysinit/rcS, mirroring esp32s3's Make.defs.
- Per board defconfig:
- CONFIG_INIT_ENTRYPOINT switched to "init_main"
- CONFIG_INIT_STACKSIZE=8192 (was unset/2048 default), matching the
value already used and measured on esp32s3 boards for the
nxinit init task running console-sh (and up to two services)
- CONFIG_SYSTEM_NXINIT=y added, plus its direct Kconfig dependencies:
CONFIG_LIBC_EXECFUNCS, CONFIG_SCHED_CHILD_STATUS (which depends on
CONFIG_SCHED_HAVE_PARENT); CONFIG_EXPERIMENTAL was already set on
all three boards
- CONFIG_SYSTEM_NSH_STACKSIZE=8192 added: nsh now runs as a service
spawned by init.rc instead of being init itself, so it needs its
own stack instead of borrowing the init stack
- CONFIG_ETC_ROMFS/CONFIG_FS_ROMFS added, needed to ship init.rc via
the board's ROMFS
nsh continues to run as a console service started by init.rc
(boards/risc-v/esp32p4/common/src/etc/init.d/init.rc), not as the
top-level init.
CMake: esp32p4's common/src/CMakeLists.txt currently has no ROMFS/RCSRCS
wiring at all (unlike e.g. esp32c3's nuttx_add_romfs() block), so
rc.sysinit/rcS/init.rc are only shipped via the Make build. This is a
pre-existing gap independent of this change and is left untouched here.
Verified all three defconfigs with:
./tools/configure.sh -l <board>:nsh
make -j$(nproc) CROSSDEV=riscv-none-elf-
using the xPack riscv-none-elf-gcc 14.2.0 toolchain (the local
riscv64-unknown-elf-gcc bare-metal toolchain lacks sys/cdefs.h needed
by esp-hal-3rdparty). All three link cleanly with no errors/warnings;
the built nuttx.bin contains the init.rc-embedded "service console sh"
string, confirming init.rc is picked up by the ROMFS build. Each
defconfig was regenerated with "make savedefconfig" to normalize
field ordering.
esp32p4 has no hardware attached in this session, so this change is
build-verified only; no flash/boot pass was performed.
Assisted-by: opencode/claude-sonnet-5
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Blank lines only; `git diff --ignore-blank-lines` against the parent is empty.
Assisted-by: Claude:claude-opus-5
Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com>
