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arch/arm/stm32: Generalize Cortex-M33 GPIO and EXTI support

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Rename the U3/U5 GPIO and EXTI sources to stm32_gpio_m33_v1.c and
stm32_exti_gpio_m33_v1.c and gate them with new
STM32_HAVE_IP_GPIO_M33_V1 and STM32_HAVE_IP_EXTI_M33_V1 symbols
selected by the U3 and U5 peripheral options.

Rename the GPIO and EXTI hardware headers to stm32_gpio_m33_v1.h and
stm32_exti_m33_v1.h with their register maps unchanged, dispatch to
them from the common GPIO and EXTI hardware headers by the new IP
symbols, and widen STM32_EXTI_EXTICR_PORT_MASK to the full 8-bit
EXTICR port-select field.

Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
This commit is contained in:
raiden00pl 2026-08-24 09:58:06 +02:00 • committed by Xiang Xiao
parent 52cf372b21
commit 399f76d6ed
13 changed files with 53 additions and 44 deletions
Download patch file Download diff file Expand all files Collapse all files

19
arch/arm/src/common/stm32/CMakeLists.txt
View file

@ -40,15 +40,16 @@ if(NOT CONFIG_ARCH_CUSTOM_PMINIT AND (CONFIG_STM32_COMMON_LEGACY
endif()
if(CONFIG_ARCH_CHIP_STM32U3 OR CONFIG_ARCH_CHIP_STM32U5)
list(
APPEND
SRCS
stm32_allocateheap_m33_u3u5.c
stm32_exti_gpio_m33_u3u5.c
stm32_gpio_m33_u3u5.c
stm32_lowputc_m33_u3u5.c
stm32_serial_m33_u3u5.c
stm32_start_m33_u3u5.c)
list(APPEND SRCS stm32_allocateheap_m33_u3u5.c stm32_lowputc_m33_u3u5.c
stm32_serial_m33_u3u5.c stm32_start_m33_u3u5.c)
endif()
if(CONFIG_STM32_HAVE_IP_GPIO_M33_V1)
list(APPEND SRCS stm32_gpio_m33_v1.c)
endif()
if(CONFIG_STM32_HAVE_IP_EXTI_M33_V1)
list(APPEND SRCS stm32_exti_gpio_m33_v1.c)
endif()
if(CONFIG_ARCH_CHIP_STM32U3 OR CONFIG_ARCH_CHIP_STM32U5)

8
arch/arm/src/common/stm32/Kconfig.have
View file

@ -33,6 +33,14 @@
# ADC capabilities
# Cortex-M33 GPIO and EXTI capabilities
config STM32_HAVE_IP_GPIO_M33_V1
bool
config STM32_HAVE_IP_EXTI_M33_V1
bool
config STM32_HAVE_ADC_TIMTRIG_TRGO2
bool
default y if (STM32_HAVE_IP_ADC_M3M4_V1 || STM32_HAVE_IP_ADC_M3M4_V2) || STM32_HAVE_IP_ADC_M0_V1 || ARCH_CHIP_STM32F7 || ARCH_CHIP_STM32H5

10
arch/arm/src/common/stm32/Make.defs
View file

@ -52,13 +52,19 @@ endif
ifneq ($(filter y,$(CONFIG_ARCH_CHIP_STM32U3) \
$(CONFIG_ARCH_CHIP_STM32U5)),)
CHIP_CSRCS += stm32_allocateheap_m33_u3u5.c
CHIP_CSRCS += stm32_exti_gpio_m33_u3u5.c
CHIP_CSRCS += stm32_gpio_m33_u3u5.c
CHIP_CSRCS += stm32_lowputc_m33_u3u5.c
CHIP_CSRCS += stm32_serial_m33_u3u5.c
CHIP_CSRCS += stm32_start_m33_u3u5.c
endif
ifeq ($(CONFIG_STM32_HAVE_IP_GPIO_M33_V1),y)
CHIP_CSRCS += stm32_gpio_m33_v1.c
endif
ifeq ($(CONFIG_STM32_HAVE_IP_EXTI_M33_V1),y)
CHIP_CSRCS += stm32_exti_gpio_m33_v1.c
endif
ifneq ($(filter y,$(CONFIG_ARCH_CHIP_STM32U3) \
$(CONFIG_ARCH_CHIP_STM32U5)),)
CHIP_CSRCS += stm32_irq_m33_v1.c

5
arch/arm/src/common/stm32/hardware/stm32_exti.h
View file

@ -33,10 +33,9 @@
* version is core-agnostic.
*/
#if defined(CONFIG_ARCH_CHIP_STM32U3) || \
defined(CONFIG_ARCH_CHIP_STM32U5)
#if defined(CONFIG_STM32_HAVE_IP_EXTI_M33_V1)
# include "hardware/stm32_exti_m33_u3u5.h"
# include "hardware/stm32_exti_m33_v1.h"
#elif (defined(CONFIG_STM32_HAVE_IP_EXTI_V1) + \
defined(CONFIG_STM32_HAVE_IP_EXTI_V2)) > 1

10
arch/arm/src/common/stm32/hardware/stm32_exti_m33_u3u5.h → arch/arm/src/common/stm32/hardware/stm32_exti_m33_v1.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/common/stm32/hardware/stm32_exti_m33_u3u5.h
* arch/arm/src/common/stm32/hardware/stm32_exti_m33_v1.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_STM32_HARDWARE_STM32_EXTI_M33_U3U5_H
#define __ARCH_ARM_SRC_COMMON_STM32_HARDWARE_STM32_EXTI_M33_U3U5_H
#ifndef __ARCH_ARM_SRC_COMMON_STM32_HARDWARE_STM32_EXTI_M33_V1_H
#define __ARCH_ARM_SRC_COMMON_STM32_HARDWARE_STM32_EXTI_M33_V1_H
/****************************************************************************
* Included Files
@ -463,6 +463,6 @@
/* GPIO port selection occupies four bits in each EXTICR field. */
#define STM32_EXTI_EXTICR_PORT_MASK 0x0f
#define STM32_EXTI_EXTICR_PORT_MASK 0xff
#endif /* __ARCH_ARM_SRC_COMMON_STM32_HARDWARE_STM32_EXTI_M33_U3U5_H */
#endif /* __ARCH_ARM_SRC_COMMON_STM32_HARDWARE_STM32_EXTI_M33_V1_H */

5
arch/arm/src/common/stm32/hardware/stm32_gpio.h
View file

@ -27,9 +27,8 @@
* Included Files
****************************************************************************/
#if defined(CONFIG_ARCH_CHIP_STM32U3) || \
defined(CONFIG_ARCH_CHIP_STM32U5)
# include "hardware/stm32_gpio_m33_u3u5.h"
#if defined(CONFIG_STM32_HAVE_IP_GPIO_M33_V1)
# include "hardware/stm32_gpio_m33_v1.h"
#elif defined(CONFIG_STM32_HAVE_IP_GPIO_M0_V1)
# include "hardware/stm32_gpio_v2_m0.h"
#elif defined(CONFIG_STM32_STM32L15XX)

8
arch/arm/src/common/stm32/hardware/stm32_gpio_m33_u3u5.h → arch/arm/src/common/stm32/hardware/stm32_gpio_m33_v1.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/common/stm32/hardware/stm32_gpio_m33_u3u5.h
* arch/arm/src/common/stm32/hardware/stm32_gpio_m33_v1.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_STM32_HARDWARE_STM32_GPIO_M33_U3U5_H
#define __ARCH_ARM_SRC_COMMON_STM32_HARDWARE_STM32_GPIO_M33_U3U5_H
#ifndef __ARCH_ARM_SRC_COMMON_STM32_HARDWARE_STM32_GPIO_M33_V1_H
#define __ARCH_ARM_SRC_COMMON_STM32_HARDWARE_STM32_GPIO_M33_V1_H
/****************************************************************************
* Included Files
@ -767,4 +767,4 @@
#define GPIO_SECCFGR_SET(n) (1 << (n))
#endif /* __ARCH_ARM_SRC_COMMON_STM32_HARDWARE_STM32_GPIO_M33_U3U5_H */
#endif /* __ARCH_ARM_SRC_COMMON_STM32_HARDWARE_STM32_GPIO_M33_V1_H */

4
arch/arm/src/common/stm32/stm32_exti_gpio_m33_u3u5.c → arch/arm/src/common/stm32/stm32_exti_gpio_m33_v1.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/common/stm32/stm32_exti_gpio_m33_u3u5.c
* arch/arm/src/common/stm32/stm32_exti_gpio_m33_v1.c
*
* SPDX-License-Identifier: Apache-2.0
*
@ -38,8 +38,8 @@
#include "arm_internal.h"
#include "chip.h"
#include "hardware/stm32_exti_m33_v1.h"
#include "stm32_gpio.h"
#include "stm32_exti.h"
/****************************************************************************
* Private Types

5
arch/arm/src/common/stm32/stm32_gpio.h
View file

@ -29,9 +29,8 @@
#include <nuttx/config.h>
#if defined(CONFIG_ARCH_CHIP_STM32U3) || \
defined(CONFIG_ARCH_CHIP_STM32U5)
# include "stm32_gpio_m33_u3u5.h"
#if defined(CONFIG_STM32_HAVE_IP_GPIO_M33_V1)
# include "stm32_gpio_m33_v1.h"
#elif defined(CONFIG_STM32_HAVE_IP_GPIO_M0_V1)
# include "stm32_gpio_m0_v1.h"
#elif defined(CONFIG_STM32_HAVE_IP_GPIO_M3M4_V1)

2
arch/arm/src/common/stm32/stm32_gpio_m33_u3u5.c → arch/arm/src/common/stm32/stm32_gpio_m33_v1.c
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/common/stm32/stm32_gpio_m33_u3u5.c
* arch/arm/src/common/stm32/stm32_gpio_m33_v1.c
*
* SPDX-License-Identifier: Apache-2.0
*

17
arch/arm/src/common/stm32/stm32_gpio_m33_u3u5.h → arch/arm/src/common/stm32/stm32_gpio_m33_v1.h
View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/common/stm32/stm32_gpio_m33_u3u5.h
* arch/arm/src/common/stm32/stm32_gpio_m33_v1.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_STM32_STM32_GPIO_M33_U3U5_H
#define __ARCH_ARM_SRC_COMMON_STM32_STM32_GPIO_M33_U3U5_H
#ifndef __ARCH_ARM_SRC_COMMON_STM32_STM32_GPIO_M33_V1_H
#define __ARCH_ARM_SRC_COMMON_STM32_STM32_GPIO_M33_V1_H
/****************************************************************************
* Included Files
@ -38,14 +38,7 @@
#include <arch/chip/chip.h>
#include "chip.h"
#if defined(CONFIG_STM32_STM32U3C5XX) || \
defined(CONFIG_STM32_STM32U585XX) || \
defined(CONFIG_STM32_STM32U5A5XX)
# include "hardware/stm32_gpio_m33_u3u5.h"
#else
# error "Unsupported STM32U3/U5 chip"
#endif
#include "hardware/stm32_gpio_m33_v1.h"
/****************************************************************************
* Pre-Processor Declarations
@ -364,4 +357,4 @@ void stm32_gpioinit(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_COMMON_STM32_STM32_GPIO_M33_U3U5_H */
#endif /* __ARCH_ARM_SRC_COMMON_STM32_STM32_GPIO_M33_V1_H */

2
arch/arm/src/stm32u3/Kconfig
View file

@ -10,6 +10,8 @@ comment "STM32U3 Configuration Options"
config STM32_U3_PERIPHERALS
bool
default y
select STM32_HAVE_IP_EXTI_M33_V1
select STM32_HAVE_IP_GPIO_M33_V1
select STM32_HAVE_SYSCFG
select STM32_HAVE_USART1
select STM32_HAVE_USART2

2
arch/arm/src/stm32u5/Kconfig
View file

@ -10,6 +10,8 @@ comment "STM32U5 Configuration Options"
config STM32_U5_PERIPHERALS
bool
default y
select STM32_HAVE_IP_EXTI_M33_V1
select STM32_HAVE_IP_GPIO_M33_V1
select STM32_HAVE_COMP
select STM32_HAVE_CRS
select STM32_HAVE_DAC1