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arch/arm/stm32: Drop dead Cortex-M33 SysTick clock-source selection
Remove the disabled CONFIG_STM32_SYSTICK_HCLKd8 reload path and the non-functional clock-source write. SysTick always runs from HCLK on these devices, so compute the reload value from STM32_HCLK_FREQUENCY only. Signed-off-by: raiden00pl <raiden00@railab.me> Assisted-by: Claude Code
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1 changed files with 2 additions and 27 deletions
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@ -48,23 +48,10 @@
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* system clock ticks per second. That value is a user configurable setting
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* that defaults to 100 (100 ticks per second = 10 MS interval).
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*
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* The RCC feeds the Cortex System Timer (SysTick) with the AHB clock (HCLK)
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* divided by 8. The SysTick can work either with this clock or with the
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* Cortex clock (HCLK), configurable in the SysTick Control and Status
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* register.
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* The Cortex System Timer (SysTick) uses the Cortex clock (HCLK).
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*/
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/* Power up default is HCLK, not HCLK/8.
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* And I don't know now to re-configure it yet
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*/
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#undef CONFIG_STM32_SYSTICK_HCLKd8
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#ifdef CONFIG_STM32_SYSTICK_HCLKd8
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# define SYSTICK_RELOAD ((STM32_HCLK_FREQUENCY / 8 / CLK_TCK) - 1)
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#else
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# define SYSTICK_RELOAD ((STM32_HCLK_FREQUENCY / CLK_TCK) - 1)
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#endif
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#define SYSTICK_RELOAD ((STM32_HCLK_FREQUENCY / CLK_TCK) - 1)
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/* The size of the reload field is 24 bits. Verify that the reload value
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* will fit in the reload register.
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@ -119,18 +106,6 @@ void up_timer_initialize(void)
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regval |= (NVIC_SYSH_PRIORITY_DEFAULT << NVIC_SYSH_PRIORITY_PR15_SHIFT);
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putreg32(regval, NVIC_SYSH12_15_PRIORITY);
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/* Make sure that the SYSTICK clock source is set correctly */
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#if 0 /* Does not work. Comes up with HCLK source and I can't change it */
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regval = getreg32(NVIC_SYSTICK_CTRL);
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#ifdef CONFIG_STM32_SYSTICK_HCLKd8
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regval &= ~NVIC_SYSTICK_CTRL_CLKSOURCE;
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#else
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regval |= NVIC_SYSTICK_CTRL_CLKSOURCE;
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#endif
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putreg32(regval, NVIC_SYSTICK_CTRL);
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#endif
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/* Configure SysTick to interrupt at the requested rate */
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putreg32(SYSTICK_RELOAD, NVIC_SYSTICK_RELOAD);
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