Ensure esp-hal copied headers are generated during nuttx_context so parallel CMake builds cannot compile sources before arch/chip/irq.h exists.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Implement up_backtrace() for TriCore by walking the CSA chain and
collecting return addresses from upper CSA A11 register.
Signed-off-by: LukeKun <donghaokun@lixiang.com>
Update the destination register to r15 (PC) for test and clean
operations, as specified by the ARM926EJ-S Technical Reference
Manual (TRM). Using the wrong destination register prevented the
loop condition from updating correctly, resulting in an infinite
loop.
Signed-off-by: Lwazi Dube <lwazeh@gmail.com>
- Invoke `codesign` and after lief rewrites the binary, so the modified
Mach-O remains loadable on macOS.
- Run the patch script via a dedicated `sim_patch_macho_initsection`
custom target attached to `nuttx_post`, instead of a POST_BUILD
command on the `nuttx` target.
Signed-off-by: Shoji Tokunaga <toku@mac.com>
The sim architecture needs to defer C++ global constructors until after
NuttX kernel initialization completes. On macOS this was previously done
via a runtime hack (sim_macho_init.c): a __attribute__((constructor))
function intercepted constructors, saved them, and replayed them later.
That approach was fragile because it depended on constructor ordering
and required mprotect() to patch the read-only __mod_init_func section
at runtime.
This commit replaces the runtime hack with a post-link patching scheme:
1. Link with -Wl,-ld_classic,-no_fixup_chains to keep the classic
__mod_init_func pointer format (prevents ld64 from converting it
to __init_offsets).
2. Post-link, run patch_macho_initsection.py (python3 + lief) to
patch Mach-O section type flags from
MOD_INIT_FUNC_POINTERS/INIT_FUNC_OFFSETS to REGULAR, so dyld
skips them entirely.
3. Use the Mach-O auto-generated boundary symbols
section$start$__DATA_CONST$__mod_init_func /
section$end$__DATA_CONST$__mod_init_func, mapped via __asm()
labels in arch/sim/include/arch.h to the common _sinit[]/_einit[]
names used by lib_cxx_initialize().
Linux behavior is unchanged.
Changes:
- arch/sim/include/arch.h: add macOS __asm() declarations for
_sinit/_einit
- arch/sim/src/Makefile: drop sim_macho_init.c HEADSRC handling,
always pass -ld_classic,-no_fixup_chains on macOS, run
patch_macho_initsection.py after link when CONFIG_HAVE_CXXINITIALIZE
- arch/sim/src/sim/CMakeLists.txt: same for the CMake build
- arch/sim/src/patch_macho_initsection.py: new lief-based patcher
- arch/sim/src/sim/posix/sim_macho_init.c: deleted (135-line hack)
- libs/libc/misc/lib_cxx_initialize.c: remove
macho_call_saved_init_funcs special case; single unified loop
Testing:
- macOS (Ventura VM): verified lief patching with standalone test
(test_sinit7) confirming the constructor is deferred past main()
and only invoked when explicitly called via the _sinit/_einit loop.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
For boards b-g431b-esc1/nsh, nucleo-g431kb/nsh and nucleo-g431rb/nsh,
the `.data` section of nuttx.elf overflows the 128 KB flash region by a
few hundred bytes on default GNU EABI builds:
arm-none-eabi-ld: nuttx section `.data' will not fit in region `flash'
arm-none-eabi-ld: region `flash' overflowed by 296 bytes
Enabling CONFIG_LTO_FULL=y in the corresponding defconfigs brings flash
usage back below the 128 KB limit (~93%).
Additionally, fix arch/arm/src/cmake/gcc.cmake so that when LTO is
enabled it always uses the gcc-ar / gcc-nm / gcc-ranlib wrappers, not
just when CONFIG_ARM_TOOLCHAIN_GNU_EABI is also set. CI tooling (via
tools/testbuild.sh) configures cmake first, then flips the toolchain
choice in .config with kconfig-tweak before running `cmake --build`.
With the previous "ARM_TOOLCHAIN_GNU_EABI && !LTO_NONE" guard the
regen step would switch to plain `ar` for the .a files, even though the
linker driver picked at configure time is still arm-none-eabi-g++ and
the object files contain GCC LTO IR. The result was a flood of
"undefined reference to `printf' / `free' / `puts' ..." link errors
when running tools/testbuild.sh -A -N -R on the *_CLANG variants.
Now that we are inside gcc.cmake the toolchain is unambiguously GCC,
so dropping the redundant CONFIG_ARM_TOOLCHAIN_GNU_EABI conjunct keeps
the LTO-aware ar wrappers in place across kconfig-tweak toolchain
switches.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Now that time_t is unconditionally 64-bit (signed int64_t) and the
struct timespec fields tv_sec / tv_nsec are wide enough on their own,
the explicit (uint64_t)/(int64_t)/(int) casts that used to guard the
multiplications and subtractions in *_us / *_ms / *_ns helpers are no
longer needed. Drop them to keep the timekeeping math readable and
consistent with the previous sclock_t/time_t cleanup.
In the same spirit, this commit also:
* Normalises the printf-style format specifiers and casts used to
print tv_sec / tv_nsec / tv_usec values across arch/, drivers/,
fs/, sched/ and libs/. The prior code was a mix of
"%d"/"%u"/"%ld"/"%lu"/"%lld"/PRIu32/PRIu64 with matching
(int)/(unsigned long)/(long long)/PRIu* casts; some formats
truncated time_t on 32-bit hosts, others mismatched signedness or
width. Replace all such cases with the portable POSIX-recommended
forms:
- tv_sec (time_t, signed, impl-defined width) -> %jd + (intmax_t)
- tv_nsec (long, signed) -> %ld (no cast)
- tv_usec (suseconds_t / long) -> %ld (no cast)
Add #include <stdint.h> where required.
* Drops a few stale `(FAR const time_t *)&ts.tv_sec` casts and
related `(FAR struct tm *)` / `(const time_t *)` casts in
gmtime_r() / localtime_r() / gmtime() callers; ts.tv_sec is plain
time_t now and the casts only obscured the type.
* Fixes one overflow in fs/procfs/fs_procfscritmon.c where
all_time.tv_sec * 1000000 could overflow on 32-bit time_t before
being multiplied again; cast to uint64_t at the start.
No behavioural change.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
POSIX leaves the signedness of time_t and clock_t unspecified, but
mainstream implementations (Linux glibc/musl, the BSDs, macOS, RTEMS,
Zephyr's POSIX layer, Windows _time64) expose time_t as signed 64-bit.
NuttX has historically used uint64_t only because it was tied to the
CONFIG_SYSTEM_TIME64 knob; with that gone, switch:
time_t : uint64_t -> int64_t
clock_t : uint64_t -> int64_t
CLOCK_MAX: UINT64_MAX -> INT64_MAX
This lets (time_t)-1 sentinels, negative tick deltas, and host-side
headers behave as on every other POSIX system without source churn.
Headers updated:
- include/sys/types.h, include/limits.h, include/nuttx/clock.h
- include/nuttx/fs/hostfs.h (nuttx_time_t alias)
- include/nuttx/{mqueue.h,wdog.h,wqueue.h,timers/clkcnt.h}
Because clock_t is now signed 64-bit, the NuttX-internal sclock_t
alias becomes redundant: every sclock_t/SCLOCK_MAX use is folded
back to clock_t/CLOCK_MAX (notably in sched/wdog, sched/mqueue,
sched/sched, sched/clock, sched/timer, libs/libc/time, fs/vfs and
the drivers/arch consumers below).
Tick/period constants (NSEC_PER_SEC, USEC_PER_SEC, MSEC_PER_SEC,
SEC_PER_MIN, ...) in include/nuttx/clock.h are retyped from "long"
literals to INT64_C(...) so that 64-bit arithmetic no longer
depends on the host's long width.
Strip now-redundant (time_t)/(clock_t)/(unsigned long) casts and
unsigned-only branches across the tree:
- arch RTC / oneshot / tickless lowerhalfs:
arm: cxd56xx, efm32, imxrt, lc823450, max326xx, sam34, sama5,
samd5e5, samv7, stm32, stm32f7, stm32h7, stm32l4, stm32wb,
xmc4
mips: pic32mz sparc: bm3803 x86_64: intel64
risc-v/xtensa: espressif (esp_i2c[_slave], esp_rtc,
esp32c3{_i2c,_rtc,_wifi_adapter}, esp32{,s2,s3}_*),
mpfs_perf
- drivers: audio/tone, input/aw86225, power/pm/{activity,
stability}_governor, rpmsg/rpmsg_ping,
timers/{ds3231,mcp794xx,pcf85263,rx8010},
wireless/ieee80211/bcm43xxx, wireless/spirit/spirit_spi
- core: fs/vfs/{fs_poll,fs_timerfd}, mm/iob/iob_alloc,
libs/libc/{netdb/lib_dnscache,time/{lib_calendar2utc,
lib_time}}, net/icmp/icmp_pmtu, net/icmpv6/icmpv6_pmtu,
net/ipfrag, net/tcp/{tcp.h,tcp_timer},
net/utils/net_snoop, net/mld/mld_query (drop the now-dead
mld_mrc2mrd helper since signed math handles it directly),
sched/clock/{clock,clock_initialize},
sched/sched/{sched_profil,sched_setparam,sched_setscheduler},
sched/pthread/pthread_create,
sched/wdog/{wd_gettime,wd_start,wdog.h},
sched/timer/timer_gettime, sched/mqueue/*
Flip the few in-tree printf format strings that assumed an
unsigned 64-bit tv_sec:
* drivers/rpmsg/rpmsg_ping.c PRIu64 -> PRId64
* arch/xtensa/src/esp32{,s2,s3}/esp32*_oneshot_lowerhalf.c
PRIu32 (already wrong) -> PRId64
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
The 32-bit system clock has a limited range (~497 days) and the
configuration knob is no longer worth the complexity given that
practically every modern target already enables it. Make 64-bit
time_t/clock_t/sclock_t/nuttx_time_t the only supported flavor.
Specifically:
- Drop the SYSTEM_TIME64 Kconfig option and its dependent
PERF_OVERFLOW_CORRECTION/HRTIMER guards in sched/Kconfig.
- Remove every #ifdef CONFIG_SYSTEM_TIME64 branch in headers
(include/{sys/types.h,limits.h,inttypes.h,nuttx/clock.h,
nuttx/fs/hostfs.h}) and core code paths
(sched/clock/clock.h, drivers/power/pm/pm_procfs.c,
drivers/rpmsg/rpmsg_ping.c, fs/procfs/fs_procfsuptime.c,
libs/libc/wqueue/work_usrthread.c,
arch/avr/src/avrdx/avrdx_timerisr_tickless_alarm.c).
- Strip CONFIG_SYSTEM_TIME64=y from every board defconfig.
- Update Documentation/guides/rust.rst accordingly.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Long long support is now unconditional in printf/scanf and related
helpers. Remove the Kconfig option, the conditional compilation in
libvsprintf/libvscanf/ultoa_invert, the build-time #error in the
rn2xx3 driver, and clean up CONFIG_LIBC_LONG_LONG entries from all
board defconfigs.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Every compiler supported by NuttX provides the "long long" types,
so the CONFIG_HAVE_LONG_LONG indirection is no longer useful.
Remove the option from include/nuttx/compiler.h and treat
"long long" as unconditionally available across the OS.
In addition to deleting the guard itself, this commit unconditionally
enables the long-long flavored helpers that used to be gated behind
it:
- libs/libc/fixedmath: drop the soft-emulated b32/ub32 routines
in lib_fixedmath.c (-261 lines) and trim the matching
prototypes, Make.defs and CMakeLists.txt entries; keep only
the long-long backed implementations.
- include/sys/endian.h, include/strings.h, libs/libc/string
/lib_ffsll.c, lib_flsll.c: always expose the 64-bit byte-swap
and ffsll/flsll variants.
- libs/libm/libm/lib_llround{,f,l}.c: drop the empty stubs.
- libs/libc/stdlib (atoll, llabs, lldiv, strtoll/ull, rand48,
strtold), libs/libc/stream (libvsprintf, libvscanf,
libbsprintf, ultoa_invert), libs/libc/misc (crc64, crc64emac),
libs/libc/inttypes/strtoimax, libs/libc/lzf, libs/libc/libc.csv,
libs/libc/string (memset, vikmemcpy): remove the
#ifdef CONFIG_HAVE_LONG_LONG branches.
- include/{stddef.h,stdlib.h,fixedmath.h,sys/epoll.h,cxx/cstdlib,
nuttx/audio/audio.h,nuttx/crc64.h,nuttx/lib/math.h,
nuttx/lib/math32.h,nuttx/lib/stdbit.h}: same guard cleanup.
- drivers/note/note_driver.c, fs/spiffs/src/spiffs.h,
sched/irq/irq_procfs.c: drop their local guards as well.
- Documentation/applications/netutils/ntpclient/index.rst:
refresh the documentation snippet.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Split mnemofs into allocation, directory, file, CTZ, and read/write
modules, and update direntry traversal and file handling. Add superblock
format version 1 support, reject newer on-flash versions, and preserve
the mounted version when rewriting metadata.
Update the NAND simulator drivers for the new mnemofs behavior by fixing
spare writes, exposing the erase state, allowing raw reads, and documenting
the background-task startup flow.
Signed-off-by: Saurav Pal <resyfer.dev@gmail.com>
Add documentation for the STMicro STM32N6 chip family and the
Nucleo-N657X0-Q development board introduced in the previous two
commits.
- platforms/arm/stm32n6/index.rst
Chip overview: core, peripherals supported in the initial
port, and a pointer to the board page.
- platforms/arm/stm32n6/boards/nucleo-n657x0-q/index.rst
Board page, structured per Documentation/contributing/
doc_templates/board.rst: hardware summary, user LED and
button pin map, the two shipped configs (nsh, ostest),
and the DEV-mode flash recipe used to load NuttX into
AXISRAM via ST-LINK.
- platforms/arm/stm32n6/boards/nucleo-n657x0-q/nucleo-n657x0-q.jpg
Photograph of the board, referenced from the board page.
The pages are picked up by the existing glob-based toctree in
Documentation/platforms/arm/index.rst, no parent index changes are
required.
Signed-off-by: ImBonkers <samuelnlinden@pm.me>
Add board support for the STMicro Nucleo-N657X0-Q, sufficient to boot
NSH over the on-board ST-LINK virtual COM port (USART1, 115200 8N1)
in DEV (serial) boot mode.
Two defconfigs are shipped:
- nsh: minimal NuttShell prompt.
- ostest: nsh + apps/testing/ostest for RTOS smoke testing.
Production signed XSPI flash boot is deferred to a follow-up; in DEV
mode the image is loaded directly into AXISRAM at 0x34000400 by the
host (e.g. STM32CubeProgrammer over ST-LINK), keeping the linker
script trivial — .text/.rodata/.data/.bss/.heap all in AXISRAM.
Signed-off-by: ImBonkers <samuelnlinden@pm.me>
Introduce minimal chip support for the STMicro STM32N6 family
(Cortex-M55, ARMv8.1-M with TrustZone and FPU), sufficient to bring
up an NSH console over USART1.
Scope (deliberately minimal first drop):
- Chip selector ARCH_CHIP_STM32N6 wired into arch/arm/Kconfig and
chip-name mapping ("stm32n6").
- Sub-Kconfig under arch/arm/src/stm32n6 with the STM32N657X0 chip
selector and a single user-selectable USART (USART1).
- Boot path: stm32_start with a naked dispatcher that clears the
boot-ROM MSPLIM/PSPLIM stack limits before any compiler-emitted
prologue, then runs vector relocation and SRAM-only heap init.
The chip runs entirely in the Secure state; SAU is left in its
reset configuration.
- PLL1-based clock tree fed from HSI64 targeting 200 MHz CPU, with
USART1 kernel-clock routed to HSI for a predictable BRR that is
independent of any later clock change.
- Low-level USART driver with full serial framework support.
stm32_serial.c is adapted from arch/arm/src/stm32h5/stm32_serial.c
(sibling ARMv8-M Mainline port with the same USART IP), stripped
of DMA-RX, LPUART, the per-USART2..5 plumbing, RS-485 driver-enable,
TIOCSINVERT/SWAP and HALFDUPLEX paths.
- SysTick system timer.
- GPIO, PWR and RCC helpers.
TrustZone, MPU, I/D-cache and Helium (MVE) are left disabled to
minimise bring-up surface; these will be added in follow-up patches
alongside the drivers that need them.
Signed-off-by: ImBonkers <samuelnlinden@pm.me>
BREAKING CHANGE: remove PWM_MULTICHAN option
PWM_MULTICHAN option is redundant, we can just set CONFIG_PWM_NCHANNELS > 1.
At default CONFIG_PWM_NCHANNELS is set to 1, so the default behavior is preserved.
Access to single channel API is now `info->channels[0].XXX` instead of `info->XXX`
This is the first step to simplify PWM implementation and make it more portable.
Signed-off-by: raiden00pl <raiden00@railab.me>
Fixes#16151. Compares .config state before and after kconfig-mconf and triggers 'make clean' if the configuration was modified to prevent orphaned object files.
Signed-off-by: Agnimitra sasaru <158492301+HyphenAlpha456@users.noreply.github.com>
When checking the first line of a block, the returned value is
incremented by one.
This commit updates doc to explain why.
Signed-off-by: Jiri Vlasak <jvlasak@elektroline.cz>
Add support for the i.MX9 SAR ADC block.
The driver provides initialization, deinitialization, channel-mask
validation, and one-shot reads for the supported ADC channels. It also
handles the ADC clock bring-up, power-up sequence, calibration, and raw
12-bit result extraction from the per-channel data registers.
Signed-off-by: Joonas Ihonen <joonas.ihonen@tii.ae>
The goal is to only execute recipes when there is an actual change in
the prerequisites.
There are several issues which cause the nuttx binary target to be
re-made every time the top level make is run.
1. Previously the target nuttx$(EXEEXT), was used, but make resolved
this in the relative directory make -C $(ARCH_SRC), and couldn’t find
it (need an absolute path: `$(TOPDIR)/..).
2. The .tmp prerequisite for nuttx was always deleted
3. libboard's recipe had a sub-make which may or may not update that
target. This was a phony target, and was therefore always considered out
of date.
These issues were causing the nuttx recipe to be run every make, which
was hiding some missing prerequisites:
1. the .config is a prerequisite for the .tmp target
2. libapps.a (and other linklibs) are pre-requisites for nuttx
Changes:
The changes are only in the build system, and only for arm.
Track nuttx$(EXEEXT) via vpath so Make knows when it's already up to
date without an explicit path. Add $(TOPDIR)/.config as a dependency
to the linker script preprocessing so config changes trigger
re-preprocessing.
Keep the .tmp linker script on disk (clean already removes it) so
timestamp-based dependency checking works across builds. These .tmp
files need to be added to the gitignore or the CI will complain.
Use FORCE pattern for board/libboard to ensure it's always checked
but use the actual library file as the link dependency so nuttx is
only re-linked when library content changes. Add staging libs as
dependency to nuttx link rule so changed app libs trigger re-link.
Signed-off-by: Liam Hickey <williamhickey@geotab.com>
boards/sim/sim/sim/scripts/Make.defs adds `-no-pie` to ARCHCFLAGS /
ARCHPICFLAGS / LDFLAGS for every 64-bit non-Mac sim build. The
original comment ("To compile 64-bit Sim, adding no-pie is necessary
to prevent linking errors but this may cause other issues on
Ubuntu 20.") already flagged the workaround as fragile.
On HOST_ARM64 the option is in fact actively harmful. When gcc is
asked to produce a non-PIE executable on aarch64 it switches the
libgcc resolution path from the dynamic library
`libgcc_s.so.1` to the static archive `libgcc_s.a`. Ubuntu's
arm64 toolchain (and Debian / Raspbian arm64) **does not ship**
`libgcc_s.a` (only `libgcc_s.so.1`), so the link aborts with:
/usr/bin/ld: cannot find -lgcc_s
/usr/bin/ld: cannot find -lgcc_s (push-state / as-needed both fail)
collect2: error: ld returned 1 exit status
`ld --verbose` shows ld searching 20+ paths for `libgcc_s.a`,
finding only `libgcc_s.so` (a linker script pointing at
`libgcc_s.so.1`) which is invalid in non-PIE mode.
x86_64 Linux is unaffected because Ubuntu ships the static
`libgcc_s.a` (or a compatible static-fallback library) in its
amd64 libgcc-N-dev packaging. macOS, Windows and Cygwin go
through completely different code paths and never reach this
branch.
Extend the existing `else ifeq ($(CONFIG_HOST_MACOS),)` exclusion
to also cover HOST_ARM64 by concatenating the two variables in the
condition: `else ifeq ($(CONFIG_HOST_MACOS)$(CONFIG_HOST_ARM64),)`.
The condition is true only when both variables are empty (i.e. on
a 64-bit non-macOS non-aarch64 Linux host), so aarch64 hosts fall
through to gcc's default PIE-aware link path, which works
correctly. This concatenation idiom matches the style already
used elsewhere in the file (suggested by @xiaoxiang781216 in
review). The default text-segment placement
`-Ttext-segment=0x40000000` and `-Wl,--gc-sections` (set in the
common LDFLAGS just above this block) are honored regardless of
PIE / non-PIE.
Verified on NVIDIA Jetson Orin (Ubuntu 20.04 L4T, GCC 9.4) and
Raspberry Pi 4B (Debian 13 trixie, GCC 14.2):
$ ./build.sh sim:nsh -j$(nproc)
$ ./nuttx
NuttShell (NSH)
nsh> ostest
... [38 user_main stages, 14 PASS, 0 FAIL] ...
ostest_main: Exiting with status 0
x86_64 Linux behaviour is unchanged (the concatenation is empty
there, so the block is taken exactly as before).
Companion patch: arch/sim: rename nuttx libc memchr to avoid host
glibc collision (independent fix needed on the same aarch64 hosts).
Signed-off-by: Jinji Cui <113000688+cjj66619@users.noreply.github.com>
The sim/src/nuttx-names.in symbol-rename list is the mechanism that
keeps every nuttx libc function used inside nuttx.rel from clashing
with the same-named function in host glibc when the sim executable
is finally linked. The list already covers ~200 symbols (memcpy,
strlen, strcat, strchr, ...) but memchr was missing.
On x86_64 Linux hosts the omission has no visible effect because
host glibc dispatches memchr through an IFUNC resolver
(__memchr_ifunc) that the static libc.a path does not eagerly pull
in for typical sim links. On HOST_ARM64 (Ubuntu 20.04 aarch64,
glibc 2.31 .. 2.41), however, the final cc/ld invocation in the
sim Makefile drags libc.a(memchr.o) into the link, which then
collides with nuttx libc's lib_memchr.o that has already been
folded into nuttx.rel:
/usr/bin/ld: /usr/lib/gcc/aarch64-linux-gnu/9/../../../aarch64-linux-gnu/libc.a(memchr.o):
in function `__memchr_ifunc':
(.text+0x0): multiple definition of `memchr';
nuttx.rel:libs/libc/string/lib_memchr.c:55: first defined here
Add memchr to the rename list (placed in alphabetical position
between malloc_usable_size and memcpy). After this fix sim:nsh
builds cleanly on aarch64 Linux hosts (verified on NVIDIA Jetson
Orin L4T Ubuntu 20.04 + Raspberry Pi 4B Debian 13 trixie). The
behaviour on x86_64 / macOS / Cygwin hosts is unchanged because
those targets either never hit the collision or use the
underscore-prefixed variant gated by NXSYMBOLS macro definition
in the same file (lines 26-31).
Signed-off-by: Jinji Cui <113000688+cjj66619@users.noreply.github.com>
Add inode_checkperm() and integrate it into file_vopen()
to enforce UNIX-style read/write permission checks for
pseudoFS inodes using effective uid/gid credentials.
Skip permission enforcement for mountpoint inodes and
allow kernel threads to bypass checks.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
ESP32-P4 uses simple boot mode without a separate bootloader,
so merging binaries into a single 16MB file is unnecessary.
Removing this option allows 'make flash' to write only the
actual firmware (~380KB) instead of a padded 16MB image,
reducing flash time from ~55s to ~4.5s.
Assisted-by: GitHubCopilot:claude-4.7-opus
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
The STM32 DMA NDTR/CNDTR transfer-count register is 16 bits wide on
every STM32 series the in-tree driver supports (IPv1 CNDTR, IPv2
SxNDTR). spi_exchange()'s DMA path forwarded the caller's full
nwords to stm32_dmasetup(), so a single SPI_EXCHANGE() of >= 65536
words silently programmed NDTR to (nwords & 0xffff). When the
truncated count was zero - the typical case for an exact 64 KiB
transfer (flash erase block, FAT cluster, common DMA staging
buffer) - the stream completed instantly with no transfer-complete
interrupt and the caller deadlocked in spi_dmarxwait().
Walk the request in chunks of at most 65535 words inside the
existing DMA branch, reusing the same spi_dma{rx,tx}{setup,start,
wait}() sequence per chunk. Single-descriptor transfers (every
in-tree caller today) are byte-for-byte identical. CONFIG_SPI_TRIGGER
is honored for the first chunk only; subsequent chunks must run
unconditionally because re-arming between chunks of one logical
exchange was never part of the SPI_TRIGGER contract.
Drive-by: rescale priv->buflen-clamped nwords so the DMA
descriptor matches the actually-copied byte count, promote the
spiinfo() format specifier from %d to %zu, and fix two adjacent
comment typos.
See the PR description for reproduction, NSH log and benchmark
numbers (5.12 MB/s, 97.5% of SCK/8 @ 42 MHz on STM32F407 + W25Q128).
Signed-off-by: Jinji Cui <113000688+cjj66619@users.noreply.github.com>
Add a CONFIG_FS_PERMISSION Kconfig option for future
filesystem permission support infrastructure.
The option depends on CONFIG_SCHED_USER_IDENTITY and
CONFIG_PSEUDOFS_ATTRIBUTES to ensure task credential
tracking and pseudo-filesystem inode ownership/mode
metadata are available before enabling the feature.
The symbol defaults to n to preserve existing behavior
for current configurations.
No runtime permission enforcement is introduced by
this commit.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
* NuttX supports ESP32-P4 >= v3.0 by default.
* In order to run on older chips configuration tuning is required.
* Without configutation tune boot loop happens on older chips.
* Added note on WaveShare ESP32-P4-Nano board that is almost identical
to existing ESP32-P4-Function-EV-Board board, so configs are compatible,
but it has v1.3 chip, thus config tune is required as documented above.
* Added cross-file reference label to esp32p4-function-ev-board.
Signed-off-by: Tomasz 'CeDeROM' CEDRO <tomek@cedro.info>
Document the new NSH chmod and chown builtins,
including supported numeric permission and
ownership forms.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
Preserve only the existing file type bits (S_IFMT) and
replace permission bits from inode->i_mode instead of
merging them with |= semantics.
This fixes pseudoFS stat()/ls mode reporting after
chmod() updates.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
This commits enables moving BSS data segments to the external PSRAM
on ESP32-P4. This is controlled by a Kconfig option.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
compiler-rt/Make.defs:45: target `bin/compiler-rt/compiler-rt/lib/builtins' given more than once in the same rule.
compiler-rt/Make.defs:45: target `kbin/compiler-rt/compiler-rt/lib/builtins' given more than once in the same rule.
Signed-off-by: bijunda <bijunda@bytedance.com>
github infra is not stable so even "git clone" from github repos can fail with error: 500.
With this commit we try to clone repo few more times.
Signed-off-by: raiden00pl <raiden00@railab.me>
An IPV6 Router advertisement can have an MTU max option.
This option should not increase the d_pktsize for a given interface
since that max size might have been set based on CONFIG or buffer size.
Signed-off-by: daniellizewski <daniellizewski@geotab.com>
Three `export VAR ?= $(shell ...)` assignments cause GNU make to
re-run the embedded ${shell ...} every time the variable is exported
to a recipe's environment. That spawns `tools/incdir` and
`tools/define` once per recipe, serialised through the master make
thread, which adds per recipe overhead to multi-job builds.
Wrap each with `ifeq ($(origin VAR),undefined)` + `:=` so the shell
call runs once at parse time while preserving the override semantics
of `?=`.
Measured impact on a 20-core build host is a ~26% speedup of wall
time.
Signed-off-by: Daniel Fanache <dan@rts.ro>
PendSV is the deferred half of the Cortex-M context-switch path: a
higher-priority ISR that wakes a task sets PendSV pending and returns,
and PendSV then performs the register save/restore. This pattern is
only safe when PendSV runs at the lowest priority - otherwise a
peripheral ISR can preempt the context switch mid-update and corrupt
thread state.
The previous write of DEFPRIORITY32 to NVIC_SYSH12_15_PRIORITY in
up_irqinitialize() leaves PendSV at NVIC_SYSH_PRIORITY_DEFAULT (0x80),
the same priority as peripheral IRQs. Read-modify-write the SHPR3 to
lower only the PendSV byte to NVIC_SYSH_PRIORITY_MIN.
This is the canonical ARM Cortex-M priority arrangement and it matches
e.g. this reference:
https://nuttx.apache.org/docs/latest/guides/zerolatencyinterrupts.html (although
worked with a three-bit priority system)
This patch hardens up_irqinitialize against future peripheral-IRQ
prioritisation.
Signed-off-by: Daniel Fanache <dan@rts.ro>
