Commit graph

24187 commits

Author SHA1 Message Date
buxiasen
726683485f arch/arm/heap: add mmu.h fix not defined error when BUILD_KERNEL
fix PGTABLE_SIZE not defined in sama5d4-ek/knsh
Error: common/arm_allocateheap.c:177:11: error: 'PGTABLE_SIZE' undeclared (first use in this function); did you mean 'PGTABLE_L2_SIZE'?
  177 |   size -= PGTABLE_SIZE * CONFIG_SMP_NCPUS;
      |           ^~~~~~~~~~~~

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-04-28 22:17:43 +08:00
buxiasen
05beacc799 arch/arm/heap: reserved memory for mmu table
When using ARCH_PGPOOL_PBASE, always have to reserver mmu table,
not be used for kernel heap

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-04-28 22:17:43 +08:00
buxiasen
1f8eb18e1d arch/arm/goldfish: fix mmu not enabled when smp
If smp enabled, mmu default disabled in arm_head.S,
We have to re-enable it in arm_boot per-chip.
Causing knsh-smp failed with user-space memory access

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-04-28 22:17:43 +08:00
buxiasen
9e313bddbf arch/arm/goldfish: copy mmu table when SMP
As out current design, each cpu manage task mmu table by insert
and erase like-behavior for arm32, have to per-cpu mmu-table when kernel
build.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-04-28 22:17:43 +08:00
buxiasen
37e853f102 arch/arm/qemu: copy mmu table from cpu0 when SMP
As out current design, each cpu manage task mmu table by insert
and erase like-behavior for arm32, have to per-cpu mmu-table when kernel
build.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-04-28 22:17:43 +08:00
buxiasen
d28c15bd06 arch/arm/qemu: fix mmu not enabled when smp
If smp enabled, mmu default disabled in arm_head.S,
We have to re-enable it in arm_boot per-chip.
Causing knsh-smp failed with user-space memory access

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2025-04-28 22:17:43 +08:00
Kevin Zhou
fb5f27e984 xtensa/esp32s3: fix tickless mode timer unexpect interrupt handle
Signed-off-by: Kevin Zhou <kevin.zhou@sony.com>
2025-04-28 22:13:52 +08:00
Jinliang Li
5ce0e93637 arch/risc-v: save/restore fpu registers always when CONFIG_ARCH_LAZYFPU is off
To fix a fpu illegal instruction exception due to fcsr have invalid
rounding-mode,  restore fcsr/f0~f31 with a random value from stack because fpu
context is not save into stack when mstatus.fs is clean(not dirty).

The number of save/restore fpu context operations is not equal.
In fact, CONFIG_ARCH_LAZYFPU is a performance optimization mechanism aimed at
minimizing the saving and restoring of FPU registers. In some cases, it
may only need to be saved once but must be restored multiple times.
Therefore, this optimization mechanism dictates that saving cannot be
done on the stack; it must be stored at a fixed location(e.g. task
control block buffer), as the stack requires push/pop operations to be
matched.

In case of that CONFIG_ARCH_LAZYFPU is off, save/restore FPU registers
always into stack to avoid the above issues.

Signed-off-by: Jinliang Li <lijinliang1@lixiang.com>
2025-04-27 13:08:29 +08:00
Kerogit
dd828c8920 arch/avr: fixed PC load on chips with more than 128kB program memory
The code used subi instruction to decrement the Y pointer but this
instruction only affects a byte, not a word. Fixed it by using
pre-decrement in the LD instruction instead.
2025-04-27 13:07:45 +08:00
Kerogit
88a66f18e6 arch/avr: save RAMPZ register into thread context
On chips that have it, RAMPZ is part of the thread context
and needs to be saved as well.
2025-04-27 13:07:45 +08:00
Kerogit
958b18f25e arch/avr: fixed typo in Kconfig 2025-04-27 13:07:45 +08:00
Leo Chung
5a1426d632 risc-v/esp32h2:Fix bootloader flash compiler error.
Add missing bootloader_enable_qio_mode() function in flash_qio_mode.c when
CONFIG_ESPRESSIF_FLASH_MODE_QIO option is enabled.

Signed-off-by: Leo Chung <gewalalb@gmail.com>
2025-04-23 16:16:47 +08:00
Leo Chung
931d80683d risc-v/esp32c3:Fix bootloader flash compiler error.
Add missing bootloader_enable_qio_mode() function in flash_qio_mode.c when
CONFIG_ESPRESSIF_FLASH_MODE_QIO option is enabled.

Signed-off-by: Leo Chung <gewalalb@gmail.com>
2025-04-23 16:16:47 +08:00
Leo Chung
d314329792 risc-v/esp32c6:Fix bootloader flash compiler error.
Add missing bootloader_enable_qio_mode() function in flash_qio_mode.c when
CONFIG_ESPRESSIF_FLASH_MODE_QIO option is enabled.

Signed-off-by: Leo Chung <gewalalb@gmail.com>
2025-04-23 16:16:47 +08:00
Serg Podtynnyi
37a1748dd3 arch/arm/rp23xx: fix irq priority levels
The RP2350 datasheet (Table 198) states that IRQ priority levels are
represented using 4 bits

Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
2025-04-22 20:59:42 -03:00
Serg Podtynnyi
c531de3329 arch/arm/rp23xx: Address the spinlock errata RP2350-E2
Due to Errata RP2350-E2 use only safe spinlocks during start and testset

Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
2025-04-22 20:59:23 -03:00
simbit18
047a40917c Cmake: Implement CMake build of Tiva arch
added TI/Stellaris Tiva

CMake added tm4c1294-launchpad and tm4c123g-launchpad board

Signed-off-by: simbit18 <simbit18@gmail.com>
2025-04-19 08:53:18 -03:00
Filipe Cavalcanti
b8e9bc3313 arch/xtensa: fix build errors related to data types on ESP32|S2|S3
Fix format specifier macros after compiler type changes.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-04-18 09:32:58 +08:00
Filipe Cavalcanti
0715c584b7 arch/xtensa: use compiler's definition of uint32 and int32
Modify types.h and inttypes.h to use the correct _int32_t and _uint32_t types.
Type is now defined according to recent compiler versions.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-04-18 09:32:58 +08:00
Tiago Medicci Serrano
c566cf51a2 risc-v/esp32c3: Fix getting the flash mappings by openocd-esp32
This adds new fields to the metadata section used by MCUBoot.
The openocd-esp32 project requires these fields to properly map the
flash segments and enable using SW breakpoints and flash through
openocd-esp32.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-18 02:25:14 +08:00
Tiago Medicci Serrano
2bbafcacc1 xtensa/esp32s3: Fix getting the flash mappings by openocd-esp32
This adds new fields to the metadata section used by MCUBoot.
The openocd-esp32 project requires these fields to properly map the
flash segments and enable using SW breakpoints and flash through
openocd-esp32.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-18 02:25:14 +08:00
Tiago Medicci Serrano
31b6cdac6d xtensa/esp32s2: Fix getting the flash mappings by openocd-esp32
This adds new fields to the metadata section used by MCUBoot.
The openocd-esp32 project requires these fields to properly map the
flash segments and enable using SW breakpoints and flash through
openocd-esp32.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-18 02:25:14 +08:00
Tiago Medicci Serrano
7a3e67d59a xtensa/esp32: Fix getting the flash mappings by openocd-esp32
This adds new fields to the metadata section used by MCUBoot.
The openocd-esp32 project requires these fields to properly map the
flash segments and enable using SW breakpoints and flash through
openocd-esp32.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-18 02:25:14 +08:00
Filipe Cavalcanti
55fbf93c9c arch/risc-v: ADC support for ESP32-C3|C6|H2
Add common source for ADC that supports ESP32-C3|C6|H2.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-04-17 13:56:40 +08:00
Filipe Cavalcanti
99099a1a9d arch/xtensa: ADC support on ESP32|S2|S3
Add common ADC source for ESP32|S2|S3.
Remove legacy ADC from ESP32S3.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-04-17 13:56:40 +08:00
Carlos Sanchez
d976c66edf net: use bps units for bitrate in SocketCAN interfaces.
This makes units compatible with what Linux uses for SocketCAN bitrate
and allows representing usual Single Wire Can (SAE J2411) usual bitrates
of 33333 and 83333 bps.

Signed-off-by: Carlos Sanchez <carlossanchez@geotab.com>
2025-04-16 11:07:27 -03:00
simbit18
7af6b8c63d arch/arm/src/armv6-m/CMakeLists.txt: fix undefined reference to `up_show_cpuinfo'
Aligned Cmakefile with Make.defs PR #10132

fix

FAILED: nuttx
C:\WINDOWS\system32\cmd.exe /C "cd . && D:\nx20250410\tools\gcc-arm-none-eabi\bin\arm-none-eabi-gcc.exe  --specs=nosys.specs   -Wl,--print-memory-usage -Wl,--entry=__start -nostdlib -Wl,--gc-sections -Wl,--cref -Wl,-Map=nuttx.map @CMakeFiles\nuttx.rsp -o nuttx && cd ."
D:/nx20250410/tools/gcc-arm-none-eabi/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/bin/ld.exe: fs/libfs.a(fs_procfscpuinfo.c.obj): in function `cpuinfo_read':
D:/rp2040/nuttx/fs/procfs/fs_procfscpuinfo.c:160:(.text.cpuinfo_read+0xa): undefined reference to `up_show_cpuinfo'

Signed-off-by: simbit18 <simbit18@gmail.com>
2025-04-16 21:25:55 +08:00
Tiago Medicci Serrano
0cec2bd662 arch/risc-v/espressif: Bump common source version
This commit bumps common source version for RISC-V-based Espressif
SoCs on NuttX. Specifically, this solves an issue regarding SPI
flash frequency selection on ESP32-C6.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-16 21:25:38 +08:00
Tyler Bennett
1f53575192 arch/arm/stm32h5: GPDMA Hardware files
Add the hardware register definition file for the GPDMA peripheral.
This is necessary to support implementing dma driver in the future.

Also adds skeleton arch dma header that includes the hardware file.

Signed-off-by: Tyler Bennett <tbennett@2g-eng.com>
2025-04-16 21:16:24 +08:00
Carlos Sanchez
8f1d670a83 arch/arm/src/stm32h7: unassigned ret variable in SIOCSCANBITRATE.
This problem was introduced in https://github.com/apache/nuttx/pull/16199

Signed-off-by: Carlos Sanchez <carlossanchez@geotab.com>
2025-04-16 18:11:33 +08:00
Tyler Bennett
1b08c1d522 arch/arm/stm32h5: organize peripheral Kconfig selection
Added menus for usart, I2C, and SPI selection to make the peripheral selection submenu easier to navigate.

Added DMA1 and DMA2 selection options.

Signed-off-by: Tyler Bennett <tbennett@2g-eng.com>
2025-04-16 10:08:45 +08:00
anjiahao
28ad852a6c arch/xtensa:add crt0 to initialize environment
we use crt0 inside of start hook in pr https://github.com/apache/nuttx/pull/16154, so xtensa also need add it.

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2025-04-16 01:24:57 +08:00
Mathieu David
7281d91fbc Support ethernet without MDIO & MDC lines 2025-04-16 01:22:24 +08:00
Serg Podtynnyi
8ac09bcf3d arch/arm/rp23xx: Fix IRQ prioritize
Fixes the reg addresses that were copied from armv6 rp2040 to the actual
armv8 spec

Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
2025-04-16 01:19:43 +08:00
Serg Podtynnyi
5ddc67b129 arch/arm/rp23xx: Fix PWM registers access
Fix offset alignment and correct the PWM enable register name

Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
2025-04-15 17:02:37 +08:00
Julian Oes
96fef53ee9 stm32h7: enable Ethernet for STM32H7X7XX 2025-04-15 15:14:09 +08:00
Joshua Lange
9643ee78aa arch/arm/stm32h5: Fix i2c compiler warnings.
Add missing break statements to i2c driver to avoid complaints from compiler.

Signed-off-by: Tyler Bennett <tbennett@2g-eng.com>
2025-04-15 10:56:23 +08:00
Joshua Lange
1c4ac3dfe7 arch/arm/stm32h5: copy bss and initialized data before configuring any hardware
Some hardware configurations require bss and data initialization before being called.

Signed-off-by: Tyler Bennett <tbennett@2g-eng.com>

Fix nxstyle errors
2025-04-15 10:56:01 +08:00
Joshua Lange
3d848810b7 arch/arm/stm32h5: Add USART6 serial driver config.
Adds Kconfig options to select UART6 for the STM32H5, and updates the architecture files accordingly.

Signed-off-by: Tyler Bennett <tbennett@2g-eng.com>
2025-04-15 10:55:30 +08:00
Joshua Lange
78f35c836c arch/arm/stm32h5: Fix ADC internal channel configuration.
Properly configure internal channels on STM32H5 ADC when selected

Signed-off-by: Tyler Bennett <tbennett@2g-eng.com>
2025-04-15 10:54:33 +08:00
Carlos Sanchez
dd53c34722 net/netdev: Change SIOCSCANBITRATE to require interface down.
Previously, SIOCSCANBITRATE brought the iterface up to ensure changes
where immediately applied. This was confusing, see
https://lists.apache.org/thread/g8d0m6yp7noywhroby5br4hxt3r4og2c
Now SIOCSCANBITRATE fails is interface is up.
All existing SocketCAN drivers updated.

Signed-off-by: Carlos Sanchez <carlossanchez@geotab.com>
2025-04-15 01:59:57 +08:00
stbenn
3abdec8af1 arch/arm/stm32h5: implement flash driver for progmem
H5 implementation of functions defined in include/nuttx/progmem.h.
The driver supports a subset of the flash peripheral functions.
  - Assumes non-secure memory accesses. Does not check for memory protection mechanisms.

References implementation in arch/arm/src/stm32h7/stm32h743xx_flash.c
2025-04-11 11:20:19 -03:00
simbit18
97155ae09d [nxstyle] fix Relative files path
fix Relative file path does not match actual file.
2025-04-11 20:59:33 +08:00
Tiago Medicci Serrano
d7dabc90f6 arch/risc-v/espressif: Disable esptool's stubs for ESP32-C3
This commit disables the esptool's stubs when flashing ESP32-C3
(`CONFIG_ESPRESSIF_ESPTOOLPY_NO_STUB=y`) if the serial/JTAG console
is enabled (`CONFIG_ESPRESSIF_USBSERIAL=y`).

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-11 16:20:13 +08:00
Tiago Medicci Serrano
d69f349787 arch/risc-v/espressif: Fix bug with usbconsole and DEBUG_FEATURES
This commit fixes a bug on the `usbconsole` defconfigs for
Espressif's RISC-V SoCs when the serial/JTAG is used and the
Kconfig macro `DEBUG_FEATURES` is enabled. This config enables the
`showprogress` macro during start-up. Previously, `riscv_lowputc`
function was used by this macro, but it is not suitable for the
serial/JTAG console. Instead, use the `esp_rom_printf` function
that is suitable for both serial/JTAG and UART consoles.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-11 16:20:13 +08:00
Jukka Laitinen
1645f4ac10 arch/mpfs/usb: Align usb_ctrlreq_s properly to 32-bit boundary
The alignment of the ctrlreq was correct by luck, and was broken
when the spinlock was added to the structure. In non-smp configurations
spinlock_t is currently 8-bits, causing wrong alignment of the
ctrlreq structure.

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2025-04-11 16:19:37 +08:00
stbenn
1e8977c079 arch/arm/stm32h5: DTS Hardware Files
Add hardware register definitions for the digital temperature sensor (DTS) peripheral on the STM32H5.
2025-04-11 15:58:20 +08:00
chao an
52482219c8 libc/elf: rename modlib to libelf
Renaming "modlib" to "libelf" is more in line with the implementation content,
which makes it easier for individual developers to understand the capabilities of this module.

CONFIG_LIBC_MODLIB -> CONFIG_LIBC_ELF

Signed-off-by: chao an <anchao.archer@bytedance.com>
2025-04-11 09:43:22 +08:00
Ville Juven
6707715916 arch/risc-v: PANIC() on system call crash
If a process causes a fatal error when it's running a system call, the
whole system should crash as the crash originated from the kernel.

Do this by running the PANIC() branch, if task is in syscall.

Signed-off-by: Ville Juven <ville.juven@unikie.com>
2025-04-10 22:36:02 +08:00
zhangshoukui
69597ec486 arch/sim: Add i2s setup and shutdown interface
This interface is required if you want to open an i2c node directly on the sim
https://github.com/apache/nuttx/pull/12848/commits/12b4340b009d55f30508b1ebb1da1c4faec674a7

Signed-off-by: zhangshoukui <zhangshoukui@xiaomi.com>
2025-04-10 18:10:54 +08:00