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arch/arm/stm32h5: copy bss and initialized data before configuring any hardware
Some hardware configurations require bss and data initialization before being called. Signed-off-by: Tyler Bennett <tbennett@2g-eng.com> Fix nxstyle errors
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1 changed files with 24 additions and 28 deletions
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@ -154,6 +154,28 @@ void __start(void)
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("sub r10, sp, %0" : : "r" (CONFIG_IDLETHREAD_STACKSIZE - 64) :);
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#endif
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/* Clear .bss. We'll do this inline (vs. calling memset) just to be
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* certain that there are no issues with the state of global variables.
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*/
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for (dest = (uint32_t *)_sbss; dest < (uint32_t *)_ebss; )
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{
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*dest++ = 0;
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}
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/* Move the initialized data section from his temporary holding spot in
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* FLASH into the correct place in SRAM. The correct place in SRAM is
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* give by _sdata and _edata. The temporary location is in FLASH at the
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* end of all of the other read-only data (.text, .rodata) at _eronly.
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*/
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for (src = (const uint32_t *)_eronly,
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dest = (uint32_t *)_sdata; dest < (uint32_t *)_edata;
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)
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{
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*dest++ = *src++;
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}
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#ifdef CONFIG_STM32H5_SRAM2_INIT
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/* NOTE: this is optional because this may be inappropriate, especially
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* if the memory is being used for it's battery backed purpose. In that
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@ -183,32 +205,6 @@ void __start(void)
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stm32_gpioinit();
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showprogress('A');
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/* Clear .bss. We'll do this inline (vs. calling memset) just to be
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* certain that there are no issues with the state of global variables.
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*/
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for (dest = (uint32_t *)_sbss; dest < (uint32_t *)_ebss; )
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{
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*dest++ = 0;
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}
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showprogress('B');
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/* Move the initialized data section from his temporary holding spot in
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* FLASH into the correct place in SRAM. The correct place in SRAM is
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* give by _sdata and _edata. The temporary location is in FLASH at the
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* end of all of the other read-only data (.text, .rodata) at _eronly.
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*/
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for (src = (const uint32_t *)_eronly,
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dest = (uint32_t *)_sdata; dest < (uint32_t *)_edata;
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)
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{
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*dest++ = *src++;
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}
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showprogress('C');
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#ifdef CONFIG_ARMV8M_STACKCHECK
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arm_stack_check_init();
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#endif
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@ -222,12 +218,12 @@ void __start(void)
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#ifdef USE_EARLYSERIALINIT
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arm_earlyserialinit();
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#endif
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showprogress('D');
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showprogress('B');
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/* Initialize onboard resources */
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stm32_board_initialize();
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showprogress('F');
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showprogress('C');
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#ifdef CONFIG_STM32H5_ICACHE
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stm32_enable_icache();
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