Commit graph

24187 commits

Author SHA1 Message Date
liwenxiang1
f730a86d22 arch/x64: Fix crash issue after enabling KASAN
After up_fork calls the x86_64_fork function, the rsp must be 16-byte aligned; otherwise, the movaps %xmm0, (%rsp) instruction may cause a crash.

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2026-01-15 16:15:25 -03:00
zhangyu117
4e40393cc4 arch/tricore: record trapinfo for coredump
use global var record trap type and reason info for coredump

Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
2026-01-15 16:09:13 -03:00
zhangyuan29
31adcde41b arch/tricore: use PRId32 to fixed the correct int type
remove some compilation warnings.

Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
2026-01-15 16:09:13 -03:00
zhangyu117
2a76bc9d5b arch/tricore: dump special registers about trap
In addition to general-purpose registers, tricore also provides special trap registers to record exception scenarios.

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
2026-01-15 16:09:13 -03:00
zhangyu117
909e63b63b arch/tricore: upcsa/lowcsa process && dumpinfo
tricore csa is not continuous. when assert prints information, we need to handle the regs specially in order to dump all the registers.

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
2026-01-15 16:09:13 -03:00
liwenxiang1
641d52fefa arch/tricore: Adapt to Trap Exception Display
When an exception occurs, print the exception type and reason.

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2026-01-15 16:09:13 -03:00
cuiziwei
e9bbf2928b libcxx: porting libcxx test.
porting libcxx test case to nuttx.

Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
2026-01-15 13:40:42 -03:00
Michal Lenc
d53cd33bf5 arch/arm/src/samv7/Kconfig: fix incorrect SAMV7_EMAC0_RMII dependency
SAMV7_EMAC0_RMII should not depend on ARCH_CHIP_SAM4E as this is
a completely different chip. This is likely a relict from copying
the code base.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2026-01-15 16:39:14 +01:00
zhangyu117
8786c814f0 arch/tricore: syscall SYS_switch_context and SYS_restore_context use 0 para
after task switch optimization, we can just use g_running_tasks and this_task() without pass params

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
2026-01-15 11:37:12 +08:00
zhangyu117
b8fd06cf0e arch/tricore: Inline up_switch_context
inline up_switch_context, avoid function call burden.

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
2026-01-15 11:37:12 +08:00
zhangyu117
69ed5f54f3 tricore: remove up_set_current_regs/up_current_regs
add g_interrupt_context to to identify interruption context

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
2026-01-15 11:37:12 +08:00
zhangyu117
6b755dea45 arch/tricore: optimize task switching process
g_current_regs is only used to determine if we are in irq, with other functionalities removed.

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
2026-01-15 11:37:12 +08:00
liwenxiang1
8a15aebfea arch/tricore: Resolving gcc compilation warning
fix type error and add up_getusrpc()

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2026-01-15 11:37:12 +08:00
liwenxiang1
8da6b45939 arch/tricore: Regs for context switching save the memory address of the CSA.
In the exception panic process, regs needs to use a memory address, which defaults to PCXI. Here, it is uniformly saved as the actual memory address.

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2026-01-15 11:37:12 +08:00
simbit18
8ce7a99b52 arch/arm/src/am335x: CMake build implemented for TI AM335x Sitara
- added TI Sitara AM335X

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-01-15 01:14:26 +08:00
simbit18
35ae7a761d arch/arm/imxrt: fix error header guard
- fix chip/imxrt_clockconfig_ver1.h:23: error: header guard '__ARCH_ARM_SRC_IMXRT_IMXRT_CLOCKCONFIG_VER1_H' followed by '#define' of a different macro [-Werror=header-guard]

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-01-14 10:50:02 -05:00
guoshichao
e823681091 ghs: change the vfpv3 to vfpv5
referring to the documentation of Armv7-m, it is recommended to use teh
vfpv5 compile option

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2026-01-14 09:41:49 +08:00
guoshichao
c210b056d8 ghs: add -ffunction-sections and -fdata-sections compile options
the -ffunction-sections and -fdata-sections are also supported by
greenhills, and these two compile options can benefit with section
layout optimization, and thus reduce the final image size

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2026-01-14 09:41:30 +08:00
guoshichao
49a57ddfbc ghs: replace the "-Wall" build option with the "-ghstd=last"
According to the Greenhills documentation, the "-Wall" option is
deprecated for use. Instead, the "-ghstd=last" option is recommended.
Compared with "-Wall", the "-ghstd=last" option can capture more
warnings and has stricter rules.

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2026-01-14 09:40:32 +08:00
guoshichao
cda60ceab3 ghs: fix the gnu-elf.ld handle error at pre-process
In Green Hills, if the name of the file to be preprocessed ends with ".ld",
this file must be renamed to ".ld.i". Otherwise, the following error will be reported:

ccarm: Error: -o out/build/cmake_out/mann_dcu_evb_ghs_ap/gnu-elf.ld has wrong suffix for -P option (expect .i)

Currently, based on the documentation and actual operations, only files
ending with "*.ld" can trigger this preprocessing error. There are no such
issues in other cases.

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2026-01-14 09:23:29 +08:00
liqinhui
1d8eab937f simwifi: refactor the interfaces of simwifi and simnet
Fix CMake logic to correctly include sim_wifihost.

Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2026-01-14 09:22:54 +08:00
liqinhui
3843f7b4fe wifi: Support the wifi operations based on the bss file.
Add support for BSS file-based WiFi simulation.

Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2026-01-14 09:22:54 +08:00
liqinhui
dce89e1820 simwifi: Refactor the interfaces of simwifi and simnet
Refactor simwifi to separate host and sim logic.

Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2026-01-14 09:22:54 +08:00
buxiasen
a938926b52 arch/sim: add JB_ALIGN0 for x64 to ensure the align
Or will cause the fork break as call will auto push 1 item.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2026-01-13 10:29:24 +08:00
buxiasen
1058397807 arch/sim: save errno when do context switch
Avoid the errno changed after interrupt in sim and make return value
mistake when according to errno.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2026-01-13 10:29:24 +08:00
buxiasen
100c9dd20b arch/sim: add host_errno_get/set for sim to backup/restore in "irq"
Avoid the errno changed after interrupt in sim and make return value
mistake when according to errno.
Move host_errno_convert from macro to sim_errno.c.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2026-01-13 10:29:24 +08:00
buxiasen
cd2bf49474 arch/sim/rawgadget: remove the host_uninterruptible_errno
We will remove the API in next commit, so remove the errno manual save
API and save errno more commonly.
After whole pull request, should no longer need to care about errno.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2026-01-13 10:29:24 +08:00
buxiasen
8d2ef7f43c Revert "arch/sim: avoid host-call being interrupted before getting errno"
This reverts commit ac5b38c9e5.

Keep host_errno_convert as a common interface in sim_internal.h
Keep the up_irq_save & up_irq_restore as common interface

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2026-01-13 10:29:24 +08:00
wangchengdong
15f6e399b8 nuttx/arch: merge tickless and tick process
merge nxsched_timer_expiration() into nxsched_process_timer()
    to improve code efficient

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2026-01-12 16:20:42 +08:00
guoshengyuan1
fac76746ea arch/arm: Fix TLS initialization to account for padding between sections
The TLS initialization logic needs to be updated to match the modified
linker script section definitions. The previous implementation assumed
that _END_TDATA and _START_TBSS were contiguous, but there may be
padding between these sections for alignment purposes.

This commit updates up_tls_initialize() to explicitly account for the
padding gap between _END_TDATA and _START_TBSS when zeroing the .tbss
section. The size calculation in up_tls_size() is also updated to use
_END_TBSS instead of the previous _END_TXXX definition to match the
current linker script layout.

Changes:
- Calculate padding gap: (_START_TBSS - _END_TDATA)
- Zero .tbss at correct offset accounting for padding
- Update size calculation to use proper section boundaries

Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
2026-01-09 21:48:28 +08:00
guoshengyuan1
dd9f666ad2 arch/arm: Refactor __aeabi_read_tp to ensure EABI compliance
Reimplement __aeabi_read_tp using naked function with inline assembly
to strictly follow ARM EABI TLS helper specification.

The ARM EABI specifies that __aeabi_read_tp may only modify r0, and
compilers rely on this guarantee by NOT saving r1-r3 registers when
calling this function. The previous simple C implementation could
potentially clobber these registers through compiler optimizations,
violating the ABI contract and causing subtle bugs.

Changes:
- Add __aeabi_read_tp_core() helper to allow tls_get_info() macro
  expansion in C context
- Explicitly preserve r1-r3 registers per EABI requirement

This ensures proper register usage compliance for all calling contexts
while maintaining the ability to use tls_get_info() macro correctly.

Reference: ARM EABI TLS Helper Specification
https://github.com/ARM-software/abi-aa/blob/main/rtabi32/rtabi32.rst#thread-local-storage-new-in-v2-01

Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
2026-01-09 21:48:28 +08:00
simbit18
ef1cee2f44 arch/arm/xmc4: Aligned Cmake with Make
- Add tickless support #11737

- Add XMC4 flash command sequence API #11728

- Add EtherCAT support on xmc4800-relax #11659

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-01-09 07:34:53 +08:00
trns1997
41842ade12 cmake: Fix C++ STL toolchain linkage with CONFIG_LIBCXXTOOLCHAIN
Ensure the CMake build explicitly locates and links libstdc++.a
when CONFIG_LIBCXXTOOLCHAIN is enabled. This aligns CMake behavior
with the Make build system and fixes STL/libc header conflicts
observed on xmc4800-relax:nsh.

Signed-off-by: trns1997 <trns1997@gmail.com>
2026-01-08 10:19:16 +08:00
Kerogit
0a8be84033 arch/avr/src/avrdx: remove unused variable and update comment
Commit e5db83d7db introduced a change to the file updated by this patch
which caused a build-time warning about unused variable. This patch
removes declaration of the variable from the code.

This patch also updates comment that relates to what was changed
in the commit.

Patch was tested by building breadxavr:nsh - resulting binary is identical
(by SHA256 checksum) and the warning is no longer present.

Signed-off-by: Kerogit <kr.git@kerogit.eu>
2026-01-08 10:17:33 +08:00
Justin Erenkrantz
220263e7c4 risc-v/litex: Update docs for vexriscv invalidate and no-op flush.
Per further feedback from Litex community, the vexriscv cache is
write-through so no flush is required - therefore, make it a nop.

And add a pointer to vexriscv invalidation magic instr docs.

Signed-off-by: Justin Erenkrantz <justin@erenkrantz.com>
2026-01-08 09:21:50 +08:00
Peter van der Perk
6b5d2fa3b1 kinetis: fix flexcan header typo
Fix PROSEG -> PROPSEG typo

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2026-01-08 02:23:39 +08:00
Peter van der Perk
afa1fccffe s32k3xx: emac compile fix
Fix compile error with undefined barrier function

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2026-01-08 02:23:39 +08:00
Peter van der Perk
ca9a597af0 s32k3xx: edma compile fix
Refactoring didn't add the required spinlock

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2026-01-08 02:23:39 +08:00
Peter van der Perk
e46c2348ce kinetis: edma compile fix
Refactoring didn't add the required spinlock

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2026-01-08 02:23:39 +08:00
zhanghongyu
fa6c8579dd driver/net: replace net_lock with netdev_lock
modify the code of the adapted protocol stack to avoid deadlocks and the
logic that cannot be protected by locks after modification.

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2026-01-06 16:08:30 +08:00
simbit18
bfa7025c28 arch/xtensa: Fix Kconfig style
- Replace help => ---help---

- Remove TAB

- Add comments

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-01-06 06:35:08 +08:00
simbit18
35c7aa214e arch/risc-v: Fix Kconfig style
- Replace help => ---help---

- Remove TAB

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-01-06 06:35:08 +08:00
simbit18
0fd5feeab5 arch/rp23xx: Fix Kconfig style
- Remove TAB

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-01-06 06:35:08 +08:00
simbit18
ebacd9d0d5 arch/rp2040: Fix Kconfig style
- Remove TAB

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-01-06 06:35:08 +08:00
ENJOU1224
73b9bced17 boards/risc-v: Enable VPU initialization for QEMU RV
The riscv_vpuconfig() was defined but never called in qemu_rv_start. This caused mstatus.VS to remain disabled, leading to Illegal Instruction exceptions when the OS attempted to use vector registers. This patch adds the missing initialization call.

Signed-off-by: ENJOU1224 <enjou1224@outlook.com>
2026-01-06 02:32:48 +08:00
yezhonghui
227d7237ab gpiochip: export ioexpander pointer to user
sim gpiochip ioexpander export to user

Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
2026-01-05 15:10:41 -03:00
yezhonghui
36f91643ae sim/gpiochip: add sim gpiochip for gpio autotest
add sim gpiochip driver

Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
2026-01-05 15:10:41 -03:00
ENJOU1224
e072356182 arch/risc-v: Fix incompatible pointer types in vector context switching
The riscv_savevpu/restorevpu functions were using 'uintptr_t *' for vector registers, but 'tcb->xcp.vregs' is defined as 'uintreg_t *'. This mismatch caused compilation errors on GCC 13+ due to incompatible pointer types. This patch aligns the parameter types to 'uintreg_t *'.

Signed-off-by: ENJOU1224 <enjou1224@outlook.com>
2026-01-05 15:08:03 -03:00
yangsong8
59f200ac4f arch/sim: Explicitly compare whether transfer is NULL in usbhost
if (!transfer)  ==>  if (transfer == NULL)

Signed-off-by: yangsong8 <yangsong8@xiaomi.com>
2026-01-05 09:59:06 +08:00
v-tangmeng
2c24420a1c arch/sim: fix the compile error
USB_EP_MAXP_MASK ==> USB_EP_MAX_PACKET_MASK

Signed-off-by: v-tangmeng <v-tangmeng@xiaomi.com>
2026-01-05 09:59:06 +08:00