Remove the per-arch testset implementation from the spinlock layer.
The testset abstraction predates the unified spinlock.h API and is no
longer used now that all arches provide spin_lock_irqsave()/
spin_unlock_irqrestore() directly. Drop the per-arch *_testset.{c,S}
implementations and spinlock.h files for arm, sim, sparc, tricore,
x86_64, and xtensa, along with the CXD56_TESTSET,
CXD56_TESTSET_WITH_HWSEM, and CXD56_ATOMIC_WITH_HWSEM Kconfig options
in arch/arm/src/cxd56xx, and simplify the CXD56 semaphore pool loop
in cxd56_sph.c to a single unconditional range.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
Replace iLD union types and __mfcr/__mtcr intrinsics with uint32_t
and tricore_mfcr/tricore_mtcr. Replace the iLD-specific
to HW full capacity (8 sets / 24 data / 16 code regions).
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
Refactor kflags/uflags into a per-set flags[] array indexed by set
number, and add a cpuset field to filter regions per CPU. Rewrite
mpu_initialize to loop over all protection sets.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
Remove the dependency on the iLLD SFR headers (IfxCpu_bf.h and
IfxCbs_reg.h) and the iLLD intrinsics (__mfcr/__mtcr) from the
hardware debug monitor implementation.
The debug CSFR numbers, trigger-event register (TR0..TR7) addresses,
TREVT bit-field offsets and the CBS_OEC register address are now
defined locally with a TC_ prefix, so the file no longer leaks the
iLLD CPU_* namespace (which is still pulled in transitively through
arch/irq.h). Register accesses use the tricore_mfcr/tricore_mtcr
macros, and the DBGTCR/DBGCFG/DBGACT bit-field unions are replaced
with explicit shifts.
This is a pure de-iLLD refactor with no behavior change, verified on
a TC4x7 EVB: the board boots to NuttShell and breakpoints trigger
identically before and after the change.
Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
Replace the iLLD helpers IfxCpu_resetAndStartCounters() and
IfxCpu_getClockCounter() in the performance-counter path with direct
CSR accesses via tricore_mtcr()/tricore_mfcr().
tricore_reset_ccnt() disables the CPU cycle counter (CPU_CCTRL), clears
CPU_CCNT, then re-enables it; up_perf_gettime() reads CPU_CCNT directly.
This removes the arch/tricore perf path's dependency on the Infineon
iLLD layer. No behavior change.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
Replace the iLLD register structures (Ifx_CPU_PCON0/1/2, Ifx_CPU_DCON0/1/2)
and the IfxCpu_cfg.h cache-size/line-size macros in the cache path with
direct CSR accesses via tricore_mtcr()/tricore_mfcr() and locally defined
PCON/DCON bit masks. Also switch __isync()/__dsync() to the UP_ISB()/
UP_DSB() barrier wrappers.
This removes the arch/tricore cache path's dependency on the Infineon
iLLD layer. No behavior change.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
Replace the iLLD Ifx_Ssw_infiniteLoop() helper in the idle path with
a self-contained 'loopu' instruction wrapper (tricore_idle_loop()).
The 'loopu' (loop unconditional) instruction branches back to itself
until an interrupt is taken, which is the standard TriCore low-power
idle sequence; the GNU and Tasking assemblers spell the backward
label differently, so the macro dispatches on the toolchain.
This removes the arch/tricore idle path's dependency on the Infineon
iLLD/Ssw layer. No behavior change: the loop is still interrupted by
any IRQ that causes a context switch away from the idle task.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
This change fixes NuttX’s CMake support when NuttX is embedded
in another project via add_subdirectory(). CMake’s CMAKE_SOURCE_DIR
and CMAKE_BINARY_DIR refer to the outermost project, causing NuttX
to access its .config, generated files, host tools, and build artifacts
in the parent project’s directories. The fix introduces NUTTX_DIR and
NUTTX_BINARY_DIR, based on CMAKE_CURRENT_SOURCE_DIR and
CMAKE_CURRENT_BINARY_DIR, and consistently uses them for NuttX
self-references while preserving existing standalone builds. It fixes
the Kconfig initialization failure reported in #19697 and allows an
embedded sim:nsh build to configure, build, and boot successfully.
The change affects only the CMake build system (not Make or Kconfig
defaults), requires the corresponding nuttx-apps change, and does not
extend add_subdirectory() support to cross-compiled non-sim boards due
to CMake’s toolchain-file limitation.
Fixes#19697.
Assisted-by: Claude:claude-sonnet-5
Signed-off-by: Alan Carvalho de Assis <acassis@gmail.com>
During the Toybox port to NuttX, Claude noticed that changes in the
menuconfig weren't taking affect. This issue exists for a long time on
NuttX, in fact BayLibre's presentation from 2017 make jokes about our
building system not been reliable:
https://www.youtube.com/watch?v=XUJK2htXxKw&t=320s
Stale archive members from $(AR)'s additive-only behavior can linger
after Kconfig toggles change which files provide a symbol, causing dead
weight or "multiple definition" link errors on incremental builds.
Fixed by splitting ARCHIVE into two macros: ARCHIVE keeps the original
additive behavior for apps/libapps.a, which many independent
subdirectories contribute to across a build, while the new
ARCHIVE_REBUILD deletes then archives for the far more common case
of a single Makefile building its own self-contained $(OBJS)
- all 39 such call sites now use it.
Assisted-By: Claude Sonnet 5
Signed-off-by: Alan C. Assis <acassis@gmail.com>
Implement hardware breakpoint and watchpoint support for TriCore
architecture using the Trigger Event (TREVT) registers. This enables
the standard NuttX debugpoint API (up_debugpoint_add/remove) on TriCore
processors, supporting read/write/execute watchpoints and breakpoints
via the on-chip debug unit.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
1. Make tricore_backtrace.c conditional on CONFIG_SCHED_BACKTRACE,
consistent with RISC-V and ARM architectures.
2. Add NULL return address check to terminate early on invalid entries.
3. Fix non-current task backtrace to use regs[REG_LPCXI] which
preserves the UL bit needed for correct CSA type identification.
Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
up_fpucmp was comparing lower CSA registers (offset 0) using upper CSA
register definitions (REG_D8-D15). Since up_saveusercontext stores:
- Lower CSA at saveregs[0..15]
- Upper CSA at saveregs[16..31]
The fix adds TC_CONTEXT_REGS offset to point to the upper CSA and
compares only D8-D15 which are the FPU data registers on TriCore.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
Implement up_fpucmp to compare FPU register state between two
saved contexts. This is used by the ostest FPU test to verify
that FPU registers are properly preserved across context switches.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
Initialize the FPU and enable the FZ (flush-to-zero) trap for
TriCore TC4xx processors. This ensures floating-point divide-by-zero
exceptions are properly caught and reported via the trap handler.
Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
for tc3xx, without div64 hw inst:
gcc toolchain software way: 684ns
tasking toolchain software way: 3516ns.
invdiv_u64: 182ns
for tc4xx, with div64 hw inst:
div64 hw inst cost 182ns.
invdiv_u64: 125ns
Although there is a delay of tens of nanoseconds for tc4xx, the impact
on performance is minimal, but for simplicity, invdiv_u64 is used.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
Add performance counter support for TriCore architecture using the
CPU clock counter (CCNT). Implements up_perf_init, up_perf_getfreq,
up_perf_gettime and up_perf_convert interfaces.
Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
Implement up_backtrace() for TriCore by walking the CSA chain and
collecting return addresses from upper CSA A11 register.
Signed-off-by: LukeKun <donghaokun@lixiang.com>
debug.h is a NuttX-specific, non-POSIX header. Placing it in the
top-level include/ directory creates naming conflicts with external
projects that define their own debug.h.
This commit moves the canonical header to include/nuttx/debug.h,
following the NuttX convention for non-POSIX/non-standard headers,
and updates all in-tree references.
A backward-compatibility shim is left at include/debug.h that
emits a deprecation #warning and re-includes <nuttx/debug.h>,
allowing out-of-tree code to continue building while migrating.
Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
include/cxx contains NuttX's mini C++ ABI shims and must only be added
to the include path when CONFIG_LIBMINIABI is selected. tools/Config.mk
was adding it unconditionally for every non-LIBCXX/non-UCLIBCXX build,
and the platform.cmake files for arm, arm64, risc-v, x86_64 and tricore
were adding it inside the CONFIG_LIBCXXTOOLCHAIN block.
With an unpatched downloaded ARM GNU Toolchain, <cstdlib> uses
newlib's stdlib.h, defining div_t as an anonymous struct. A later
inclusion of NuttX's stdlib.h via <cstdio>->stdio.h->kmalloc.h then
redefines div_t with struct tag div_s, causing a conflicting declaration
error.
Guard the div_t/ldiv_t/lldiv_t definitions in stdlib.h with
redefinitions when a toolchain stdlib.h was already processed.
Also fix lldiv_s members typed as long instead of long long.
Signed-off-by: trns1997 <trns1997@gmail.com>
Mainline Linux doesn't use data encapsuation or flow control in its
tty_rpmsg driver. Create a NuttX counterpart which matches this
implementation.
This driver uses the static "rpmsg-tty" name to connect with the
remote service.
Signed-off-by: Maarten Zanders <maarten@zanders.be>
Intermediate files of make depend like .ddc and .dds may remain
when make is interrupted. Remove them using make distclean.
Signed-off-by: SPRESENSE <41312067+SPRESENSE@users.noreply.github.com>
Add explicit spin_lock_init in tricore_systimer_initialize() for the lock used by tricore systimer.
Signed-off-by: Haokun Dong <donghaokun@lixiang.com>
Add support for handling non-maskable interrupts (NMI) on TriCore
platforms. The NMI trap handler `tricore_nmitrap()` is provided as a weak
function that prints diagnostic information and invokes a panic with
register context. The main trap dispatcher will invoke `tricore_nmitrap`
when an NMI trap class is detected.
This change improves diagnostics when watchdog-induced NMIs or other
non-maskable exceptions occur during runtime.
Signed-off-by: yukangzhi <yukangzhi@xiaomi.com>
Extend CONFIG_LIBCXXTOOLCHAIN support to all remaining platforms
in CMake builds by explicitly locating and linking libstdc++.a
from the toolchain. This prevents build failures caused by STL
header/library mismatches where toolchain headers are included
without the corresponding library.
* Adds nuttx_find_toolchain_lib() calls for all platforms.
* Aligns CMake behavior with Make build system.
Signed-off-by: trns1997 <trns1997@gmail.com>
Some Aurix Boot-FW configurations leave watchdogs enabled by default,
which can cause unexpected resets during early bring-up. This change
explicitly disables the CPU and system watchdogs during core0 startup to
ensure reliable system initialization.
- For TC3XX chips, call `IfxScuWdt_disableCpuWatchdog()` and
`IfxScuWdt_disableSafetyWatchdog()`.
- For TC4XX chips, call `IfxWtu_disableCpuWatchdog()` and
`IfxWtu_disableSystemWatchdog()`.
This is a low-risk startup change and does not alter watchdog behavior
after system initialization.
Signed-off-by: yukangzhi <yukangzhi@xiaomi.com>
Add validation to ensure allocated stack size does not exceed TLS_MAXSTACK when
CONFIG_TLS_ALIGNED is enabled, and verify proper stack alignment using STACK_ALIGN_MASK
across all architectures. This improves stack safety and prevents potential TLS overflow conditions.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Rename STACK_ALIGNMENT macro to STACKFRAME_ALIGN throughout the codebase
to provide clearer naming semantics. The new name better reflects the macro's
purpose of frame alignment rather than general stack alignment.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Move stack alignment and kernel stack macros from architecture-specific internal
headers to public include/nuttx/irq.h. Consolidates duplicate definitions across
17 architecture families, reducing code duplication while enabling common code
to access these core alignment utilities without architecture dependencies.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
The SRN number in TriCore far exceeds the PN number.
Using IRQ as the PN number would result in an overflow.
Therefore, MINIMAL_VECTORTABLE is used to ensure that
the PN number does not overflow.
Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
Add support to disable signals actions related struct
Co-authored-by: guoshichao <guoshichao@xiaomi.com>
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
After addrenv_switch(), the current running task (this_task) may change due to
deferred work execution. Update all architecture interrupt, syscall, and exit
handlers to re-fetch tcb = this_task() after addrenv_switch(). Ensures scheduler
and context operations use the correct TCB, preventing context corruption and
exceptions across SMP and memory-protected builds.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
