mirror of
https://github.com/apache/nuttx.git
synced 2026-09-08 09:56:33 +00:00
arch/tricore: support up_trigger_irq
Enable gpsr and use gpsr to support multicore irq trigger. Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
This commit is contained in:
parent
f44060ca9f
commit
4775d6dceb
4 changed files with 66 additions and 0 deletions
|
|
@ -112,8 +112,11 @@
|
|||
#define FCX_FCXS_MASK (0xf << FCX_FCXS)
|
||||
#define FCX_FREE (FCX_FCXS_MASK | FCX_FCXO_MASK) /* Free CSA manipulation */
|
||||
|
||||
#define TRICORE_SRCNUM_PER_GPSR 8
|
||||
#define TRICORE_SRC2IRQ(src_addr) \
|
||||
(((uintptr_t)(src_addr) - (uintptr_t)&MODULE_SRC) / 4)
|
||||
#define TRICORE_GPSR_IRQNUM(src_cpu, dest_cpu) \
|
||||
TRICORE_SRC2IRQ(&SRC_GPSR00 + src_cpu * 8 + dest_cpu)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
|
|
|
|||
|
|
@ -75,6 +75,8 @@ IFX_INTERRUPT_INTERNAL(tricore_doirq, 0, 255)
|
|||
|
||||
/* Deliver the IRQ */
|
||||
|
||||
tricore_ack_irq(NDX_TO_IRQ(icr.B.CCPN));
|
||||
|
||||
irq_dispatch(NDX_TO_IRQ(icr.B.CCPN), regs);
|
||||
|
||||
/* Check for a context switch. */
|
||||
|
|
|
|||
|
|
@ -187,6 +187,10 @@ extern uintptr_t __A0_MEM[]; /* End+1 of .data */
|
|||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/* Interrupt ****************************************************************/
|
||||
|
||||
void tricore_ack_irq(int irq);
|
||||
|
||||
/* Signal handling **********************************************************/
|
||||
|
||||
void tricore_sigdeliver(void);
|
||||
|
|
|
|||
|
|
@ -37,6 +37,7 @@
|
|||
|
||||
#include "IfxSrc.h"
|
||||
#include "IfxCpu.h"
|
||||
#include "IfxInt_reg.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
|
|
@ -68,6 +69,40 @@ static inline void tricore_color_intstack(void)
|
|||
# define tricore_color_intstack()
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_HAVE_IRQTRIGGER
|
||||
/****************************************************************************
|
||||
* Name: tricore_gpsrinitialize
|
||||
*
|
||||
* Description:
|
||||
* Perform gpsr initialization for the CPU
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void tricore_gpsrinitialize(void)
|
||||
{
|
||||
volatile Ifx_SRC_SRCR *src = &SRC_GPSR00 + up_cpu_index();
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 6; i++)
|
||||
{
|
||||
#ifdef CONFIG_ARCH_TC3XX
|
||||
IfxSrc_init(src, IfxSrc_Tos_cpu0 + up_cpu_index(),
|
||||
IRQ_TO_NDX(TRICORE_SRC2IRQ(src)));
|
||||
#else
|
||||
IfxSrc_init(src, IfxSrc_Tos_cpu0 + up_cpu_index(),
|
||||
IRQ_TO_NDX(TRICORE_SRC2IRQ(src)),
|
||||
IfxSrc_VmId_none);
|
||||
#endif
|
||||
|
||||
src += TRICORE_SRCNUM_PER_GPSR;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
|
@ -91,6 +126,10 @@ void up_irq_enable(void)
|
|||
|
||||
void up_irqinitialize(void)
|
||||
{
|
||||
#ifdef CONFIG_ARCH_HAVE_IRQTRIGGER
|
||||
tricore_gpsrinitialize();
|
||||
#endif
|
||||
|
||||
tricore_color_intstack();
|
||||
up_irq_enable();
|
||||
}
|
||||
|
|
@ -164,4 +203,22 @@ void up_affinity_irq(int irq, cpu_set_t cpuset)
|
|||
|
||||
void tricore_ack_irq(int irq)
|
||||
{
|
||||
volatile Ifx_SRC_SRCR *src = &SRC_CPU_CPU0_SB + irq;
|
||||
IfxSrc_clearRequest(src);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_HAVE_IRQTRIGGER
|
||||
/****************************************************************************
|
||||
* Name: up_trigger_irq
|
||||
*
|
||||
* Description:
|
||||
* Trigger an IRQ by software. May not be supported by all architectures.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_trigger_irq(int irq, cpu_set_t cpuset)
|
||||
{
|
||||
volatile Ifx_INT_SRB *srb = &INT_SRB0 + up_cpu_index();
|
||||
srb->U = cpuset;
|
||||
}
|
||||
#endif
|
||||
Loading…
Add table
Add a link
Reference in a new issue