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arch/tricore: Improve up_backtrace implementation

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1. Make tricore_backtrace.c conditional on CONFIG_SCHED_BACKTRACE,
   consistent with RISC-V and ARM architectures.
2. Add NULL return address check to terminate early on invalid entries.
3. Fix non-current task backtrace to use regs[REG_LPCXI] which
   preserves the UL bit needed for correct CSA type identification.

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
This commit is contained in:
liwenxiang1 2026-05-20 11:46:53 +08:00 • committed by Xiang Xiao
parent 356f7c7b47
commit bb27808631
3 changed files with 27 additions and 14 deletions
Download patch file Download diff file Expand all files Collapse all files

5
arch/tricore/src/common/CMakeLists.txt
View file

@ -22,7 +22,6 @@
set(SRCS
tricore_allocateheap.c
tricore_backtrace.c
tricore_cache.c
tricore_checkstack.c
tricore_createstack.c
@ -46,6 +45,10 @@ set(SRCS
tricore_systimer.c
tricore_usestack.c)
if(CONFIG_SCHED_BACKTRACE)
list(APPEND SRCS tricore_backtrace.c)
endif()
if(CONFIG_ENABLE_ALL_SIGNALS)
list(APPEND SRCS tricore_schedulesigaction.c tricore_sigdeliver.c)
endif()

5
arch/tricore/src/common/Make.defs
View file

@ -23,7 +23,6 @@
HEAD_CSRC += tricore_doirq.c
CMN_CSRCS += tricore_allocateheap.c
CMN_CSRCS += tricore_backtrace.c
CMN_CSRCS += tricore_cache.c
CMN_CSRCS += tricore_checkstack.c
CMN_CSRCS += tricore_createstack.c
@ -47,6 +46,10 @@ CMN_CSRCS += tricore_trapcall.c
CMN_CSRCS += tricore_systimer.c
CMN_CSRCS += tricore_usestack.c
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
CMN_CSRCS += tricore_backtrace.c
endif
ifeq ($(CONFIG_ENABLE_ALL_SIGNALS),y)
CMN_CSRCS += tricore_schedulesigaction.c tricore_sigdeliver.c
endif

31
arch/tricore/src/common/tricore_backtrace.c
View file

@ -25,7 +25,9 @@
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include "sched/sched.h"
#include "tricore_internal.h"
@ -42,29 +44,34 @@
****************************************************************************/
nosanitize_address
static int backtrace(uintptr_t pcxi, void **buffer, int size, int *skip)
static int backtrace(uintptr_t pcxi, void **buffer,
int size, int *skip)
{
uintptr_t *csa;
int i = 0;
for (; ((pcxi & FCX_FREE) != 0U) && (i < size); )
for (; i < size && (pcxi & FCX_FREE) != 0; )
{
uintptr_t *csa;
csa = tricore_csa2addr(pcxi);
if (csa == NULL)
{
break;
}
if ((pcxi & PCXI_UL) != 0U)
if ((pcxi & PCXI_UL) != 0)
{
if (csa[REG_UA11] == 0)
{
break;
}
if ((*skip)-- <= 0)
{
buffer[i++] = (void *)csa[REG_UA11];
}
}
pcxi = csa[0];
pcxi = csa[REG_UPCXI];
}
return i;
@ -107,10 +114,11 @@ static int backtrace(uintptr_t pcxi, void **buffer, int size, int *skip)
*
****************************************************************************/
int up_backtrace(struct tcb_s *tcb, void **buffer, int size, int skip)
int up_backtrace(struct tcb_s *tcb,
void **buffer, int size, int skip)
{
struct tcb_s *rtcb = running_task();
int ret;
int ret = 0;
if (size <= 0 || !buffer)
{
@ -119,13 +127,12 @@ int up_backtrace(struct tcb_s *tcb, void **buffer, int size, int skip)
if (tcb == NULL || tcb == rtcb)
{
ret = backtrace((uintptr_t)__mfcr(CPU_PCXI),
buffer, size, &skip);
ret = backtrace(__mfcr(CPU_PCXI), buffer, size, &skip);
}
else
{
ret = backtrace(tricore_addr2csa(tcb->xcp.regs),
buffer, size, &skip);
uintptr_t *regs = tcb->xcp.regs;
ret = backtrace(regs[REG_LPCXI], buffer, size, &skip);
}
return ret;