Long long support is now unconditional in printf/scanf and related
helpers. Remove the Kconfig option, the conditional compilation in
libvsprintf/libvscanf/ultoa_invert, the build-time #error in the
rn2xx3 driver, and clean up CONFIG_LIBC_LONG_LONG entries from all
board defconfigs.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Every compiler supported by NuttX provides the "long long" types,
so the CONFIG_HAVE_LONG_LONG indirection is no longer useful.
Remove the option from include/nuttx/compiler.h and treat
"long long" as unconditionally available across the OS.
In addition to deleting the guard itself, this commit unconditionally
enables the long-long flavored helpers that used to be gated behind
it:
- libs/libc/fixedmath: drop the soft-emulated b32/ub32 routines
in lib_fixedmath.c (-261 lines) and trim the matching
prototypes, Make.defs and CMakeLists.txt entries; keep only
the long-long backed implementations.
- include/sys/endian.h, include/strings.h, libs/libc/string
/lib_ffsll.c, lib_flsll.c: always expose the 64-bit byte-swap
and ffsll/flsll variants.
- libs/libm/libm/lib_llround{,f,l}.c: drop the empty stubs.
- libs/libc/stdlib (atoll, llabs, lldiv, strtoll/ull, rand48,
strtold), libs/libc/stream (libvsprintf, libvscanf,
libbsprintf, ultoa_invert), libs/libc/misc (crc64, crc64emac),
libs/libc/inttypes/strtoimax, libs/libc/lzf, libs/libc/libc.csv,
libs/libc/string (memset, vikmemcpy): remove the
#ifdef CONFIG_HAVE_LONG_LONG branches.
- include/{stddef.h,stdlib.h,fixedmath.h,sys/epoll.h,cxx/cstdlib,
nuttx/audio/audio.h,nuttx/crc64.h,nuttx/lib/math.h,
nuttx/lib/math32.h,nuttx/lib/stdbit.h}: same guard cleanup.
- drivers/note/note_driver.c, fs/spiffs/src/spiffs.h,
sched/irq/irq_procfs.c: drop their local guards as well.
- Documentation/applications/netutils/ntpclient/index.rst:
refresh the documentation snippet.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Split mnemofs into allocation, directory, file, CTZ, and read/write
modules, and update direntry traversal and file handling. Add superblock
format version 1 support, reject newer on-flash versions, and preserve
the mounted version when rewriting metadata.
Update the NAND simulator drivers for the new mnemofs behavior by fixing
spare writes, exposing the erase state, allowing raw reads, and documenting
the background-task startup flow.
Signed-off-by: Saurav Pal <resyfer.dev@gmail.com>
Add documentation for the STMicro STM32N6 chip family and the
Nucleo-N657X0-Q development board introduced in the previous two
commits.
- platforms/arm/stm32n6/index.rst
Chip overview: core, peripherals supported in the initial
port, and a pointer to the board page.
- platforms/arm/stm32n6/boards/nucleo-n657x0-q/index.rst
Board page, structured per Documentation/contributing/
doc_templates/board.rst: hardware summary, user LED and
button pin map, the two shipped configs (nsh, ostest),
and the DEV-mode flash recipe used to load NuttX into
AXISRAM via ST-LINK.
- platforms/arm/stm32n6/boards/nucleo-n657x0-q/nucleo-n657x0-q.jpg
Photograph of the board, referenced from the board page.
The pages are picked up by the existing glob-based toctree in
Documentation/platforms/arm/index.rst, no parent index changes are
required.
Signed-off-by: ImBonkers <samuelnlinden@pm.me>
Add board support for the STMicro Nucleo-N657X0-Q, sufficient to boot
NSH over the on-board ST-LINK virtual COM port (USART1, 115200 8N1)
in DEV (serial) boot mode.
Two defconfigs are shipped:
- nsh: minimal NuttShell prompt.
- ostest: nsh + apps/testing/ostest for RTOS smoke testing.
Production signed XSPI flash boot is deferred to a follow-up; in DEV
mode the image is loaded directly into AXISRAM at 0x34000400 by the
host (e.g. STM32CubeProgrammer over ST-LINK), keeping the linker
script trivial — .text/.rodata/.data/.bss/.heap all in AXISRAM.
Signed-off-by: ImBonkers <samuelnlinden@pm.me>
Introduce minimal chip support for the STMicro STM32N6 family
(Cortex-M55, ARMv8.1-M with TrustZone and FPU), sufficient to bring
up an NSH console over USART1.
Scope (deliberately minimal first drop):
- Chip selector ARCH_CHIP_STM32N6 wired into arch/arm/Kconfig and
chip-name mapping ("stm32n6").
- Sub-Kconfig under arch/arm/src/stm32n6 with the STM32N657X0 chip
selector and a single user-selectable USART (USART1).
- Boot path: stm32_start with a naked dispatcher that clears the
boot-ROM MSPLIM/PSPLIM stack limits before any compiler-emitted
prologue, then runs vector relocation and SRAM-only heap init.
The chip runs entirely in the Secure state; SAU is left in its
reset configuration.
- PLL1-based clock tree fed from HSI64 targeting 200 MHz CPU, with
USART1 kernel-clock routed to HSI for a predictable BRR that is
independent of any later clock change.
- Low-level USART driver with full serial framework support.
stm32_serial.c is adapted from arch/arm/src/stm32h5/stm32_serial.c
(sibling ARMv8-M Mainline port with the same USART IP), stripped
of DMA-RX, LPUART, the per-USART2..5 plumbing, RS-485 driver-enable,
TIOCSINVERT/SWAP and HALFDUPLEX paths.
- SysTick system timer.
- GPIO, PWR and RCC helpers.
TrustZone, MPU, I/D-cache and Helium (MVE) are left disabled to
minimise bring-up surface; these will be added in follow-up patches
alongside the drivers that need them.
Signed-off-by: ImBonkers <samuelnlinden@pm.me>
BREAKING CHANGE: remove PWM_MULTICHAN option
PWM_MULTICHAN option is redundant, we can just set CONFIG_PWM_NCHANNELS > 1.
At default CONFIG_PWM_NCHANNELS is set to 1, so the default behavior is preserved.
Access to single channel API is now `info->channels[0].XXX` instead of `info->XXX`
This is the first step to simplify PWM implementation and make it more portable.
Signed-off-by: raiden00pl <raiden00@railab.me>
Fixes#16151. Compares .config state before and after kconfig-mconf and triggers 'make clean' if the configuration was modified to prevent orphaned object files.
Signed-off-by: Agnimitra sasaru <158492301+HyphenAlpha456@users.noreply.github.com>
When checking the first line of a block, the returned value is
incremented by one.
This commit updates doc to explain why.
Signed-off-by: Jiri Vlasak <jvlasak@elektroline.cz>
Add support for the i.MX9 SAR ADC block.
The driver provides initialization, deinitialization, channel-mask
validation, and one-shot reads for the supported ADC channels. It also
handles the ADC clock bring-up, power-up sequence, calibration, and raw
12-bit result extraction from the per-channel data registers.
Signed-off-by: Joonas Ihonen <joonas.ihonen@tii.ae>
The goal is to only execute recipes when there is an actual change in
the prerequisites.
There are several issues which cause the nuttx binary target to be
re-made every time the top level make is run.
1. Previously the target nuttx$(EXEEXT), was used, but make resolved
this in the relative directory make -C $(ARCH_SRC), and couldn’t find
it (need an absolute path: `$(TOPDIR)/..).
2. The .tmp prerequisite for nuttx was always deleted
3. libboard's recipe had a sub-make which may or may not update that
target. This was a phony target, and was therefore always considered out
of date.
These issues were causing the nuttx recipe to be run every make, which
was hiding some missing prerequisites:
1. the .config is a prerequisite for the .tmp target
2. libapps.a (and other linklibs) are pre-requisites for nuttx
Changes:
The changes are only in the build system, and only for arm.
Track nuttx$(EXEEXT) via vpath so Make knows when it's already up to
date without an explicit path. Add $(TOPDIR)/.config as a dependency
to the linker script preprocessing so config changes trigger
re-preprocessing.
Keep the .tmp linker script on disk (clean already removes it) so
timestamp-based dependency checking works across builds. These .tmp
files need to be added to the gitignore or the CI will complain.
Use FORCE pattern for board/libboard to ensure it's always checked
but use the actual library file as the link dependency so nuttx is
only re-linked when library content changes. Add staging libs as
dependency to nuttx link rule so changed app libs trigger re-link.
Signed-off-by: Liam Hickey <williamhickey@geotab.com>
boards/sim/sim/sim/scripts/Make.defs adds `-no-pie` to ARCHCFLAGS /
ARCHPICFLAGS / LDFLAGS for every 64-bit non-Mac sim build. The
original comment ("To compile 64-bit Sim, adding no-pie is necessary
to prevent linking errors but this may cause other issues on
Ubuntu 20.") already flagged the workaround as fragile.
On HOST_ARM64 the option is in fact actively harmful. When gcc is
asked to produce a non-PIE executable on aarch64 it switches the
libgcc resolution path from the dynamic library
`libgcc_s.so.1` to the static archive `libgcc_s.a`. Ubuntu's
arm64 toolchain (and Debian / Raspbian arm64) **does not ship**
`libgcc_s.a` (only `libgcc_s.so.1`), so the link aborts with:
/usr/bin/ld: cannot find -lgcc_s
/usr/bin/ld: cannot find -lgcc_s (push-state / as-needed both fail)
collect2: error: ld returned 1 exit status
`ld --verbose` shows ld searching 20+ paths for `libgcc_s.a`,
finding only `libgcc_s.so` (a linker script pointing at
`libgcc_s.so.1`) which is invalid in non-PIE mode.
x86_64 Linux is unaffected because Ubuntu ships the static
`libgcc_s.a` (or a compatible static-fallback library) in its
amd64 libgcc-N-dev packaging. macOS, Windows and Cygwin go
through completely different code paths and never reach this
branch.
Extend the existing `else ifeq ($(CONFIG_HOST_MACOS),)` exclusion
to also cover HOST_ARM64 by concatenating the two variables in the
condition: `else ifeq ($(CONFIG_HOST_MACOS)$(CONFIG_HOST_ARM64),)`.
The condition is true only when both variables are empty (i.e. on
a 64-bit non-macOS non-aarch64 Linux host), so aarch64 hosts fall
through to gcc's default PIE-aware link path, which works
correctly. This concatenation idiom matches the style already
used elsewhere in the file (suggested by @xiaoxiang781216 in
review). The default text-segment placement
`-Ttext-segment=0x40000000` and `-Wl,--gc-sections` (set in the
common LDFLAGS just above this block) are honored regardless of
PIE / non-PIE.
Verified on NVIDIA Jetson Orin (Ubuntu 20.04 L4T, GCC 9.4) and
Raspberry Pi 4B (Debian 13 trixie, GCC 14.2):
$ ./build.sh sim:nsh -j$(nproc)
$ ./nuttx
NuttShell (NSH)
nsh> ostest
... [38 user_main stages, 14 PASS, 0 FAIL] ...
ostest_main: Exiting with status 0
x86_64 Linux behaviour is unchanged (the concatenation is empty
there, so the block is taken exactly as before).
Companion patch: arch/sim: rename nuttx libc memchr to avoid host
glibc collision (independent fix needed on the same aarch64 hosts).
Signed-off-by: Jinji Cui <113000688+cjj66619@users.noreply.github.com>
The sim/src/nuttx-names.in symbol-rename list is the mechanism that
keeps every nuttx libc function used inside nuttx.rel from clashing
with the same-named function in host glibc when the sim executable
is finally linked. The list already covers ~200 symbols (memcpy,
strlen, strcat, strchr, ...) but memchr was missing.
On x86_64 Linux hosts the omission has no visible effect because
host glibc dispatches memchr through an IFUNC resolver
(__memchr_ifunc) that the static libc.a path does not eagerly pull
in for typical sim links. On HOST_ARM64 (Ubuntu 20.04 aarch64,
glibc 2.31 .. 2.41), however, the final cc/ld invocation in the
sim Makefile drags libc.a(memchr.o) into the link, which then
collides with nuttx libc's lib_memchr.o that has already been
folded into nuttx.rel:
/usr/bin/ld: /usr/lib/gcc/aarch64-linux-gnu/9/../../../aarch64-linux-gnu/libc.a(memchr.o):
in function `__memchr_ifunc':
(.text+0x0): multiple definition of `memchr';
nuttx.rel:libs/libc/string/lib_memchr.c:55: first defined here
Add memchr to the rename list (placed in alphabetical position
between malloc_usable_size and memcpy). After this fix sim:nsh
builds cleanly on aarch64 Linux hosts (verified on NVIDIA Jetson
Orin L4T Ubuntu 20.04 + Raspberry Pi 4B Debian 13 trixie). The
behaviour on x86_64 / macOS / Cygwin hosts is unchanged because
those targets either never hit the collision or use the
underscore-prefixed variant gated by NXSYMBOLS macro definition
in the same file (lines 26-31).
Signed-off-by: Jinji Cui <113000688+cjj66619@users.noreply.github.com>
Add inode_checkperm() and integrate it into file_vopen()
to enforce UNIX-style read/write permission checks for
pseudoFS inodes using effective uid/gid credentials.
Skip permission enforcement for mountpoint inodes and
allow kernel threads to bypass checks.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
ESP32-P4 uses simple boot mode without a separate bootloader,
so merging binaries into a single 16MB file is unnecessary.
Removing this option allows 'make flash' to write only the
actual firmware (~380KB) instead of a padded 16MB image,
reducing flash time from ~55s to ~4.5s.
Assisted-by: GitHubCopilot:claude-4.7-opus
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
The STM32 DMA NDTR/CNDTR transfer-count register is 16 bits wide on
every STM32 series the in-tree driver supports (IPv1 CNDTR, IPv2
SxNDTR). spi_exchange()'s DMA path forwarded the caller's full
nwords to stm32_dmasetup(), so a single SPI_EXCHANGE() of >= 65536
words silently programmed NDTR to (nwords & 0xffff). When the
truncated count was zero - the typical case for an exact 64 KiB
transfer (flash erase block, FAT cluster, common DMA staging
buffer) - the stream completed instantly with no transfer-complete
interrupt and the caller deadlocked in spi_dmarxwait().
Walk the request in chunks of at most 65535 words inside the
existing DMA branch, reusing the same spi_dma{rx,tx}{setup,start,
wait}() sequence per chunk. Single-descriptor transfers (every
in-tree caller today) are byte-for-byte identical. CONFIG_SPI_TRIGGER
is honored for the first chunk only; subsequent chunks must run
unconditionally because re-arming between chunks of one logical
exchange was never part of the SPI_TRIGGER contract.
Drive-by: rescale priv->buflen-clamped nwords so the DMA
descriptor matches the actually-copied byte count, promote the
spiinfo() format specifier from %d to %zu, and fix two adjacent
comment typos.
See the PR description for reproduction, NSH log and benchmark
numbers (5.12 MB/s, 97.5% of SCK/8 @ 42 MHz on STM32F407 + W25Q128).
Signed-off-by: Jinji Cui <113000688+cjj66619@users.noreply.github.com>
Add a CONFIG_FS_PERMISSION Kconfig option for future
filesystem permission support infrastructure.
The option depends on CONFIG_SCHED_USER_IDENTITY and
CONFIG_PSEUDOFS_ATTRIBUTES to ensure task credential
tracking and pseudo-filesystem inode ownership/mode
metadata are available before enabling the feature.
The symbol defaults to n to preserve existing behavior
for current configurations.
No runtime permission enforcement is introduced by
this commit.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
* NuttX supports ESP32-P4 >= v3.0 by default.
* In order to run on older chips configuration tuning is required.
* Without configutation tune boot loop happens on older chips.
* Added note on WaveShare ESP32-P4-Nano board that is almost identical
to existing ESP32-P4-Function-EV-Board board, so configs are compatible,
but it has v1.3 chip, thus config tune is required as documented above.
* Added cross-file reference label to esp32p4-function-ev-board.
Signed-off-by: Tomasz 'CeDeROM' CEDRO <tomek@cedro.info>
Document the new NSH chmod and chown builtins,
including supported numeric permission and
ownership forms.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
Preserve only the existing file type bits (S_IFMT) and
replace permission bits from inode->i_mode instead of
merging them with |= semantics.
This fixes pseudoFS stat()/ls mode reporting after
chmod() updates.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
This commits enables moving BSS data segments to the external PSRAM
on ESP32-P4. This is controlled by a Kconfig option.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
compiler-rt/Make.defs:45: target `bin/compiler-rt/compiler-rt/lib/builtins' given more than once in the same rule.
compiler-rt/Make.defs:45: target `kbin/compiler-rt/compiler-rt/lib/builtins' given more than once in the same rule.
Signed-off-by: bijunda <bijunda@bytedance.com>
github infra is not stable so even "git clone" from github repos can fail with error: 500.
With this commit we try to clone repo few more times.
Signed-off-by: raiden00pl <raiden00@railab.me>
An IPV6 Router advertisement can have an MTU max option.
This option should not increase the d_pktsize for a given interface
since that max size might have been set based on CONFIG or buffer size.
Signed-off-by: daniellizewski <daniellizewski@geotab.com>
Three `export VAR ?= $(shell ...)` assignments cause GNU make to
re-run the embedded ${shell ...} every time the variable is exported
to a recipe's environment. That spawns `tools/incdir` and
`tools/define` once per recipe, serialised through the master make
thread, which adds per recipe overhead to multi-job builds.
Wrap each with `ifeq ($(origin VAR),undefined)` + `:=` so the shell
call runs once at parse time while preserving the override semantics
of `?=`.
Measured impact on a 20-core build host is a ~26% speedup of wall
time.
Signed-off-by: Daniel Fanache <dan@rts.ro>
PendSV is the deferred half of the Cortex-M context-switch path: a
higher-priority ISR that wakes a task sets PendSV pending and returns,
and PendSV then performs the register save/restore. This pattern is
only safe when PendSV runs at the lowest priority - otherwise a
peripheral ISR can preempt the context switch mid-update and corrupt
thread state.
The previous write of DEFPRIORITY32 to NVIC_SYSH12_15_PRIORITY in
up_irqinitialize() leaves PendSV at NVIC_SYSH_PRIORITY_DEFAULT (0x80),
the same priority as peripheral IRQs. Read-modify-write the SHPR3 to
lower only the PendSV byte to NVIC_SYSH_PRIORITY_MIN.
This is the canonical ARM Cortex-M priority arrangement and it matches
e.g. this reference:
https://nuttx.apache.org/docs/latest/guides/zerolatencyinterrupts.html (although
worked with a three-bit priority system)
This patch hardens up_irqinitialize against future peripheral-IRQ
prioritisation.
Signed-off-by: Daniel Fanache <dan@rts.ro>
At system startup, the NVIC was configured for proper default priority
only for the first three IPR registers, even though the loop was
executed 13 times - due to a gotcha on what the `NVIC_IRQ_PRIORITY(i)`
macro returns.
IRQs 12-51 stayed at the reset priority of 0 - highest in the system;
so any peripherals issuing those interrupts will shoot through
critical sections that rely on
BASEPRI = NVIC_SYSH_PRIORITY_DEFAULT (0x80).
This can corrupt the TCB ready-to-run list and semaphore wait queues;
this is hard to reproduce (e.g. in ostest) because it requires a
peripheral ISR to land inside a critical section, but the failure
modes range from hangs to wild pointer crashes once it does.
In my case I had SPI and I2C peripherals that were issuing IRQs and
were preempting scheduler and semaphore list operations, causing
corruption.
Step the loop by four and bound it with RP23XX_IRQ_NEXTINT so every
IPR covering IRQs 0..51 is written once with DEFPRIORITY32.
Signed-off-by: Daniel Fanache <dan@rts.ro>
OpenAMP 2025.10.0 removed the deprecated WITH_DCACHE_VRINGS, WITH_DCACHE_BUFFERS and WITH_DCACHE_RSC_TABLE CMake options. The replacement is WITH_DCACHE, which enables VIRTIO_USE_DCACHE for vrings, buffers and resource table cache operations.
Use WITH_DCACHE for CONFIG_OPENAMP_CACHE in the CMake integration so the CMake build matches the Makefile path, which already defines VIRTIO_USE_DCACHE directly.
Signed-off-by: yaojiaqi <yaojiaqi@lixiang.com>
Add dedicated NEON implementations for mutually aligned medium and long memcpy copies when building with __ARM_NEON__. These paths use NEON multi-register loads and stores while preserving the existing VFP implementation for non-NEON VFP configurations.
NEON builds also define USE_VFP, so select the NEON implementation explicitly before falling back to VFP. Apply the same aligned-copy optimization to the armv7-a, armv7-r, and armv8-r implementations.
Signed-off-by: yaojiaqi <yaojiaqi@lixiang.com>
Document the nxcamera command usage, including device selection,
resolution, and pixel format options. Also mention recent support
for multi-instance camera mounting and the macOS AVFoundation
backend on the SIM platform.
Signed-off-by: Peter Bee <bijunda@bytedance.com>
Adapt the macOS AVFoundation backend for multi-device discovery,
camera index mapping and capture startup compatibility. This enables
reliable use of multiple cameras through the SIM camera framework.
Signed-off-by: Peter Bee <bijunda@bytedance.com>
Allow the SIM camera/V4L2 capture framework to manage multiple
imgdata instances with dynamic mounting. This avoids cross-talk
between camera streams when multiple devices are used.
Signed-off-by: Peter Bee <bijunda@bytedance.com>
