Add initial Apache NuttX support for the Allwinner D1 / T-Head C906
running in supervisor mode under OpenSBI.
Add support for:
- RV64 D1 architecture definitions
- Lichee RV 86 Panel board configuration
- UART0 console at 115200 baud
- D1 PLIC interrupt controller
- native D1 Timer1 scheduler tick
- early inherited-watchdog disable
- FLAT S-mode NSH configuration
The port has been tested on physical Sipeed Lichee RV / 86 Panel
hardware and boots to an interactive NuttShell.
The scheduler tick uses OSC24M Timer1 at 1000 Hz. The Timer1 interval
register is programmed with 23999 to produce exactly 24000 input clocks
per tick on the physical D1.
Assisted-by: OpenAI Codex:gpt-5.6-sol
Signed-off-by: Lance Harvie <lanceharvie@gmail.com>
Add initial NuttX port for the original (white) BeagleBone board, which is
powered by the TI AM335x Sitara Cortex-A8 processor.
This commit includes:
- Board documentation
- Board support package files derived from BeagleBone black
- Architecture-specific page allocator for memory management in kernel build.
- Default configurations for both flat (`nsh`) and kernel (`knsh`) builds
running via U-Boot from a microSD card.
Signed-off-by: Lwazi Dube <lwazeh@gmail.com>
ESWIN's own evaluation board for this SoC. Where the StarPro64 is a
single board computer built around the chip, the EVB brings out most of
the SoC's interfaces.
Everything shared with the StarPro64 is already in the common directory,
so this carries the board's own facts: which UART reaches which connector,
which pads carry the boot straps, where its memory sits, and a
configuration starting from the same place the StarPro64's does.
The summary tables on sheet 3 of both boards' schematics are inherited
from ESWIN's reference design and describe that design rather than either
board. On this board the console is UART0 through the FT4232 bridge,
UART1 goes to the M.2 socket and a header, and UART2 reaches the RS232
port.
The documentation page follows the board template: a photograph, the
board's features, the console and its port on the FT4232 bridge, power,
the build and TFTP boot procedure, and what NuttX drives so far.
Boots to an NSH prompt over UART0 with all four harts running.
Assisted-by: Claude:claude-opus-5
Signed-off-by: Justin Hammond <justin@dynam.ac>
The port had one board directory holding one board, with everything in it
whether it described the SoC or the PCB. A second EIC7700X board follows,
so this adopts the common-plus-board layout NuttX provides, as mpfs uses.
boards/risc-v/eic7700x/common holds what is true of the SoC: the boot path
that mounts the RAM disk and /proc before calling the board's own bring
up, the linker script, the start up scripts and the image builder.
ARCH_CHIP_EIC7700X selects ARCH_BOARD_COMMON, so the symlinks the build
makes always point at code that compiles.
The board directory keeps what is a fact about the PCB: its own board.h
and board_memorymap.h, since the include fallback is all or nothing, a
bring up that owns the order its devices register in, and a board_config.h
declaring what that bring up may call.
The image builder moves to common/tools and derives its output name from
the configuration. It computes the padding between the kernel and the RAM
disk from _ebss rather than assuming 64 KiB, which fails once BSS grows
past it: the disk lands below _ebss and the BSS clear zeroes it before
anything searches for it.
The StarPro64 configuration gains what the port now needs: four harts,
960 MiB of RAM, a larger task stack, a backtrace on assert, the system log
in RAM for dmesg, and ELF applications, for which ARCH_CHIP_EIC7700X now
selects ARCH_HAVE_ELF_EXECUTABLE.
board.h loses its LED definitions. CONFIG_ARCH_LEDS is not set, nothing
implements board_autoled_on(), and the indices they gave named no LED.
The documentation pages gain the tags the template asks for.
Assisted-by: Claude:claude-opus-5
Signed-off-by: Justin Hammond <justin@dynam.ac>
Supports the UNIX setuid-on-exec sudo helper. Documents the model,
generates an extra ROMFS user and /etc/sudoers for a non-root test,
reports BINFS modes from the builtin table so ls -l matches execute
bits, and skips NULL environment entries when sanitizing a setuid exec.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
Add a P0 skeleton port for the Realtek RTL8721F (SDK codename Green2 /
amebagreen2). Structurally the RTL8721F is a twin of the RTL8720F -- the
AP/host core is km4tz (ARMv8-M.main, TrustZone secure) and the WiFi MAC/PHY
runs on the km4ns network-processor core -- so this port is modelled on the
RTL8720F one and shares the IC-agnostic ameba glue in
arch/arm/src/common/ameba.
This is the "configures and links" skeleton (rtl8721f_evb:nsh builds an
image end to end). Four differences from the RTL8720F template were needed
to make the empty shell link against amebagreen2:
* km4tz has no FPU (cmsis_cpu.h defines __FPU_PRESENT 0), so the chip does
not select ARCH_HAVE_FPU and the image is built soft-float.
* ameba_app_start.c matches amebagreen2's ram_km4tz silicon init: the
nocache MPU map, the non-secure ROM BSS clear, OSC4M (not OSC2M)
calibration gated on EFUSE cut >= B and CHIP_TYPE_ASIC_POSTSIM.
* amebagreen2 ships no lib_rom.a, so the ROM archive whole-archive link is
dropped; the WiFi/OS/non-secure ROM symbols come from the SDK
ameba_rom_symbol_acut{,_wifi,_os}.ld maps appended to the image2 linker
script, exactly as green2's own image2 link does.
* the AP WiFi security lib is lib_wifi_common.a (was lib_wifi_com_sec.a).
The per-chip IRQ vector table (irq.h) and the RAM_START/RAM_SIZE layout
still carry RTL8720F values and are refined in the follow-up bring-up work.
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
BOARD_ETC_ROMFS_PASSWD_ENABLE now depends on FSUTILS_PASSWD and a
cryptodev backend so PBKDF2 passwd autogen cannot be enabled without
the runtime login stack. Fixes#19573.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
The Pimoroni Pico Plus 2 W is a Pico form-factor board built around the
RP2350B, the 80-pin part with 48 GPIOs, carrying 16MB of flash, 8MB of PSRAM
and a Raspberry Pi RM2 module for 2.4GHz WiFi. The RM2 houses an Infineon
CYW43439, wired to the same pins the Raspberry Pi Pico W uses: GPIO 23 for
power enable, 24 for the shared gSPI data and interrupt line, 25 for chip
select and 29 for the clock.
Three configurations are provided: nsh and usbnsh without the wireless chip,
and wifi, which brings up wlan0 in station mode with WAPI, a DHCP client and
ping. The CYW43439 firmware and CLM blob are linked in from the pico-sdk at
build time, as on the Pico W; CONFIG_CYW43439_FIRMWARE_BIN_PATH selects the
file and the board documentation covers converting it out of the C header that
pico-sdk 2.x ships in place of the binary. rp23xx_firmware.c is placed in the
common source directory so that a future board with the same chip can reuse
it, and unlike rp2040 the blob is staged for the CMake build as well.
Two board details are worth calling out:
- The only LED is wired to GPIO 0 of the CYW43439 rather than to a pin of
the RP2350, so driving it means an iovar request over the gSPI bus. That
works for CONFIG_USERLED but not for CONFIG_ARCH_LEDS, whose
board_autoled_on() is called from interrupt handlers and from assertion
handling, so a build selecting CONFIG_ARCH_LEDS is rejected with an
explicit message. The LED also only responds once wlan0 has been brought
up, because that is when the chip's firmware is downloaded.
- The BOOT button is also wired to GPIO 45, so it can be read as an ordinary
user button once NuttX is running. Its internal pull-up is enabled
deliberately: erratum RP2350-E9 means a floating Bank 0 input on RP2350 A2
leaks enough current to settle around 2.2V, which the internal pull-down
cannot overcome.
Tested on the board with a Raspberry Pi Debug Probe: nsh and wifi boot on
UART0, wlan0 reports the MAC read from the chip, wapi scan lists access
points, and association to a WPA2 network followed by DHCP gives a working
route with ping succeeding to both a literal address and a resolved name.
The LED and the BOOT button were confirmed by hand.
Assisted-by: Claude Code:claude-opus-5
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
Document PBKDF2-HMAC-SHA256 ROMFS passwd generation and update board
Kconfig help text accordingly. Set the documented sim/login CI credential
in GitHub Actions.
Enable CONFIG_CODECS_BASE64 and CONFIG_NETUTILS_CODECS on sim:dropbear for
link compatibility with dropbear's bundled libtomcrypt.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
Add NSH and OSTest configurations, the DRAM linker script, and the minimal board initialization and reset hooks for RK3588S.
Signed-off-by: Emre Cecanpunar <emreleno@gmail.com>
New RISC-V chip port for the GigaDevice GD32VW55x (Nuclei N307, Wi-Fi 6
and BLE 5.3 combo), with the GD32VW553K-START board.
Core:
- ECLIC interrupt controller, clock tree (160 MHz / 40 MHz HXTAL),
64-bit machine timer, serial (USART0/UART1/UART2) and RTC.
- The instruction cache must be enabled in head.S or the UART drops
characters under load; the mask ROM uses the first 0x200 bytes of SRAM
so the image is linked at 0x20000200; the RTC needs PMU_CTL0.BKPWEN or
the register writes are silently discarded.
- The ECLIC only auto-clears the interrupt pending bit in hardware-vectored
mode, so the trap dispatch clears it for edge-triggered sources or they
re-fire forever (level-triggered peripherals clear their own).
Peripherals: DMA (8 channels), GPIO + EXTI, SPI (optional DMA), I2C0/I2C1
(the new STM32-v2-style IP, not the GD32F4 one), ADC, PWM and input
capture on the timers, both watchdogs, PROGMEM, TRNG and CRC. All use
the standard NuttX lower-half interfaces and direct register access, not
the vendor SPL. Three user LEDs (GPIOC), and a software reset through the
Nuclei SysTimer.
Internal flash: it is a system-in-package NOR die behind the real-time
decryption block, so it is not programmed through the FMC registers -- the
driver goes through the mask ROM API (rom_flash_*), the same way the
vendor code does. PROGMEM can be mounted as LittleFS; the region sits
below the Wi-Fi NVDS and must not overlap it.
Wi-Fi (wlan0), station and softAP:
- The MAC/PHY, RF and WPA supplicant are linked as prebuilt BSD-3
libraries. They are RTOS-agnostic, so the OS binding is a sys_* facade
on NuttX primitives (gdwifi/wrapper_nuttx.c). Critical sections mask by
ECLIC priority threshold, not by disabling every interrupt, or the MAC
misses its microsecond deadlines.
- The lwIP stack of the SDK is not used: the interface is a
netdev_lowerhalf driver driven by the standard tools (wapi, ifup, renew,
ping, dhcpd). EAPOL is handed to the supplicant instead of the IP
stack. The lowerhalf "priority" field is the work-queue id (HPWORK/
LPWORK), not a task priority -- a wrong value makes receive() never run
and every packet is dropped.
- The vendor gives the radio 32 KB of shared SRAM as an extra heap; this
needs CONFIG_MM_REGIONS >= 2 or the kernel silently drops the region.
- The DHCP client needs CONFIG_NETUTILS_DHCPC_BOOTP_FLAGS=0x8000 so the
server answers the OFFER by broadcast.
- softAP (wapi master mode -> wifi_management_ap_start): the single-VIF
firmware does station or AP at a time. Use WPA2, not WPA3: the SAE
handshake is deep on the stack and overflows the elliptic-curve crypto
with the default task stacks, so the Wi-Fi configs raise
CONFIG_INIT_STACKSIZE/DEFAULT_TASK_STACKSIZE.
Vendor SDK: cloned by the build at "context" time, pinned to a validated
commit and patched in place -- so CI can build with nothing preinstalled,
the same pattern as esp-hal-3rdparty. The prebuilt libraries are built
for the hard-float ilp32f ABI.
BLE 5.3, marked EXPERIMENTAL and off by default: the prebuilt libble is an
all-in-one controller plus RivieraWaves host (GAP/GATT/SMP inside the blob)
with no HCI transport, so the port drives the vendor host directly
(ble_adp_*, ble_adv_*, ble_gap_*) instead of registering a bt_driver_s.
The SDK's radio interrupt handlers must be attached to the NuttX IRQ table
(they are reached through the ECLIC hardware vector table in the vendor
build); attaching also keeps --gc-sections from dropping them. It ships
with no configuration; enabling it advertises as "NuttX", connectable.
Boards: gd32vw553k-start with nsh, wapi, sta_softap, periph and littlefs
configurations, and the board added to the CI build list.
Tested on hardware (GD32VW553K-START): NSH, the peripheral drivers
(TRNG entropy and the LEDs exercised), LittleFS (write, read, survives a
reboot), the full Wi-Fi station path (scan, WPA2, DHCP, ping to the
internet), the softAP (a client associates with WPA2, gets an address
from the board's DHCP server, and pings the board), and BLE (advertises as
"NuttX"; a central connects and enumerates the GATT database).
Assisted-by: Claude Opus 4.8
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
This commit introduces a rudimentary architecture and board port for the
MIPS Creator CI20, featuring the dual core Ingenic JZ4780 SoC (MIPS32).
Included in this initial implementation:
- Basic architectural initialization and startup code for the JZ4780 Core 0.
- Minimal configuration required to execute from RAM.
- Early UART/serial console support for basic debugging and NSH output.
- Minimal board-specific configuration for the CI20 target.
- Console output is routed via UART0 on the expansion header.
This establishes basic support for running NuttX on the MIPS CI20.
Further peripherals, optimization, and extended documentation are left for
future iterations or community contributions.
Build and Runtime Deployment Info:
----------------------------------
The baseline can be configured, compiled using the MIPS MTI toolchain,
and loaded via U-Boot using the following commands (replace
<tftp_dir> with your local TFTP root directory).
./tools/configure.sh -l ci20/nsh
make CROSSDEV=mips-mti-elf-
mkimage -A mips -O linux -T kernel -C none -a 0x80000180 -e 0x800004ac \
-n "nx" -d nuttx.bin <tftp_dir>/nuttx.umg
Note: U-Boot must be properly configured for networking (e.g., valid ipaddr,
serverip, and ethaddr environment variables) to fetch the image over TFTP.
Run this from U-Boot prompt:
tftp nuttx.umg && bootm $fileaddr
Signed-off-by: Lwazi Dube <lwazeh@gmail.com>
Wire the remaining STM32 families (L5, U5, WB, WL5, N6, H5) to the shared
boards/arm/common/stm32 board-common directory.
No functional change: these boards do not yet use any shared driver, but the
shared board-common features are now available to the families.
Signed-off-by: raiden00pl <raiden00@railab.me>
Wire the STM32H7 family to the shared boards/arm/common/stm32 board-common
directory.
Drop the local copies that are already provided by the shared directory:
- stm32_reset.c from nucleo-h723zg, nucleo-h743zi, nucleo-h743zi2,
nucleo-h753zi, stm32h745i-disco and stm32h750b-dk
- stm32_romfs_initialize.c and stm32_romfs.h from nucleo-h743zi (identical
to the shared versions)
Enable CONFIG_ARCH_BOARD_COMMON=y in the configs that use CONFIG_BOARDCTL_RESET
or CONFIG_STM32_ROMFS so board_reset()/romfs are pulled from the shared
directory.
Signed-off-by: raiden00pl <raiden00@railab.me>
Support NUTTX_ROMFS_PASSWD_PASSWORD via update_romfs_password.sh for
configs that enable ROMFS passwd without a defconfig password (sim/login
CI). Enable RANDOMIZE_KEYS in sim/login defconfig. Update mkpasswd.c
header, platform docs, and the mkpasswd_autogen guide.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
Remove implicit default credentials and add build-time validation.
Add check_passwd_keys.sh and gen_passwd_keys.sh; run key setup via
passwd_keys.mk before config.h is generated. Mirror the same logic in
cmake/nuttx_add_romfs.cmake for CMake builds.
BREAKING CHANGE: Builds with CONFIG_BOARD_ETC_ROMFS_PASSWD_ENABLE=y now
require an explicit admin password and non-default TEA keys. The
Kconfig default password "Administrator" and default TEA keys are no
longer accepted. Fix: run make menuconfig, set Admin password under
Board Selection -> Auto-generate /etc/passwd, enable random TEA keys or
set CONFIG_FSUTILS_PASSWD_KEY1..4 manually, and use NSH login with
Encrypted password file verification.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
switch stm32f7 board common to boards/arm/common/stm32.
Move the STM32F7-only board-common features into the shared directory
so they are available to every STM32 family:
- bmi270, cs4344, can_setup, cansock_setup, reset, romfs_initialize and
spitest
- the duplicate stm32_bh1750 is removed (already present in common).
Signed-off-by: raiden00pl <raiden00@railab.me>
This port adds support for the M5Stack Cardputer (M5Stamp S3 /
ESP32-S3FN8, dual Xtensa LX7 @ 240 MHz, 8 MB flash, no PSRAM).
It reuses the common ESP32-S3 board helpers and ships these
configurations:
- nsh: NuttShell over the USB-Serial-JTAG console
- sdcard: microSD card on SPI3 (FAT)
- fb: ST7789 240x135 display exposed as a framebuffer
- wifi: Wi-Fi station
- softap: Wi-Fi SoftAP with DHCP server
- lvgl: LVGL graphics on the ST7789 (lvgldemo)
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
Add board-level support for two Realtek Ameba WHC evaluation boards:
- pke8721daf (RTL8721Dx)
- rtl8720f_evb (RTL8720F)
Each board provides:
- defconfig for NSH with WiFi networking support
- CMakeLists.txt (make-only build helper that fails fast on cmake)
- Board-specific bring-up and initialization (leds, SDIO, flash)
- Scripts/Make.defs including the IC-level build fragment and the
make flash target (tools/ameba/Config.mk)
Signed-off-by: raul_chen <raul_chen@realsil.com.cn>
Move the stm32l1 sources, headers and boards into arch/arm/src/stm32l1,
arch/arm/include/stm32l1 and boards/arm/stm32l1, then finalize the split:
source each split family directly in arch/arm/Kconfig and boards/Kconfig and
remove the now-empty combined arch/arm/src/stm32 and boards/arm/stm32 trees.
BREAKING CHANGE: The legacy STM32 architecture and board paths were split into
stm32f1, stm32l1, stm32f2, stm32f3, stm32f4, and stm32g4 directories.
Out-of-tree boards must move from stm32 to the matching split family.
Signed-off-by: raiden00pl <raiden00@railab.me>
Move the stm32c0 sources, headers and boards into arch/arm/src/stm32c0,
arch/arm/include/stm32c0 and boards/arm/stm32c0, then finalize the split:
source each split family directly in arch/arm/Kconfig and boards/Kconfig and
remove the now-empty combined arch/arm/src/stm32f0l0g0 and
boards/arm/stm32f0l0g0 trees.
BREAKING CHANGE: The combined STM32F0/L0/G0/C0 architecture and board
paths were split into stm32f0, stm32l0, stm32g0, and stm32c0 directories.
Out-of-tree boards, include paths, source paths, and defconfigs must move
from stm32f0l0g0 to the matching split family.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: Move the existing STM32 board common sources to
boards/arm/common/stm32 and fold in the common STM32F0/L0/G0/C0
board helpers so split STM32 board families can share one source
tree.
Signed-off-by: raiden00pl <raiden00@railab.me>
Add initial board support for BeaglePlay and PocketBeagle2, including
defconfigs, linker scripts, board initialization, procfs bring-up, and
LED stubs. BeaglePlay provides the validated runtime target for this
bring-up series.
Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
This commit introduces basic support for the T3 Gemstone O1 (t3-gem-o1)
development board, including board configuration, linker scripts, and
drivers for NSH. Currently only UART console is supported.
All necessary files and configurations are added to enable building and
running NuttX on this TI AM67-based board.
Co-authored-by: Emre Cecanpunar <emreleno@gmail.com>
Co-authored-by: Abdullah Türkmen <abdullahturkmen@protonmail.com>
Co-authored-by: Muhammet Onur Bayraktar <mobayraktar@t3gemstone.org>
Co-authored-by: Bayram Akay <bakay@t3gemstone.org>
Co-authored-by: Nazmi Aras <nazmi.aras@t3gemstone.org>
Signed-off-by: Erkan Vatan <evatan@t3gemstone.org>
Add the autoleds driver for the three on-board user LEDs (LD5 red
PG10, LD6 green PG0, LD7 blue PG8; all active-low). Structure
mirrors boards/arm/stm32h5/nucleo-h563zi with the polarity and
initial-OFF state corrected for the active-low wiring.
* boards/Kconfig: ARCH_BOARD_NUCLEO_N657X0_Q selects ARCH_HAVE_LEDS
so the ARCH_LEDS prompt becomes available.
* arch/arm/src/stm32n6/stm32_idle.c: include <arch/board/board.h>
so LED_IDLE is defined and up_idle() actually calls into the
autoleds driver around WFI.
The existing nsh and ostest defconfigs do not pin CONFIG_ARCH_LEDS
and therefore inherit its Kconfig default (y when ARCH_HAVE_LEDS is
selected), so after this patch they include the autoleds driver by
default. This matches the convention on the comparable H5 and H7
Nucleo defconfigs, which also leave ARCH_LEDS at its default.
Tested on Nucleo-N657X0-Q: nsh and ostest still build, flash and
run. With CONFIG_ARCH_LEDS=y, green is steady at the NSH idle
prompt; red pulses on each IRQ but the on-time is too brief to be
clearly visible to the eye.
Signed-off-by: ImBonkers <samuelnlinden@pm.me>
Add board support for the STMicro Nucleo-N657X0-Q, sufficient to boot
NSH over the on-board ST-LINK virtual COM port (USART1, 115200 8N1)
in DEV (serial) boot mode.
Two defconfigs are shipped:
- nsh: minimal NuttShell prompt.
- ostest: nsh + apps/testing/ostest for RTOS smoke testing.
Production signed XSPI flash boot is deferred to a follow-up; in DEV
mode the image is loaded directly into AXISRAM at 0x34000400 by the
host (e.g. STM32CubeProgrammer over ST-LINK), keeping the linker
script trivial — .text/.rodata/.data/.bss/.heap all in AXISRAM.
Signed-off-by: ImBonkers <samuelnlinden@pm.me>
BREAKING: In an effort to simplify NuttX initialization, NSH_ARCHINIT is
removed. board_app_initialize is also removed. BOARD_LATE_INITIALIZE now
performs all board initialization logic, and is by default enabled. All
references to these symbols are removed. BOARDIOC_INIT remains, but will
result in -ENOTTY when called. It is to be removed in a later commit.
Quick fix: Boards relying on NSH_ARCHINIT should now enable
CONFIG_BOARD_LATE_INITIALIZE instead. If the application needs
fine-grained control over board initialization from userspace, the logic
performed by BOARDIOC_INIT may be copied to the board_finalinitialize
function and used instead via BOARDIOC_FINALINIT. All
board_app_initialize logic provided by NuttX is now moved to
board_late_initialize, and the same should be done for out-of-tree
boards.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
* Initial experimental / work in progress implementation.
* New board name is esp32s3-ws-lcd128.
* Supports Kconfig delectable w/wo touch variants (lcd gpios difference).
* IMU QMI8658 bringups is put into esp32s3/common/src to share with other
boards. Pin defines are located at <board>include/board.h and referenced
with `#include <arch/board/board.h>`.
* Supported configurations: nsh, ostest, coremark, touch-lvgl, notouch-lvgl,
imu-qmi8658, watchdog.
* Does not have touch panel driver yet.
* Created board documentation. Added sphinx inline cross-references.
* TODO: Fix SPI GC9A01A LCD pixel format colors.
* TODO: Create I2C CST816S touch panel driver.
Signed-off-by: Tomasz 'CeDeROM' CEDRO <tomek@cedro.info>
Introduce mkpasswd, a pure-C host tool for generating encrypted password
files at build time using TEA encryption. This enables secure,
credential-free firmware images while allowing build-time password
configuration.
Changes:
* Add mkpasswd.c host tool for TEA-based password hashing and encryption
* Integrate mkpasswd into Make build system (tools/Makefile.host)
* Add CMake support for mkpasswd compilation and ROMFS passwd generation
* Add CONFIG_BOARD_ETC_ROMFS_PASSWD_* configuration options to Kconfig
* Implement credential exclusion from defconfig to prevent password leaking
* Update savedefconfig.cmake to strip sensitive credentials
* Fix mkdir() portability for Windows Native builds (CONFIG_WINDOWS_NATIVE)
* Change default username from "admin" to "root" (POSIX convention)
* Improve build-failure error message with full menuconfig navigation path
BREAKING CHANGE: Boards enabling CONFIG_BOARD_ETC_ROMFS_PASSWD_ENABLE
must set CONFIG_BOARD_ETC_ROMFS_PASSWD_PASSWORD to a non-empty string
of at least 8 characters. The build now fails with an explicit error if
this config is left empty. To fix: run 'make menuconfig' and navigate to:
Board Selection --->
Auto-generate /etc/passwd at build time --->
Admin password
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
Add the ESK32 board with nsh configuration, linker script,
board bring-up, flashing helper, and user LED support.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
This commit updates the common-source integration for Xtensa-based
Espressif devices (ESP32, ESP32-S2, and ESP32-S3). This is part of a larger
common-source update split by architecture for better maintainability.
Major components updated:
- IRQ allocator refactoring with intr_alloc integration
- Common-source drivers (GPIO, RMT, I2C, SPI, UART, etc.)
- Espressif components upgrade to release/master.b-test
- Peripheral drivers (ADC, PWM, LEDC, MCPWM, PCNT, Temperature Sensor, etc.)
- Wireless adapters (Wi-Fi and BLE)
- esp_timer migration to the common-source path for Xtensa devices
- Common-source power management implementation (auto-sleep and wakeup paths)
- Board defconfigs for all Xtensa Espressif boards
- SMP support improvements for ESP32-S3
- Critical section handling improvements
Key architectural changes:
- IRQ Allocator: The new interrupt allocator enables multiple mapping
options from interrupt sources to CPU interrupts, providing flexibility
required by modern peripherals. Although this introduces breaking changes
to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE
Kconfig option is explicitly checked during startup to ensure proper
configuration. This validation prevents runtime issues from configuration
mismatches.
- Xtensa-specific interrupt handling via esp_xtensa_intr.c providing
NuttX-native implementations of xt_ints_on/off and interrupt handlers,
avoiding conflicts with NuttX's core Xtensa macros.
- Timer/RTC unification: ESP32/ESP32-S2/ESP32-S3 move from chip-specific
RTC/RT-timer code to common-source Espressif integration, including
esp_timer_adapter/esp_rtc paths and the required bringup/defconfig updates.
- Power management consolidation: Xtensa PM follows the common-source
implementation, including common-source auto-sleep behavior, UART/Wi-Fi
wakeup coordination, and tickless-safe sleep flow compatibility.
Note: This is a large commit to maintain bisectability. Breaking the
changes into smaller commits would result in non-building intermediate
states across the common-source infrastructure update.
Tested configurations:
- All defconfigs were tested, including `ostest`.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Remove the CONFIG_K210_WITH_QEMU option and associated conditional
code paths. The reasons for removal are:
* Simplifies code path for real hardware by removing QEMU workarounds
* The current QEMU target uses sifive_u machine, which is not designed
for K210 emulation
* For RISC-V QEMU simulation, the qemu-rv (rv-virt) target is a better
choice
* Renode can be used as an alternative for K210 simulation if needed
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit adds support for the Espressif's RISC-V-based ESP32-P4
chip along with its ESP32-P4-Function-EV-Board board.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
A previous commit (d2c85a9fa0)
introduced an incomplete change to upstream regarding GPIO IRQ
selection on ESP32, ESP32-S2 and ESP32-S3. NuttX's upstream CI did
not get the error because of the rules that trigger specific
pipelines based on the modified files. In this case, the xtensa
jobs did not run to properly evaluate this issue.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit updates the common-source integration for RISC-V-based
Espressif devices (ESP32-C3, ESP32-C6, and ESP32-H2). This is part of a
larger common-source update split by architecture for better maintainability
of the already-supported devices and upcoming devices.
Major components updated:
- IRQ allocator refactoring with intr_alloc integration
- Common-source drivers (GPIO, RMT, I2C, SPI, UART, etc.)
- Espressif components upgrade to release/master.b
- Peripheral drivers (ADC, PWM, LEDC, MCPWM, PCNT, Temperature Sensor, etc.)
- Wireless adapters (Wi-Fi and BLE)
- Board defconfigs for all RISC-V Espressif boards
- Critical section handling improvements
Key architectural changes:
- IRQ Allocator: The new interrupt allocator enables multiple mapping
options from interrupt sources to CPU interrupts, providing flexibility
required by modern peripherals. Although this introduces breaking changes
to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE
Kconfig option is explicitly checked during startup to ensure proper
configuration. This validation prevents runtime issues from configuration
mismatches.
Note: This is a large commit to maintain bisectability. Breaking the
changes into smaller commits would result in non-building intermediate
states across the common-source infrastructure update.
Tested configurations:
- All defconfigs were built and tested, inclusing `ostest`.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
To be merged with RISC-V implementation
Add board support for the NXP i.MX93 QSB targeting the Cortex-M33
core. Three configurations are provided:
- nsh: run from ITCM (128 kB), LPUART2 console
- nsh-ddr: run from DDR, LPUART2 console
- rpmsg: run from ITCM, RPMsg/OpenAMP transport, NSH on
/dev/tty-nsh via RPMSG_UART_RAW
Linker scripts:
- itcm.ld: vectors + text in ITCM, data in DTCM
- ddr.ld: vectors + text + data in DDR (0x89000000, 16 MB)
Tool to enable local debug interface through USB.
Signed-off-by: Maarten Zanders <maarten@zanders.be>
