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arch/risc-v/espressif/esp32p4: Support ESP32-P4 on NuttX

Browse source 
This commit adds support for the Espressif's RISC-V-based ESP32-P4
chip along with its ESP32-P4-Function-EV-Board board.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit is contained in:
Tiago Medicci Serrano 2025-06-10 15:49:12 -03:00 • committed by CeDeROM
parent 43f65ce751
commit cda4af9f00
98 changed files with 9668 additions and 46 deletions
Download patch file Download diff file Expand all files Collapse all files

39
arch/risc-v/Kconfig
View file

@ -124,7 +124,6 @@ config ARCH_CHIP_ESP32C3
select LIBC_ARCH_STRLEN
select LIBC_ARCH_STRNLEN
select ESPRESSIF_SOC_RTC_MEM_SUPPORTED
select ARCH_CHIP_ESPRESSIF
select ARCH_HAVE_DEBUG
select ARCH_HAVE_RAMFUNCS
select ONESHOT_COUNT if ONESHOT
@ -159,7 +158,6 @@ config ARCH_CHIP_ESP32C6
select LIBC_ARCH_STRLEN
select LIBC_ARCH_STRNLEN
select ESPRESSIF_SOC_RTC_MEM_SUPPORTED
select ARCH_CHIP_ESPRESSIF
select ARCH_HAVE_RAMFUNCS
select ONESHOT_COUNT if ONESHOT
select ONESHOT_FAST_DIVISION if ONESHOT
@ -192,7 +190,6 @@ config ARCH_CHIP_ESP32H2
select LIBC_ARCH_STRLEN
select LIBC_ARCH_STRNLEN
select ESPRESSIF_SOC_RTC_MEM_SUPPORTED
select ARCH_CHIP_ESPRESSIF
select ARCH_HAVE_RAMFUNCS
select ONESHOT_COUNT if ONESHOT
select ONESHOT_FAST_DIVISION if ONESHOT
@ -200,6 +197,38 @@ config ARCH_CHIP_ESP32H2
---help---
Espressif ESP32-H2 (RV32IMC).
config ARCH_CHIP_ESP32P4
bool "ESP32-P4"
select ARCH_RV32
select ARCH_RV_ISA_M
select ARCH_RV_ISA_A
select ARCH_RV_ISA_C
select ARCH_VECNOTIRQ
select ARCH_HAVE_BOOTLOADER if !ESPRESSIF_SIMPLE_BOOT
select ARCH_HAVE_I2CRESET
select ARCH_HAVE_MPU
select ARCH_HAVE_RESET
select ARCH_HAVE_RNG
select ARCH_HAVE_TICKLESS
select ARCH_HAVE_MULTICPU
select LIBC_ARCH_MEMCPY
select LIBC_ARCH_MEMCHR
select LIBC_ARCH_MEMCMP
select LIBC_ARCH_MEMMOVE
select LIBC_ARCH_MEMSET
select LIBC_ARCH_STRCHR
select LIBC_ARCH_STRCMP
select LIBC_ARCH_STRCPY
select LIBC_ARCH_STRLCPY
select LIBC_ARCH_STRNCPY
select LIBC_ARCH_STRLEN
select LIBC_ARCH_STRNLEN
select ARCH_HAVE_RAMFUNCS
select ONESHOT_COUNT if ONESHOT
select ARCH_MINIMAL_VECTORTABLE
---help---
Espressif ESP32-P4 (RV32IMC).
config ARCH_CHIP_C906
bool "THEAD C906"
select ARCH_RV64
@ -606,6 +635,7 @@ config ARCH_CHIP
default "esp32c3" if ARCH_CHIP_ESP32C3
default "esp32c6" if ARCH_CHIP_ESP32C6
default "esp32h2" if ARCH_CHIP_ESP32H2
default "esp32p4" if ARCH_CHIP_ESP32P4
default "c906" if ARCH_CHIP_C906
default "mpfs" if ARCH_CHIP_MPFS
default "rv32m1" if ARCH_CHIP_RV32M1
@ -846,6 +876,9 @@ endif
if ARCH_CHIP_ESP32H2
source "arch/risc-v/src/esp32h2/Kconfig"
endif
if ARCH_CHIP_ESP32P4
source "arch/risc-v/src/esp32p4/Kconfig"
endif
if ARCH_CHIP_C906
source "arch/risc-v/src/c906/Kconfig"
endif

2
arch/risc-v/include/esp32p4/.gitignore vendored Normal file
View file

@ -0,0 +1,2 @@
/gpio_sig_map.h
/irq.h

34
arch/risc-v/include/esp32p4/chip.h Normal file
View file

@ -0,0 +1,34 @@
/****************************************************************************
* arch/risc-v/include/esp32p4/chip.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_INCLUDE_ESP32P4_CHIP_H
#define __ARCH_RISCV_INCLUDE_ESP32P4_CHIP_H
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#endif /* __ARCH_RISCV_INCLUDE_ESP32P4_CHIP_H */

314
arch/risc-v/src/common/espressif/Kconfig
View file

@ -3,18 +3,19 @@
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_CHIP_ESPRESSIF || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2
if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
config ESPRESSIF_CHIP_SERIES
string
default "esp32c3" if ARCH_CHIP_ESP32C3
default "esp32c6" if ARCH_CHIP_ESP32C6
default "esp32h2" if ARCH_CHIP_ESP32H2
default "esp32p4" if ARCH_CHIP_ESP32P4
default "unknown"
choice ESPRESSIF_FLASH
prompt "Flash Size"
default ESPRESSIF_FLASH_4M if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2
default ESPRESSIF_FLASH_4M if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
config ESPRESSIF_FLASH_2M
bool "2 MB"
@ -30,6 +31,16 @@ config ESPRESSIF_FLASH_16M
endchoice # ESPRESSIF_FLASH
config ESPRESSIF_IDF_ENV_FPGA
bool "IDF FPGA Environment"
default n
---help---
- This option is for internal use only.
- Enabling this option will help enable all FPGA support so as to
run NuttX on an FPGA. This can help reproduce some issues that
only happens on FPGA condition, or when you have to burn some
efuses multiple times.
config ESPRESSIF_FLASH_DETECT
bool "Auto-detect FLASH size"
default n
@ -39,17 +50,21 @@ config ESPRESSIF_FLASH_DETECT
config ESPRESSIF_NUM_CPUS
int
default 1 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2
default 2 if ARCH_CHIP_ESP32P4
choice ESPRESSIF_CPU_FREQ
prompt "CPU frequency"
default ESPRESSIF_CPU_FREQ_40 if ARCH_CHIP_ESP32P4 && ESPRESSIF_IDF_ENV_FPGA
default ESPRESSIF_CPU_FREQ_96 if ARCH_CHIP_ESP32H2
default ESPRESSIF_CPU_FREQ_160 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6
default ESPRESSIF_CPU_FREQ_360 if ARCH_CHIP_ESP32P4 && ESP32P4_SELECTS_REV_LESS_V3
default ESPRESSIF_CPU_FREQ_400 if ARCH_CHIP_ESP32P4 && !ESP32P4_SELECTS_REV_LESS_V3
---help---
CPU frequency to be set on application startup.
config ESPRESSIF_CPU_FREQ_40
bool "40 MHz"
depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6
depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4
---help---
Set the CPU frequency to 40 MHz.
@ -83,6 +98,18 @@ config ESPRESSIF_CPU_FREQ_160
---help---
Set the CPU frequency to 160 MHz.
config ESPRESSIF_CPU_FREQ_360
bool "360 MHz"
depends on ARCH_CHIP_ESP32P4 && ESP32P4_SELECTS_REV_LESS_V3
---help---
Set the CPU frequency to 360 MHz.
config ESPRESSIF_CPU_FREQ_400
bool "400 MHz"
depends on ARCH_CHIP_ESP32P4 && !ESP32P4_SELECTS_REV_LESS_V3
---help---
Set the CPU frequency to 400 MHz.
endchoice # ESPRESSIF_CPU_FREQ
config ESPRESSIF_CPU_FREQ_MHZ
@ -93,6 +120,8 @@ config ESPRESSIF_CPU_FREQ_MHZ
default 80 if ESPRESSIF_CPU_FREQ_80
default 96 if ESPRESSIF_CPU_FREQ_96
default 160 if ESPRESSIF_CPU_FREQ_160
default 360 if ESPRESSIF_CPU_FREQ_360
default 400 if ESPRESSIF_CPU_FREQ_400
config ESPRESSIF_REGION_PROTECTION
bool "Enable region protection"
@ -947,7 +976,7 @@ config ESPRESSIF_TWAI0
config ESPRESSIF_TWAI1
bool "TWAI1 (CAN)"
default n
depends on ARCH_CHIP_ESP32C6
depends on ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4
select ESPRESSIF_TWAI
select ARCH_HAVE_CAN_ERRORS
select CAN
@ -1008,6 +1037,11 @@ config ESPRESSIF_ADC_1
default y
bool "Enable SAR ADC 1"
config ESPRESSIF_ADC_2
default n
depends on ARCH_CHIP_ESP32P4
bool "Enable SAR ADC 2"
endif # ESPRESSIF_ADC
config ESPRESSIF_I2S
@ -1050,14 +1084,14 @@ config ESPRESSIF_I2C0
config ESPRESSIF_I2C1
bool "I2C 1"
default n
depends on ARCH_CHIP_ESP32H2
depends on (ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4)
select ESPRESSIF_I2C
select I2C
config ESPRESSIF_LP_I2C0
bool "LP I2C 0"
default n
depends on ARCH_CHIP_ESP32C6
depends on ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4
select ESPRESSIF_I2C
select ESPRESSIF_LPI2C
select ESPRESSIF_I2C_PERIPH_MASTER_MODE
@ -1234,6 +1268,7 @@ config ESPRESSIF_XTWDT_BACKUP_CLK_ENABLE
config ESPRESSIF_BROWNOUT_DET
bool "Brownout Detector"
depends on !ESPRESSIF_IDF_ENV_FPGA
default y
---help---
A built-in brownout detector which can detect if the voltage is lower
@ -1310,7 +1345,7 @@ menuconfig ESPRESSIF_WIFI_BT_COEXIST
config ESP_MCPWM
bool "Motor Control PWM (MCPWM)"
default n
depends on ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2
depends on ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
---help---
Enable support for timer capture and motor control using
the Motor Control PWM peripheral.
@ -1319,7 +1354,7 @@ config ESP_PCNT
bool "Pulse Counter (PCNT / QE) Module"
default n
select CAPTURE
depends on ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32C6
depends on ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4
menu "Pulse Counter (PCNT) Configuration"
depends on ESP_PCNT
@ -1637,18 +1672,121 @@ config ESPRESSIF_ADC_1_CH4
config ESPRESSIF_ADC_1_CH5
bool "Channel 5"
depends on ARCH_CHIP_ESP32C6
depends on ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4
default n
config ESPRESSIF_ADC_1_CH6
bool "Channel 6"
depends on ARCH_CHIP_ESP32C6
depends on ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4
default n
config ESPRESSIF_ADC_1_CH7
bool "Channel 6"
depends on ARCH_CHIP_ESP32P4
default n
endmenu # ADC 1 Channel Selection
endif # ESPRESSIF_ADC_1
if ESPRESSIF_ADC_2
config ESPRESSIF_ADC_2_DEVNAME
string "ADC 2 Device Name"
default "/dev/adc1"
choice ESPRESSIF_ADC_2_ATTENUATION
prompt "ADC 2 Input Attenuation"
default ESPRESSIF_ADC_2_ATTEN_12
---help---
Select input attenuation for the ADC unit.
Relates to maximum measurable input voltage (Vmax) and the internal ADC reference voltage (approx. 1100 mV).
See ESP32 Technical Reference Manual for details.
config ESPRESSIF_ADC_2_ATTEN_0
bool "0 dB (1.1 V)"
config ESPRESSIF_ADC_2_ATTEN_2_5
bool "2.5 dB (1.47 V)"
config ESPRESSIF_ADC_2_ATTEN_6
bool "6 dB (2.2 V)"
config ESPRESSIF_ADC_2_ATTEN_12
bool "12 dB (4.4 V)"
endchoice # ESPRESSIF_ADC_2_ATTENUATION
config ESPRESSIF_ADC_2_ATTENUATION
int
default 0 if ESPRESSIF_ADC_2_ATTEN_0
default 1 if ESPRESSIF_ADC_2_ATTEN_2_5
default 2 if ESPRESSIF_ADC_2_ATTEN_6
default 3 if ESPRESSIF_ADC_2_ATTEN_12
choice ESPRESSIF_ADC_2_MODE
prompt "ADC 2 Mode"
default ESPRESSIF_ADC_2_MODE_ONE_SHOT
---help---
Select operating mode for ADC 2.
config ESPRESSIF_ADC_2_MODE_ONE_SHOT
bool "One-Shot Mode"
config ESPRESSIF_ADC_2_MODE_CONTINUOUS
bool "Continuous Mode"
endchoice # ESPRESSIF_ADC_2_MODE
menu "ADC 2 Channel Selection"
config ESPRESSIF_ADC_2_CH0
bool "Channel 0"
default y
config ESPRESSIF_ADC_2_CH1
bool "Channel 1"
default y
config ESPRESSIF_ADC_2_CH2
bool "Channel 2"
default y
config ESPRESSIF_ADC_2_CH3
bool "Channel 3"
default y
config ESPRESSIF_ADC_2_CH4
bool "Channel 4"
default n
config ESPRESSIF_ADC_2_CH5
bool "Channel 5"
default n
config ESPRESSIF_ADC_2_CH6
bool "Channel 6"
default n
config ESPRESSIF_ADC_2_CH7
bool "Channel 7"
depends on !ARCH_CHIP_ESP32P4
default n
config ESPRESSIF_ADC_2_CH8
bool "Channel 8"
depends on !ARCH_CHIP_ESP32P4
default n
config ESPRESSIF_ADC_2_CH9
bool "Channel 9"
depends on !ARCH_CHIP_ESP32P4
default n
endmenu # ADC 2 Channel Selection
endif # ESPRESSIF_ADC_2
endmenu # ADC Configuration
menu "Wi-Fi Configuration"
@ -2055,18 +2193,22 @@ config ESPRESSIF_UART0_TXPIN
default 21 if ARCH_CHIP_ESP32C3
default 16 if ARCH_CHIP_ESP32C6
default 24 if ARCH_CHIP_ESP32H2
default 37 if ARCH_CHIP_ESP32P4
range 0 21 if ARCH_CHIP_ESP32C3
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_UART0_RXPIN
int "UART0 RX Pin"
default 20 if ARCH_CHIP_ESP32C3
default 17 if ARCH_CHIP_ESP32C6
default 23 if ARCH_CHIP_ESP32H2
default 38 if ARCH_CHIP_ESP32P4
range 0 21 if ARCH_CHIP_ESP32C3
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_UART0_RTSPIN
int "UART0 RTS Pin"
@ -2074,9 +2216,11 @@ config ESPRESSIF_UART0_RTSPIN
default 16 if ARCH_CHIP_ESP32C3
default 15 if ARCH_CHIP_ESP32C6
default 22 if ARCH_CHIP_ESP32H2
default 35 if ARCH_CHIP_ESP32P4
range 0 21 if ARCH_CHIP_ESP32C3
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_UART0_CTSPIN
int "UART0 CTS Pin"
@ -2084,9 +2228,11 @@ config ESPRESSIF_UART0_CTSPIN
default 15 if ARCH_CHIP_ESP32C3
default 14 if ARCH_CHIP_ESP32C6
default 21 if ARCH_CHIP_ESP32H2
default 36 if ARCH_CHIP_ESP32P4
range 0 21 if ARCH_CHIP_ESP32C3
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
endif # ESPRESSIF_UART0
@ -2102,7 +2248,10 @@ config ESPRESSIF_UART1_RS485
config ESPRESSIF_UART1_RS485_DIR_PIN
int "UART1 RS-485 DIR pin"
default 4
range 0 46
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
depends on ESPRESSIF_UART1_RS485
---help---
DIR pin for RS-485 on UART1. This pin will control the RS485 enable
@ -2119,19 +2268,20 @@ config ESPRESSIF_UART1_RS485_DIR_POLARITY
config ESPRESSIF_UART1_TXPIN
int "UART1 TX Pin"
default 8 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2
default 8 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
config ESPRESSIF_UART1_RXPIN
int "UART1 RX Pin"
default 9 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2
default 9 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
config ESPRESSIF_UART1_RTSPIN
int "UART1 RTS Pin"
depends on SERIAL_IFLOWCONTROL
default 1 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2
default 1 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
range 0 21 if ARCH_CHIP_ESP32C3
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_UART1_CTSPIN
int "UART1 CTS Pin"
@ -2140,6 +2290,7 @@ config ESPRESSIF_UART1_CTSPIN
range 0 21 if ARCH_CHIP_ESP32C3
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
endif # ESPRESSIF_UART1
@ -2318,36 +2469,44 @@ config ESPRESSIF_SPI2_CSPIN
default 10 if ARCH_CHIP_ESP32C3
default 16 if ARCH_CHIP_ESP32C6
default 1 if ARCH_CHIP_ESP32H2
default 28 if ARCH_CHIP_ESP32P4
range 0 21 if ARCH_CHIP_ESP32C3
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_SPI2_CLKPIN
int "SPI2 CLK Pin"
default 6 if ARCH_CHIP_ESP32C3
default 6 if ARCH_CHIP_ESP32C6
default 4 if ARCH_CHIP_ESP32H2
default 30 if ARCH_CHIP_ESP32P4
range 0 21 if ARCH_CHIP_ESP32C3
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_SPI2_MOSIPIN
int "SPI2 MOSI Pin"
default 7 if ARCH_CHIP_ESP32C3
default 7 if ARCH_CHIP_ESP32C6
default 5 if ARCH_CHIP_ESP32H2
default 29 if ARCH_CHIP_ESP32P4
range 0 21 if ARCH_CHIP_ESP32C3
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_SPI2_MISOPIN
int "SPI2 MISO Pin"
default 2 if ARCH_CHIP_ESP32C3
default 2 if ARCH_CHIP_ESP32C6
default 0 if ARCH_CHIP_ESP32H2
default 31 if ARCH_CHIP_ESP32P4
range 0 21 if ARCH_CHIP_ESP32C3
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
endif # ESPRESSIF_SPI2
@ -2371,6 +2530,7 @@ config ESPRESSIF_SPI_BITBANG_CSPIN
range 0 21 if ARCH_CHIP_ESP32C3
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_SPI_BITBANG_CLKPIN
int "SPI Bitbang CLK Pin"
@ -2378,6 +2538,7 @@ config ESPRESSIF_SPI_BITBANG_CLKPIN
range 0 21 if ARCH_CHIP_ESP32C3
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_SPI_BITBANG_MOSIPIN
int "SPI Bitbang MOSI Pin"
@ -2385,6 +2546,7 @@ config ESPRESSIF_SPI_BITBANG_MOSIPIN
range 0 21 if ARCH_CHIP_ESP32C3
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_SPI_BITBANG_MISOPIN
int "SPI Bitbang MISO Pin"
@ -2392,6 +2554,7 @@ config ESPRESSIF_SPI_BITBANG_MISOPIN
range 0 21 if ARCH_CHIP_ESP32C3
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
choice ESPRESSIF_SPI_BITBANG_MODE
prompt "SPI Bitbang mode"
@ -2463,14 +2626,17 @@ endchoice # ESPRESSIF_FLASH_MODE
choice ESPRESSIF_FLASH_FREQ
prompt "SPI Flash frequency"
default ESPRESSIF_FLASH_FREQ_80M if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6
default ESPRESSIF_FLASH_FREQ_40M if ESP32P4_REV_MIN_0
default ESPRESSIF_FLASH_FREQ_40M if ARCH_CHIP_ESP32P4 && ESPRESSIF_IDF_ENV_FPGA
default ESPRESSIF_FLASH_FREQ_80M if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4
default ESPRESSIF_FLASH_FREQ_64M if ARCH_CHIP_ESP32H2
---help---
SPI Flash frequency.
config ESPRESSIF_FLASH_FREQ_80M
bool "80 MHz"
depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6
depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4
depends on !ESP32P4_REV_MIN_0
config ESPRESSIF_FLASH_FREQ_64M
bool "64 MHz"
@ -2478,7 +2644,7 @@ config ESPRESSIF_FLASH_FREQ_64M
config ESPRESSIF_FLASH_FREQ_40M
bool "40 MHz"
depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6
depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4
config ESPRESSIF_FLASH_FREQ_26M
bool "26 MHz"
@ -2486,7 +2652,7 @@ config ESPRESSIF_FLASH_FREQ_26M
config ESPRESSIF_FLASH_FREQ_20M
bool "20 MHz"
depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6
depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4
endchoice # ESPRESSIF_FLASH_FREQ
@ -2824,26 +2990,38 @@ config ESPRESSIF_I2S0_SAMPLE_RATE
config ESPRESSIF_I2S0_BCLKPIN
int "I2S0 BCLK pin"
default 4
range 0 48
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_I2S0_WSPIN
int "I2S0 WS pin"
default 5
range 0 48
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_I2S0_DINPIN
int "I2S0 DIN pin"
depends on ESPRESSIF_I2S0_RX
default 19 if !ARCH_CHIP_ESP32H2
default 11 if ARCH_CHIP_ESP32H2
range 0 48
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_I2S0_DOUTPIN
int "I2S0 DOUT pin"
depends on ESPRESSIF_I2S0_TX
default 18 if !ARCH_CHIP_ESP32H2
default 10 if ARCH_CHIP_ESP32H2
range 0 48
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_I2S0_MCLK
bool "Enable I2S Master Clock"
@ -2856,7 +3034,10 @@ config ESPRESSIF_I2S0_MCLKPIN
int "I2S MCLK pin"
depends on ESPRESSIF_I2S0_MCLK
default 0
range 0 48
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
endif # ESPRESSIF_I2S0
@ -2895,12 +3076,18 @@ config ESPRESSIF_I2C0_SCLPIN
int "I2C0 SCL Pin"
default 6 if !ESPRESSIF_LPI2C
default 23 if ESPRESSIF_LPI2C
range 0 21
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_I2C0_SDAPIN
int "I2C0 SDA Pin"
default 5
range 0 21
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
endif # ESPRESSIF_I2C0
@ -2926,12 +3113,18 @@ endchoice # ESPRESSIF_I2C1_MODE
config ESPRESSIF_I2C1_SCLPIN
int "I2C1 SCL Pin"
default 2
range 0 21
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_I2C1_SDAPIN
int "I2C1 SDA Pin"
default 1
range 0 21
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
endif # ESPRESSIF_I2C1
@ -2950,12 +3143,12 @@ endchoice # ESPRESSIF_LPI2C_MODE
config ESPRESSIF_LPI2C_SCLPIN
int "LPI2C SCL Pin"
default 7
range 7 7
range 7 7 if ARCH_CHIP_ESP32C6
config ESPRESSIF_LPI2C_SDAPIN
int "LPI2C SDA Pin"
default 6
range 6 6
range 6 6 if ARCH_CHIP_ESP32C6
endif # ESPRESSIF_LPI2C
@ -2973,12 +3166,18 @@ endchoice # ESPRESSIF_I2C_BITBANG_MODE
config ESPRESSIF_I2C_BITBANG_SCLPIN
int "I2C Bitbang SCL Pin"
default 0
range 0 21
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
config ESPRESSIF_I2C_BITBANG_SDAPIN
int "I2C Bitbang SDA Pin"
default 1
range 0 21
range 0 21 if ARCH_CHIP_ESP32C3_GENERIC
range 0 30 if ARCH_CHIP_ESP32C6
range 0 27 if ARCH_CHIP_ESP32H2
range 0 54 if ARCH_CHIP_ESP32P4
endif # ESPRESSIF_I2C_BITBANG
@ -2992,6 +3191,55 @@ config ESPRESSIF_I2CTIMEOMS
depends on ESPRESSIF_I2C_PERIPH_MASTER_MODE
default 500
config ESPRESSIF_I2C_TEST_MODE
bool "I2C driver loopback test mode (for testing only)"
default n
depends on !ARCH_CHIP_ESP32C3_GENERIC
depends on (ESPRESSIF_I2C_PERIPH_MASTER_MODE && ESPRESSIF_I2C_PERIPH_SLAVE_MODE)
---help---
This enables a loopback test mode that attaches the master I2C peripheral
to the slave device internally, being able to test the I2C peripheral
without any external connection.
if ESPRESSIF_I2C_TEST_MODE
choice ESPRESSIF_I2C_TEST_MODE_MASTER_PERIPH
prompt "I2C Test Master Device"
depends on ESPRESSIF_I2C_PERIPH_MASTER_MODE
default ESPRESSIF_I2C_TEST_MODE_MASTER_I2C1
config ESPRESSIF_I2C_TEST_MODE_MASTER_I2C0
bool "I2C0 Master Mode"
depends on ESPRESSIF_I2C0_MASTER_MODE
depends on (!ESPRESSIF_LP_I2C0 && ESPRESSIF_I2C1)
config ESPRESSIF_I2C_TEST_MODE_MASTER_I2C1
bool "I2C1 Master Mode"
depends on ESPRESSIF_I2C1_MASTER_MODE
config ESPRESSIF_I2C_TEST_MODE_MASTER_LP_I2C0
bool "LP I2C0 Master Mode"
depends on ESPRESSIF_LP_I2C0
endchoice #ESPRESSIF_I2C_TEST_MODE_MASTER_PERIPH
choice ESPRESSIF_I2C_TEST_MODE_SLAVE_PERIPH
prompt "I2C Test Slave Device"
depends on ESPRESSIF_I2C_PERIPH_SLAVE_MODE
default ESPRESSIF_I2C_TEST_MODE_SLAVE_I2C0
config ESPRESSIF_I2C_TEST_MODE_SLAVE_I2C0
bool "I2C0 Slave Mode"
depends on ESPRESSIF_I2C0_SLAVE_MODE
config ESPRESSIF_I2C_TEST_MODE_SLAVE_I2C1
bool "I2C1 Slave Mode"
depends on ESPRESSIF_I2C1_SLAVE_MODE
endchoice #ESPRESSIF_I2C_TEST_MODE_SLAVE_PERIPH
endif # ESPRESSIF_I2C_TEST_MODE
endmenu # I2C configuration
menu "MCPWM Configuration"
@ -3030,6 +3278,7 @@ config ESP_MCPWM_MOTOR_CH0_PWMA_GPIO
int "Output Pin PWM_A"
default 20 if ARCH_CHIP_ESP32C6
default 10 if ARCH_CHIP_ESP32H2
default 10 if ARCH_CHIP_ESP32P4
---help---
Output pin assigned to channel 0 PWM output PWM_A.
@ -3037,6 +3286,7 @@ config ESP_MCPWM_MOTOR_CH0_PWMB_GPIO
int "Output Pin PWM_B"
default 21 if ARCH_CHIP_ESP32C6
default 11 if ARCH_CHIP_ESP32H2
default 11 if ARCH_CHIP_ESP32P4
---help---
Output pin assigned to channel 0 PWM output PWM_B.
@ -3269,4 +3519,4 @@ config ESPRESSIF_TEMP_THREAD_STACKSIZE
endmenu # ESPRESSIF_TEMP
endif # ARCH_CHIP_ESPRESSIF
endif

17
arch/risc-v/src/common/espressif/esp_adc.c
View file

@ -67,6 +67,12 @@
_count; \
})
#ifdef CONFIG_ARCH_CHIP_ESP32P4
# define PIN_FUNCTION FUNCTION_1
#else
# define PIN_FUNCTION FUNCTION_2
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@ -571,7 +577,7 @@ static int esp_adc_oneshot_config_channel(struct adc_dev_s *dev,
/* Configure GPIO for ADC */
gpio = ADC_GET_IO_NUM(priv->unit, channel);
ret = esp_configgpio(gpio, FUNCTION_2);
ret = esp_configgpio(gpio, PIN_FUNCTION);
if (ret < 0)
{
aerr("ERROR: Failed to configure GPIO %d\n", gpio);
@ -745,6 +751,15 @@ struct adc_dev_s *esp_adc_initialize(int adc_num,
#endif
}
case 2:
{
#ifdef CONFIG_ESPRESSIF_ADC_2
dev = &g_adcdev2;
priv = &g_adcpriv2;
#endif
break;
}
default:
{
aerr("ERROR: Unsupported ADC number: %d\n", adc_num);

4
arch/risc-v/src/common/espressif/esp_serial.c
View file

@ -847,7 +847,11 @@ static bool esp_txempty(uart_dev_t *dev)
{
struct esp_uart_s *priv = dev->priv;
#if defined(CONFIG_ARCH_CHIP_ESP32P4)
return priv->hal->dev->int_raw.txfifo_empty_int_raw != 0;
#else
return priv->hal->dev->int_raw.txfifo_empty != 0;
#endif
}
/****************************************************************************

7
arch/risc-v/src/common/espressif/esp_start.c
View file

@ -58,6 +58,10 @@
#include "rom/cache.h"
#include "soc/soc.h"
#include "soc/soc_caps.h"
#ifdef CONFIG_ARCH_CHIP_ESP32P4
# include "soc/hp_peri_pms_reg.h"
# include "soc/lp_peri_pms_reg.h"
#endif
#include "soc/rtc.h"
#include "bootloader_init.h"
@ -172,6 +176,7 @@ extern int ets_printf(const char *fmt, ...) printf_like(1, 2);
#endif
extern void cache_set_idrom_mmu_size(uint32_t irom_size, uint32_t drom_size);
extern void ets_delay_us(uint32_t us);
/****************************************************************************
* Private Function Prototypes
@ -577,6 +582,8 @@ void __esp_start(void)
riscv_earlyserialinit();
#endif
esp_chip_revision_check();
showprogress("A");
/* Setup the syscall table needed by the ROM code */

6
arch/risc-v/src/common/espressif/esp_timerisr.c
View file

@ -51,7 +51,11 @@
# define SYSTIMER_TRIGGER_TYPE ESP_IRQ_TRIGGER_EDGE
#endif /* SOC_SYSTIMER_INT_LEVEL */
#define CHIP_SYSTIMER_SOURCE SYSTIMER_TARGET0_EDGE_INTR_SOURCE
#if defined(CONFIG_ARCH_CHIP_ESP32P4)
# define CHIP_SYSTIMER_SOURCE SYSTIMER_TARGET0_INTR_SOURCE
#else
# define CHIP_SYSTIMER_SOURCE SYSTIMER_TARGET0_EDGE_INTR_SOURCE
#endif
/****************************************************************************
* Private Data

4
arch/risc-v/src/common/espressif/esp_twai.c
View file

@ -96,8 +96,10 @@
# endif
#endif
#ifdef CONFIG_ARCH_CHIP_ESP32C3
#if defined(CONFIG_ARCH_CHIP_ESP32C3)
# define INT_ENA_REG(hw) hw->interrupt_enable_reg.val
#elif defined(CONFIG_ARCH_CHIP_ESP32P4)
# define INT_ENA_REG(hw) hw->interrupt_ena.val
#else
# define INT_ENA_REG(hw) hw->interrupt_enable.val
#endif /* CONFIG_ARCH_CHIP_ESP32C3 */

130
arch/risc-v/src/common/espressif/esp_vectors.S
View file

@ -30,28 +30,69 @@
#include "chip.h"
#include "sdkconfig.h"
#include "soc/soc.h"
/****************************************************************************
* Public Symbols
****************************************************************************/
.global _vector_table
#ifdef CONFIG_SOC_INT_CLIC_SUPPORTED
.global _mtvt_table
#endif
/****************************************************************************
* Section: .exception_vectors.text
****************************************************************************/
.section .exception_vectors.text
/* Prevent the compiler from generating 2-byte instruction in the vector tables */
.option push
.option norvc
/****************************************************************************
* Name: _vector_table
****************************************************************************/
.balign 0x100
#ifdef CONFIG_SOC_INT_CLIC_SUPPORTED
/* Non-hardware vectored interrupt entry. MTVEC CSR points here.
*
* On targets that use CLIC as their interrupt controller, when an exception occurs, the CPU
* jumps to the address stored in MTVEC[31:6] << 6. The CPU will also jump to this location
* if an interrupt is configured as non-vectored (CLIC_INT_ATTR.shv = 0).
*
* Because of the left-shift `<< 6`, this entry must be aligned on 64.
*/
.balign 0x40
.type _vector_table, @function
_vector_table:
j exception_common
nop
#else /* CONFIG_SOC_INT_PLIC_SUPPORTED */
/* This is the vector table. MTVEC points here.
*
* Use 4-byte instructions here. 1 instruction = 1 entry of the table.
* The CPU jumps to MTVEC (i.e. the first entry) in case of an exception,
* and (MTVEC & 0xfffffffc) + (mcause & 0x7fffffff) * 4, in case of an
* interrupt.
*
* Note: for our CPU, we need to place this on a 256-byte boundary, as CPU
* only uses the 24 MSBs of the MTVEC, i.e. (MTVEC & 0xffffff00).
*/
.balign 0x100
.type _vector_table, @function
_vector_table:
.option push
.option norvc
j _panic_handler /* 0: Exception entry */
j exception_common /* 1: Free interrupt number */
@ -86,6 +127,8 @@ _vector_table:
j exception_common /* 30: Free interrupt number */
j exception_common /* 31: Free interrupt number */
#endif
/****************************************************************************
* Name: exception_common
*
@ -98,4 +141,83 @@ _vector_table:
.global _panic_handler
_panic_handler:
j exception_common /* Dispatch the system call */
j exception_common /* Dispatch the system call */#endif
/****************************************************************************
* Name: _mtvt_table
****************************************************************************/
#ifdef CONFIG_SOC_INT_CLIC_SUPPORTED
/* Vectored interrupt table. MTVT CSR points here.
*
* If an interrupt occurs and is configured as (hardware) vectored, the CPU
* will jump to MTVT[31:0] + 4 * interrupt_id
*
* In the case of the ESP32P4, the interrupt matrix, between the CPU
* interrupt lines and the peripherals, offers 32 lines. As such, the
* interrupt_id between 0 and 31.
*
* Since the interrupts are initialized as vectored on CPU start, we can
* manage the special interrupts ETS_T1_WDT_INUM, ETS_CACHEERR_INUM and
* ETS_MEMPROT_ERR_INUM here.
*/
.balign 0x40
.type _mtvt_table, @function
_mtvt_table:
.word exception_common /* 0: System interrupt number. Exceptions are non-vectored, won't load this. */
.word exception_common /* 1: System interrupt number */
.word exception_common /* 2: System interrupt number */
.word exception_common /* 3: System interrupt number */
.word exception_common /* 4: System interrupt number */
.word exception_common /* 5: System interrupt number */
.word exception_common /* 6: System interrupt number */
.word exception_common /* 7: System interrupt number */
.word exception_common /* 8: System interrupt number */
.word exception_common /* 9: System interrupt number */
.word exception_common /* 10: System interrupt number */
.word exception_common /* 11: System interrupt number */
.word exception_common /* 12: System interrupt number */
.word exception_common /* 13: System interrupt number */
.word exception_common /* 14: System interrupt number */
.word exception_common /* 15: System interrupt number */
.word exception_common /* 16: Free interrupt number */
.word exception_common /* 17: Free interrupt number */
.word exception_common /* 18: Free interrupt number */
.word exception_common /* 19: Free interrupt number */
.word exception_common /* 20: Free interrupt number */
.word exception_common /* 21: Free interrupt number */
.word exception_common /* 22: Free interrupt number */
.word exception_common /* 23: Free interrupt number */
.word exception_common /* 24: Free interrupt number */
.word exception_common /* 25: Free interrupt number */
.word exception_common /* 26: Free interrupt number */
.word exception_common /* 27: Free interrupt number */
.word exception_common /* 28: Free interrupt number */
.word exception_common /* 29: Free interrupt number */
.word exception_common /* 30: Free interrupt number */
.word exception_common /* 31: Free interrupt number */
.word exception_common /* 32: Free interrupt number */
.word exception_common /* 33: Free interrupt number */
.word exception_common /* 34: Free interrupt number */
.word exception_common /* 35: Free interrupt number */
.word exception_common /* 36: Free interrupt number */
.word exception_common /* 37: Free interrupt number */
.word exception_common /* 38: Free interrupt number */
.word exception_common /* 39: Free interrupt number */
.word exception_common /* 40: ETS_INT_WDT_INUM (+16) panic-interrupt (soc-level panic) */
.word exception_common /* 41: ETS_CACHEERR_INUM (+16) panic-interrupt (soc-level panic) */
.word exception_common /* 42: ETS_MEMPROT_ERR_INUM (+16) handler (soc-level panic) */
.word exception_common /* 43: ETS_ASSIST_DEBUG_INUM (+16) handler (soc-level panic) */
.word exception_common /* 44: ETS_IPC_ISR_INUM (+16) handler*/
.word exception_common /* 45: Free interrupt number */
.word exception_common /* 46: Free interrupt number */
.word exception_common /* 47: Free interrupt number */
.size _mtvt_table, .-_mtvt_table
#endif
/* Re-enable the compressed instruction set it is was enabled before */
.option pop

4
arch/risc-v/src/common/espressif/esp_wdt.c
View file

@ -110,7 +110,9 @@
#define XT_WDT_CLK_CAL_CYCLES (500)
#if defined(CONFIG_ARCH_CHIP_ESP32C6) || defined(CONFIG_ARCH_CHIP_ESP32H2)
#if defined(CONFIG_ARCH_CHIP_ESP32C6) || \
defined(CONFIG_ARCH_CHIP_ESP32H2) || \
defined(CONFIG_ARCH_CHIP_ESP32P4)
# define RTC_CORE_INTR_SOURCE ETS_LP_WDT_INTR_SOURCE
# define ESP_IRQ_RTC_CORE ESP_SOURCE2IRQ(ETS_LP_WDT_INTR_SOURCE)
#endif

9
arch/risc-v/src/common/riscv_exception_common.S
View file

@ -87,6 +87,10 @@
# define EXCEPTION_SECTION .text
#endif
/* Valid exceptions causes range is from 0 to 63 */
#define CAUSE_EXCEPTION 63
/****************************************************************************
* Public Symbols
****************************************************************************/
@ -161,6 +165,11 @@ exception_common:
blt s2, x0, handle_irq /* If cause < 0 it is interrupt */
/* Adjust exception cause range from 0 to 63 */
li s3, CAUSE_EXCEPTION
and s2, s2, s3
/* Is it a system call ? */
li s3, RISCV_IRQ_ECALLU /* Is it a system call ? */

2
arch/risc-v/src/esp32c3/Make.defs
View file

@ -23,6 +23,8 @@
include common/Make.defs
include common/espressif/Make.defs
CHIP_CSRCS += esp_chip_rev.c
# Wireless interfaces.
ifeq ($(CONFIG_ESPRESSIF_WIFI),y)

50
arch/risc-v/src/esp32c3/esp_chip_rev.c Normal file
View file

@ -0,0 +1,50 @@
/****************************************************************************
* arch/risc-v/src/esp32c3/esp_chip_rev.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp_chip_revision_check
*
* Description:
* Checks if the current chip revision is greater than the minimum
* revision supported by NuttX. If the chip revision is not supported, an
* error or warning message is printed, and the system may halt unless
* the configuration allows ignoring the chip revision check.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void esp_chip_revision_check(void)
{
}

2
arch/risc-v/src/esp32c6/Make.defs
View file

@ -23,6 +23,8 @@
include common/Make.defs
include common/espressif/Make.defs
CHIP_CSRCS += esp_chip_rev.c
# Wireless interfaces.
ifeq ($(CONFIG_ESPRESSIF_WIFI),y)

50
arch/risc-v/src/esp32c6/esp_chip_rev.c Normal file
View file

@ -0,0 +1,50 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/esp_chip_rev.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp_chip_revision_check
*
* Description:
* Checks if the current chip revision is greater than the minimum
* revision supported by NuttX. If the chip revision is not supported, an
* error or warning message is printed, and the system may halt unless
* the configuration allows ignoring the chip revision check.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void esp_chip_revision_check(void)
{
}

2
arch/risc-v/src/esp32h2/Make.defs
View file

@ -23,4 +23,6 @@
include common/Make.defs
include common/espressif/Make.defs
CHIP_CSRCS += esp_chip_rev.c
CFLAGS += ${DEFINE_PREFIX}_RETARGETABLE_LOCKING

50
arch/risc-v/src/esp32h2/esp_chip_rev.c Normal file
View file

@ -0,0 +1,50 @@
/****************************************************************************
* arch/risc-v/src/esp32h2/esp_chip_rev.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp_chip_revision_check
*
* Description:
* Checks if the current chip revision is greater than the minimum
* revision supported by NuttX. If the chip revision is not supported, an
* error or warning message is printed, and the system may halt unless
* the configuration allows ignoring the chip revision check.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void esp_chip_revision_check(void)
{
}

4
arch/risc-v/src/esp32p4/.gitignore vendored Normal file
View file

@ -0,0 +1,4 @@
/bootloader
/esp-nuttx-bootloader
/*.zip
/esp-hal-3rdparty

95
arch/risc-v/src/esp32p4/Kconfig Normal file
View file

@ -0,0 +1,95 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_CHIP_ESP32P4
source "arch/risc-v/src/common/espressif/Kconfig"
config ESP32P4_SELECTS_REV_LESS_V3
bool "Select ESP32-P4 revisions <3.0 (No >=3.x Support)"
default n
---help---
Select this option to support ESP32-P4 revisions 0.x and 1.x.
Revisions higher than 3.0 (included) and revisions less than 3.0
have huge hardware difference.
Revisions higher than 3.0 (included) is not compatible with 0.x and 1.x.
choice ESP32P4_REV_MIN
prompt "Minimum Supported ESP32-P4 Revision"
default ESP32P4_REV_MIN_1
---help---
Required minimum chip revision. ESP-IDF will check for it and
reject to boot if the chip revision fails the check.
This ensures the chip used will have some modifications (features, or bugfixes).
The complied binary will only support chips above this revision,
this will also help to reduce binary size.
config ESP32P4_REV_MIN_0
depends on ESP32P4_SELECTS_REV_LESS_V3
bool "Rev v0.0"
config ESP32P4_REV_MIN_1
depends on ESP32P4_SELECTS_REV_LESS_V3
bool "Rev v0.1"
config ESP32P4_REV_MIN_100
depends on ESP32P4_SELECTS_REV_LESS_V3
bool "Rev v1.0"
config ESP32P4_REV_MIN_300
bool "Rev v3.0"
depends on !ESP32P4_SELECTS_REV_LESS_V3
endchoice
config ESP32P4_REV_MIN_FULL
int
default 0 if ESP32P4_REV_MIN_0
default 1 if ESP32P4_REV_MIN_1
default 100 if ESP32P4_REV_MIN_100
default 300 if ESP32P4_REV_MIN_300
config ESP_REV_MIN_FULL
int
default ESP32P4_REV_MIN_FULL
config ESP32P4_REV_MAX_FULL
int
default 399 if !ESP32P4_SELECTS_REV_LESS_V3
default 199 if ESP32P4_SELECTS_REV_LESS_V3
# keep in sync the "Maximum Supported Revision" description with this value
config ESP_REV_MAX_FULL
int
default ESP32P4_REV_MAX_FULL
config ESP_EFUSE_BLOCK_REV_MIN_FULL
int "Minimum Supported ESP32-P4 eFuse Block Revision"
default 0
---help---
Required minimum eFuse Block revision. ESP-IDF will check it at the 2nd bootloader stage
whether the current image can work correctly for this eFuse Block revision.
So that to avoid running an incompatible image on a SoC that contains breaking change in the eFuse Block.
If you want to update this value to run the image that not compatible with the current eFuse Block revision,
please contact to Espressif's business team for details:
https://www.espressif.com.cn/en/contact-us/sales-questions
config ESP_EFUSE_BLOCK_REV_MAX_FULL
int
default 199
comment "Maximum Supported ESP32-P4 eFuse Block Revision (eFuse Block Rev v0.99)"
# The revision in the comment must correspond to the default value of ESP_EFUSE_BLOCK_REV_MAX_FULL
endif # ARCH_CHIP_ESP32P4
config P4_REV3_MSPI_CRASH_AFTER_POWER_UP_WORKAROUND
bool
default y if ESP32P4_REV_MIN_300
config P4_REV3_MSPI_WORKAROUND_SIZE
hex
default 0x100 if ESP32P4_REV_MIN_300
default 0

28
arch/risc-v/src/esp32p4/Make.defs Normal file
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############################################################################
# arch/risc-v/src/esp32p4/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include common/Make.defs
include common/espressif/Make.defs
CHIP_CSRCS += esp_chip_rev.c
CFLAGS += ${DEFINE_PREFIX}_RETARGETABLE_LOCKING

85
arch/risc-v/src/esp32p4/esp_chip_rev.c Normal file
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/****************************************************************************
* arch/risc-v/src/esp32p4/esp_chip_rev.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include "hal/efuse_hal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define ESP32P4_MIN_FULLY_SUPPORTED_VERSION 300
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* ROM Function Prototypes
****************************************************************************/
extern int ets_printf(const char *fmt, ...) printf_like(1, 2);
/****************************************************************************
* Name: esp_chip_revision_check
*
* Description:
* Checks if the current chip revision is greater than the minimum
* revision supported by NuttX. If the chip revision is not supported, an
* error or warning message is printed, and the system may halt unless
* the configuration allows ignoring the chip revision check.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void esp_chip_revision_check(void)
{
uint32_t chip_rev = efuse_hal_chip_revision();
if (chip_rev < ESP32P4_MIN_FULLY_SUPPORTED_VERSION)
{
#ifndef ESP32P4_IGNORE_CHIP_REVISION_CHECK
ets_printf("ERROR: NuttX supports ESP32-P4 chip revision > v%d.%01d"
" (chip revision is v%" PRIu32 ".%" PRIu32 ")\n",
ESP32P4_MIN_FULLY_SUPPORTED_VERSION / 100,
ESP32P4_MIN_FULLY_SUPPORTED_VERSION % 100,
chip_rev / 100, chip_rev % 100);
PANIC();
#endif
ets_printf("WARNING: NuttX supports ESP32-P4 chip revision > v%d.%01d"
" (chip revision is v%" PRIu32 ".%" PRIu32 ").\n"
"Ignoring this error and continuing because "
"`ESP32P4_IGNORE_CHIP_REVISION_CHECK` is set...\n"
"THIS MAY NOT WORK! DON'T USE THIS CHIP IN PRODUCTION!\n",
ESP32P4_MIN_FULLY_SUPPORTED_VERSION / 100,
ESP32P4_MIN_FULLY_SUPPORTED_VERSION % 100,
chip_rev / 100, chip_rev % 100);
}
}

369
arch/risc-v/src/esp32p4/hal_esp32p4.mk Normal file
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############################################################################
# arch/risc-v/src/esp32c6/esp32p4.mk
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
# Include header paths
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include$(DELIM)mbedtls
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_libc$(DELIM)platform_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)private_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)private_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)private_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)interface
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_app_format$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_blockdev$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_cam$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_cam$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_clock$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_clock$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_emac$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_emac$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2s$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2s$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_lcd$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_lcd$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mcpwm$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mcpwm$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_parlio$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_parlio$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pcnt$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pcnt$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pmu$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pmu$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rmt$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rmt$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rtc_timer$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rtc_timer$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_security$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_security$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_touch_sens$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_touch_sens$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_twai$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_twai$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_usb$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_usb$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_wdt$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_wdt$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)dma$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)etm$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)esp_private
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)soc
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)soc$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)ldo$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_intr$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_timing_tuning$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_timing_tuning$(DELIM)port$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_timing_tuning$(DELIM)tuning_scheme_impl$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)private_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_libc$(DELIM)priv_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_pm$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_security$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)ld
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include$(DELIM)private
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)public_compat
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)platform_port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)tf-psa-crypto$(DELIM)core
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)tf-psa-crypto$(DELIM)drivers$(DELIM)builtin$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)tf-psa-crypto$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)include$(DELIM)aes
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)psa_driver$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)include
ifeq ($(CONFIG_ESP32P4_SELECTS_REV_LESS_V3),y)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register$(DELIM)hw_ver1
else
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register$(DELIM)hw_ver3
endif
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include$(DELIM)esp_flash_chips
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_gpio$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src
# Linker scripts
ifeq ($(CONFIG_ESP32P4_REV_MIN_300),y)
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco5.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco5.libc.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco5.libgcc.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco5.newlib.ld
else
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libgcc.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib.ld
endif
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.api.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.version.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc-suboptimal_for_misaligned_mem.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.systimer.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)ld$(DELIM)rom.api.ld
# Source files
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_efuse.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)esp_image_format.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)flash_encrypt.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_fields.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_rtc_calib.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_table.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_utility.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)efuse_controller$(DELIM)keys$(DELIM)with_key_purposes$(DELIM)esp_efuse_api_key.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_api.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_utility.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)curve_fitting_coefficients.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)adc_cali_curve_fitting.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)adc_cali.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)adc_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)temperature_sensor_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)adc_hal_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)adc_oneshot_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_clock$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)$(CHIP_SERIES)$(DELIM)gdma_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)gdma_hal_ahb_v2.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)gdma_hal_axi.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)gdma_hal_crc_gen.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)gdma_hal_top.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)$(CHIP_SERIES)$(DELIM)dedic_gpio_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)$(CHIP_SERIES)$(DELIM)sdm_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)gpio_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)sdm_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)$(CHIP_SERIES)$(DELIM)spi_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)spi_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)spi_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)spi_slave_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)spi_slave_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)$(CHIP_SERIES)$(DELIM)i2c_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)i2c_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2s$(DELIM)$(CHIP_SERIES)$(DELIM)i2s_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2s$(DELIM)i2s_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)$(CHIP_SERIES)$(DELIM)ledc_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)ledc_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)ledc_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mcpwm$(DELIM)$(CHIP_SERIES)$(DELIM)mcpwm_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mcpwm$(DELIM)mcpwm_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_encrypt_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_hal_gpspi.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pcnt$(DELIM)$(CHIP_SERIES)$(DELIM)pcnt_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pcnt$(DELIM)pcnt_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pmu$(DELIM)brownout_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rmt$(DELIM)$(CHIP_SERIES)$(DELIM)rmt_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rmt$(DELIM)rmt_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_security$(DELIM)hmac_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_security$(DELIM)sha_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)$(CHIP_SERIES)$(DELIM)timer_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)timer_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_twai$(DELIM)$(CHIP_SERIES)$(DELIM)twai_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_twai$(DELIM)twai_hal_v1.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)$(CHIP_SERIES)$(DELIM)uart_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)uart_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)uart_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_wdt$(DELIM)wdt_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)adc_share_hw_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_ctrl_os.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)cpu.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_clk.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_gpio_reserve.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_memory_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)hw_random.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)intr_alloc.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mac_addr.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_timing_tuning$(DELIM)mspi_timing_tuning.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)periph_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)cpu_region_protect.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_clk_tree.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_cpu_intr.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)peripheral_domain_pd.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)pmu_init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)pmu_param.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk_init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_time.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sar_periph_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)systimer.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)esp_clk_tree_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)brownout.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)regi2c_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)rtc_module.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_modes.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_uart.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)esp_cache_msync.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)esp_cache_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)esp_mmu_map.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)ext_mem_layout.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_clic.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_crc.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_efuse.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_gpio.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_print.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_regi2c_$(CHIP_SERIES).c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_serial_output.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_spiflash.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_sys.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_systimer.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_security$(DELIM)src$(DELIM)esp_crypto_lock.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_security$(DELIM)src$(DELIM)esp_crypto_periph_clk.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_security$(DELIM)src$(DELIM)esp_hmac.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)esp_err.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)esp_system.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)reset_reason.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)startup_funcs.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)startup.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)system_time.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)cache_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)efuse_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)hal_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mmu_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)log_level.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)linked_list$(DELIM)log_linked_list.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)tag_log_level.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_lock.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_timestamp.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)log_write.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)util.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)instruction_decode.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt_clic.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)rv_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)gpio_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)interrupts.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)power_supply_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)lldesc.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)cache_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)esp_flash_api.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)esp_flash_spi_init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)flash_brownout_hook.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)flash_mmap.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)flash_ops.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)memspi_host_driver.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_drivers.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_gd.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_generic.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_winbond.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_hpm_enable.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_os_func_app.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_os_func_noos.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src$(DELIM)esp_dma_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src$(DELIM)gdma_link.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src$(DELIM)gdma.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_gpio$(DELIM)src$(DELIM)gpio.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_gpio$(DELIM)src$(DELIM)rtc_io.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_encoder_bytes.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_encoder_copy.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_encoder_simple.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_encoder.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_rx.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_tx.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)newlib$(DELIM)newlib$(DELIM)libc$(DELIM)misc$(DELIM)init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)heap_caps.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)platform$(DELIM)os.c
# Bootloader files
ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash_config_${CHIP_SERIES}.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)flash_qio_mode.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_${CHIP_SERIES}.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_soc.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_clock_init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_clock_loader.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_common_loader.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_console_loader.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_console.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_mem.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random_${CHIP_SERIES}.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_sha.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_fields.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)bootloader_banner_wrap.c
LDFLAGS += --wrap=bootloader_print_banner
endif
ifeq ($(CONFIG_ESPRESSIF_IDF_ENV_FPGA),y)
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)fpga_overrides_clk.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)fpga_overrides_rng.c
LDFLAGS += -u esp_common_include_fpga_overrides_clk
LDFLAGS += -u esp_common_include_fpga_overrides_rng
endif

15
boards/Kconfig
View file

@ -628,6 +628,14 @@ config ARCH_BOARD_ESP32H2_DEVKIT
---help---
The ESP32-H2 DevKit features the ESP32-H2 CPU with a RISC-V core.
config ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD
bool "Espressif ESP32-P4 Function EV Board"
depends on ARCH_CHIP_ESP32P4
select ARCH_HAVE_BUTTONS
select ARCH_HAVE_IRQBUTTONS
---help---
The ESP32-P4 Function EV Board features the ESP32-P4 CPU with two RISC-V cores.
config ARCH_BOARD_ET_STM32_STAMP
bool "Futurlec: ET-STM32 Stamp"
depends on ARCH_CHIP_STM32F103RE
@ -3602,6 +3610,7 @@ config ARCH_BOARD
default "esp32c6-devkitm" if ARCH_BOARD_ESP32C6_DEVKITM
default "esp32c6-xiao" if ARCH_BOARD_ESP32C6_XIAO
default "esp32h2-devkit" if ARCH_BOARD_ESP32H2_DEVKIT
default "esp32p4-function-ev-board" if ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD
default "et-stm32-stamp" if ARCH_BOARD_ET_STM32_STAMP
default "tlsr8278adk80d" if ARCH_BOARD_TLSR8278ADK80D
default "ez80f910200kitg" if ARCH_BOARD_EZ80F910200KITG
@ -4907,6 +4916,9 @@ endif
if ARCH_BOARD_ESP32H2_DEVKIT
source "boards/risc-v/esp32h2/esp32h2-devkit/Kconfig"
endif
if ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD
source "boards/risc-v/esp32p4/esp32p4-function-ev-board/Kconfig"
endif
if ARCH_BOARD_SIM
source "boards/sim/sim/sim/Kconfig"
endif
@ -5061,6 +5073,9 @@ endif
if ARCH_CHIP_ESP32H2
source "boards/risc-v/esp32h2/common/Kconfig"
endif
if ARCH_CHIP_ESP32P4
source "boards/risc-v/esp32p4/common/Kconfig"
endif
if ARCH_CHIP_SAMV7
source "boards/arm/samv7/common/Kconfig"
endif

2
boards/risc-v/esp32p4/common/.gitignore vendored Normal file
View file

@ -0,0 +1,2 @@
etctmp
etctmp.c

50
boards/risc-v/esp32p4/common/Kconfig Normal file
View file

@ -0,0 +1,50 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
config ESPRESSIF_MERGE_BINS
bool "Merge raw binary files into a single file"
default n
---help---
Merge the raw binary files into a single file for flashing to the
device.
This is only useful when the path to binary files (e.g. bootloader)
is provided via the ESPTOOL_BINDIR variable.
choice ESPRESSIF_SPIFLASH_FS
prompt "Mount SPI Flash MTD on bring-up"
default ESPRESSIF_SPIFLASH_SMARTFS
depends on ESPRESSIF_MTD
optional
---help---
Mount the SPI Flash MTD with the selected File System format on board
bring-up.
If not selected, the MTD will be registered as a device node on /dev.
config ESPRESSIF_SPIFLASH_SMARTFS
bool "SmartFS"
select FS_SMARTFS
select MTD_SMART
config ESPRESSIF_SPIFLASH_NXFFS
bool "NXFFS"
select FS_NXFFS
config ESPRESSIF_SPIFLASH_SPIFFS
bool "SPIFFS"
select FS_SPIFFS
config ESPRESSIF_SPIFLASH_LITTLEFS
bool "LittleFS"
select FS_LITTLEFS
config ESPRESSIF_SPIFLASH_MTD_CONFIG
bool "Non-volatile storage"
endchoice # ESPRESSIF_SPIFLASH_FS
config ESPRESSIF_SPIFLASH_FS_MOUNT_PT
string "File-system Mount Point"
depends on ESPRESSIF_SPIFLASH_SMARTFS || ESPRESSIF_SPIFLASH_NXFFS || ESPRESSIF_SPIFLASH_SPIFFS || ESPRESSIF_SPIFLASH_LITTLEFS
default "/data"

35
boards/risc-v/esp32p4/common/Makefile Normal file
View file

@ -0,0 +1,35 @@
#############################################################################
# boards/risc-v/esp32p4/common/Makefile
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
#############################################################################
include $(TOPDIR)/Make.defs
include board/Make.defs
include src/Make.defs
DEPPATH += --dep-path board
DEPPATH += --dep-path src
include $(TOPDIR)/boards/Board.mk
ARCHSRCDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src
BOARDDIR = $(ARCHSRCDIR)$(DELIM)board
CFLAGS += ${INCDIR_PREFIX}$(BOARDDIR)$(DELIM)include

79
boards/risc-v/esp32p4/common/include/esp_board_adc.h Normal file
View file

@ -0,0 +1,79 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_adc.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32C6_COMMON_INCLUDE_ESP32C6_BOARD_ADC_H
#define __BOARDS_RISCV_ESP32C6_COMMON_INCLUDE_ESP32C6_BOARD_ADC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_adc_init
*
* Description:
* This function configures and initializes the ADC driver for the board.
* It allocates memory for the ADC device structure, sets up the ADC
* hardware, and registers the ADC device with the system.
*
* Input Parameters:
* None.
*
* Returned Value:
* Returns zero (OK) on successful initialization and registration of the
* ADC device; a negated errno value is returned to indicate the nature
* of any failure.
*
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_ADC
int board_adc_init(void);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32C6_COMMON_INCLUDE_ESP32C6_BOARD_ADC_H */

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/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_bmp180.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_BMP180_H
#define __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_BMP180_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_bmp180_initialize
*
* Description:
* Initialize and register the BMP180 Pressure Sensor driver.
*
* Input Parameters:
* devno - The device number, used to build the device path as /dev/pressN
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
#ifdef CONFIG_SENSORS_BMP180
int board_bmp180_initialize(int devno);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_BMP180_H */

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/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_i2c.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_I2C_H
#define __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_I2C_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_i2c_init
*
* Description:
* Configure the I2C driver.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_I2C_DRIVER
int board_i2c_init(void);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_I2C_H */

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/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_i2s.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_I2S_H
#define __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_I2S_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_i2s_init
*
* Description:
* Configure the I2S driver.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_I2S
int board_i2s_init(void);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_I2S_H */

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/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_ledc.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_LEDC_H
#define __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_LEDC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_ledc_setup
*
* Description:
* Initialize LEDC PWM and register the PWM device.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_LEDC
int board_ledc_setup(void);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_LEDC_H */

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/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_mcpwm.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_MCPWM_H
#define __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_MCPWM_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_motor_initialize
*
* Description:
* Initialize MCPWM peripheral for motor control and register the motor
* driver.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
#ifdef CONFIG_ESP_MCPWM_MOTOR
int board_motor_initialize(void);
#endif
/****************************************************************************
* Name: board_capture_initialize
*
* Description:
* Initialize and register the capture driver using the MCPWM peripheral.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
#ifdef CONFIG_ESP_MCPWM_CAPTURE
int board_capture_initialize(void);
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_MCPWM_H */

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/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_pcnt.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_PCNT_H
#define __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_PCNT_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Inline Functions
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_pcnt_initialize
*
* Description:
* Initialize the pulse counter/quadrature encoder driver
*
* Input Parameters:
* None
*
* Returned Value:
* OK on success; errno on failure.
*
****************************************************************************/
int board_pcnt_initialize(void);
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_PCNT_H */

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/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_rmt.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_RMT_H
#define __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_RMT_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifdef CONFIG_ESP_RMT
/****************************************************************************
* Name: board_rmt_rxinitialize
*
* Description:
* Initialize the RMT peripheral and register an RX device.
*
* Input Parameters:
* pin - The pin used for the RX channel
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
int board_rmt_rxinitialize(int pin);
/****************************************************************************
* Name: board_rmt_txinitialize
*
* Description:
* Initialize the RMT peripheral and register an TX device.
*
* Input Parameters:
* pin - The pin used for the TX channel
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
int board_rmt_txinitialize(int pin);
#endif /* CONFIG_ESP_RMT */
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_RMT_H */

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/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_spidev.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPIDEV_H
#define __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPIDEV_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_spidev_initialize
*
* Description:
* Initialize SPI driver and register the /dev/spi device.
*
* Input Parameters:
* bus - The SPI bus number, used to build the device path as /dev/spiN
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#if defined(CONFIG_ESPRESSIF_SPI2) || defined(CONFIG_ESPRESSIF_SPI_BITBANG)
int board_spidev_initialize(int bus);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPIDEV_H */

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/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_spiflash.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPIFLASH_H
#define __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPIFLASH_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_spiflash_init
*
* Description:
* Initialize the SPIFLASH and register the MTD device.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_SPIFLASH
int board_spiflash_init(void);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPIFLASH_H */

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/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_spislavedev.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPISLAVEDEV_H
#define __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPISLAVEDEV_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_spislavedev_initialize
*
* Description:
* Initialize SPI Slave driver and register the /dev/spislv device.
*
* Input Parameters:
* bus - The SPI bus number, used to build the device path as /dev/spislvN
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_SPI_SLAVE
int board_spislavedev_initialize(int bus);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPISLAVEDEV_H */

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/*.ld.tmp

41
boards/risc-v/esp32p4/common/scripts/common.ld Normal file
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/****************************************************************************
* boards/risc-v/esp32p4/common/scripts/common.ld
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#include <nuttx/config.h>
/* From esp-hal-3rdparty */
#include "sdkconfig.h"
#include "ld.common"
#if CONFIG_ESPRESSIF_SOC_RTC_MEM_SUPPORTED
# define ESP_BOOTLOADER_RESERVE_RTC 0
/* rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
* For rtc_timer_data_in_rtc_mem section.
*/
# define RTC_TIMER_RESERVE_RTC (24)
# ifdef CONFIG_ARCH_CHIP_ESP32P4
# define RESERVE_RTC_MEM (RTC_TIMER_RESERVE_RTC)
# else
# define RESERVE_RTC_MEM (ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC)
# endif /* CONFIG_ARCH_CHIP_ESP32P4 */
#endif /* CONFIG_ESPRESSIF_SOC_RTC_MEM_SUPPORTED */

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/****************************************************************************
* boards/risc-v/esp32p4/common/scripts/esp32p4_aliases.ld
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
_interrupt_handler = exception_common;
cache_invalidate_all = Cache_Invalidate_All;
cache_resume_l2_cache = Cache_Resume_L2_Cache;
cache_set_idrom_mmu_size = Cache_Set_IDROM_MMU_Size;
cache_suspend_l2_cache = Cache_Suspend_L2_Cache;

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/****************************************************************************
* boards/risc-v/esp32p4/common/scripts/esp32p4_flat_memory.ld
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* ESP32-P4 Linker Script Memory Layout
*
* This file describes the memory layout (memory blocks) as virtual
* memory addresses.
*
* esp32p4_<legacy/mcuboot>_sections.ld contains output sections to link compiler
* output into these memory blocks.
*
****************************************************************************/
#include "common.ld"
#if !CONFIG_ESP32P4_SELECTS_REV_LESS_V3
#define SRAM_START 0x4FF00000 + CONFIG_CACHE_L2_CACHE_SIZE
#define SRAM_END 0x4FFAEFC0 /* 2nd stage bootloader iram_loader_seg start address */
#define SRAM_SIZE SRAM_END - SRAM_START
#else
#define SRAM_LOW_START 0x4FF00000
#define SRAM_LOW_END 0x4FF2CBD0 /* 2nd stage bootloader iram_loader_seg start address */
#define SRAM_LOW_SIZE SRAM_LOW_END - SRAM_LOW_START
/* If the cache size is less than 512KB, then there is a region of RAM
* above the ROM-reserved region and below the start of the cache.
*/
#define SRAM_HIGH_START 0x4FF40000
#define SRAM_HIGH_SIZE 0x80000 - CONFIG_CACHE_L2_CACHE_SIZE
#define SRAM_HIGH_END SRAM_HIGH_START + SRAM_HIGH_SIZE
#endif
#if CONFIG_P4_REV3_MSPI_CRASH_AFTER_POWER_UP_WORKAROUND
#define MSPI_WORKAROUND_SIZE CONFIG_P4_REV3_MSPI_WORKAROUND_SIZE
#else
#define MSPI_WORKAROUND_SIZE 0x0
#endif
#define IDROM_SEG_SIZE (CONFIG_MMU_PAGE_SIZE << 10)
#define LP_ROM_DRAM_START 0x5010fa80 // Value taken from ROM elf, includes LP ROM stack
#define LP_RAM_END 0x50110000
#define LP_ROM_DRAM_SIZE (LP_RAM_END - LP_ROM_DRAM_START)
MEMORY
{
/**
* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
* of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
* are connected to the data port of the CPU and eg allow byte-wise access.
*/
/* TCM */
tcm_idram_seg (RX) : org = 0x30100000, len = 0x2000
/* Flash mapped instruction data */
irom_seg (RX) : org = 0x40000000, len = IDROM_SEG_SIZE
/**
* (0x20 offset above is a convenience for the app binary image generation.
* Flash cache has 64KB pages. The .bin file which is flashed to the chip
* has a 0x18 byte file header, and each segment has a 0x08 byte segment
* header. Setting this offset makes it simple to meet the flash cache MMU's
* constraint that (paddr % 64KB == vaddr % 64KB).)
*/
/**
* Shared data RAM, excluding memory reserved for ROM bss/data/stack.
* Enabling Bluetooth & Trace Memory features in menuconfig will decrease the amount of RAM available.
*/
#if CONFIG_ESP32P4_SELECTS_REV_LESS_V3
sram_low (RWX) : org = SRAM_LOW_START, len = SRAM_LOW_SIZE
sram_high (RW) : org = SRAM_HIGH_START, len = SRAM_HIGH_SIZE
#else
sram_seg (RWX) : org = SRAM_START, len = SRAM_SIZE
#endif
#if CONFIG_SPIRAM_RODATA
/* PSRAM mapped constant data */
drom_seg (R) : org = 0x48000000, len = IDROM_SEG_SIZE
#else
/* Flash mapped constant data */
drom_seg (R) : org = 0x40000000, len = IDROM_SEG_SIZE
#endif // CONFIG_SPIRAM_RODATA
/* (See irom_seg for meaning of 0x20 offset in the above.) */
/* Used to store the deep sleep workaround code of P4 rev3.0. The reset vector will be set here before the chip enters sleep. */
rev3_mspi_workaround_seg(RWX) : org = 0x50108000, len = MSPI_WORKAROUND_SIZE
/**
* lp ram memory (RWX). Persists over deep sleep. // TODO: IDF-5667
*/
#if CONFIG_ULP_COPROC_ENABLED
lp_ram_seg(RW) : org = 0x50108000 + RESERVE_RTC_MEM + CONFIG_ULP_COPROC_RESERVE_MEM,
len = 0x8000 - CONFIG_ULP_COPROC_RESERVE_MEM - RESERVE_RTC_MEM - LP_ROM_DRAM_SIZE
#else
lp_ram_seg(RW) : org = 0x50108000 + RESERVE_RTC_MEM, len = 0x8000 - RESERVE_RTC_MEM
#endif // CONFIG_ULP_COPROC_ENABLED
/* We reduced the size of lp_ram_seg by RESERVE_RTC_MEM value.
It reserves the amount of LP memory that we use for this memory segment.
This segment is intended for keeping:
- (lower addr) rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
- (higher addr) bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on).
The aim of this is to keep data that will not be moved around and have a fixed address.
This segment is placed at the beginning of LP RAM, as the end of LP RAM is occupied by LP ROM stack/data
*/
lp_reserved_seg(RW) : org = 0x50108000, len = RESERVE_RTC_MEM
/* PSRAM seg */
extern_ram_seg(RWX) : org = 0x48000000, len = IDROM_SEG_SIZE
}
_data_seg_org = ORIGIN(rtc_data_seg);
/**
* The lines below define location alias for .rtc.data section
* P4 has no distinguished LP(RTC) fast and slow memory sections, instead, there is a unified LP_RAM section
* Thus, the following region segments are not configurable like on other targets
*/
REGION_ALIAS("rtc_iram_seg", lp_ram_seg );
REGION_ALIAS("rtc_data_seg", rtc_iram_seg );
REGION_ALIAS("rtc_slow_seg", rtc_iram_seg );
REGION_ALIAS("rtc_data_location", rtc_iram_seg );
REGION_ALIAS("rtc_reserved_seg", lp_reserved_seg );
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
REGION_ALIAS("text_seg_low", irom_seg);
#else
REGION_ALIAS("text_seg_low", sram_low);
REGION_ALIAS("text_seg_high", sram_high);
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
REGION_ALIAS("rodata_seg_low", drom_seg);
#else
REGION_ALIAS("rodata_seg_low", sram_low);
REGION_ALIAS("rodata_seg_high", sram_high);
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
#if CONFIG_SPIRAM_XIP_FROM_PSRAM
REGION_ALIAS("ext_ram_seg", drom_seg);
#else
REGION_ALIAS("ext_ram_seg", extern_ram_seg);
#endif //#if CONFIG_SPIRAM_XIP_FROM_PSRAM
/**
* If rodata default segment is placed in `drom_seg`, then flash's first rodata section must
* also be first in the segment.
*/
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
ASSERT(_flash_rodata_dummy_start == ORIGIN(rodata_seg_low),
".flash_rodata_dummy section must be placed at the beginning of the rodata segment.")
#endif
#if CONFIG_ESP_SYSTEM_USE_EH_FRAME
ASSERT ((__eh_frame_end > __eh_frame), "Error: eh_frame size is null!");
ASSERT ((__eh_frame_hdr_end > __eh_frame_hdr), "Error: eh_frame_hdr size is null!");
#endif

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#############################################################################
# boards/risc-v/esp32p4/common/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
#############################################################################
ifeq ($(CONFIG_ARCH_BOARD_COMMON),y)
ifeq ($(CONFIG_ESPRESSIF_ADC),y)
CSRCS += esp_board_adc.c
endif
ifeq ($(CONFIG_ESPRESSIF_LEDC),y)
CSRCS += esp_board_ledc.c
endif
ifeq ($(CONFIG_ESP_RMT),y)
CSRCS += esp_board_rmt.c
endif
ifeq ($(CONFIG_ESPRESSIF_SPI),y)
CSRCS += esp_board_spi.c
endif
ifeq ($(CONFIG_SPI_DRIVER),y)
CSRCS += esp_board_spidev.c
endif
ifeq ($(CONFIG_ESPRESSIF_SPI),y)
ifeq ($(CONFIG_SPI_SLAVE_DRIVER),y)
CSRCS += esp_board_spislavedev.c
endif
endif
ifeq ($(CONFIG_I2C_DRIVER),y)
CSRCS += esp_board_i2c.c
endif
ifeq ($(CONFIG_ESPRESSIF_I2S),y)
CSRCS += esp_board_i2s.c
endif
ifeq ($(CONFIG_ESPRESSIF_SPIFLASH),y)
CSRCS += esp_board_spiflash.c
endif
ifeq ($(CONFIG_ESPRESSIF_TWAI),y)
CSRCS += esp_board_twai.c
endif
ifeq ($(CONFIG_SENSORS_BMP180),y)
CSRCS += esp_board_bmp180.c
endif
ifeq ($(CONFIG_ESP_MCPWM),y)
CSRCS += esp_board_mcpwm.c
endif
ifeq ($(CONFIG_ESP_PCNT),y)
CSRCS += esp_board_pcnt.c
endif
DEPPATH += --dep-path src
VPATH += :src
CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)src
endif

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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_adc.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <syslog.h>
#include <nuttx/analog/adc.h>
#include "espressif/esp_adc.h"
#include "esp_board_adc.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* The number of channels for each ADC */
#define ADC0_MAX_CHANNELS 8
#define ADC1_MAX_CHANNELS 6
/****************************************************************************
* Private Data
****************************************************************************/
/* Select channels to be used for each ADC.
*
* GPIOs are fixed for each channel and configured in the lower-half driver.
*
* ADC 1
* Channel: 0 1 2 3 4 5 6 7
* GPIO: 16 17 18 19 20 21 22 23
*
* ADC 2
* Channel: 0 1 2 3 4 5
* GPIO: 49 50 51 52 53 54
* On the chanlist arrays below, channels are added +1. Do not change.
*/
#ifdef CONFIG_ESPRESSIF_ADC_1
static const uint8_t g_chanlist_adc1[ADC0_MAX_CHANNELS] =
{
#ifdef CONFIG_ESPRESSIF_ADC_1_CH0
1,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH1
2,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH2
3,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH3
4,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH4
5,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH5
6,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH6
7,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH7
8,
#endif
};
#endif
#ifdef CONFIG_ESPRESSIF_ADC_2
static const uint8_t g_chanlist_adc2[ADC1_MAX_CHANNELS] =
{
#ifdef CONFIG_ESPRESSIF_ADC_1_CH0
1,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH1
2,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH2
3,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH3
4,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH4
5,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH5
6,
#endif
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: board_adc_register
*
* Description:
* This function registers the ADC driver for the specified ADC channel.
* It initializes the ADC hardware, creates the device name, and registers
* the ADC device with the system.
*
* Input Parameters:
* adc_num - The ADC channel number to register.
*
* Returned Value:
* Returns zero (OK) on successful registration; a negated errno value is
* returned to indicate the nature of any failure.
*
****************************************************************************/
static int board_adc_register(int adc_num)
{
int ret;
char devname[12];
struct adc_dev_s *adcdev;
adcdev = kmm_malloc(sizeof(struct adc_dev_s));
if (adcdev == NULL)
{
syslog(LOG_ERR, "ERROR: Failed to allocate adc_dev_s instance\n");
return -ENOMEM;
}
memset(adcdev, 0, sizeof(struct adc_dev_s));
switch (adc_num)
{
case 1:
#ifdef CONFIG_ESPRESSIF_ADC_1
adcdev = esp_adc_initialize(adc_num, g_chanlist_adc1);
break;
#endif
case 2:
#ifdef CONFIG_ESPRESSIF_ADC_2
adcdev = esp_adc_initialize(adc_num, g_chanlist_adc2);
break;
#endif
default:
syslog(LOG_ERR, "ERROR: Unsupported ADC number: %d\n", adc_num);
return ERROR;
}
if (adcdev == NULL)
{
syslog(LOG_ERR, "ERROR: Failed to initialize ADC %d\n", adc_num);
return -ENODEV;
}
/* Register the ADC driver at "/dev/adcx" */
snprintf(devname, sizeof(devname), "/dev/adc%d", adc_num - 1);
ret = adc_register(devname, adcdev);
if (ret < 0)
{
kmm_free(adcdev);
syslog(LOG_ERR, "ERROR: adc_register %s failed: %d\n", devname, ret);
return ret;
}
return ret;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_adc_init
*
* Description:
* This function configures and initializes the ADC driver for the board.
* It allocates memory for the ADC device structure, sets up the ADC
* hardware, and registers the ADC device with the system.
*
* Input Parameters:
* None.
*
* Returned Value:
* Returns zero (OK) on successful initialization and registration of the
* ADC device; a negated errno value is returned to indicate the nature
* of any failure.
*
****************************************************************************/
int board_adc_init(void)
{
int ret;
#ifdef CONFIG_ESPRESSIF_ADC_1
ret = board_adc_register(1);
if (ret != OK)
{
return ret;
}
#endif
#ifdef CONFIG_ESPRESSIF_ADC_2
ret = board_adc_register(2);
if (ret != OK)
{
return ret;
}
#endif
return ret;
}

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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_bmp180.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/sensors/bmp180.h>
#include <nuttx/i2c/i2c_master.h>
#ifndef CONFIG_ESPRESSIF_I2C_BITBANG
#include "espressif/esp_i2c.h"
#else
#include "espressif/esp_i2c_bitbang.h"
#endif
#include "esp_board_bmp180.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_bmp180_initialize
*
* Description:
* Initialize and register the BMP180 Pressure Sensor driver.
*
* Input Parameters:
* devno - The device number, used to build the device path as /dev/pressN
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
int board_bmp180_initialize(int devno)
{
struct i2c_master_s *i2c;
char devpath[12];
int ret;
sninfo("Initializing BMP180!\n");
/* Initialize BMP180 */
#ifndef CONFIG_ESPRESSIF_I2C_BITBANG
i2c = esp_i2cbus_initialize(ESPRESSIF_I2C0);
#else
i2c = esp_i2cbus_bitbang_initialize();
#endif
if (i2c)
{
/* Then try to register the barometer sensor in I2C0 */
snprintf(devpath, sizeof(devpath), "/dev/press%d", devno);
ret = bmp180_register(devpath, i2c);
if (ret < 0)
{
snerr("ERROR: Error registering BMP180 in I2C0\n");
}
}
else
{
ret = -ENODEV;
}
return ret;
}

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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_i2c.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <errno.h>
#include <sys/types.h>
#include <nuttx/i2c/i2c_master.h>
#ifdef CONFIG_ESPRESSIF_I2C_BITBANG
#include "espressif/esp_i2c_bitbang.h"
#endif
#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_MASTER_MODE
#include "espressif/esp_i2c.h"
#endif
#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_SLAVE_MODE
#include "espressif/esp_i2c_slave.h"
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_SLAVE_MODE
#define I2C0_SLAVE_ADDR 0x28
#define I2C0_SLAVE_NBITS 7
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_I2C_BITBANG
static int i2c_bitbang_driver_init(int bus)
{
struct i2c_master_s *i2c;
int ret;
i2c = esp_i2cbus_bitbang_initialize();
if (i2c == NULL)
{
i2cerr("Failed to get I2C%d interface\n", bus);
return -ENODEV;
}
ret = i2c_register(i2c, bus);
if (ret < 0)
{
i2cerr("Failed to register I2C%d driver: %d\n", bus, ret);
}
return ret;
}
#endif
#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_MASTER_MODE
static int i2c_driver_init(int bus)
{
struct i2c_master_s *i2c;
int ret;
i2c = esp_i2cbus_initialize(bus);
if (i2c == NULL)
{
i2cerr("Failed to get I2C%d interface\n", bus);
return -ENODEV;
}
ret = i2c_register(i2c, bus);
if (ret < 0)
{
i2cerr("Failed to register I2C%d driver: %d\n", bus, ret);
esp_i2cbus_uninitialize(i2c);
}
return ret;
}
#endif
#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_SLAVE_MODE
static int i2c_slave_driver_init(int bus, int addr)
{
struct i2c_slave_s *i2c;
int ret;
i2c = esp_i2cbus_slave_initialize(bus, addr);
if (i2c == NULL)
{
i2cerr("Failed to get I2C%d interface\n", bus);
return -ENODEV;
}
ret = i2c_slave_register(i2c, bus, addr, I2C0_SLAVE_NBITS);
if (ret < 0)
{
i2cerr("Failed to register I2C%d driver: %d\n", bus, ret);
esp_i2cbus_slave_uninitialize(i2c);
}
return ret;
}
#endif
/****************************************************************************
* Name: board_i2c_init
*
* Description:
* Configure the I2C driver.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
int board_i2c_init(void)
{
int ret = OK;
#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_MASTER_MODE
#ifdef CONFIG_ESPRESSIF_I2C0
ret = i2c_driver_init(ESPRESSIF_I2C0);
if (ret != OK)
{
return ret;
}
#endif
#ifdef CONFIG_ESPRESSIF_I2C1
ret = i2c_driver_init(ESPRESSIF_I2C1);
#endif
#endif
#ifdef CONFIG_ESPRESSIF_I2C_BITBANG
ret = i2c_bitbang_driver_init(ESPRESSIF_I2C_BITBANG);
#endif
#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_SLAVE_MODE
ret = i2c_slave_driver_init(ESPRESSIF_I2C0_SLAVE, I2C0_SLAVE_ADDR);
#endif
return ret;
}

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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_i2s.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <errno.h>
#include <sys/types.h>
#include <stdio.h>
#include <nuttx/audio/audio.h>
#include <nuttx/audio/audio_i2s.h>
#include <nuttx/audio/i2s.h>
#include <nuttx/audio/pcm.h>
#include <arch/board/board.h>
#include "espressif/esp_i2s.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_i2sdev_initialize
*
* Description:
* This function is called by platform-specific, setup logic to configure
* and register the generic I2S audio driver. This function will register
* the driver as /dev/audio/pcm[x] where x is determined by the I2S port
* number.
*
* Input Parameters:
* port - The I2S port used for the device
* enable_tx - Register device as TX if true
* enable_rx - Register device as RX if true
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
int board_i2sdev_initialize(int port, bool enable_tx, bool enable_rx)
{
struct audio_lowerhalf_s *audio_i2s;
struct i2s_dev_s *i2s;
char devname[8];
int ret;
audinfo("Initializing I2S\n");
i2s = esp_i2sbus_initialize(port);
#ifdef CONFIG_AUDIO_I2SCHAR
ret = i2schar_register(i2s, port);
if (ret < 0)
{
aerr("ERROR: i2schar_register failed: %d\n", ret);
return ret;
}
#endif
if (enable_tx)
{
/* Initialize audio output */
audio_i2s = audio_i2s_initialize(i2s, true);
if (audio_i2s == NULL)
{
auderr("ERROR: Failed to initialize I2S audio output\n");
return -ENODEV;
}
snprintf(devname, sizeof(devname), "pcm%d", port);
/* If nxlooper is selected, the playback buffer is not rendered as
* a WAV file. Therefore, PCM decode will fail while processing such
* output buffer. In such a case, we bypass the PCM decode.
*/
#ifdef CONFIG_SYSTEM_NXLOOPER
ret = audio_register(devname, audio_i2s);
#else
struct audio_lowerhalf_s *pcm;
pcm = pcm_decode_initialize(audio_i2s);
if (pcm == NULL)
{
auderr("ERROR: Failed create the PCM decoder\n");
return -ENODEV;
}
ret = audio_register(devname, pcm);
#endif /* CONFIG_SYSTEM_NXLOOPER */
if (ret < 0)
{
auderr("ERROR: Failed to register /dev/%s device: %d\n",
devname, ret);
return ret;
}
}
if (enable_rx)
{
/* Initialize audio input */
audio_i2s = audio_i2s_initialize(i2s, false);
if (audio_i2s == NULL)
{
auderr("ERROR: Failed to initialize I2S audio input\n");
return -ENODEV;
}
snprintf(devname, sizeof(devname), "pcm_in%d", port);
ret = audio_register(devname, audio_i2s);
if (ret < 0)
{
auderr("ERROR: Failed to register /dev/%s device: %d\n",
devname, ret);
return ret;
}
}
return ret;
}
/****************************************************************************
* Name: board_i2s_init
*
* Description:
* Configure the I2S driver.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
int board_i2s_init(void)
{
int ret = OK;
#if defined(CONFIG_ESPRESSIF_I2S0)
bool i2s_enable_tx;
bool i2s_enable_rx;
#endif
#ifdef CONFIG_ESPRESSIF_I2S
#ifdef CONFIG_ESPRESSIF_I2S0_TX
i2s_enable_tx = true;
#else
i2s_enable_tx = false;
#endif /* CONFIG_ESPRESSIF_I2S0_TX */
#ifdef CONFIG_ESPRESSIF_I2S0_RX
i2s_enable_rx = true;
#else
i2s_enable_rx = false;
#endif /* CONFIG_ESPRESSIF_I2S0_RX */
/* Configure I2S generic audio on I2S0 */
ret = board_i2sdev_initialize(ESPRESSIF_I2S0,
i2s_enable_tx,
i2s_enable_rx);
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize I2S0 driver: %d\n", ret);
}
#endif /* CONFIG_ESPRESSIF_I2S */
return ret;
}

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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_ledc.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/timers/pwm.h>
#include <arch/board/board.h>
#include "espressif/esp_ledc.h"
#include "esp_board_ledc.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define LEDC_TIMER0 0
#define LEDC_TIMER1 1
#define LEDC_TIMER2 2
#define LEDC_TIMER3 3
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_ledc_setup
*
* Description:
* Initialize LEDC PWM and register the PWM device.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
int board_ledc_setup(void)
{
int ret = OK;
struct pwm_lowerhalf_s *pwm;
#ifdef CONFIG_ESPRESSIF_LEDC_TIMER0
pwm = esp_ledc_init(LEDC_TIMER0);
if (!pwm)
{
syslog(LOG_ERR, "ERROR: Failed to get the LEDC PWM 0 lower half\n");
return -ENODEV;
}
/* Register the PWM driver at "/dev/pwm0" */
ret = pwm_register("/dev/pwm0", pwm);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: pwm_register failed: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_ESPRESSIF_LEDC_TIMER1
pwm = esp_ledc_init(LEDC_TIMER1);
if (!pwm)
{
syslog(LOG_ERR, "ERROR: Failed to get the LEDC PWM 1 lower half\n");
return -ENODEV;
}
/* Register the PWM driver at "/dev/pwm1" */
ret = pwm_register("/dev/pwm1", pwm);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: pwm_register failed: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_ESPRESSIF_LEDC_TIMER2
pwm = esp_ledc_init(LEDC_TIMER2);
if (!pwm)
{
syslog(LOG_ERR, "ERROR: Failed to get the LEDC PWM 2 lower half\n");
return -ENODEV;
}
/* Register the PWM driver at "/dev/pwm2" */
ret = pwm_register("/dev/pwm2", pwm);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: pwm_register failed: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_ESPRESSIF_LEDC_TIMER3
pwm = esp_ledc_init(LEDC_TIMER3);
if (!pwm)
{
syslog(LOG_ERR, "ERROR: Failed to get the LEDC PWM 3 lower half\n");
return -ENODEV;
}
/* Register the PWM driver at "/dev/pwm3" */
ret = pwm_register("/dev/pwm3", pwm);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: pwm_register failed: %d\n", ret);
return ret;
}
#endif
return ret;
}

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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_mcpwm.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/board.h>
#ifdef CONFIG_MOTOR
#include <nuttx/motor/motor.h>
#endif
#ifdef CONFIG_CAPTURE
#include <nuttx/timers/capture.h>
#endif
#include <arch/board/board.h>
#include "espressif/esp_mcpwm.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_ESP_MCPMW_MOTOR_CH0_FAULT
# define MCPWM_FAULT_GPIO CONFIG_ESP_MCPMW_MOTOR_CH0_FAULT_GPIO
#else
# define MCPWM_FAULT_GPIO 0
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_motor_initialize
*
* Description:
* Initialize MCPWM peripheral for motor control and register the motor
* driver.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
#ifdef CONFIG_ESP_MCPWM_MOTOR
int board_motor_initialize(void)
{
int ret;
struct motor_lowerhalf_s *motor;
#ifdef CONFIG_ESP_MCPWM_MOTOR_CH0
motor = esp_motor_bdc_initialize(0,
CONFIG_ESP_MCPWM_MOTOR_CH0_PWM_FREQ,
CONFIG_ESP_MCPWM_MOTOR_CH0_PWMA_GPIO,
CONFIG_ESP_MCPWM_MOTOR_CH0_PWMB_GPIO,
MCPWM_FAULT_GPIO);
if (motor == NULL)
{
syslog(LOG_ERR, "ERROR: Failed to start MCPWM BDC Motor: CH0\n");
return -ENODEV;
}
ret = motor_register("/dev/motor0", motor);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: motor_register failed: %d\n", ret);
return ret;
}
#endif
return OK;
}
#endif
/****************************************************************************
* Name: board_capture_initialize
*
* Description:
* Initialize MCPWM Capture submodule and register the capture device.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
#ifdef CONFIG_ESP_MCPWM_CAPTURE
int board_capture_initialize(void)
{
int ret;
struct cap_lowerhalf_s *cap;
#ifdef CONFIG_ESP_MCPWM_CAPTURE_CH0
cap = esp_mcpwm_capture_initialize(0, CONFIG_ESP_MCPWM_CAPTURE_CH0_GPIO);
if (cap == NULL)
{
syslog(LOG_ERR, "ERROR: Failed to start MCPWM Capture: CH0\n");
return -ENODEV;
}
ret = cap_register("/dev/capture0", cap);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: cap_register failed: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_ESP_MCPWM_CAPTURE_CH1
cap = esp_mcpwm_capture_initialize(1, CONFIG_ESP_MCPWM_CAPTURE_CH1_GPIO);
if (cap == NULL)
{
syslog(LOG_ERR, "ERROR: Failed to start MCPWM Capture: CH1\n");
return -ENODEV;
}
ret = cap_register("/dev/capture1", cap);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: cap_register failed: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_ESP_MCPWM_CAPTURE_CH2
cap = esp_mcpwm_capture_initialize(2, CONFIG_ESP_MCPWM_CAPTURE_CH2_GPIO);
if (cap == NULL)
{
syslog(LOG_ERR, "ERROR: Failed to start MCPWM Capture: CH2\n");
return -ENODEV;
}
ret = cap_register("/dev/capture2", cap);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: cap_register failed: %d\n", ret);
return ret;
}
#endif
return OK;
}
#endif

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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_pcnt.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <stdio.h>
#include <arch/board/board.h>
#include <nuttx/timers/capture.h>
#include <nuttx/sensors/sensor.h>
#include "espressif/esp_pcnt.h"
#include "espressif/esp_gpio.h"
#ifdef CONFIG_ESP_PCNT_AS_QE
#include "espressif/esp_qencoder.h"
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define PCNT_HIGH_LIMIT CONFIG_ESP_PCNT_HIGH_LIMIT
#define PCNT_LOW_LIMIT CONFIG_ESP_PCNT_LOW_LIMIT
#define PCNT_GLITCH_FILTER(pcnt, thres) pcnt->ops->ioctl(pcnt, \
CAPIOC_FILTER, \
thres) \
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: board_pcnt_init
*
* Description:
* Initialize and register the pulse counter driver
*
* Input Parameters:
* devpath - The full path to the driver to register.
* unit_cfg - PCNT unit configuration
* chan0_cfg - PCNT unit channel 0 configuration
* chan1_cfg - PCNT unit channel 1 configuration
* glitch_threshold - Threshold value for glitch filter in ns
*
* Returned Value:
* Valid PCNT device structure reference on success; NULL, otherwise.
*
****************************************************************************/
static struct cap_lowerhalf_s *board_pcnt_init(
const char *devpath,
struct esp_pcnt_unit_config_s *unit_cfg,
struct esp_pcnt_chan_config_s *chan0_cfg,
struct esp_pcnt_chan_config_s *chan1_cfg,
uint32_t glitch_threshold)
{
struct cap_lowerhalf_s *pcnt;
int chan0;
int chan1;
int ret;
pcnt = esp_pcnt_new_unit(unit_cfg);
if (!pcnt)
{
syslog(LOG_ERR, "Failed to create unit!\n");
return NULL;
}
chan0 = esp_pcnt_new_channel(pcnt, chan0_cfg);
if (chan0 == ERROR)
{
syslog(LOG_ERR, "Failed to create channel!\n");
esp_pcnt_del_unit(pcnt);
return NULL;
}
#ifdef CONFIG_ESP_PCNT_TEST_MODE
esp_pcnt_channel_set_edge_action(chan0, ESP_PCNT_CHAN_EDGE_ACTION_HOLD,
ESP_PCNT_CHAN_EDGE_ACTION_INCREASE);
esp_pcnt_channel_set_level_action(chan0, ESP_PCNT_CHAN_LEVEL_ACTION_KEEP,
ESP_PCNT_CHAN_LEVEL_ACTION_KEEP);
#else
esp_pcnt_channel_set_edge_action(chan0, ESP_PCNT_CHAN_EDGE_ACTION_DECREASE,
ESP_PCNT_CHAN_EDGE_ACTION_INCREASE);
esp_pcnt_channel_set_level_action(chan0, ESP_PCNT_CHAN_LEVEL_ACTION_KEEP,
ESP_PCNT_CHAN_LEVEL_ACTION_INVERSE);
#endif
if (chan1_cfg)
{
chan1 = esp_pcnt_new_channel(pcnt, chan1_cfg);
if (chan1 == ERROR)
{
syslog(LOG_ERR, "Failed to create channel!\n");
esp_pcnt_del_channel(chan0);
esp_pcnt_del_unit(pcnt);
return NULL;
}
esp_pcnt_channel_set_edge_action(chan1,
ESP_PCNT_CHAN_EDGE_ACTION_INCREASE,
ESP_PCNT_CHAN_EDGE_ACTION_DECREASE);
esp_pcnt_channel_set_level_action(chan1,
ESP_PCNT_CHAN_LEVEL_ACTION_KEEP,
ESP_PCNT_CHAN_LEVEL_ACTION_INVERSE);
}
PCNT_GLITCH_FILTER(pcnt, glitch_threshold);
ret = cap_register(devpath, pcnt);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Error registering PCNT!\n");
esp_pcnt_del_channel(chan0);
if (chan1_cfg)
{
esp_pcnt_del_channel(chan1);
}
esp_pcnt_del_unit(pcnt);
return NULL;
}
return pcnt;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_pcnt_initialize
*
* Description:
* Initialize the pulse counter/quadrature encoder driver
*
* Input Parameters:
* None
*
* Returned Value:
* OK on success; errno on failure.
*
****************************************************************************/
int board_pcnt_initialize(void)
{
struct cap_lowerhalf_s *pcnt;
int ret = OK;
int glitch_threshold = 0;
#ifdef CONFIG_ESP_PCNT_AS_QE
char devpath[12];
int devno = 0;
#endif
struct esp_pcnt_unit_config_s unit_cfg =
{
.high_limit = PCNT_HIGH_LIMIT,
.low_limit = PCNT_LOW_LIMIT,
.accum_count = false,
};
struct esp_pcnt_chan_config_s chan0_cfg =
{
0
};
struct esp_pcnt_chan_config_s chan1_cfg =
{
0
};
#ifdef CONFIG_ESP_PCNT_U0
#ifdef CONFIG_ESP_PCNT_U0_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH0_LEVEL_PIN;
chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
#endif
#ifdef CONFIG_ESP_PCNT_TEST_MODE
chan0_cfg.flags = ESP_PCNT_CHAN_IO_LOOPBACK;
#endif
#ifndef CONFIG_ESP_PCNT_U0_FILTER_EN
glitch_threshold = 0;
#else
glitch_threshold = CONFIG_ESP_PCNT_U0_FILTER_THRES;
#endif
pcnt = board_pcnt_init("/dev/pcnt0", &unit_cfg, &chan0_cfg,
&chan1_cfg, glitch_threshold);
if (!pcnt)
{
syslog(LOG_ERR, "ERROR: pcnt initialize failed: %d\n", ret);
return ERROR;
}
#ifdef CONFIG_ESP_PCNT_U0_QE
snprintf(devpath, sizeof(devpath), "/dev/qe%d", devno++);
ret = esp_qeinitialize(devpath, pcnt, 0);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: esp_qeinitialize failed: %d\n", ret);
return ret;
}
pcnt = NULL;
#endif
#endif
#ifdef CONFIG_ESP_PCNT_U1
#ifdef CONFIG_ESP_PCNT_U1_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH1_LEVEL_PIN;
chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH0_LEVEL_PIN;
chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH1_LEVEL_PIN;
#endif
#ifndef CONFIG_ESP_PCNT_U1_FILTER_EN
glitch_threshold = 0;
#else
glitch_threshold = CONFIG_ESP_PCNT_U1_FILTER_THRES;
#endif
pcnt = board_pcnt_init("/dev/pcnt1", &unit_cfg, &chan0_cfg,
&chan1_cfg, glitch_threshold);
if (!pcnt)
{
syslog(LOG_ERR, "ERROR: pcnt initialize failed: %d\n", ret);
return ERROR;
}
#ifdef CONFIG_ESP_PCNT_U1_QE
snprintf(devpath, sizeof(devpath), "/dev/qe%d", devno++);
ret = esp_qeinitialize(devpath, pcnt, 1);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: esp_qeinitialize failed: %d\n", ret);
return ret;
}
pcnt = NULL;
#endif
#endif
#ifdef CONFIG_ESP_PCNT_U2
#ifdef CONFIG_ESP_PCNT_U2_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH1_LEVEL_PIN;
chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH0_LEVEL_PIN;
chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH1_LEVEL_PIN;
#endif
#ifndef CONFIG_ESP_PCNT_U2_FILTER_EN
glitch_threshold = 0;
#else
glitch_threshold = CONFIG_ESP_PCNT_U2_FILTER_THRES;
#endif
pcnt = board_pcnt_init("/dev/pcnt2", &unit_cfg, &chan0_cfg,
&chan1_cfg, glitch_threshold);
if (!pcnt)
{
syslog(LOG_ERR, "ERROR: pcnt initialize failed: %d\n", ret);
return ERROR;
}
#ifdef CONFIG_ESP_PCNT_U2_QE
snprintf(devpath, sizeof(devpath), "/dev/qe%d", devno++);
ret = esp_qeinitialize(devpath, pcnt, 2);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: esp_qeinitialize failed: %d\n", ret);
return ret;
}
pcnt = NULL;
#endif
#endif
#ifdef CONFIG_ESP_PCNT_U3
#ifdef CONFIG_ESP_PCNT_U3_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH1_LEVEL_PIN;
chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH0_LEVEL_PIN;
chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH1_LEVEL_PIN;
#endif
#ifndef CONFIG_ESP_PCNT_U3_FILTER_EN
glitch_threshold = 0;
#else
glitch_threshold = CONFIG_ESP_PCNT_U3_FILTER_THRES;
#endif
pcnt = board_pcnt_init("/dev/pcnt3", &unit_cfg, &chan0_cfg,
&chan1_cfg, glitch_threshold);
if (!pcnt)
{
syslog(LOG_ERR, "ERROR: pcnt initialize failed: %d\n", ret);
return ERROR;
}
#ifdef CONFIG_ESP_PCNT_U3_QE
snprintf(devpath, sizeof(devpath), "/dev/qe%d", devno++);
ret = esp_qeinitialize(devpath, pcnt, 3);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: esp_qeinitialize failed: %d\n", ret);
return ret;
}
pcnt = NULL;
#endif
#endif
return ret;
}

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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_rmt.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <stdio.h>
#include <nuttx/kmalloc.h>
#include <nuttx/rmt/rmtchar.h>
#ifdef CONFIG_WS2812_NON_SPI_DRIVER
#include <nuttx/leds/ws2812.h>
#include "espressif/esp_ws2812.h"
#endif
#include "espressif/esp_rmt.h"
#ifdef CONFIG_ESP_RMT
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_rmt_rxinitialize
*
* Description:
* Initialize the RMT peripheral and register an RX device.
*
* Input Parameters:
* pin - The pin used for the RX channel
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
int board_rmt_rxinitialize(int pin)
{
int ret;
struct rmt_dev_s *rmt = esp_rmt_rx_init(pin);
ret = rmtchar_register(rmt);
if (ret < 0)
{
rmterr("ERROR: rmtchar_register failed: %d\n", ret);
return ret;
}
return ret;
}
/****************************************************************************
* Name: board_rmt_txinitialize
*
* Description:
* Initialize the RMT peripheral and register an TX device.
*
* Input Parameters:
* pin - The pin used for the TX channel
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
int board_rmt_txinitialize(int pin)
{
int ret;
struct rmt_dev_s *rmt;
#ifdef CONFIG_WS2812_NON_SPI_DRIVER
struct ws2812_dev_s *led;
#endif
rmt = esp_rmt_tx_init(pin);
if (rmt == NULL)
{
rmterr("ERROR: esp_rmt_tx_init failed\n");
return -ENODEV;
}
ret = rmtchar_register(rmt);
if (ret < 0)
{
rmterr("ERROR: rmtchar_register failed: %d\n", ret);
return ret;
}
#ifdef CONFIG_WS2812_NON_SPI_DRIVER
led = esp_ws2812_setup("/dev/leds0", rmt, CONFIG_WS2812_LED_COUNT, false);
if (led == NULL)
{
rmterr("ERROR: esp_ws2812_setup failed\n");
return -ENODEV;
}
#endif
return ret;
}
#endif

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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_spi.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/spi/spi.h>
#include "espressif/esp_gpio.h"
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp_spi2_status
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_SPI2
uint8_t esp_spi2_status(struct spi_dev_s *dev, uint32_t devid)
{
uint8_t status = 0;
return status;
}
#endif
/****************************************************************************
* Name: esp_spi2_cmddata
****************************************************************************/
#if defined(CONFIG_ESPRESSIF_SPI2) && defined(CONFIG_SPI_CMDDATA)
int esp_spi2_cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
if (devid == SPIDEV_DISPLAY(0))
{
/* This is the Data/Command control pad which determines whether the
* data bits are data or a command.
*/
esp_gpiowrite(CONFIG_ESPRESSIF_SPI2_MISOPIN, !cmd);
return OK;
}
spiinfo("devid: %" PRIu32 " CMD: %s\n", devid, cmd ? "command" :
"data");
return -ENODEV;
}
#endif

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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_spidev.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/spi/spi_transfer.h>
#ifdef CONFIG_ESPRESSIF_SPI_PERIPH
#include "espressif/esp_spi.h"
#endif
#ifdef CONFIG_ESPRESSIF_SPI_BITBANG
#include "espressif/esp_spi_bitbang.h"
#endif
#include "esp_board_spidev.h"
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: spi_bitbang_driver_init
*
* Description:
* Initialize SPI bitbang driver and register the /dev/spi device.
*
* Input Parameters:
* port - The SPI bus number, used to build the device path as /dev/spiN
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_SPI_BITBANG
static int spi_bitbang_driver_init(int port)
{
int ret;
struct spi_dev_s *spi;
syslog(LOG_INFO, "Initializing /dev/spi%d...\n", port);
/* Initialize SPI device */
spi = esp_spi_bitbang_init();
if (spi == NULL)
{
syslog(LOG_ERR, "Failed to initialize SPI%d.\n", port);
return -ENODEV;
}
ret = spi_register(spi, port);
if (ret < 0)
{
syslog(LOG_ERR, "Failed to register /dev/spi%d: %d\n", port, ret);
esp_spi_bitbang_uninitialize(spi);
}
return ret;
}
#endif
/****************************************************************************
* Name: spi_driver_init
*
* Description:
* Initialize SPI driver and register the /dev/spi device.
*
* Input Parameters:
* port - The SPI bus number, used to build the device path as /dev/spiN
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_SPI_PERIPH
static int spi_driver_init(int port)
{
int ret = OK;
struct spi_dev_s *spi;
syslog(LOG_INFO, "Initializing /dev/spi%d...\n", port);
/* Initialize SPI device */
spi = esp_spibus_initialize(port);
if (spi == NULL)
{
syslog(LOG_ERR, "Failed to initialize SPI%d.\n", port);
return -ENODEV;
}
ret = spi_register(spi, port);
if (ret < 0)
{
syslog(LOG_ERR, "Failed to register /dev/spi%d: %d\n", port, ret);
esp_spibus_uninitialize(spi);
}
return ret;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_spidev_initialize
*
* Description:
* Configure the SPI drivers.
*
* Input Parameters:
* port - The SPI bus number, used to build the device path as /dev/spiN
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
int board_spidev_initialize(int port)
{
int ret = OK;
switch (port)
{
#ifdef CONFIG_ESPRESSIF_SPI2
case ESPRESSIF_SPI2:
{
ret = spi_driver_init(ESPRESSIF_SPI2);
if (ret != OK)
{
return ret;
}
break;
}
#endif
#ifdef CONFIG_ESPRESSIF_SPI_BITBANG
case ESPRESSIF_SPI_BITBANG:
{
ret = spi_bitbang_driver_init(ESPRESSIF_SPI_BITBANG);
if (ret != OK)
{
return ret;
}
break;
}
#endif
default:
{
wderr("ERROR: unsupported SPI %d\n", port);
return ERROR;
}
}
return ret;
}

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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_spiflash.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/mount.h>
#include "inttypes.h"
#include <stdbool.h>
#include <stdlib.h>
#include <stdio.h>
#include <assert.h>
#include <errno.h>
#include <debug.h>
#include <sys/param.h>
#include <nuttx/kmalloc.h>
#include <nuttx/spi/spi.h>
#include <nuttx/mtd/mtd.h>
#include <nuttx/mtd/configdata.h>
#include <nuttx/fs/nxffs.h>
#ifdef CONFIG_BCH
#include <nuttx/drivers/drivers.h>
#endif
#include "espressif/esp_spiflash.h"
#include "espressif/esp_spiflash_mtd.h"
#include "esp_board_spiflash.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: setup_smartfs
*
* Description:
* Provide a block driver wrapper around MTD partition and mount a
* SMART FS over it.
*
* Parameters:
* smartn - Number used to register the mtd partition: /dev/smartx, where
* x = smartn.
* mtd - Pointer to a pre-allocated mtd partition.
* mnt_pt - Mount point
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
#if defined (CONFIG_ESPRESSIF_SPIFLASH_SMARTFS)
static int setup_smartfs(int smartn, struct mtd_dev_s *mtd,
const char *mnt_pt)
{
int ret = OK;
char path[22];
ret = smart_initialize(smartn, mtd, NULL);
if (ret < 0)
{
syslog(LOG_INFO, "smart_initialize failed, "
"Trying to erase first...\n");
ret = mtd->ioctl(mtd, MTDIOC_BULKERASE, 0);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: ioctl(BULKERASE) failed: %d\n", ret);
return ret;
}
syslog(LOG_INFO, "Erase successful, initializing it again.\n");
ret = smart_initialize(smartn, mtd, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: smart_initialize failed: %d\n", ret);
return ret;
}
}
if (mnt_pt != NULL)
{
snprintf(path, sizeof(path), "/dev/smart%d", smartn);
ret = nx_mount(path, mnt_pt, "smartfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount the FS volume: %d\n", ret);
if (ret == -ENODEV)
{
syslog(LOG_WARNING, "Smartfs seems unformatted. "
"Did you run 'mksmartfs /dev/smart%d'?\n", smartn);
}
return ret;
}
}
return ret;
}
#endif
/****************************************************************************
* Name: setup_littlefs
*
* Description:
* Register a mtd driver and mount a Little FS over it.
*
* Parameters:
* path - Path name used to register the mtd driver.
* mtd - Pointer to a pre-allocated mtd partition.
* mnt_pt - Mount point
* priv - Privileges
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
#if defined (CONFIG_ESPRESSIF_SPIFLASH_LITTLEFS)
static int setup_littlefs(const char *path, struct mtd_dev_s *mtd,
const char *mnt_pt, int priv)
{
int ret = OK;
ret = register_mtddriver(path, mtd, priv, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to register MTD: %d\n", ret);
return ERROR;
}
if (mnt_pt != NULL)
{
ret = nx_mount(path, mnt_pt, "littlefs", 0, NULL);
if (ret < 0)
{
ret = nx_mount(path, mnt_pt, "littlefs", 0, "forceformat");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount the FS volume: %d\n",
ret);
return ret;
}
}
}
return OK;
}
#endif
/****************************************************************************
* Name: setup_spiffs
*
* Description:
* Register a mtd driver and mount a SPIFFS over it.
*
* Parameters:
* path - Path name used to register the mtd driver.
* mtd - Pointer to a pre-allocated mtd partition.
* mnt_pt - Mount point
* priv - Privileges
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
#if defined (CONFIG_ESPRESSIF_SPIFLASH_SPIFFS)
static int setup_spiffs(const char *path, struct mtd_dev_s *mtd,
const char *mnt_pt, int priv)
{
int ret = OK;
ret = register_mtddriver(path, mtd, priv, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to register MTD: %d\n", ret);
return ERROR;
}
if (mnt_pt != NULL)
{
ret = nx_mount(path, mnt_pt, "spiffs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount the FS volume: %d\n", ret);
return ret;
}
}
return ret;
}
#endif
/****************************************************************************
* Name: setup_nxffs
*
* Description:
* Register a mtd driver and mount a NXFFS over it.
*
* Parameters:
* mtd - Pointer to a pre-allocated mtd partition.
* mnt_pt - Mount point
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
#if defined (CONFIG_ESPRESSIF_SPIFLASH_NXFFS)
static int setup_nxffs(struct mtd_dev_s *mtd, const char *mnt_pt)
{
int ret = OK;
ret = nxffs_initialize(mtd);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: NXFFS init failed: %d\n", ret);
return ret;
}
if (mnt_pt != NULL)
{
ret = nx_mount(NULL, mnt_pt, "nxffs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount the FS volume: %d\n", ret);
return ret;
}
}
return ret;
}
#endif
/****************************************************************************
* Name: init_storage_partition
*
* Description:
* Initialize partition that is dedicated to general use.
*
* Input Parameters:
* None
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
static int init_storage_partition(void)
{
int ret = OK;
struct mtd_dev_s *mtd;
mtd = esp_spiflash_alloc_mtdpart(CONFIG_ESPRESSIF_STORAGE_MTD_OFFSET,
CONFIG_ESPRESSIF_STORAGE_MTD_SIZE);
if (!mtd)
{
syslog(LOG_ERR, "ERROR: Failed to alloc MTD partition of SPI Flash\n");
return ERROR;
}
#if defined (CONFIG_ESPRESSIF_SPIFLASH_SMARTFS)
ret = setup_smartfs(0, mtd, CONFIG_ESPRESSIF_SPIFLASH_FS_MOUNT_PT);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to setup smartfs\n");
return ret;
}
#elif defined (CONFIG_ESPRESSIF_SPIFLASH_NXFFS)
ret = setup_nxffs(mtd, CONFIG_ESPRESSIF_SPIFLASH_FS_MOUNT_PT);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to setup nxffs\n");
return ret;
}
#elif defined (CONFIG_ESPRESSIF_SPIFLASH_LITTLEFS)
const char *path = "/dev/espflash";
ret = setup_littlefs(path, mtd, CONFIG_ESPRESSIF_SPIFLASH_FS_MOUNT_PT,
0755);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to setup littlefs\n");
return ret;
}
#elif defined (CONFIG_ESPRESSIF_SPIFLASH_SPIFFS)
const char *path = "/dev/espflash";
ret = setup_spiffs(path, mtd, CONFIG_ESPRESSIF_SPIFLASH_FS_MOUNT_PT, 0755);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to setup spiffs\n");
return ret;
}
#elif defined (CONFIG_ESPRESSIF_SPIFLASH_MTD_CONFIG)
# if defined (CONFIG_TESTING_MTD_CONFIG_FAIL_SAFE)
/* To test power-loss resilient kv system,
* we write possible power-loss flash layout into flash
* then start kv system to see if it recovers.
* To do so, we need a mtd driver so that test code can
* write into flash.
*/
const char *path = CONFIG_TESTING_MTD_CONFIG_FAIL_SAFE_MOUNTPT_NAME;
ret = register_mtddriver(path, mtd, 0777, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to register MTD: %d\n", ret);
return ret;
}
# else
ret = mtdconfig_register(mtd);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to setup mtd config\n");
return ret;
}
# endif
#else
ret = register_mtddriver("/dev/espflash", mtd, 0755, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to register MTD: %d\n", ret);
return ret;
}
ret = ftl_initialize(0, mtd);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to initialize the FTL layer: %d\n",
ret);
return ret;
}
#endif
return ret;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_spiflash_init
*
* Description:
* Initialize the SPI Flash and register the MTD device.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
int board_spiflash_init(void)
{
int ret = OK;
ret = init_storage_partition();
if (ret < 0)
{
return ret;
}
return ret;
}

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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_spislavedev.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/spi/slave.h>
#include "espressif/esp_spi.h"
#include "esp_board_spislavedev.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_spislavedev_initialize
*
* Description:
* Initialize SPI Slave driver and register the /dev/spislv device.
*
* Input Parameters:
* bus - The SPI bus number, used to build the device path as /dev/spislvN
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
int board_spislavedev_initialize(int bus)
{
int ret;
struct spi_slave_ctrlr_s *ctrlr;
spiinfo("Initializing /dev/spislv%d...\n", bus);
/* Initialize SPI Slave controller device */
ctrlr = esp_spislave_ctrlr_initialize(bus);
if (ctrlr == NULL)
{
spierr("Failed to initialize SPI%d as slave.\n", bus);
return -ENODEV;
}
ret = spi_slave_register(ctrlr, bus);
if (ret < 0)
{
spierr("Failed to register /dev/spislv%d: %d\n", bus, ret);
esp_spislave_ctrlr_uninitialize(ctrlr);
}
return ret;
}

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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_twai.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/can/can.h>
#include <arch/board/board.h>
#include "espressif/esp_twai.h"
#ifdef CONFIG_CAN
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_twai_setup
*
* Description:
* Initialize TWAI and register the TWAI device
*
* Input Parameters:
* port - Port number (for hardware that has multiple TWAI interfaces)
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned on
* any failure.
*
****************************************************************************/
int board_twai_setup(int port)
{
#ifdef CONFIG_ESPRESSIF_TWAI
struct can_dev_s *twai;
int ret;
/* Call esp_twaiinitialize() to get an instance of the TWAI
* interface
* */
twai = esp_twaiinitialize(port);
if (twai == NULL)
{
canerr("ERROR: Failed to get TWAI interface\n");
return -ENODEV;
}
#ifdef CONFIG_ESPRESSIF_TWAI0
/* Register the TWAI driver at "/dev/can0" */
ret = can_register("/dev/can0", twai);
if (ret < 0)
{
canerr("ERROR: TWAI0 register failed: %d\n", ret);
return ret;
}
#endif /* CONFIG_ESPRESSIF_TWAI0 */
#ifdef CONFIG_ESPRESSIF_TWAI1
/* Register the TWAI driver at "/dev/can1" */
ret = can_register("/dev/can1", twai);
if (ret < 0)
{
canerr("ERROR: TWAI1 register failed: %d\n", ret);
return ret;
}
#endif /* CONFIG_ESPRESSIF_TWAI1 */
return OK;
#else
return -ENODEV;
#endif
}
#endif /* CONFIG_CAN */

8
boards/risc-v/esp32p4/esp32p4-function-ev-board/Kconfig Normal file
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@ -0,0 +1,8 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD
endif # ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD

51
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/adc/defconfig Normal file
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@ -0,0 +1,51 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESPRESSIF_ADC=y
CONFIG_EXAMPLES_ADC=y
CONFIG_EXAMPLES_ADC_SWTRIG=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

52
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/bmp180/defconfig Normal file
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@ -0,0 +1,52 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESPRESSIF_I2C0=y
CONFIG_EXAMPLES_BMP180=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_SENSORS=y
CONFIG_SENSORS_BMP180=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

54
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/buttons/defconfig Normal file
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@ -0,0 +1,54 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESPRESSIF_GPIO_IRQ=y
CONFIG_EXAMPLES_BUTTONS=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INPUT=y
CONFIG_INPUT_BUTTONS=y
CONFIG_INPUT_BUTTONS_LOWER=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_UART0_SERIAL_CONSOLE=y

52
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/capture/defconfig Normal file
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@ -0,0 +1,52 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESP_MCPWM=y
CONFIG_ESP_MCPWM_CAPTURE=y
CONFIG_ESP_MCPWM_CAPTURE_CH0=y
CONFIG_ESP_MCPWM_CAPTURE_CH0_GPIO=12
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

59
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/crypto/defconfig Normal file
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@ -0,0 +1,59 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_TESTING_CRYPTO_3DES_CBC is not set
# CONFIG_TESTING_CRYPTO_AES_CBC is not set
# CONFIG_TESTING_CRYPTO_AES_CTR is not set
# CONFIG_TESTING_CRYPTO_AES_XTS is not set
CONFIG_ALLOW_BSD_COMPONENTS=y
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_CRYPTO=y
CONFIG_CRYPTO_CRYPTODEV=y
CONFIG_CRYPTO_CRYPTODEV_HARDWARE=y
CONFIG_CRYPTO_RANDOM_POOL=y
CONFIG_ESPRESSIF_SHA_ACCELERATOR=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_CRYPTO=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

50
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/efuse/defconfig Normal file
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@ -0,0 +1,50 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_EFUSE=y
CONFIG_ESPRESSIF_EFUSE=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

49
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/gpio/defconfig Normal file
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@ -0,0 +1,49 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_DEV_GPIO=y
CONFIG_ESPRESSIF_GPIO_IRQ=y
CONFIG_EXAMPLES_GPIO=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_UART0_SERIAL_CONSOLE=y

53
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/i2c/defconfig Normal file
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@ -0,0 +1,53 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESPRESSIF_I2C0=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_I2CTOOL_DEFFREQ=100000
CONFIG_I2CTOOL_MAXBUS=1
CONFIG_I2C_TRACE=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_I2CTOOL=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

66
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/i2schar/defconfig Normal file
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@ -0,0 +1,66 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_AUDIO=y
CONFIG_AUDIO_I2S=y
CONFIG_AUDIO_I2SCHAR=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_DRIVERS_AUDIO=y
CONFIG_ESPRESSIF_I2S0=y
CONFIG_ESPRESSIF_I2S0_DINPIN=10
CONFIG_ESPRESSIF_I2S0_DOUTPIN=10
CONFIG_ESPRESSIF_I2S0_MCLK=y
CONFIG_ESPRESSIF_I2S0_MCLKPIN=21
CONFIG_ESPRESSIF_MERGE_BINS=y
CONFIG_EXAMPLES_I2SCHAR=y
CONFIG_EXAMPLES_I2SCHAR_BUFSIZE=1024
CONFIG_EXAMPLES_I2SCHAR_RX=y
CONFIG_EXAMPLES_I2SCHAR_TX=y
CONFIG_EXAMPLES_I2SCHAR_TXBUFFERS=2
CONFIG_EXAMPLES_I2SCHAR_TXSTACKSIZE=4096
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INIT_STACKSIZE=4096
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

52
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/motor/defconfig Normal file
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@ -0,0 +1,52 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESP_MCPWM=y
CONFIG_ESP_MCPWM_MOTOR=y
CONFIG_ESP_MCPWM_MOTOR_BDC=y
CONFIG_ESP_MCPWM_MOTOR_CH0=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

48
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/nsh/defconfig Normal file
View file

@ -0,0 +1,48 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

47
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/ostest/defconfig Normal file
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@ -0,0 +1,47 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

50
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/pwm/defconfig Normal file
View file

@ -0,0 +1,50 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESPRESSIF_LEDC=y
CONFIG_ESPRESSIF_LEDC_TIMER0=y
CONFIG_EXAMPLES_PWM=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_FLOATINGPOINT=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_UART0_SERIAL_CONSOLE=y

57
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/qencoder/defconfig Normal file
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@ -0,0 +1,57 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESP_PCNT=y
CONFIG_ESP_PCNT_U0=y
CONFIG_ESP_PCNT_U0_CH0_EDGE_PIN=10
CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN=11
CONFIG_ESP_PCNT_U0_FILTER_EN=y
CONFIG_ESP_PCNT_U0_QE=y
CONFIG_EXAMPLES_QENCODER=y
CONFIG_EXAMPLES_QENCODER_DELAY=1000
CONFIG_EXAMPLES_QENCODER_NSAMPLES=20
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

49
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/random/defconfig Normal file
View file

@ -0,0 +1,49 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_DEV_URANDOM=y
CONFIG_EXAMPLES_RANDOM=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=3
CONFIG_START_YEAR=2023
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

60
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/rmt/defconfig Normal file
View file

@ -0,0 +1,60 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESP_RMT=y
CONFIG_EXAMPLES_RMTCHAR=y
CONFIG_EXAMPLES_RMTCHAR_RX=y
CONFIG_EXAMPLES_RMTCHAR_RX_DEVPATH="/dev/rmt4"
CONFIG_EXAMPLES_RMTCHAR_TX=y
CONFIG_EXAMPLES_WS2812=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RMT=y
CONFIG_RMTCHAR=y
CONFIG_RMT_DEFAULT_RX_BUFFER_SIZE=512
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_WS2812=y
CONFIG_WS2812_LED_COUNT=100
CONFIG_WS2812_NON_SPI_DRIVER=y

53
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/rtc/defconfig Normal file
View file

@ -0,0 +1,53 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=1536
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_EXAMPLES_ALARM=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_DATE=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_RTC=y
CONFIG_RTC_ALARM=y
CONFIG_RTC_DRIVER=y
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=5
CONFIG_START_MONTH=4
CONFIG_START_YEAR=2023
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

50
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/sdm/defconfig Normal file
View file

@ -0,0 +1,50 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESP_SDM=y
CONFIG_EXAMPLES_DAC=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

52
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/spi/defconfig Normal file
View file

@ -0,0 +1,52 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESPRESSIF_SPI2=y
CONFIG_ESPRESSIF_SPI2_CSPIN=15
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_SPITOOL_MINBUS=2
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_SPITOOL=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

56
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/spiflash/defconfig Normal file
View file

@ -0,0 +1,56 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESPRESSIF_SPIFLASH=y
CONFIG_ESPRESSIF_SPIFLASH_SMARTFS=y
CONFIG_ESPRESSIF_STORAGE_MTD_OFFSET=0x110000
CONFIG_ESPRESSIF_STORAGE_MTD_SIZE=0xf0000
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NAME_MAX=48
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_LOSMART=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_SMARTFS_MAXNAMLEN=48
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_FLASH_ERASEALL=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_FSTEST=y
CONFIG_TESTING_FSTEST_MOUNTPT="/mnt"
CONFIG_UART0_SERIAL_CONSOLE=y

59
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/spislv/defconfig Normal file
View file

@ -0,0 +1,59 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESPRESSIF_DMA=y
CONFIG_ESPRESSIF_MERGE_BINS=y
CONFIG_ESPRESSIF_SPI2=y
CONFIG_ESPRESSIF_SPI2_CSPIN=22
CONFIG_ESPRESSIF_SPI2_SLAVE=y
CONFIG_ESPRESSIF_SPI_BITBANG=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXAMPLES_SPISLV=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_SPI_DRIVER=y
CONFIG_SPI_SLAVE=y
CONFIG_SPI_SLAVE_DRIVER=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

52
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/temperature_sensor/defconfig Normal file
View file

@ -0,0 +1,52 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESPRESSIF_TEMP=y
CONFIG_ESPRESSIF_TEMP_UORB=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_SENSORS=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_SENSORTEST=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

49
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/tickless/defconfig Normal file
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#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_TICKLESS=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_USEC_PER_TICK=10000

51
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/timers/defconfig Normal file
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#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=1536
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_EXAMPLES_ONESHOT=y
CONFIG_EXAMPLES_TIMER=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_ONESHOT=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=28
CONFIG_START_MONTH=3
CONFIG_START_YEAR=2023
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_TIMER=y
CONFIG_UART0_SERIAL_CONSOLE=y

50
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/twai/defconfig Normal file
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#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESPRESSIF_TWAI0=y
CONFIG_EXAMPLES_CAN=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

48
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/usbconsole/defconfig Normal file
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#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ESPRESSIF_UART0 is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESPRESSIF_USBSERIAL=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y

50
boards/risc-v/esp32p4/esp32p4-function-ev-board/configs/watchdog/defconfig Normal file
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#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32p4-function-ev-board"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD=y
CONFIG_ARCH_CHIP="esp32p4"
CONFIG_ARCH_CHIP_ESP32P4=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQ_TO_NDX=y
CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
CONFIG_ARCH_NUSER_INTERRUPTS=17
CONFIG_ARCH_RISCV=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_ESPRESSIF_MWDT0=y
CONFIG_ESPRESSIF_MWDT1=y
CONFIG_EXAMPLES_WATCHDOG=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y

41
boards/risc-v/esp32p4/esp32p4-function-ev-board/include/board.h Normal file
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/****************************************************************************
* boards/risc-v/esp32p4/esp32p4-function-ev-board/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_ESP32P4_FUNCTION_EV_BOARD_INCLUDE_BOARD_H
#define __BOARDS_RISCV_ESP32P4_ESP32P4_FUNCTION_EV_BOARD_INCLUDE_BOARD_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* GPIO pins used by the GPIO Subsystem */
#define BOARD_NGPIOOUT 2 /* Amount of GPIO Output pins */
#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */
/* ESP32P4-Generic GPIOs ****************************************************/
/* BOOT Button */
#define BUTTON_BOOT 35
#endif /* __BOARDS_RISCV_ESP32P4_ESP32P4_FUNCTION_EV_BOARD_INCLUDE_BOARD_H */

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boards/risc-v/esp32p4/esp32p4-function-ev-board/scripts/Make.defs Normal file
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############################################################################
# boards/risc-v/esp32p4/esp32p4-function-ev-board/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
###########################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/tools/espressif/Config.mk
include $(TOPDIR)/arch/risc-v/src/common/Toolchain.defs
# Remove quotes from CONFIG_ESPRESSIF_CHIP_SERIES configuration
CHIP_SERIES = $(patsubst "%",%,$(CONFIG_ESPRESSIF_CHIP_SERIES))
# Pick the linker scripts from the board level if they exist, if not
# pick the common linker scripts.
ARCHSCRIPT += $(BOARD_COMMON_DIR)/scripts/$(CHIP_SERIES)_aliases.ld
ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_flat_memory.ld)
ifeq ($(CONFIG_ESP32P4_REV_MIN_300),y)
BOARD_REV = .rev3
endif
ifeq ($(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_sections$(BOARD_REV).ld)
else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_sections$(BOARD_REV).ld)
endif
ARCHPICFLAGS = -fpic
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -Werror=return-type
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
# Loadable module definitions
LDMODULEFLAGS += -melf32lriscv
# ELF module definitions
LDELFFLAGS += -melf32lriscv

45
boards/risc-v/esp32p4/esp32p4-function-ev-board/src/Make.defs Normal file
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#############################################################################
# boards/risc-v/esp32p4/esp32p4-function-ev-board/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
#############################################################################
include $(TOPDIR)/Make.defs
CSRCS = esp32p4_boot.c esp32p4_bringup.c
ifeq ($(CONFIG_BOARDCTL),y)
CSRCS += esp32p4_appinit.c
ifeq ($(CONFIG_BOARDCTL_RESET),y)
CSRCS += esp32p4_reset.c
endif
endif
ifeq ($(CONFIG_DEV_GPIO),y)
CSRCS += esp32p4_gpio.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += esp32p4_buttons.c
endif
DEPPATH += --dep-path board
VPATH += :board
CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board

121
boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4-function-ev-board.h Normal file
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/****************************************************************************
* boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4-function-ev-board.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_ESP32P4_FUNCTION_EV_BOARD_SRC_ESP32P4_FUNCTION_EV_BOARD_H
#define __BOARDS_RISCV_ESP32P4_ESP32P4_FUNCTION_EV_BOARD_SRC_ESP32P4_FUNCTION_EV_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* RMT gpio */
#define RMT_RXCHANNEL 4
#define RMT_TXCHANNEL 0
#ifdef CONFIG_RMT_LOOP_TEST_MODE
# define RMT_INPUT_PIN 0
# define RMT_OUTPUT_PIN 0
#else
# define RMT_INPUT_PIN 2
# define RMT_OUTPUT_PIN 8
#endif
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: esp_bringup
*
* Description:
* Perform architecture-specific initialization.
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_BOARDCTL=y :
* Called from the NSH library via board_app_initialize().
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned on
* any failure.
*
****************************************************************************/
int esp_bringup(void);
/****************************************************************************
* Name: board_twai_setup
*
* Description:
* Initialize TWAI and register the TWAI device
*
* Input Parameters:
* port - Port number (for hardware that has multiple TWAI interfaces)
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned on
* any failure.
*
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_TWAI
int board_twai_setup(int port);
#endif
/****************************************************************************
* Name: esp_gpio_init
*
* Description:
* Configure the GPIO driver.
*
* Returned Value:
* Zero (OK).
*
****************************************************************************/
#ifdef CONFIG_DEV_GPIO
int esp_gpio_init(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32P4_ESP32P4_FUNCTION_EV_BOARD_SRC_ESP32P4_FUNCTION_EV_BOARD_H */

83
boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_appinit.c Normal file
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/****************************************************************************
* boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_appinit.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/board.h>
#include "esp32p4-function-ev-board.h"
#ifdef CONFIG_BOARDCTL
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
#ifdef CONFIG_BOARD_LATE_INITIALIZE
/* Board initialization already performed by board_late_initialize() */
return OK;
#else
/* Perform board-specific initialization */
return esp_bringup();
#endif
}
#endif /* CONFIG_BOARDCTL */

89
boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_boot.c Normal file
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/****************************************************************************
* boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_boot.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp_board_initialize
*
* Description:
* All Espressif boards must provide the following entry point.
* This entry point is called early in the initialization -- after all
* memory has been configured and mapped but before any devices have been
* initialized.
*
* Input Parameters:
* None.
*
* Returned Value:
* None.
*
****************************************************************************/
void esp_board_initialize(void)
{
}
/****************************************************************************
* Name: board_late_initialize
*
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will
* be called immediately after up_initialize() is called and just before
* the initial application is started. This additional initialization
* phase may be used, for example, to initialize board-specific device
* drivers.
*
* Input Parameters:
* None.
*
* Returned Value:
* None.
*
****************************************************************************/
#ifdef CONFIG_BOARD_LATE_INITIALIZE
void board_late_initialize(void)
{
/* Perform board-specific initialization */
esp_bringup();
}
#endif

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/****************************************************************************
* boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_bringup.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <fcntl.h>
#include <syslog.h>
#include <sys/ioctl.h>
#include <sys/stat.h>
#include <sys/types.h>
#include <unistd.h>
#include <nuttx/fs/fs.h>
#include "esp_board_ledc.h"
#include "esp_board_spiflash.h"
#include "esp_board_i2c.h"
#include "esp_board_bmp180.h"
#include "espressif/esp_start.h"
#ifdef CONFIG_WATCHDOG
# include "espressif/esp_wdt.h"
#endif
#ifdef CONFIG_TIMER
# include "espressif/esp_timer.h"
#endif
#ifdef CONFIG_ONESHOT
# include "espressif/esp_oneshot.h"
#endif
#ifdef CONFIG_RTC_DRIVER
# include "espressif/esp_rtc.h"
#endif
#ifdef CONFIG_DEV_GPIO
# include "espressif/esp_gpio.h"
#endif
#ifdef CONFIG_INPUT_BUTTONS
# include <nuttx/input/buttons.h>
#endif
#ifdef CONFIG_ESPRESSIF_EFUSE
# include "espressif/esp_efuse.h"
#endif
#ifdef CONFIG_ESP_RMT
# include "esp_board_rmt.h"
#endif
#ifdef CONFIG_ESPRESSIF_I2S
# include "esp_board_i2s.h"
#endif
#ifdef CONFIG_ESPRESSIF_SPI
# include "espressif/esp_spi.h"
# include "esp_board_spidev.h"
# ifdef CONFIG_ESPRESSIF_SPI_BITBANG
# include "espressif/esp_spi_bitbang.h"
# endif
#endif
#ifdef CONFIG_SPI_SLAVE_DRIVER
# include "espressif/esp_spi.h"
# include "esp_board_spislavedev.h"
#endif
#ifdef CONFIG_ESPRESSIF_TEMP
# include "espressif/esp_temperature_sensor.h"
#endif
#ifdef CONFIG_ESP_MCPWM
# include "esp_board_mcpwm.h"
#endif
#ifdef CONFIG_ESP_PCNT
# include "espressif/esp_pcnt.h"
# include "esp_board_pcnt.h"
#endif
#ifdef CONFIG_ESPRESSIF_ADC
# include "esp_board_adc.h"
#endif
#ifdef CONFIG_SYSTEM_NXDIAG_ESPRESSIF_CHIP_WO_TOOL
# include "espressif/esp_nxdiag.h"
#endif
#ifdef CONFIG_ESP_SDM
# include "espressif/esp_sdm.h"
#endif
#include "esp32p4-function-ev-board.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp_bringup
*
* Description:
* Perform architecture-specific initialization.
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_BOARDCTL=y :
* Called from the NSH library via board_app_initialize().
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned on
* any failure.
*
****************************************************************************/
int esp_bringup(void)
{
int ret = OK;
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */
ret = nx_mount(NULL, "/proc", "procfs", 0, NULL);
if (ret < 0)
{
_err("Failed to mount procfs at /proc: %d\n", ret);
}
#endif
#ifdef CONFIG_FS_TMPFS
/* Mount the tmpfs file system */
ret = nx_mount(NULL, CONFIG_LIBC_TMPDIR, "tmpfs", 0, NULL);
if (ret < 0)
{
_err("Failed to mount tmpfs at %s: %d\n", CONFIG_LIBC_TMPDIR, ret);
}
#endif
#if defined(CONFIG_ESPRESSIF_EFUSE)
ret = esp_efuse_initialize("/dev/efuse");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to init EFUSE: %d\n", ret);
}
#endif
#ifdef CONFIG_ESPRESSIF_MWDT0
ret = esp_wdt_initialize("/dev/watchdog0", ESP_WDT_MWDT0);
if (ret < 0)
{
_err("Failed to initialize WDT: %d\n", ret);
}
#endif
#ifdef CONFIG_ESPRESSIF_MWDT1
ret = esp_wdt_initialize("/dev/watchdog1", ESP_WDT_MWDT1);
if (ret < 0)
{
_err("Failed to initialize WDT: %d\n", ret);
}
#endif
#ifdef CONFIG_ESPRESSIF_RWDT
ret = esp_wdt_initialize("/dev/watchdog2", ESP_WDT_RWDT);
if (ret < 0)
{
_err("Failed to initialize WDT: %d\n", ret);
}
#endif
#ifdef CONFIG_TIMER
ret = esp_timer_initialize(0);
if (ret < 0)
{
_err("Failed to initialize Timer 0: %d\n", ret);
}
#ifndef CONFIG_ONESHOT
ret = esp_timer_initialize(1);
if (ret < 0)
{
_err("Failed to initialize Timer 1: %d\n", ret);
}
#endif
#endif
#ifdef CONFIG_ONESHOT
ret = esp_oneshot_initialize();
if (ret < 0)
{
_err("Failed to initialize Oneshot Timer: %d\n", ret);
}
#endif
#ifdef CONFIG_ESP_RMT
ret = board_rmt_txinitialize(RMT_OUTPUT_PIN);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: board_rmt_txinitialize() failed: %d\n", ret);
}
ret = board_rmt_rxinitialize(RMT_INPUT_PIN);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: board_rmt_txinitialize() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_RTC_DRIVER
/* Initialize the RTC driver */
ret = esp_rtc_driverinit();
if (ret < 0)
{
_err("Failed to initialize the RTC driver: %d\n", ret);
}
#endif
#ifdef CONFIG_ESPRESSIF_SPI
# ifdef CONFIG_ESPRESSIF_SPI_SLAVE
ret = board_spislavedev_initialize(ESPRESSIF_SPI2);
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize SPI%d Slave driver: %d\n",
ESPRESSIF_SPI2, ret);
}
# else
ret = board_spidev_initialize(ESPRESSIF_SPI2);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to init spidev 2: %d\n", ret);
}
# endif
# ifdef CONFIG_ESPRESSIF_SPI_BITBANG
ret = board_spidev_initialize(ESPRESSIF_SPI_BITBANG);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to init spidev 3: %d\n", ret);
}
# endif /* CONFIG_ESPRESSIF_SPI_BITBANG */
#endif /* CONFIG_ESPRESSIF_SPI */
#ifdef CONFIG_ESPRESSIF_SPIFLASH
ret = board_spiflash_init();
if (ret)
{
syslog(LOG_ERR, "ERROR: Failed to initialize SPI Flash\n");
}
#endif
#if defined(CONFIG_ESPRESSIF_I2S)
/* Configure I2S peripheral interfaces */
ret = board_i2s_init();
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize I2S driver: %d\n", ret);
}
#endif
#if defined(CONFIG_I2C_DRIVER)
/* Configure I2C peripheral interfaces */
ret = board_i2c_init();
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize I2C driver: %d\n", ret);
}
#endif
#ifdef CONFIG_SENSORS_BMP180
/* Try to register BMP180 device in I2C0 */
ret = board_bmp180_initialize(0);
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize BMP180 "
"Driver for I2C0: %d\n", ret);
}
#endif
#ifdef CONFIG_ESP_SDM
struct esp_sdm_chan_config_s config =
{
.gpio_num = 5,
.sample_rate_hz = 1000 * 1000,
.flags = 0,
};
struct dac_dev_s *dev = esp_sdminitialize(config);
ret = dac_register("/dev/dac0", dev);
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize DAC driver: %d\n",
ret);
}
#endif
#ifdef CONFIG_ESPRESSIF_TEMP
struct esp_temp_sensor_config_t cfg = TEMPERATURE_SENSOR_CONFIG(10, 50);
ret = esp_temperature_sensor_initialize(cfg);
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize temperature sensor driver: %d\n",
ret);
}
#endif
#ifdef CONFIG_ESPRESSIF_TWAI0
/* Initialize TWAI and register the TWAI driver. */
ret = board_twai_setup(0);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: TWAI0 board_twai_setup failed: %d\n", ret);
}
#endif
#ifdef CONFIG_ESPRESSIF_TWAI1
/* Initialize TWAI and register the TWAI driver. */
ret = board_twai_setup(1);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: TWAI1 board_twai_setup failed: %d\n", ret);
}
#endif
#ifdef CONFIG_DEV_GPIO
ret = esp_gpio_init();
if (ret < 0)
{
ierr("Failed to initialize GPIO Driver: %d\n", ret);
}
#endif
#if defined(CONFIG_INPUT_BUTTONS) && defined(CONFIG_INPUT_BUTTONS_LOWER)
/* Register the BUTTON driver */
ret = btn_lower_initialize("/dev/buttons");
if (ret < 0)
{
ierr("ERROR: btn_lower_initialize() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_ESPRESSIF_LEDC
ret = board_ledc_setup();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: board_ledc_setup() failed: %d\n", ret);
}
#endif /* CONFIG_ESPRESSIF_LEDC */
#ifdef CONFIG_ESP_MCPWM_CAPTURE
ret = board_capture_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: board_capture_initialize failed: %d\n", ret);
}
#endif
#ifdef CONFIG_ESP_MCPWM_MOTOR
ret = board_motor_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: board_motor_initialize failed: %d\n", ret);
}
#endif
#ifdef CONFIG_ESP_PCNT
ret = board_pcnt_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: board_pcnt_initialize failed: %d\n", ret);
}
#endif
#ifdef CONFIG_SYSTEM_NXDIAG_ESPRESSIF_CHIP_WO_TOOL
ret = esp_nxdiag_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: esp_nxdiag_initialize failed: %d\n", ret);
}
#endif
#ifdef CONFIG_ESPRESSIF_ADC
ret = board_adc_init();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: board_adc_init failed: %d\n", ret);
}
#endif
/* If we got here then perhaps not all initialization was successful, but
* at least enough succeeded to bring-up NSH with perhaps reduced
* capabilities.
*/
return ret;
}

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/****************************************************************************
* boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_buttons.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
/* Config */
#include <nuttx/config.h>
/* Libc */
#include <assert.h>
#include <debug.h>
#include <errno.h>
#include <stdbool.h>
#include <stdio.h>
/* NuttX */
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <nuttx/irq.h>
#include <arch/irq.h>
/* Arch */
#include "espressif/esp_gpio.h"
/* Board */
#include "esp32p4-function-ev-board.h"
#include <arch/board/board.h>
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_button_initialize
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
* Input Parameters:
* None.
*
* Returned Value:
* The number of buttons that were initialized.
*
****************************************************************************/
uint32_t board_button_initialize(void)
{
esp_configgpio(BUTTON_BOOT, INPUT_FUNCTION_2 | PULLUP | CHANGE);
return 1;
}
/****************************************************************************
* Name: board_buttons
*
* Description:
* After board_button_initialize() has been called, board_buttons() may be
* called to collect the state of all buttons.
*
* Input Parameters:
* None.
*
* Returned Value:
* An 8-bit bit set with each bit associated with a button. See the
* BUTTON_*_BIT definitions in board.h for the meaning of each bit.
*
****************************************************************************/
uint32_t board_buttons(void)
{
uint8_t ret = 0;
int i = 0;
int n = 0;
bool b0 = esp_gpioread(BUTTON_BOOT);
for (i = 0; i < 10; i++)
{
up_mdelay(1); /* TODO */
bool b1 = esp_gpioread(BUTTON_BOOT);
if (b0 == b1)
{
n++;
}
else
{
n = 0;
}
if (3 == n)
{
break;
}
b0 = b1;
}
iinfo("b=%d n=%d\n", b0, n);
/* Low value means that the button is pressed */
if (!b0)
{
ret = 0x1;
}
return ret;
}
/****************************************************************************
* Name: board_button_irq
*
* Description:
* board_button_irq() may be called to register an interrupt handler that
* will be called when a button is depressed or released. The ID value is
* a button enumeration value that uniquely identifies a button resource.
* See the BUTTON_* definitions in board.h for the meaning of enumeration
* value.
*
* Input Parameters:
* id - Identifies the button to be monitored. It is equivalent to
* the bit used to report the button state in the return value
* from board_buttons().
* irqhandler - The handler that will be invoked when the interrupt occurs.
* arg - Pointer to the arguments that will be provided to the
* interrupt handler.
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
int board_button_irq(int id, xcpt_t irqhandler, void *arg)
{
return esp_gpio_irq(BUTTON_BOOT, irqhandler, arg);
}
#endif

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/****************************************************************************
* boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_gpio.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
/* Config */
#include <nuttx/config.h>
/* Libc */
#include <sys/types.h>
#include <syslog.h>
#include <assert.h>
#include <debug.h>
/* NuttX */
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <nuttx/ioexpander/gpio.h>
/* Arch */
#include "espressif/esp_gpio.h"
#ifdef CONFIG_ESPRESSIF_DEDICATED_GPIO
#include "espressif/esp_dedic_gpio.h"
#endif
/* Board */
#include "esp32p4-function-ev-board.h"
#include <arch/board/board.h>
/* HAL */
#include <arch/chip/gpio_sig_map.h>
#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Pin 1 and 2 are used for this example as GPIO outputs. */
#define GPIO_OUT1 1
#define GPIO_OUT2 2
#if !defined(CONFIG_ESPRESSIF_GPIO_IRQ) && BOARD_NGPIOINT > 0
# error "NGPIOINT is > 0 and GPIO interrupts aren't enabled"
#endif
/* Interrupt pins. GPIO9 is used as an example, any other inputs could be
* used.
*/
#define GPIO_IRQPIN 35
/* Dedicated GPIO pins. GPIO4 and GPIO5 is used as an example, any other
* GPIOs could be used.
*/
#define GPIO_DEDIC1 4
#define GPIO_DEDIC2 5
#define GPIO_DEDIC_COUNT 2
/****************************************************************************
* Private Types
****************************************************************************/
struct espgpio_dev_s
{
struct gpio_dev_s gpio;
uint8_t id;
};
struct espgpint_dev_s
{
struct espgpio_dev_s espgpio;
pin_interrupt_t callback;
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
#if BOARD_NGPIOOUT > 0
static int gpout_read(struct gpio_dev_s *dev, bool *value);
static int gpout_write(struct gpio_dev_s *dev, bool value);
static int gpout_setpintype(struct gpio_dev_s *dev,
enum gpio_pintype_e pintype);
#endif
#if BOARD_NGPIOINT > 0
static int gpint_read(struct gpio_dev_s *dev, bool *value);
static int gpint_attach(struct gpio_dev_s *dev,
pin_interrupt_t callback);
static int gpint_enable(struct gpio_dev_s *dev, bool enable);
static int gpint_setpintype(struct gpio_dev_s *dev,
enum gpio_pintype_e pintype);
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#if BOARD_NGPIOOUT > 0
static const struct gpio_operations_s gpout_ops =
{
.go_read = gpout_read,
.go_write = gpout_write,
.go_attach = NULL,
.go_enable = NULL,
.go_setpintype = gpout_setpintype,
};
/* This array maps the GPIO pins used as OUTPUT */
static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] =
{
GPIO_OUT1, GPIO_OUT2
};
static struct espgpio_dev_s g_gpout[BOARD_NGPIOOUT];
#endif
#if BOARD_NGPIOINT > 0
static const struct gpio_operations_s gpint_ops =
{
.go_read = gpint_read,
.go_write = NULL,
.go_attach = gpint_attach,
.go_enable = gpint_enable,
.go_setpintype = gpint_setpintype,
};
/* This array maps the GPIO pins used as INTERRUPT INPUTS */
static const uint32_t g_gpiointinputs[BOARD_NGPIOINT] =
{
GPIO_IRQPIN,
};
static struct espgpint_dev_s g_gpint[BOARD_NGPIOINT];
#endif
/* This array maps the GPIO pins used as Dedicated GPIO */
#ifdef CONFIG_ESPRESSIF_DEDICATED_GPIO
static const int g_gpioidedic[GPIO_DEDIC_COUNT] =
{
GPIO_DEDIC1, GPIO_DEDIC2
};
static struct esp_dedic_gpio_flags_s dedic_gpio_flags =
{
.input_enable = 1,
.invert_input_enable = 0,
.output_enable = 1,
.invert_output_enable = 0
};
struct esp_dedic_gpio_config_s dedic_gpio_conf =
{
.gpio_array = g_gpioidedic,
.array_size = GPIO_DEDIC_COUNT,
.flags = &dedic_gpio_flags,
.path = "/dev/dedic_gpio0"
};
struct file *dedicated_gpio = NULL;
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: gpout_read
*
* Description:
* Read a digital output pin.
*
* Parameters:
* dev - A pointer to the gpio driver struct.
* value - A pointer to store the state of the pin.
*
* Returned Value:
* Zero (OK).
*
****************************************************************************/
#if BOARD_NGPIOOUT > 0
static int gpout_read(struct gpio_dev_s *dev, bool *value)
{
struct espgpio_dev_s *espgpio = (struct espgpio_dev_s *)dev;
DEBUGASSERT(espgpio != NULL && value != NULL);
DEBUGASSERT(espgpio->id < BOARD_NGPIOOUT);
gpioinfo("Reading...\n");
*value = esp_gpioread(g_gpiooutputs[espgpio->id]);
return OK;
}
/****************************************************************************
* Name: gpout_write
*
* Description:
* Write to a digital output pin.
*
* Parameters:
* dev - A pointer to the gpio driver struct.
* value - The value to be written.
*
* Returned Value:
* Zero (OK).
*
****************************************************************************/
static int gpout_write(struct gpio_dev_s *dev, bool value)
{
struct espgpio_dev_s *espgpio = (struct espgpio_dev_s *)dev;
DEBUGASSERT(espgpio != NULL);
DEBUGASSERT(espgpio->id < BOARD_NGPIOOUT);
gpioinfo("Writing %d\n", (int)value);
esp_gpiowrite(g_gpiooutputs[espgpio->id], value);
return OK;
}
/****************************************************************************
* Name: gpout_setpintype
*
* Description:
* Set digital output pin type.
*
* Parameters:
* dev - A pointer to the gpio driver struct.
* pintype - The pin type. See nuttx/ioexpander/gpio.h.
*
* Returned Value:
* Zero (OK) on success; -1 (ERROR) otherwise.
*
****************************************************************************/
static int gpout_setpintype(struct gpio_dev_s *dev,
enum gpio_pintype_e pintype)
{
struct espgpio_dev_s *espgpio = (struct espgpio_dev_s *)dev;
DEBUGASSERT(espgpio != NULL);
DEBUGASSERT(espgpio->id < BOARD_NGPIOOUT);
gpioinfo("Setting pintype: %d\n", (int)pintype);
esp_gpio_matrix_out(g_gpiooutputs[espgpio->id],
SIG_GPIO_OUT_IDX, 0, 0);
switch (pintype)
{
case GPIO_INPUT_PIN:
esp_configgpio(g_gpiooutputs[espgpio->id], INPUT);
break;
case GPIO_INPUT_PIN_PULLUP:
esp_configgpio(g_gpiooutputs[espgpio->id], INPUT_PULLUP);
break;
case GPIO_INPUT_PIN_PULLDOWN:
esp_configgpio(g_gpiooutputs[espgpio->id], INPUT_PULLDOWN);
break;
case GPIO_OUTPUT_PIN:
esp_configgpio(g_gpiooutputs[espgpio->id], INPUT | OUTPUT);
break;
case GPIO_OUTPUT_PIN_OPENDRAIN:
esp_configgpio(g_gpiooutputs[espgpio->id],
INPUT | OUTPUT_OPEN_DRAIN);
break;
default:
return ERROR;
break;
}
return OK;
}
#endif
/****************************************************************************
* Name: espgpio_interrupt
*
* Description:
* Digital input interrupt handler.
*
* Input Parameters:
* irq - Identifier of the interrupt request.
* context - Context data from the ISR.
* arg - Opaque pointer to the internal driver state structure.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
#if BOARD_NGPIOINT > 0
static int espgpio_interrupt(int irq, void *context, void *arg)
{
struct espgpint_dev_s *espgpint = (struct espgpint_dev_s *)arg;
DEBUGASSERT(espgpint != NULL && espgpint->callback != NULL);
gpioinfo("Interrupt! callback=%p\n", espgpint->callback);
espgpint->callback(&espgpint->espgpio.gpio, espgpint->espgpio.id);
return OK;
}
/****************************************************************************
* Name: gpint_read
*
* Description:
* Read a digital input pin.
*
* Parameters:
* dev - A pointer to the gpio driver struct.
* value - A pointer to store the state of the pin.
*
* Returned Value:
* Zero (OK).
*
****************************************************************************/
static int gpint_read(struct gpio_dev_s *dev, bool *value)
{
struct espgpint_dev_s *espgpint =
(struct espgpint_dev_s *)dev;
DEBUGASSERT(espgpint != NULL && value != NULL);
DEBUGASSERT(espgpint->espgpio.id < BOARD_NGPIOINT);
gpioinfo("Reading int pin...\n");
*value = esp_gpioread(g_gpiointinputs[espgpint->espgpio.id]);
return OK;
}
/****************************************************************************
* Name: gpint_attach
*
* Description:
* Attach the ISR to IRQ and register the callback. But it still doesn't
* enable interrupt yet.
*
* Parameters:
* dev - A pointer to the gpio driver struct.
* callback - User callback function.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
static int gpint_attach(struct gpio_dev_s *dev,
pin_interrupt_t callback)
{
struct espgpint_dev_s *espgpint =
(struct espgpint_dev_s *)dev;
int ret;
gpioinfo("Attaching the callback\n");
/* Make sure the interrupt is disabled */
esp_gpioirqdisable(g_gpiointinputs[espgpint->espgpio.id]);
ret = esp_gpio_irq(g_gpiointinputs[espgpint->espgpio.id],
espgpio_interrupt,
&g_gpint[espgpint->espgpio.id]);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: gpint_attach() failed: %d\n", ret);
return ret;
}
/* Make sure the interrupt is disabled */
esp_gpioirqdisable(g_gpiointinputs[espgpint->espgpio.id]);
gpioinfo("Attach %p\n", callback);
espgpint->callback = callback;
return OK;
}
/****************************************************************************
* Name: gpint_enable
*
* Description:
* Enable/Disable interrupt.
*
* Parameters:
* dev - A pointer to the gpio driver struct.
* enable - True to enable, false to disable.
*
* Returned Value:
* Zero (OK).
*
****************************************************************************/
static int gpint_enable(struct gpio_dev_s *dev, bool enable)
{
struct espgpint_dev_s *espgpint = (struct espgpint_dev_s *)dev;
if (enable)
{
if (espgpint->callback != NULL)
{
gpioinfo("Enabling the interrupt\n");
/* Configure the interrupt for rising edge */
esp_gpioirqenable(g_gpiointinputs[espgpint->espgpio.id]);
}
}
else
{
gpioinfo("Disable the interrupt\n");
esp_gpioirqdisable(g_gpiointinputs[espgpint->espgpio.id]);
}
return OK;
}
/****************************************************************************
* Name: gpint_setpintype
*
* Description:
* Set digital interrupt pin type.
*
* Parameters:
* dev - A pointer to the gpio driver struct.
* pintype - The pin type. See nuttx/ioexpander/gpio.h.
*
* Returned Value:
* Zero (OK) on success; -1 (ERROR) otherwise.
*
****************************************************************************/
static int gpint_setpintype(struct gpio_dev_s *dev,
enum gpio_pintype_e pintype)
{
struct espgpint_dev_s *espgpint = (struct espgpint_dev_s *)dev;
DEBUGASSERT(espgpint != NULL);
DEBUGASSERT(espgpint->espgpio.id < BOARD_NGPIOINT);
gpioinfo("Setting pintype: %d\n", (int)pintype);
switch (pintype)
{
case GPIO_INTERRUPT_HIGH_PIN:
esp_configgpio(g_gpiointinputs[espgpint->espgpio.id],
INPUT_PULLUP | FALLING);
break;
case GPIO_INTERRUPT_LOW_PIN:
esp_configgpio(g_gpiointinputs[espgpint->espgpio.id],
INPUT_PULLDOWN | RISING);
break;
default:
return ERROR;
break;
}
return OK;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp_gpio_init
*
* Description:
* Configure the GPIO driver.
*
* Returned Value:
* Zero (OK).
*
****************************************************************************/
int esp_gpio_init(void)
{
int pincount = 0;
int i;
#if BOARD_NGPIOOUT > 0
for (i = 0; i < BOARD_NGPIOOUT; i++)
{
/* Setup and register the GPIO pin */
g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN;
g_gpout[i].gpio.gp_ops = &gpout_ops;
g_gpout[i].id = i;
gpio_pin_register(&g_gpout[i].gpio, pincount);
/* Configure the pins that will be used as output */
esp_gpio_matrix_out(g_gpiooutputs[i], SIG_GPIO_OUT_IDX, 0, 0);
esp_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_2 | INPUT_FUNCTION_2);
esp_gpiowrite(g_gpiooutputs[i], 0);
pincount++;
}
#endif
#if BOARD_NGPIOINT > 0
for (i = 0; i < BOARD_NGPIOINT; i++)
{
/* Setup and register the GPIO pin */
g_gpint[i].espgpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN;
g_gpint[i].espgpio.gpio.gp_ops = &gpint_ops;
g_gpint[i].espgpio.id = i;
gpio_pin_register(&g_gpint[i].espgpio.gpio, pincount);
/* Configure the pins that will be used as interrupt input with
* falling edge.
*/
esp_configgpio(g_gpiointinputs[i],
INPUT_FUNCTION_2 | PULLUP | FALLING);
pincount++;
}
#endif
#ifdef CONFIG_ESPRESSIF_DEDICATED_GPIO
dedicated_gpio = esp_dedic_gpio_new_bundle(&dedic_gpio_conf);
pincount++;
#endif
return OK;
}
#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */

83
boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_reset.c Normal file
View file

@ -0,0 +1,83 @@
/****************************************************************************
* boards/risc-v/esp32p4/esp32p4-function-ev-board/src/esp32p4_reset.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <assert.h>
#include <debug.h>
#include <stdlib.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include "espressif/esp_systemreset.h"
#ifdef CONFIG_BOARDCTL_RESET
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_reset
*
* Description:
* Reset board. Support for this function is required by board-level
* logic if CONFIG_BOARDCTL_RESET is selected.
*
* Input Parameters:
* status - Status information provided with the reset event. This
* meaning of this status information is board-specific. If not
* used by a board, the value zero may be provided in calls to
* board_reset().
*
* Returned Value:
* If this function returns, then it was not possible to power-off the
* board due to some constraints. The return value in this case is a
* board-specific reason for the failure to shutdown.
*
****************************************************************************/
int board_reset(int status)
{
syslog(LOG_INFO, "reboot status=%d\n", status);
switch (status)
{
case EXIT_SUCCESS:
up_shutdown_handler();
break;
case CONFIG_BOARD_ASSERT_RESET_VALUE:
default:
break;
}
up_systemreset();
return 0;
}
#endif /* CONFIG_BOARDCTL_RESET */

4
tools/btdecode.sh
View file

@ -49,6 +49,7 @@ VALID_CHIPS=(
"esp32c3"
"esp32c6"
"esp32h2"
"esp32p4"
)
# Make sure we have the required argument(s)
@ -98,6 +99,9 @@ else
esp32h2)
ADDR2LINE_TOOL="riscv-none-elf-addr2line"
;;
esp32p4)
ADDR2LINE_TOOL="riscv-none-elf-addr2line"
;;
esac
fi

18
tools/espressif/Config.mk
View file

@ -22,7 +22,11 @@
# Remove quotes from CONFIG_ESPRESSIF_CHIP_SERIES configuration
CHIP_SERIES = $(patsubst "%",%,$(CONFIG_ESPRESSIF_CHIP_SERIES))
ARCH_SRCDIR := $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src
ESP_HAL_3RDPARTY_REPO := esp-hal-3rdparty
CHIP_SERIES := $(patsubst "%",%,$(CONFIG_ESPRESSIF_CHIP_SERIES))
# include $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)$(CHIP_SERIES)$(DELIM)include$(DELIM)sdkconfig.h
# MCUBoot requires a region in flash for the E-Fuse virtual mode.
# To avoid erasing this region, flash a dummy empty file to the
@ -78,7 +82,11 @@ ESPTOOL_MIN_VERSION := 4.8.0
ifdef ESPTOOL_BINDIR
ifeq ($(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),y)
BL_OFFSET := 0x0000
ifeq ($(CONFIG_ARCH_CHIP_ESP32P4),y)
BL_OFFSET := 0x2000
else
BL_OFFSET := 0x0000
endif
BOOTLOADER := $(ESPTOOL_BINDIR)/mcuboot-$(CHIP_SERIES).bin
FLASH_BL := $(BL_OFFSET) $(BOOTLOADER)
ESPTOOL_BINS := $(FLASH_BL)
@ -122,7 +130,11 @@ ifeq ($(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),y)
-H $(CONFIG_ESPRESSIF_APP_MCUBOOT_HEADER_SIZE) --pad-header \
-S $(CONFIG_ESPRESSIF_OTA_SLOT_SIZE)
else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
APP_OFFSET := 0x0000
ifeq ($(CONFIG_ARCH_CHIP_ESP32P4),y)
APP_OFFSET := 0x2000
else
APP_OFFSET := 0x0000
endif
APP_IMAGE := nuttx.bin
FLASH_APP := $(APP_OFFSET) $(APP_IMAGE)
ESPTOOL_BINDIR := .