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board/devebox-stm32h743: New board devebox-stm32h743

Browse source 
+ Added new boards/arm/stm32h7/devebox-stm32h743
- checked (full):
  + w25q qspi flash (/w25)
  + led (PA1)
  + system console USART1 (PA9. PA10)
  + USB OTG_FS (cdc)
  + Buttons (PE3, PC5)
  + /dev/mmcsd0
  + dac + dma - circular & stream modes
  + gpio

Signed-off-by: Andrey Sobol <andrey.sobol.nn@gmail.com>
This commit is contained in:
Andrey Sobol 2026-07-14 17:07:32 +03:00 • committed by Alan C. Assis
parent e499b9f174
commit 826449818c
27 changed files with 3304 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

10
boards/Kconfig
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@ -1993,6 +1993,15 @@ config ARCH_BOARD_WEACT_STM32H743
---help---
This is WeAct MiniSTM32H7xx (STM32H743VIT6) board.
config ARCH_BOARD_DEVEBOX_STM32H743
bool "DevEbox Studio STM32H743"
depends on ARCH_CHIP_STM32H743VI
select ARCH_HAVE_LEDS
select ARCH_HAVE_BUTTONS
select ARCH_HAVE_IRQBUTTONS
---help---
This is DevEbox MiniSTM32H7xx (STM32H743VIT6) board.
config ARCH_BOARD_WEACT_STM32H750
bool "WeAct Studio STM32H750"
depends on ARCH_CHIP_STM32H750VB
@ -4108,6 +4117,7 @@ config ARCH_BOARD
default "esk32" if ARCH_BOARD_ESK32
default "csk6011a-nano" if ARCH_BOARD_CSK6011A_NANO
default "frdm-mcxn236" if ARCH_BOARD_FRDM_MCXN236
default "devebox-stm32h743" if ARCH_BOARD_DEVEBOX_STM32H743
comment "Common Board Options"

23
boards/arm/stm32h7/devebox-stm32h743/CMakeLists.txt Normal file
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@ -0,0 +1,23 @@
# ##############################################################################
# boards/arm/stm32h7/devebox-stm32h743/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
add_subdirectory(src)

8
boards/arm/stm32h7/devebox-stm32h743/Kconfig Normal file
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@ -0,0 +1,8 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_DEVEBOX_STM32H743
endif # ARCH_BOARD_DEVEBOX_STM32H743

119
boards/arm/stm32h7/devebox-stm32h743/configs/full/defconfig Normal file
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@ -0,0 +1,119 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_MMCSD_HAVE_CARDDETECT is not set
# CONFIG_MMCSD_MMCSUPPORT is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_SPI_EXCHANGE is not set
# CONFIG_STANDARD_SERIAL is not set
# CONFIG_STM32_SDMMC_IDMA is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="devebox-stm32h743"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_DEVEBOX_STM32H743=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32h7"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32H743VI=y
CONFIG_ARCH_CHIP_STM32H7=y
CONFIG_ARCH_CHIP_STM32H7_CORTEXM7=y
CONFIG_ARCH_INTERRUPTSTACK=4096
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_BCH=y
CONFIG_BOARDCTL_USBDEVCTRL=y
CONFIG_BOARD_LOOPSPERMSEC=43103
CONFIG_BUILTIN=y
CONFIG_CDCACM=y
CONFIG_CDCACM_VENDORSTR="NuttX-SblDevice"
CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_FS_ERROR=y
CONFIG_DEBUG_FS_INFO=y
CONFIG_DEBUG_FS_WARN=y
CONFIG_DEBUG_LEDS=y
CONFIG_DEBUG_LEDS_ERROR=y
CONFIG_DEBUG_MEMCARD=y
CONFIG_DEBUG_MEMCARD_ERROR=y
CONFIG_DEBUG_MEMCARD_INFO=y
CONFIG_DEBUG_MEMCARD_WARN=y
CONFIG_DEBUG_SPI=y
CONFIG_DEBUG_SPI_ERROR=y
CONFIG_DEBUG_SPI_WARN=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_GPIO=y
CONFIG_EXAMPLES_BUTTONS=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_NXFFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INPUT=y
CONFIG_INPUT_BUTTONS=y
CONFIG_INPUT_BUTTONS_DEBOUNCE_DELAY=20
CONFIG_INPUT_BUTTONS_LOWER=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LINE_MAX=64
CONFIG_MMCSD=y
CONFIG_MMCSD_SDIO=y
CONFIG_MM_REGIONS=4
CONFIG_MTD=y
CONFIG_MTD_BYTE_WRITE=y
CONFIG_MTD_W25QXXXJV=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NXFFS_MAXNAMLEN=64
CONFIG_OTG_ID_GPIO_DISABLE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAMLOG=y
CONFIG_RAMLOG_BUFSIZE=4096
CONFIG_RAMLOG_SYSLOG=y
CONFIG_RAM_SIZE=245760
CONFIG_RAM_START=0x20010000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_LPWORK=y
CONFIG_SDIO_WIDTH_D1_ONLY=y
CONFIG_SDMMC1_SDIO_PULLUP=y
CONFIG_SDMMC1_WIDTH_D1_ONLY=y
CONFIG_SERIAL_TERMIOS=y
CONFIG_SIG_DEFAULT=y
CONFIG_SPECIFIC_DRIVERS=y
CONFIG_SPI=y
CONFIG_START_DAY=11
CONFIG_START_MONTH=5
CONFIG_START_YEAR=2024
CONFIG_STM32_HSI48=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_QSPI=y
CONFIG_STM32_QSPI_CSHT=2
CONFIG_STM32_QSPI_FLASH_SIZE=8388608
CONFIG_STM32_QSPI_INTERRUPTS=y
CONFIG_STM32_SDMMC1=y
CONFIG_STM32_TIM1=y
CONFIG_STM32_USART1=y
CONFIG_SYSLOG_DEVPATH="/dev/ttyRAM"
CONFIG_SYSLOG_IOCTL=y
CONFIG_SYSLOG_REGISTER=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_SYSTEM=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_TTY_SIGINT=y
CONFIG_TTY_SIGTSTP=y
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USBDEV=y
CONFIG_W25QXXXJV_QSPI_FREQUENCY=120000000

70
boards/arm/stm32h7/devebox-stm32h743/configs/nsh+debug/defconfig Normal file
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@ -0,0 +1,70 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STANDARD_SERIAL is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="devebox-stm32h743"
CONFIG_ARCH_BOARD_DEVEBOX_STM32H743=y
CONFIG_ARCH_CHIP="stm32h7"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32H743VI=y
CONFIG_ARCH_CHIP_STM32H7=y
CONFIG_ARCH_CHIP_STM32H7_CORTEXM7=y
CONFIG_ARCH_INTERRUPTSTACK=4096
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_ARMV7M_STACKCHECK=y
CONFIG_BOARD_LOOPSPERMSEC=91850
CONFIG_BUILTIN=y
CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_LEDS=y
CONFIG_DEBUG_LEDS_ERROR=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INIT_STACKSIZE=4096
CONFIG_INTELHEX_BINARY=y
CONFIG_LINE_MAX=64
CONFIG_MM_REGIONS=4
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAMLOG=y
CONFIG_RAMLOG_BUFSIZE=4096
CONFIG_RAMLOG_SYSLOG=y
CONFIG_RAM_SIZE=245760
CONFIG_RAM_START=0x20010000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HAVE_PARENT=y
CONFIG_SERIAL_TERMIOS=y
CONFIG_SIG_DEFAULT=y
CONFIG_SPI=y
CONFIG_STACKCHECK_MARGIN=256
CONFIG_STACK_COLORATION=y
CONFIG_STM32_USART1=y
CONFIG_SYSLOG_CHAR=y
CONFIG_SYSLOG_CONSOLE=y
CONFIG_SYSLOG_DEVPATH="/dev/ttyRAM"
CONFIG_SYSLOG_IOCTL=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_NSH_STACKSIZE=4096
CONFIG_SYSTEM_SYSTEM=y
CONFIG_SYSTEM_SYSTEM_STACKSIZE=4096
CONFIG_TASK_NAME_SIZE=32
CONFIG_TTY_SIGINT=y
CONFIG_TTY_SIGTSTP=y
CONFIG_USART1_SERIAL_CONSOLE=y

50
boards/arm/stm32h7/devebox-stm32h743/configs/nsh/defconfig Normal file
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@ -0,0 +1,50 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STANDARD_SERIAL is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="devebox-stm32h743"
CONFIG_ARCH_BOARD_DEVEBOX_STM32H743=y
CONFIG_ARCH_CHIP="stm32h7"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32H743VI=y
CONFIG_ARCH_CHIP_STM32H7=y
CONFIG_ARCH_CHIP_STM32H7_CORTEXM7=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_BOARD_LOOPSPERMSEC=43103
CONFIG_BUILTIN=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_EXPERIMENTAL=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LINE_MAX=64
CONFIG_MM_REGIONS=4
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=245760
CONFIG_RAM_START=0x20010000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SPI=y
CONFIG_START_DAY=11
CONFIG_START_MONTH=5
CONFIG_START_YEAR=2024
CONFIG_STM32_USART1=y
CONFIG_SYSTEM_NSH=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART1_SERIAL_CONSOLE=y

461
boards/arm/stm32h7/devebox-stm32h743/include/board.h Normal file
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@ -0,0 +1,461 @@
/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32H7_DEVEBOX_STM32H743_INCLUDE_BOARD_H
#define __BOARDS_ARM_STM32H7_DEVEBOX_STM32H743_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
/* Do not include STM32 H7 header files here */
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
/* The DevEbox STM32H743 board provides the following clock sources:
*
* MCO: 8 MHz from MCO output of ST-LINK is used as input clock (default)
* X2: 32.768 KHz crystal for LSE
* X3: HSE crystal oscillator (not provided)
*
* So we have these clock source available within the STM32
*
* HSI: 16 MHz RC factory-trimmed
* LSI: 32 KHz RC
* HSE: 25 MHz crystal
* LSE: 32.768 kHz
*/
#define STM32_BOARD_XTAL 25000000ul
#define STM32_HSI_FREQUENCY 16000000ul
#define STM32_LSI_FREQUENCY 32000
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768
/* Main PLL Configuration.
*
* PLL source is HSE = 25,000,000
*
* When STM32_HSE_FREQUENCY / PLLM <= 2MHz VCOL must be selected.
* VCOH otherwise.
*
* PLL_VCOx = (STM32_HSE_FREQUENCY / PLLM) * PLLN
* Subject to:
*
* 1 <= PLLM <= 63
* 4 <= PLLN <= 512
* 150 MHz <= PLL_VCOL <= 420MHz
* 192 MHz <= PLL_VCOH <= 836MHz
*
* SYSCLK = PLL_VCO / PLLP
* CPUCLK = SYSCLK / D1CPRE
* Subject to
*
* PLLP1 = {2, 4, 6, 8, ..., 128}
* PLLP2,3 = {2, 3, 4, ..., 128}
* CPUCLK <= 480 MHz (over-drive)
* CPUCLK <= 400 MHz (normal)
*/
#define STM32_BOARD_USEHSE
#define STM32_PLLCFG_PLLSRC RCC_PLLCKSELR_PLLSRC_HSE
/* Uncomment to enable 480 MHz (with over-drive).
* Default is 400 MHz (VOS1, no over-drive, lower power).
*/
/* #define STM32_PLL1_480MHZ */
/* PLL1, wide 4 - 8 MHz input, enable DIVP, DIVQ, DIVR
*
* PLL1_VCO = (25 MHz / 5) * 160 = 800 MHz (400 MHz mode)
* PLL1_VCO = (25 MHz / 5) * 192 = 960 MHz (480 MHz mode)
*
* PLL1P = PLL1_VCO/2
* PLL1Q = PLL1_VCO/4
* PLL1R = PLL1_VCO/4
*/
#define STM32_PLLCFG_PLL1CFG (RCC_PLLCFGR_PLL1VCOSEL_WIDE | \
RCC_PLLCFGR_PLL1RGE_4_8_MHZ | \
RCC_PLLCFGR_DIVP1EN | \
RCC_PLLCFGR_DIVQ1EN | \
RCC_PLLCFGR_DIVR1EN)
#define STM32_PLLCFG_PLL1M RCC_PLLCKSELR_DIVM1(5)
#define STM32_PLLCFG_PLL1P RCC_PLL1DIVR_P1(2)
#define STM32_PLLCFG_PLL1Q RCC_PLL1DIVR_Q1(4)
#define STM32_PLLCFG_PLL1R RCC_PLL1DIVR_R1(4)
#ifdef STM32_PLL1_480MHZ
# define STM32_PLLCFG_PLL1N RCC_PLL1DIVR_N1(192)
# define STM32_VCO1_FREQUENCY ((STM32_HSE_FREQUENCY / 5) * 192)
#else
# define STM32_PLLCFG_PLL1N RCC_PLL1DIVR_N1(160)
# define STM32_VCO1_FREQUENCY ((STM32_HSE_FREQUENCY / 5) * 160)
#endif
#define STM32_PLL1P_FREQUENCY (STM32_VCO1_FREQUENCY / 2)
#define STM32_PLL1Q_FREQUENCY (STM32_VCO1_FREQUENCY / 4)
#define STM32_PLL1R_FREQUENCY (STM32_VCO1_FREQUENCY / 4)
/* PLL2, wide 4 - 8 MHz input, enable DIVP, DIVQ, DIVR
*
* PLL2_VCO = (25 MHz / 2) * 48 = 600 MHz
*
* PLL2P = PLL2_VCO/8 = 600 MHz / 8 = 75 MHz
* PLL2Q = PLL2_VCO/40 = 600 MHz / 40 = 15 MHz
* PLL2R = PLL2_VCO/3 = 600 MHz / 3 = 200 MHz
*/
#define STM32_PLLCFG_PLL2CFG (RCC_PLLCFGR_PLL2VCOSEL_WIDE | \
RCC_PLLCFGR_PLL2RGE_4_8_MHZ | \
RCC_PLLCFGR_DIVP2EN | \
RCC_PLLCFGR_DIVQ2EN | \
RCC_PLLCFGR_DIVR2EN )
#define STM32_VCO2_FREQUENCY ((STM32_HSE_FREQUENCY / 2) * 48)
#define STM32_PLL2P_FREQUENCY (STM32_VCO2_FREQUENCY / 8)
#define STM32_PLL2Q_FREQUENCY (STM32_VCO2_FREQUENCY / 40)
#define STM32_PLL2R_FREQUENCY (STM32_VCO2_FREQUENCY / 3)
#define STM32_PLLCFG_PLL2M RCC_PLLCKSELR_DIVM2(2)
#define STM32_PLLCFG_PLL2N RCC_PLL2DIVR_N2(48)
#define STM32_PLLCFG_PLL2P RCC_PLL2DIVR_P2(8)
#define STM32_PLLCFG_PLL2Q RCC_PLL2DIVR_Q2(40)
#define STM32_PLLCFG_PLL2R RCC_PLL2DIVR_R2(3)
/* PLL3 is disabled by default.
* To enable, uncomment the line below and configure
* peripherals to use PLL3 outputs.
*/
/* #define USE_PLL3 */
#ifndef USE_PLL3
# define STM32_PLLCFG_PLL3CFG 0
# define STM32_PLLCFG_PLL3M 0
# define STM32_PLLCFG_PLL3N 0
# define STM32_PLLCFG_PLL3P 0
# define STM32_PLLCFG_PLL3Q 0
# define STM32_PLLCFG_PLL3R 0
# define STM32_VCO3_FREQUENCY
# define STM32_PLL3P_FREQUENCY
# define STM32_PLL3Q_FREQUENCY
# define STM32_PLL3R_FREQUENCY
#else
/* PLL3, wide 8 - 16 MHz input, enable DIVP, DIVQ, DIVR
*
* PLL3_VCO = (25 MHz / 2) * 40 = 500 MHz
*
* PLL3P = PLL3_VCO/2 = 500 MHz / 2 = 250 MHz
* PLL3Q = PLL3_VCO/5 = 500 MHz / 5 = 100 MHz
* PLL3R = PLL3_VCO/10 = 500 MHz / 10 = 50 MHz
*/
# define STM32_PLLCFG_PLL3CFG (RCC_PLLCFGR_PLL3VCOSEL_WIDE| \
RCC_PLLCFGR_PLL3RGE_8_16_MHZ| \
RCC_PLLCFGR_DIVP3EN| \
RCC_PLLCFGR_DIVQ3EN| \
RCC_PLLCFGR_DIVR3EN)
# define STM32_PLLCFG_PLL3M RCC_PLLCKSELR_DIVM3(2)
# define STM32_PLLCFG_PLL3N RCC_PLL3DIVR_N3(40)
# define STM32_PLLCFG_PLL3P RCC_PLL3DIVR_P3(2)
# define STM32_PLLCFG_PLL3Q RCC_PLL3DIVR_Q3(5)
# define STM32_PLLCFG_PLL3R RCC_PLL3DIVR_R3(10)
# define STM32_VCO3_FREQUENCY ((STM32_HSE_FREQUENCY / 2) * 40)
# define STM32_PLL3P_FREQUENCY (STM32_VCO3_FREQUENCY / 2)
# define STM32_PLL3Q_FREQUENCY (STM32_VCO3_FREQUENCY / 5)
# define STM32_PLL3R_FREQUENCY (STM32_VCO3_FREQUENCY / 10)
#endif
/* SYSCLK = PLL1P = 400 MHz (or 480 MHz with STM32_PLL1_480MHZ)
* CPUCLK = SYSCLK / 1
*/
#define STM32_RCC_D1CFGR_D1CPRE (RCC_D1CFGR_D1CPRE_SYSCLK)
#define STM32_SYSCLK_FREQUENCY (STM32_PLL1P_FREQUENCY)
#define STM32_CPUCLK_FREQUENCY (STM32_SYSCLK_FREQUENCY / 1)
/* Configure Clock Assignments */
/* AHB clock (HCLK) is SYSCLK/2
*/
#define STM32_RCC_D1CFGR_HPRE RCC_D1CFGR_HPRE_SYSCLKd2 /* HCLK = SYSCLK / 2 */
#define STM32_ACLK_FREQUENCY (STM32_SYSCLK_FREQUENCY / 2) /* ACLK in D1, HCLK3 in D1 */
#define STM32_HCLK_FREQUENCY (STM32_SYSCLK_FREQUENCY / 2) /* HCLK in D2, HCLK4 in D3 */
/* APB1 clock (PCLK1) is HCLK/2 */
#define STM32_RCC_D2CFGR_D2PPRE1 RCC_D2CFGR_D2PPRE1_HCLKd2 /* PCLK1 = HCLK / 2 */
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/* APB2 clock (PCLK2) is HCLK/2 */
#define STM32_RCC_D2CFGR_D2PPRE2 RCC_D2CFGR_D2PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */
#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/* APB3 clock (PCLK3) is HCLK/2 */
#define STM32_RCC_D1CFGR_D1PPRE RCC_D1CFGR_D1PPRE_HCLKd2 /* PCLK3 = HCLK / 2 */
#define STM32_PCLK3_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/* APB4 clock (PCLK4) is HCLK/2 */
#define STM32_RCC_D3CFGR_D3PPRE RCC_D3CFGR_D3PPRE_HCLKd2 /* PCLK4 = HCLK / 2 */
#define STM32_PCLK4_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/* Timer clock frequencies */
/* Timers driven from APB1 will be twice PCLK1 */
#define STM32_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY)
/* Timers driven from APB2 will be twice PCLK2 */
#define STM32_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_TIM15_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_TIM16_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_TIM17_CLKIN (2*STM32_PCLK2_FREQUENCY)
/* Kernel Clock Configuration
*
* Note: look at Table 54 in ST Manual
*/
/* I2C123 clock source - HSI */
#define STM32_RCC_D2CCIP2R_I2C123SRC RCC_D2CCIP2R_I2C123SEL_HSI
/* I2C4 clock source - HSI */
#define STM32_RCC_D3CCIPR_I2C4SRC RCC_D3CCIPR_I2C4SEL_HSI
/* SPI123 clock source - PLL1Q */
#define STM32_RCC_D2CCIP1R_SPI123SRC RCC_D2CCIP1R_SPI123SEL_PLL1
/* SPI45 clock source - APB (PCLK2?) */
#define STM32_RCC_D2CCIP1R_SPI45SRC RCC_D2CCIP1R_SPI45SEL_PLL2
/* SPI6 clock source - APB (PCLK4) */
#define STM32_RCC_D3CCIPR_SPI6SRC RCC_D3CCIPR_SPI6SEL_PCLK4
/* USB 1 and 2 clock source - HSI48 */
#define STM32_RCC_D2CCIP2R_USBSRC RCC_D2CCIP2R_USBSEL_HSI48
/* ADC 1 2 3 clock source - pll2_pclk */
#define STM32_RCC_D3CCIPR_ADCSRC RCC_D3CCIPR_ADCSEL_PLL2
/* FDCAN 1 2 clock source, use STM32_HSE_FREQUENCY */
#define STM32_RCC_D2CCIP1R_FDCANSEL RCC_D2CCIP1R_FDCANSEL_HSE
/* SDMMC 1 2 clock source, use STM32_PLL1Q_FREQUENCY */
#define STM32_RCC_D1CCIPR_SDMMCSEL RCC_D1CCIPR_SDMMC_PLL1
/* FMC clock source, use STM32_PLL1Q_FREQUENCY */
#define BOARD_FMC_CLK RCC_D1CCIPR_FMCSEL_HCLK
/* FLASH wait states
*
* ------------ ---------- -----------
* Vcore MAX ACLK WAIT STATES
* ------------ ---------- -----------
* 1.15-1.26 V 70 MHz 0
* (VOS1 level) 140 MHz 1
* 210 MHz 2
* 1.05-1.15 V 55 MHz 0
* (VOS2 level) 110 MHz 1
* 165 MHz 2
* 220 MHz 3
* 0.95-1.05 V 45 MHz 0
* (VOS3 level) 90 MHz 1
* 135 MHz 2
* 180 MHz 3
* 225 MHz 4
* ------------ ---------- -----------
*/
#define BOARD_FLASH_WAITSTATES 4
/* SDMMC definitions ********************************************************/
/* Init 400 kHz, PLL1Q/(2*divider)
* 400 MHz mode: 200 MHz / (2*250) = 400 kHz
* 480 MHz mode: 240 MHz / (2*300) = 400 kHz
*/
#ifdef STM32_PLL1_480MHZ
# define STM32_SDMMC_INIT_CLKDIV (300 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#else
# define STM32_SDMMC_INIT_CLKDIV (250 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#endif
/* Transfer clock, PLL1Q/(2*5)
* 400 MHz mode: 200 MHz / (2*5) = 20 MHz
* 480 MHz mode: 240 MHz / (2*5) = 24 MHz
*/
#define SDMMC1_SLOTNO 0
#define STM32_SDMMC_MMCXFR_CLKDIV (5 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#define STM32_SDMMC_SDXFR_CLKDIV (5 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#define STM32_SDMMC_CLKCR_EDGE STM32_SDMMC_CLKCR_NEGEDGE
#define GPIO_SDMMC1_CK (GPIO_SDMMC1_CK_0|GPIO_SPEED_100MHz) /* PC12 */
#define GPIO_SDMMC1_CMD (GPIO_SDMMC1_CMD_0|GPIO_SPEED_100MHz) /* PD2 */
#define GPIO_SDMMC1_D0 (GPIO_SDMMC1_D0_0|GPIO_SPEED_100MHz) /* PC8 */
#define GPIO_SDMMC1_D1 (GPIO_SDMMC1_D1_0|GPIO_SPEED_100MHz) /* PC9 */
#define GPIO_SDMMC1_D2 (GPIO_SDMMC1_D2_0|GPIO_SPEED_100MHz) /* PC10 */
#define GPIO_SDMMC1_D3 (GPIO_SDMMC1_D3_0|GPIO_SPEED_100MHz) /* PC11 */
/* LED definitions **********************************************************/
/* The board has 1 user LED that could be used this diagnostic LED too.
*
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way.
* The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
#define BOARD_LED1 0
#define BOARD_NLEDS 1
/* LED bits for use with board_userled_all() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in
* include/board.h and src/stm32_leds.c.
* The LEDs are used to encode OS-related events as follows:
*/
#define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */
#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF OFF ON */
#define LED_IRQSENABLED 2 /* Interrupts enabled OFF ON OFF */
#define LED_STACKCREATED 3 /* Idle stack created OFF ON ON */
#define LED_INIRQ 4 /* In an interrupt N/C N/C GLOW */
#define LED_SIGNAL 5 /* In a signal handler N/C GLOW N/C */
#define LED_ASSERTION 6 /* An assertion failed GLOW N/C GLOW */
#define LED_PANIC 7 /* The system has crashed Blink OFF N/C */
#define LED_IDLE 8 /* MCU is is sleep mode ON OFF OFF */
/* Thus if the Green LED is statically on, NuttX has successfully booted and
* is, apparently, running normally.
*/
/* Button definitions *******************************************************/
/* The DevEbox-STM32H743 board has two user buttons with active low */
#define NUM_BUTTONS 2
#ifdef CONFIG_ARCH_IRQBUTTONS
# define USER_BTN1 (GPIO_INPUT | GPIO_PULLUP | GPIO_EXTI | GPIO_PORTE | GPIO_PIN3) // PE3
# define USER_BTN2 (GPIO_INPUT | GPIO_PULLUP | GPIO_EXTI | GPIO_PORTC | GPIO_PIN5) // PC5
#else
# define USER_BTN1 (GPIO_INPUT | GPIO_PULLUP | GPIO_PORTE | GPIO_PIN3) // PE3
# define USER_BTN2 (GPIO_INPUT | GPIO_PULLUP | GPIO_PORTC | GPIO_PIN5) // PC5
#endif
/* Alternate function pin selections ****************************************/
/* USART1 (Serial Console) */
#define GPIO_USART1_RX (GPIO_USART1_RX_2 | GPIO_SPEED_100MHz) /* PA10 */
#define GPIO_USART1_TX (GPIO_USART1_TX_2 | GPIO_SPEED_100MHz) /* PA9 */
#define DMAMAP_USART1_RX DMAMAP_DMA12_USART1RX_0
#define DMAMAP_USART1_TX DMAMAP_DMA12_USART1TX_0
#define GPIO_DAC1_CH1_OUT GPIO_DAC1_OUT1_0 // PA4
#define GPIO_DAC1_CH2_OUT GPIO_DAC1_OUT2_0 // PA5
/* QSPI Mapping */
#define GPIO_QSPI_CS (GPIO_QUADSPI_BK1_NCS_1|GPIO_FLOAT|GPIO_PUSHPULL|GPIO_SPEED_100MHz) /* PB6 */
#define GPIO_QSPI_IO0 (GPIO_QUADSPI_BK1_IO0_3|GPIO_FLOAT|GPIO_PUSHPULL|GPIO_SPEED_100MHz) /* PD11 */
#define GPIO_QSPI_IO1 (GPIO_QUADSPI_BK1_IO1_3|GPIO_FLOAT|GPIO_PUSHPULL|GPIO_SPEED_100MHz) /* PD12 */
#define GPIO_QSPI_IO2 (GPIO_QUADSPI_BK1_IO2_1|GPIO_FLOAT|GPIO_PUSHPULL|GPIO_SPEED_100MHz) /* PE2 */
#define GPIO_QSPI_IO3 (GPIO_QUADSPI_BK1_IO3_2|GPIO_FLOAT|GPIO_PUSHPULL|GPIO_SPEED_100MHz) /* PD13 */
#define GPIO_QSPI_SCK (GPIO_QUADSPI_CLK_1|GPIO_FLOAT|GPIO_PUSHPULL|GPIO_SPEED_100MHz) /* PB2 */
/* OTGFS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz) /* PA11 */
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz) /* PA12 */
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz) /* PA10 */
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_STM32H7_DEVEBOX_STM32H743_INCLUDE_BOARD_H */

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boards/arm/stm32h7/devebox-stm32h743/scripts/Make.defs Normal file
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############################################################################
# boards/arm/stm32h7/devebox-stm32h743/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = flash.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
# ELF module definitions
CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs
LDELFFLAGS = -r -e main
LDELFFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/binfmt/elf/gnu-elf.ld)

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boards/arm/stm32h7/devebox-stm32h743/scripts/flash.ld Normal file
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/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/scripts/flash.ld
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The STM32H743VI has 2048Kb of main FLASH memory. The flash memory is
* partitioned into a User Flash memory and a System Flash memory. Each
* of these memories has two banks:
*
* 1) User Flash memory:
*
* Bank 1: Start address 0x0800:0000 to 0x080F:FFFF with 8 sectors, 128Kb each
* Bank 2: Start address 0x0810:0000 to 0x081F:FFFF with 8 sectors, 128Kb each
*
* 2) System Flash memory:
*
* Bank 1: Start address 0x1FF0:0000 to 0x1FF1:FFFF with 1 x 128Kb sector
* Bank 1: Start address 0x1FF4:0000 to 0x1FF5:FFFF with 1 x 128Kb sector
*
* 3) User option bytes for user configuration, only in Bank 1.
*
* In the STM32H743VI, two different boot spaces can be selected through
* the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
* BOOT_ADD1 option bytes:
*
* 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
* ST programmed value: Flash memory at 0x0800:0000
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x1FF0:0000
*
* TODO: Check next paragraph with nucleo schematics
*
* NuttX does not modify these option bytes. On the unmodified NUCLEO-H743ZI
* board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0800:0000 in FLASH.
*
* The STM32H743VI also has 1024Kb of data SRAM.
* SRAM is split up into several blocks and into three power domains:
*
* 1) TCM SRAMs are dedicated to the Cortex-M7 and are accessible with
* 0 wait states by the Cortex-M7 and by MDMA through AHBS slave bus
*
* 1.1) 128Kb of DTCM-RAM beginning at address 0x2000:0000
*
* The DTCM-RAM is organized as 2 x 64Kb DTCM-RAMs on 2 x 32 bit
* DTCM ports. The DTCM-RAM could be used for critical real-time
* data, such as interrupt service routines or stack / heap memory.
* Both DTCM-RAMs can be used in parallel (for load/store operations)
* thanks to the Cortex-M7 dual issue capability.
*
* 1.2) 64Kb of ITCM-RAM beginning at address 0x0000:0000
*
* This RAM is connected to ITCM 64-bit interface designed for
* execution of critical real-times routines by the CPU.
*
* 2) AXI SRAM (D1 domain) accessible by all system masters except BDMA
* through D1 domain AXI bus matrix
*
* 2.1) 512Kb of SRAM beginning at address 0x2400:0000
*
* 3) AHB SRAM (D2 domain) accessible by all system masters except BDMA
* through D2 domain AHB bus matrix
*
* 3.1) 128Kb of SRAM1 beginning at address 0x3000:0000
* 3.2) 128Kb of SRAM2 beginning at address 0x3002:0000
* 3.3) 32Kb of SRAM3 beginning at address 0x3004:0000
*
* SRAM1 - SRAM3 are one contiguous block: 288Kb at address 0x3000:0000
*
* 4) AHB SRAM (D3 domain) accessible by most of system masters
* through D3 domain AHB bus matrix
*
* 4.1) 64Kb of SRAM4 beginning at address 0x3800:0000
* 4.1) 4Kb of backup RAM beginning at address 0x3880:0000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*/
MEMORY
{
itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 64K
flash (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
dtcm1 (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
dtcm2 (rwx) : ORIGIN = 0x20010000, LENGTH = 64K
sram (rwx) : ORIGIN = 0x24000000, LENGTH = 512K
sram1 (rwx) : ORIGIN = 0x30000000, LENGTH = 128K
sram2 (rwx) : ORIGIN = 0x30020000, LENGTH = 128K
sram3 (rwx) : ORIGIN = 0x30040000, LENGTH = 32K
sram4 (rwx) : ORIGIN = 0x38000000, LENGTH = 64K
bbram (rwx) : ORIGIN = 0x38800000, LENGTH = 4K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section :
{
_sinit = ABSOLUTE(.);
KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP(*(.init_array .ctors))
_einit = ABSOLUTE(.);
} > flash
.ARM.extab :
{
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx :
{
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Emit the the D3 power domain section for locating BDMA data
*
* Static data with locate_data(".sram4") will be located
* at start of SRAM4; the rest of SRAM4 will be added to the heap.
*/
.sram4_reserve (NOLOAD) :
{
*(.sram4)
. = ALIGN(4);
_sram4_heap_start = ABSOLUTE(.);
} > sram4
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

54
boards/arm/stm32h7/devebox-stm32h743/scripts/memory.ld Normal file
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/****************************************************************************
* boards/arm/stm32h7/nucleo-h743zi/scripts/memory.ld
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* TODO: Add description for memory organisation */
MEMORY
{
/* ITCM boot address */
itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 64K
/* 2048Kb FLASH */
kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K
xflash (rx) : ORIGIN = 0x08040000, LENGTH = 1792K
/* 288Kb SRAM123 */
ksram (rwx) : ORIGIN = 0x30000000, LENGTH = 16K
usram (rwx) : ORIGIN = 0x30004000, LENGTH = 16K
xsram (rwx) : ORIGIN = 0x30008000, LENGTH = 288K - 32K
/* 512Kb of contiguous AXI SRAM */
sram (rwx) : ORIGIN = 0x24000000, LENGTH = 512K
/* DTCM SRAM */
dtcm1 (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
dtcm2 (rwx) : ORIGIN = 0x20010000, LENGTH = 64K
sram4 (rwx) : ORIGIN = 0x38000000, LENGTH = 64K
bbram (rwx) : ORIGIN = 0x38800000, LENGTH = 4K
}

101
boards/arm/stm32h7/devebox-stm32h743/scripts/user-space.ld Normal file
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/****************************************************************************
* boards/arm/stm32h7/nucleo-h743zi/scripts/user-space.ld
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
SECTIONS
{
.userspace : {
*(.userspace)
} > uflash
.text : {
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > uflash
.init_section : {
_sinit = ABSOLUTE(.);
KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP(*(.init_array .ctors))
_einit = ABSOLUTE(.);
} > uflash
.ARM.extab : {
*(.ARM.extab*)
} > uflash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > uflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > usram AT > uflash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > usram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

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boards/arm/stm32h7/devebox-stm32h743/src/CMakeLists.txt Normal file
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# ##############################################################################
# boards/arm/stm32h7/devebox-stm32h743/src/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
set(SRCS stm32_boot.c stm32_bringup.c)
if(CONFIG_ARCH_LEDS)
list(APPEND SRCS stm32_autoleds.c)
else()
list(APPEND SRCS stm32_userleds.c)
endif()
if(CONFIG_ARCH_BUTTONS)
list(APPEND SRCS stm32_buttons.c)
endif()
if(CONFIG_STM32H7_SDMMC)
list(APPEND SRCS stm32_sdmmc.c)
endif()
if(CONFIG_MTD_W25QXXXJV)
list(APPEND SRCS stm32_w25q.c)
endif()
if(CONFIG_FAT_DMAMEMORY)
list(APPEND SRCS stm32_dma_alloc.c)
endif()
if(CONFIG_DAC)
list(APPEND SRCS stm32_dac_init.c)
endif()
if(CONFIG_DEV_GPIO)
list(APPEND SRCS stm32_gpio_helper.c)
endif()
if(CONFIG_BOARDCTL)
list(APPEND SRCS stm32_appinitialize.c)
endif()
target_sources(board PRIVATE ${SRCS})
if(NOT CONFIG_BUILD_FLAT)
add_subdirectory(${NUTTX_BOARD_DIR}/kernel)
set_property(
GLOBAL PROPERTY LD_SCRIPT_USER ${NUTTX_BOARD_DIR}/scripts/memory.ld
${NUTTX_BOARD_DIR}/scripts/user-space.ld)
endif()

59
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############################################################################
# boards/arm/stm32h7/devebox-stm32h743/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/Make.defs
CSRCS = stm32_boot.c stm32_bringup.c stm32_usb.c stm32_ioctl.c
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += stm32_autoleds.c
else
CSRCS += stm32_userleds.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += stm32_buttons.c
endif
ifeq ($(CONFIG_DEV_GPIO),y)
CSRCS += stm32_gpio_helper.c
endif
ifeq ($(CONFIG_DAC),y)
CSRCS += stm32_dac_init.c
endif
ifeq ($(CONFIG_STM32_SDMMC),y)
CSRCS += stm32_sdmmc.c
endif
ifeq ($(CONFIG_MTD_W25QXXXJV),y)
CSRCS += stm32_w25q.c
endif
ifeq ($(CONFIG_FAT_DMAMEMORY),y)
CSRCS += stm32_dma_alloc.c
endif
DEPPATH += --dep-path board
VPATH += :board
CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board

213
boards/arm/stm32h7/devebox-stm32h743/src/devebox-stm32h743.h Normal file
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/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/src/devebox-stm32h743.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32H7_DEVEBOX_STM32H743_SRC_DEVEBOX_STM32H743_H
#define __BOARDS_ARM_STM32H7_DEVEBOX_STM32H743_SRC_DEVEBOX_STM32H743_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#define HAVE_USBDEV 1
#define HAVE_USBHOST 1
/* procfs File System */
#ifdef CONFIG_FS_PROCFS
# ifdef CONFIG_NSH_PROC_MOUNTPOINT
# define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
# else
# define STM32_PROCFS_MOUNTPOINT "/proc"
# endif
#endif
/* Can't support USB host or device features if USB OTG FS is not enabled */
#ifndef CONFIG_STM32_OTGFS
# undef HAVE_USBDEV
# undef HAVE_USBHOST
#endif
/* Can't support USB device if USB device is not enabled */
#ifndef CONFIG_USBDEV
# undef HAVE_USBDEV
#endif
/* Can't support USB host is USB host is not enabled */
#ifndef CONFIG_USBHOST
# undef HAVE_USBHOST
#endif
/* Check if we should enable the USB monitor before starting NSH */
#ifndef CONFIG_USBMONITOR
# undef HAVE_USBMONITOR
#endif
#ifndef HAVE_USBDEV
# undef CONFIG_USBDEV_TRACE
#endif
#ifndef HAVE_USBHOST
# undef CONFIG_USBHOST_TRACE
#endif
#if !defined(CONFIG_USBDEV_TRACE) && !defined(CONFIG_USBHOST_TRACE)
# undef HAVE_USBMONITOR
#endif
#if !defined(CONFIG_STM32_PROGMEM) || !defined(CONFIG_MTD_PROGMEM)
# undef HAVE_PROGMEM_CHARDEV
#endif
/* Check if we can support the RTC driver */
#define HAVE_RTC_DRIVER 1
#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER)
# undef HAVE_RTC_DRIVER
#endif
/* LED
*
* The DevEbox STM32H743 board has only one Green LED controlled by GPIO.
* and connected to PA1
*/
#define GPIO_LD1 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | \
GPIO_OUTPUT_CLEAR | GPIO_PORTA | GPIO_PIN1)
/* BUTTONS
*
* The pushbutton K1 is connected to GPIO PE3.
* The pushbutton K2 is connected to GPIO PC5.
*/
#define GPIO_BTN1_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTE | GPIO_PIN3)
#define GPIO_BTN2_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTC | GPIO_PIN5)
/* SD Card
*
* PD4 Card detected pin
*/
#if defined(CONFIG_STM32_SDMMC1)
# define HAVE_SDIO
#endif
#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_MMCSD_SDIO)
# undef HAVE_SDIO
#endif
#define GPIO_SDIO_NCD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTD|GPIO_PIN4) /* PD4 */
#define SDIO_SLOTNO 0
#define SDIO_MINOR 0
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the Mikroe Clicker2
* STM32 board.
*
****************************************************************************/
void weak_function stm32_spidev_initialize(void);
/****************************************************************************
* Name: stm32_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y &&
* CONFIG_NSH_ARCHINIT:
* Called from the NSH library
*
****************************************************************************/
int stm32_bringup(void);
/****************************************************************************
* Name: stm32_dma_alloc_init
*
* Description:
* Called to create a FAT DMA allocator.
*
* Returned Value:
* 0 on success or -ENOMEM
*
****************************************************************************/
#if defined (CONFIG_FAT_DMAMEMORY)
int stm32_dma_alloc_init(void);
#endif
/****************************************************************************
* Name: stm32_sdio_initialize
*
* Description:
* Initialize SDIO-based MMC/SD card support.
*
****************************************************************************/
#ifdef HAVE_SDIO
int stm32_sdio_initialize(void);
#endif
/****************************************************************************
* Name: stm32_w25qxxx_setup
*
* Description:
* Initialize and register the FLash for W25QXXX driver.
*
****************************************************************************/
#ifdef CONFIG_MTD_W25QXXXJV
int stm32_w25qxxx_setup(void);
#endif
#ifdef CONFIG_DAC
int board_dac_initialize(void);
#endif
#endif /* __BOARDS_ARM_STM32H7_DEVEBOX_STM32H743_SRC_DEVEBOX_STM32H743_H */

78
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/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/src/stm32_appinitialize.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/board.h>
#include "devebox-stm32h743.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
#ifdef CONFIG_BOARD_LATE_INITIALIZE
/* Board initialization already performed by board_late_initialize() */
return OK;
#else
/* Perform board-specific initialization */
return stm32_bringup();
#endif
}

113
boards/arm/stm32h7/devebox-stm32h743/src/stm32_autoleds.c Normal file
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/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/src/stm32_autoleds.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <debug.h>
#include <sys/param.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "stm32_gpio.h"
#include "devebox-stm32h743.h"
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
* Private Functions
****************************************************************************/
static inline void set_led(bool v)
{
ledinfo("Turn LED %s\n", v? "on":"off");
stm32_gpiowrite(GPIO_LD1, !v);
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
void board_autoled_initialize(void)
{
/* Configure LED GPIO for output */
stm32_configgpio(GPIO_LD1);
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
ledinfo("board_autoled_on(%d)\n", led);
switch (led)
{
case LED_STARTED:
case LED_HEAPALLOCATE:
/* As the board provides only one soft controllable LED, we simply
* turn it on when the board boots.
*/
set_led(true);
break;
case LED_PANIC:
/* For panic state, the LED is blinking */
set_led(true);
break;
}
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
switch (led)
{
case LED_PANIC:
/* For panic state, the LED is blinking */
set_led(false);
break;
}
}
#endif /* CONFIG_ARCH_LEDS */

81
boards/arm/stm32h7/devebox-stm32h743/src/stm32_boot.c Normal file
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/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/src/stm32_boot.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "arm_internal.h"
#include "stm32_start.h"
#include "devebox-stm32h743.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point.
* This entry point is called early in the initialization -- after all
* memory has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void stm32_boardinitialize(void)
{
#ifdef CONFIG_ARCH_LEDS
/* Configure on-board LEDs if LED support has been selected. */
board_autoled_initialize();
#endif
}
/****************************************************************************
* Name: board_late_initialize
*
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize()
* will be called immediately after up_initialize() is called and just
* before the initial application is started. This additional
* initialization phase may be used, for example, to initialize board-
* specific device drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_LATE_INITIALIZE
void board_late_initialize(void)
{
stm32_bringup();
}
#endif

156
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/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/src/stm32_bringup.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <syslog.h>
#include <errno.h>
#include <arch/board/board.h>
#include <nuttx/fs/fs.h>
#include <nuttx/input/buttons.h>
#include <nuttx/usb/cdcacm.h>
#include <nuttx/mmcsd.h>
#include "devebox-stm32h743.h"
#include "stm32_gpio.h"
#include "stm32_gpio_helper.h"
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y &&
* CONFIG_NSH_ARCHINIT:
* Called from the NSH library
*
****************************************************************************/
#if (defined(CONFIG_USART1_SERIAL_CONSOLE) && \
(GPIO_OTGFS_ID & GPIO_PIN_MASK) == GPIO_PIN10 && \
(GPIO_OTGFS_ID & GPIO_PORT_MASK) == GPIO_PORTA)
# if (defined(CONFIG_STM32_OTGFS) && !defined(CONFIG_OTG_ID_GPIO_DISABLE))
# error "CONFLICT: OTGFS_ID pin uses PA10, which is also USART1 RX. \
Enable CONFIG_OTG_ID_GPIO_DISABLE to disable ID pin, or change console UART pins."
# endif
# if (defined(CONFIG_STM32_OTGHS) && !defined(CONFIG_OTG_HS_ID_DISABLE))
# error "CONFLICT: OTGHS_ID pin uses PA10, which is also USART1 RX. \
Enable CONFIG_OTG_HS_ID_DISABLE to disable ID pin, or change console UART pins."
# endif
#endif
int stm32_bringup(void)
{
int ret = OK;
UNUSED(ret);
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */
ret = nx_mount(NULL, STM32_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR,
"ERROR: Failed to mount the PROC filesystem: %d\n", ret);
}
#endif /* CONFIG_FS_PROCFS */
#if defined(CONFIG_FAT_DMAMEMORY)
if (stm32_dma_alloc_init() < 0)
{
syslog(LOG_ERR, "DMA alloc FAILED");
}
#endif
#ifdef HAVE_SDIO
/* Initialize the SDIO block driver */
ret = stm32_sdio_initialize();
if (ret < 0)
{
syslog(LOG_ERR,
"ERROR: Failed to initialize MMC/SD driver: %d\n", ret);
}
#endif
#ifdef CONFIG_MTD_W25QXXXJV
ret = stm32_w25qxxx_setup();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_w25qxxx_setup failed: %d\n", ret);
}
#endif
#ifdef CONFIG_INPUT_BUTTONS
#ifdef CONFIG_INPUT_BUTTONS_LOWER
ret = btn_lower_initialize("/dev/buttons");
if (ret != OK)
{
syslog(LOG_ERR, "ERROR: btn_lower_initialize() failed: %d\n", ret);
return ret;
}
#else
board_button_initialize();
#endif
#endif
#ifdef CONFIG_CDCACM
ret = cdcacm_initialize(0, NULL);
if (ret != OK)
{
syslog(LOG_ERR, "ERROR: cdcacm_initialize() failed: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_DAC
ret = board_dac_initialize();
if (ret != OK)
{
syslog(LOG_ERR, "ERROR: board_dac_initialize() failed: %d\n", ret);
return ret;
}
#endif
return OK;
}

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/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/src/stm32_buttons.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include "stm32_gpio.h"
#include "devebox-stm32h743.h"
#include <arch/board/board.h>
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_button_initialize
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
****************************************************************************/
uint32_t board_button_initialize(void)
{
/* Configure the buttons as an input. NOTE that EXTI interrupts are
* also configured for the pin.
*/
stm32_configgpio(USER_BTN1);
stm32_configgpio(USER_BTN2);
return NUM_BUTTONS;
}
/****************************************************************************
* Name: board_buttons
*
* Description:
* Returns current button states as a bitmask. Bit 0 = USER_BTN1, bit 1 =
* USER_BTN2. A set bit means the button is pressed (active low logic).
*
****************************************************************************/
uint32_t board_buttons(void)
{
uint32_t ret = 0;
/* Button 1 – check if low (pressed) */
if (!stm32_gpioread(USER_BTN1))
{
ret |= (1 << 0);
}
/* Button 2 – check if low (pressed) */
if (!stm32_gpioread(USER_BTN2))
{
ret |= (1 << 1);
}
return ret;
}
/****************************************************************************
* Name: board_button_irq
*
* Description:
* Attach or detach an interrupt handler to a button. The driver calls this
* function when it needs to enable/disable interrupts for a specific
* button.
* The 'id' parameter is the button index (0 for button 1, 1 for button 2).
*
****************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
int board_button_irq(int id, xcpt_t irqhandler, void *arg)
{
int ret = -EINVAL;
switch (id)
{
case 0: /* Button 1 */
ret = stm32_gpiosetevent(USER_BTN1, true, true, true,
irqhandler, arg);
break;
case 1: /* Button 2 */
ret = stm32_gpiosetevent(USER_BTN2, true, true, true,
irqhandler, arg);
break;
default:
break;
}
return ret;
}
#endif /* CONFIG_ARCH_IRQBUTTONS */
#endif /* CONFIG_ARCH_BUTTONS */

97
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/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/src/stm32_dac_init.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/analog/dac.h>
#include "devebox-stm32h743.h"
#include "stm32_dac.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_dac_initialize
*
* Description:
* Initialize the DAC and register the DAC devices.
* This function should be called from board_app_initialize().
*
* Input Parameters:
* None
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
int board_dac_initialize(void)
{
int ret = OK;
struct dac_dev_s *dac;
#ifdef CONFIG_STM32_DAC1CH1
/* Initialize DAC1 channel 1 (interface 0) and register as /dev/dac0 */
dac = stm32_dacinitialize(0);
if (dac == NULL)
{
_err("ERROR: Failed to initialize DAC1 channel 1\n");
return -ENODEV;
}
ret = dac_register("/dev/dac0", dac);
if (ret < 0)
{
_err("ERROR: Failed to register DAC1 channel 1: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_STM32_DAC1CH2
/* Initialize DAC1 channel 2 (interface 1) and register as /dev/dac1 */
dac = stm32_dacinitialize(1);
if (dac == NULL)
{
_err("ERROR: Failed to initialize DAC1 channel 2\n");
return -ENODEV;
}
ret = dac_register("/dev/dac1", dac);
if (ret < 0)
{
_err("ERROR: Failed to register DAC1 channel 2: %d\n", ret);
return ret;
}
#endif
return ret;
}

107
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/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/src/stm32_dma_alloc.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <syslog.h>
#include <stdint.h>
#include <errno.h>
#include <nuttx/mm/gran.h>
#include "devebox-stm32h743.h"
#if defined(CONFIG_FAT_DMAMEMORY)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if !defined(CONFIG_GRAN)
# error microSD DMA support requires CONFIG_GRAN
#endif
#define BOARD_DMA_ALLOC_POOL_SIZE (8*512)
/****************************************************************************
* Private Data
****************************************************************************/
static GRAN_HANDLE dma_allocator;
/* The DMA heap size constrains the total number of things that can be
* ready to do DMA at a time.
*
* For example, FAT DMA depends on one sector-sized buffer per
* filesystem plus one sector-sized buffer per file.
*
* We use a fundamental alignment / granule size of 64B; this is
* sufficient to guarantee alignment for the largest STM32 DMA burst
* (16 beats x 32bits).
*/
static uint8_t g_dma_heap[BOARD_DMA_ALLOC_POOL_SIZE]
aligned_data(64);
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_dma_alloc_init
*
* Description:
* All boards may optionally provide this API to instantiate a pool of
* memory for uses with FAST FS DMA operations.
*
****************************************************************************/
int stm32_dma_alloc_init(void)
{
dma_allocator = gran_initialize(g_dma_heap,
sizeof(g_dma_heap),
7, /* 128B granule - must be > alignment (XXX bug?) */
6); /* 64B alignment */
if (dma_allocator == NULL)
{
return -ENOMEM;
}
return OK;
}
/* DMA-aware allocator stubs for the FAT filesystem. */
void *fat_dma_alloc(size_t size)
{
return gran_alloc(dma_allocator, size);
}
void fat_dma_free(void *memory, size_t size)
{
gran_free(dma_allocator, memory, size);
}
#endif /* CONFIG_FAT_DMAMEMORY */

309
boards/arm/stm32h7/devebox-stm32h743/src/stm32_gpio_helper.c Normal file
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/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/src/stm32_gpio_helper.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <nuttx/ioexpander/gpio.h>
#include <stdlib.h>
#include <string.h>
#include <errno.h>
#include "stm32_gpio.h"
#include "stm32_gpio_helper.h"
#include "arm_internal.h"
#include "hardware/stm32_exti.h"
/****************************************************************************
* Private Types
****************************************************************************/
struct gpio_helper_dev_s
{
struct gpio_dev_s dev;
uint32_t pin;
pin_interrupt_t callback;
uint8_t exti_line;
bool irq_enabled;
};
/****************************************************************************
* Private Data
****************************************************************************/
static struct gpio_helper_dev_s *g_gpio_helper_exti_dev[16];
/****************************************************************************
* Private Functions - GPIO Operations
****************************************************************************/
static int gpio_helper_read(FAR struct gpio_dev_s *dev, FAR bool *value)
{
FAR struct gpio_helper_dev_s *priv = (FAR struct gpio_helper_dev_s *)dev;
*value = stm32_gpioread(priv->pin);
return OK;
}
static int gpio_helper_write(FAR struct gpio_dev_s *dev, bool value)
{
FAR struct gpio_helper_dev_s *priv = (FAR struct gpio_helper_dev_s *)dev;
stm32_gpiowrite(priv->pin, value);
return OK;
}
static int gpio_helper_attach(FAR struct gpio_dev_s *dev,
pin_interrupt_t callback)
{
FAR struct gpio_helper_dev_s *priv = (FAR struct gpio_helper_dev_s *)dev;
priv->callback = callback;
return OK;
}
static int gpio_helper_enable(FAR struct gpio_dev_s *dev, bool enable)
{
FAR struct gpio_helper_dev_s *priv = (FAR struct gpio_helper_dev_s *)dev;
int irq = STM32_IRQ_EXTI0 + priv->exti_line;
if (enable)
{
up_enable_irq(irq);
priv->irq_enabled = true;
}
else
{
up_disable_irq(irq);
priv->irq_enabled = false;
}
return OK;
}
static int gpio_helper_setpintype(FAR struct gpio_dev_s *dev,
enum gpio_pintype_e pintype)
{
return -ENOSYS;
}
static int gpio_helper_setdebounce(FAR struct gpio_dev_s *dev,
unsigned long duration)
{
return -ENOSYS;
}
static int gpio_helper_setmask(FAR struct gpio_dev_s *dev, bool enable)
{
FAR struct gpio_helper_dev_s *priv = (FAR struct gpio_helper_dev_s *)dev;
if (priv->exti_line >= 16)
return -EINVAL;
uint32_t bit = 1 << priv->exti_line;
if (enable)
modifyreg32(STM32_EXTI_CPUIMR1, 0, bit); /* mask interrupt */
else
modifyreg32(STM32_EXTI_CPUIMR1, bit, 0); /* unmask interrupt */
return OK;
}
/****************************************************************************
* Private Data - Operations Table
****************************************************************************/
static const struct gpio_operations_s g_gpio_helper_ops =
{
.go_read = gpio_helper_read,
.go_write = gpio_helper_write,
.go_attach = gpio_helper_attach,
.go_enable = gpio_helper_enable,
.go_setpintype = gpio_helper_setpintype,
.go_setdebounce = gpio_helper_setdebounce,
.go_setmask = gpio_helper_setmask,
};
/****************************************************************************
* Private Functions - Interrupt Handler
****************************************************************************/
static int gpio_helper_exti_handler(int irq, void *context, FAR void *arg)
{
int line = irq - STM32_IRQ_EXTI0;
if (line < 0 || line >= 16)
return OK;
/* Clear pending bit */
putreg32(1 << line, STM32_EXTI_CPUPR1);
struct gpio_helper_dev_s *priv = g_gpio_helper_exti_dev[line];
if (priv && priv->callback)
priv->callback(&priv->dev, 0);
return OK;
}
/****************************************************************************
* Private Functions - Common Registration
****************************************************************************/
static int gpio_helper_reg_common(uint32_t pin, const char *devpath,
enum gpio_pintype_e pintype,
bool with_irq)
{
struct gpio_helper_dev_s *priv;
int ret;
unsigned int pin_num = (pin & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
if (with_irq)
{
/* Enable EXTI for this pin (stm32_configgpio will set SYSCFG) */
pin |= GPIO_EXTI;
}
stm32_configgpio(pin);
priv = malloc(sizeof(*priv));
if (!priv)
return -ENOMEM;
memset(priv, 0, sizeof(*priv));
priv->dev.gp_pintype = pintype;
priv->dev.gp_ops = &g_gpio_helper_ops;
priv->pin = pin;
priv->exti_line = pin_num;
priv->irq_enabled = false;
ret = gpio_pin_register_byname(&priv->dev, devpath);
if (ret < 0)
{
free(priv);
return ret;
}
if (with_irq)
{
int irq = STM32_IRQ_EXTI0 + pin_num;
g_gpio_helper_exti_dev[pin_num] = priv;
ret = irq_attach(irq, gpio_helper_exti_handler, NULL);
if (ret < 0)
{
gpio_pin_unregister_byname(&priv->dev, devpath);
free(priv);
return ret;
}
/* Disable interrupt by default – user enables via ioctl */
up_disable_irq(irq);
}
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
int gpio_helper_reg_output(uint32_t pin, const char *devpath)
{
return gpio_helper_reg_common(pin, devpath, GPIO_OUTPUT_PIN, false);
}
int gpio_helper_reg_input(uint32_t pin, const char *devpath,
enum gpio_helper_pull_e pull)
{
uint32_t cfg = GPIO_INPUT;
if (pull == GPIO_HELPER_PULL_UP)
cfg |= GPIO_PULLUP;
else if (pull == GPIO_HELPER_PULL_DOWN)
cfg |= GPIO_PULLDOWN;
pin = (pin & ~(GPIO_MODE_MASK | GPIO_PUPD_MASK)) | cfg;
return gpio_helper_reg_common(pin, devpath, GPIO_INPUT_PIN, false);
}
int gpio_helper_reg_input_interrupt(uint32_t pin, const char *devpath,
enum gpio_helper_pull_e pull,
enum gpio_helper_mode_e mode)
{
uint32_t cfg = GPIO_INPUT;
if (pull == GPIO_HELPER_PULL_UP)
cfg |= GPIO_PULLUP;
else if (pull == GPIO_HELPER_PULL_DOWN)
cfg |= GPIO_PULLDOWN;
/* Configure pin as input with EXTI (trigger type set later) */
pin = (pin & ~(GPIO_MODE_MASK | GPIO_PUPD_MASK)) | cfg | GPIO_EXTI;
int ret = gpio_helper_reg_common(pin, devpath, GPIO_INTERRUPT_PIN, true);
if (ret < 0)
{
return ret;
}
/* Now configure EXTI trigger via registers */
unsigned int line = (pin & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
uint32_t bit = 1 << line;
/* Clear previous trigger settings */
modifyreg32(STM32_EXTI_RTSR1, bit, 0);
modifyreg32(STM32_EXTI_FTSR1, bit, 0);
switch (mode)
{
case GPIO_HELPER_INTERRUPT_RISING:
modifyreg32(STM32_EXTI_RTSR1, 0, bit);
break;
case GPIO_HELPER_INTERRUPT_FALLING:
modifyreg32(STM32_EXTI_FTSR1, 0, bit);
break;
case GPIO_HELPER_INTERRUPT_BOTH:
modifyreg32(STM32_EXTI_RTSR1, 0, bit);
modifyreg32(STM32_EXTI_FTSR1, 0, bit);
break;
case GPIO_HELPER_INTERRUPT_HIGH:
/* For high-level trigger, set RTSR */
modifyreg32(STM32_EXTI_RTSR1, 0, bit);
break;
case GPIO_HELPER_INTERRUPT_LOW:
/* For low-level trigger, set FTSR */
modifyreg32(STM32_EXTI_FTSR1, 0, bit);
break;
default:
return -EINVAL;
}
/* Unmask in EXTI (but IRQ still disabled; enable via ioctl) */
modifyreg32(STM32_EXTI_CPUIMR1, 0, bit);
return OK;
}

72
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/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/src/stm32_gpio_helper.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __STM32_GPIO_HELPER_H
#define __STM32_GPIO_HELPER_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <stdint.h>
#include <stdbool.h>
/* Pin modes */
enum gpio_helper_mode_e
{
GPIO_HELPER_OUTPUT = 0,
GPIO_HELPER_INPUT,
GPIO_HELPER_INTERRUPT_RISING,
GPIO_HELPER_INTERRUPT_FALLING,
GPIO_HELPER_INTERRUPT_BOTH,
GPIO_HELPER_INTERRUPT_HIGH,
GPIO_HELPER_INTERRUPT_LOW,
};
/* Pull configuration */
enum gpio_helper_pull_e
{
GPIO_HELPER_PULL_NONE = 0,
GPIO_HELPER_PULL_UP,
GPIO_HELPER_PULL_DOWN,
};
/* Register a GPIO pin as output */
int gpio_helper_reg_output(uint32_t pin, const char *devpath);
/* Register a GPIO pin as input (with optional pull) */
int gpio_helper_reg_input(uint32_t pin, const char *devpath,
enum gpio_helper_pull_e pull);
/* Register a GPIO pin as interrupt input (with optional pull and
* trigger mode)
*/
int gpio_helper_reg_input_interrupt(uint32_t pin, const char *devpath,
enum gpio_helper_pull_e pull,
enum gpio_helper_mode_e mode);
#endif /* __STM32_GPIO_HELPER_H */

76
boards/arm/stm32h7/devebox-stm32h743/src/stm32_ioctl.c Normal file
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/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/src/stm32_ioctl.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <errno.h>
#include <nuttx/board.h>
#include "devebox-stm32h743.h"
#ifdef CONFIG_BOARDCTL_IOCTL
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_ioctl
*
* Description:
* The "landing site" for much of the boardctl() interface. Generic board-
* control functions invoked via ioctl() get routed through here.
*
* Since we don't do anything unusual at the moment, this function
* accomplishes nothing except avoid a missing-function linker error if
* CONFIG_BOARDCTL_IOCTL is selected.
*
* Input Parameters:
* cmd - IOCTL command being requested.
* arg - Arguments for the IOCTL.
*
* Returned Value:
* we don't yet support any boardctl IOCTLs. This function always returns
* -ENOTTY which is the standard IOCTL return value when a command is not
* supported
*
****************************************************************************/
int board_ioctl(unsigned int cmd, uintptr_t arg)
{
switch (cmd)
{
default:
return -ENOTTY;
}
return OK;
}
#endif /* CONFIG_BOARDCTL_IOCTL */

158
boards/arm/stm32h7/devebox-stm32h743/src/stm32_sdmmc.c Normal file
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/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/src/stm32_sdmmc.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/sdio.h>
#include <nuttx/mmcsd.h>
#include "stm32_gpio.h"
#include "stm32_sdmmc.h"
#include "devebox-stm32h743.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Card detections requires card support and a card detection GPIO */
#define HAVE_NCD 1
#if !defined(HAVE_SDIO) || !defined(GPIO_SDIO_NCD)
# undef HAVE_NCD
#endif
/****************************************************************************
* Private Data
****************************************************************************/
static struct sdio_dev_s *g_sdio_dev;
#ifdef HAVE_NCD
static bool g_sd_inserted;
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_ncd_interrupt
*
* Description:
* Card detect interrupt handler.
*
****************************************************************************/
#ifdef HAVE_NCD
static int stm32_ncd_interrupt(int irq, void *context, void *param)
{
bool present;
present = stm32_gpioread(GPIO_SDIO_NCD);
if (present != g_sd_inserted)
{
sdio_mediachange(g_sdio_dev, present);
g_sd_inserted = present;
}
return OK;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_sdio_initialize
*
* Description:
* Initialize SDIO-based MMC/SD card support
*
****************************************************************************/
int stm32_sdio_initialize(void)
{
int ret;
#ifdef HAVE_NCD
/* Configure the card detect GPIO */
stm32_configgpio(GPIO_SDIO_NCD);
/* Register an interrupt handler for the card detect pin */
stm32_gpiosetevent(GPIO_SDIO_NCD, true, true, true,
stm32_ncd_interrupt, NULL);
#endif
/* Mount the SDIO-based MMC/SD block driver */
/* First, get an instance of the SDIO interface */
finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO);
g_sdio_dev = sdio_initialize(SDIO_SLOTNO);
if (!g_sdio_dev)
{
ferr("ERROR: Failed to initialize SDIO slot %d\n", SDIO_SLOTNO);
return -ENODEV;
}
/* Report card presence to the lower driver BEFORE binding the upper
* driver, so that mmcsd_hwinitialize sees the correct card status.
*/
#ifdef HAVE_NCD
g_sd_inserted = stm32_gpioread(GPIO_SDIO_NCD);
finfo("Card detect : %d\n", g_sd_inserted);
sdio_mediachange(g_sdio_dev, g_sd_inserted);
#else
sdio_mediachange(g_sdio_dev, true);
#endif
/* Now bind the SDIO interface to the MMC/SD driver */
finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR);
ret = mmcsd_slotinitialize(SDIO_MINOR, g_sdio_dev);
if (ret != OK)
{
ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
return ret;
}
finfo("Successfully bound SDIO to the MMC/SD driver\n");
return OK;
}

296
boards/arm/stm32h7/devebox-stm32h743/src/stm32_usb.c Normal file
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/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/src/stm32_usb.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <sched.h>
#include <errno.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/kthread.h>
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbhost.h>
#include <nuttx/usb/usbdev_trace.h>
#include "arm_internal.h"
#include "chip.h"
#include "stm32_gpio.h"
#include "stm32_otg.h"
#include "devebox-stm32h743.h"
#ifdef CONFIG_STM32_OTGFS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST)
# define HAVE_USB 1
#else
# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
# undef HAVE_USB
#endif
#ifndef CONFIG_DEVEBOX_STM32H743_USBHOST_PRIO
# define CONFIG_DEVEBOX_STM32H743_USBHOST_PRIO 100
#endif
#ifndef CONFIG_DEVEBOX_STM32H743_USBHOST_STACKSIZE
# define CONFIG_DEVEBOX_STM32H743_USBHOST_STACKSIZE 2048
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_USBHOST
static struct usbhost_connection_s *g_usbconn;
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: usbhost_waiter
*
* Description:
* Wait for USB devices to be connected.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
static int usbhost_waiter(int argc, char *argv[])
{
struct usbhost_hubport_s *hport;
uinfo("Running\n");
for (; ; )
{
/* Wait for the device to change state */
DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
uinfo("%s\n", hport->connected ? "connected" : "disconnected");
/* Did we just become connected? */
if (hport->connected)
{
/* Yes.. enumerate the newly connected device */
CONN_ENUMERATE(g_usbconn, hport);
}
}
/* Keep the compiler from complaining */
return 0;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host
* functionality.
* This function will start a thread that will monitor for device
* connection/disconnection events.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
int stm32_usbhost_initialize(void)
{
int ret;
/* First, register all of the class drivers needed to support the drivers
* that we care about:
*/
uinfo("Register class drivers\n");
#ifdef CONFIG_USBHOST_HUB
/* Initialize USB hub class support */
ret = usbhost_hub_initialize();
if (ret < 0)
{
uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_MSC
/* Register the USB mass storage class class */
ret = usbhost_msc_initialize();
if (ret != OK)
{
uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_CDCACM
/* Register the CDC/ACM serial class */
ret = usbhost_cdcacm_initialize();
if (ret != OK)
{
uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_HIDKBD
/* Initialize the HID keyboard class */
ret = usbhost_kbdinit();
if (ret != OK)
{
uerr("ERROR: Failed to register the HID keyboard class\n");
}
#endif
#ifdef CONFIG_USBHOST_HIDMOUSE
/* Initialize the HID mouse class */
ret = usbhost_mouse_init();
if (ret != OK)
{
uerr("ERROR: Failed to register the HID mouse class\n");
}
#endif
/* Then get an instance of the USB host interface */
uinfo("Initialize USB host\n");
g_usbconn = stm32_otgfshost_initialize(0);
if (g_usbconn)
{
/* Start a thread to handle device connection. */
uinfo("Start usbhost_waiter\n");
ret = kthread_create("usbhost", CONFIG_DEVEBOX_STM32H743_USBHOST_PRIO,
CONFIG_DEVEBOX_STM32H743_USBHOST_STACKSIZE,
usbhost_waiter, NULL);
return ret < 0 ? -ENOEXEC : OK;
}
return -ENODEV;
}
#endif
/****************************************************************************
* Name: stm32_usbhost_vbusdrive
*
* Description:
* Enable/disable driving of VBUS 5V output. This function must be
* provided be each platform that implements the STM32 OTG FS host
* interface
*
* "On-chip 5 V VBUS generation is not supported. For this reason, a
* charge pump or, if 5 V are available on the application board, a
* basic power switch, must be added externally to drive the 5 V VBUS
* line. The external charge pump can be driven by any GPIO output.
* When the application decides to power on VBUS using the chosen GPIO,
* it must also set the port power bit in the host port control and status
* register (PPWR bit in OTG_FS_HPRT).
*
* "The application uses this field to control power to this port, and
* the core clears this bit on an overcurrent condition."
*
* Input Parameters:
* iface - For future growth to handle multiple USB host interface.
* Should be zero.
* enable - true: enable VBUS power; false: disable VBUS power
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_USBHOST
void stm32_usbhost_vbusdrive(int iface, bool enable)
{
DEBUGASSERT(iface == 0);
/* Set the Power Switch by driving the active high enable pin */
stm32_gpiowrite(GPIO_OTGFS_PWRON, enable);
}
#endif
/****************************************************************************
* Name: stm32_setup_overcurrent
*
* Description:
* Setup to receive an interrupt-level callback if an overcurrent
* condition is detected.
*
* Input Parameters:
* handler - New overcurrent interrupt handler
* arg - The argument provided for the interrupt handler
*
* Returned Value:
* Zero (OK) is returned on success. Otherwise, a negated errno value
* is returned to indicate the nature of the failure.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
int stm32_setup_overcurrent(xcpt_t handler, void *arg)
{
return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg);
}
#endif
/****************************************************************************
* Name: stm32_usbsuspend
*
* Description:
* Board logic must provide the stm32_usbsuspend logic if the USBDEV
* driver is used. This function is called whenever the USB enters or
* leaves suspend mode. This is an opportunity for the board logic to
* shutdown clocks, power, etc. while the USB is suspended.
*
****************************************************************************/
#ifdef CONFIG_USBDEV
void stm32_usbsuspend(struct usbdev_s *dev, bool resume)
{
uinfo("resume: %d\n", resume);
}
#endif
#endif /* CONFIG_STM32_OTGFS */

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/****************************************************************************
* boards/arm/stm32h7/devebox-stm32h743/src/stm32_w25q.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdio.h>
#include <syslog.h>
#include <errno.h>
#include <debug.h>
#include <string.h>
#include <stdlib.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <nuttx/fs/fs.h>
#include <arch/board/board.h>
#include <nuttx/mtd/mtd.h>
#include <nuttx/drivers/drivers.h>
#include <nuttx/drivers/ramdisk.h>
#ifdef CONFIG_FS_NXFFS
#include <nuttx/fs/nxffs.h>
#endif
#ifdef CONFIG_FS_SMARTFS
#include <nuttx/fs/smart.h>
#endif
#include "devebox-stm32h743.h"
#include "stm32_qspi.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_w25qxxx_setup
*
* Description:
* This function is called by board-bringup logic to configure the
* flash device.
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
int stm32_w25qxxx_setup(void)
{
struct qspi_dev_s *qspi_dev;
struct mtd_dev_s *mtd_dev;
int ret = -1;
qspi_dev = stm32_qspi_initialize(0);
if (!qspi_dev)
{
_err("ERROR: Failed to initialize W25 minor %d: %d\n",
0, ret);
return -1;
}
mtd_dev = w25qxxxjv_initialize(qspi_dev, true);
if (!mtd_dev)
{
_err("ERROR: w25qxxxjv_initialize() failed!\n");
return -1;
}
#if defined(CONFIG_FS_NXFFS) && !defined(CONFIG_FS_LITTLEFS)
/* Initialize to provide NXFFS on the W25QXXX MTD interface */
ret = nxffs_initialize(mtd_dev);
if (ret < 0)
{
_err("ERROR: NXFFS initialization failed: %d\n", ret);
return ret;
}
ret = nx_mount(NULL, "/w25", "nxffs", 0, "autoformat");
if (ret < 0)
{
_err("ERROR: Failed to mount the NXFFS volume: %d\n", ret);
return ret;
}
#endif
#if !defined(CONFIG_FS_NXFFS) && defined(CONFIG_FS_LITTLEFS)
/* Register the MTD driver so that it can be accessed from the
* VFS.
*/
ret = register_mtddriver("/dev/w25", mtd_dev, 0755, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to register MTD driver: %d\n",
ret);
}
/* Mount the LittleFS file system */
ret = nx_mount("/dev/w25", "/w25", "littlefs", 0, "autoformat");
if (ret < 0)
{
syslog(LOG_ERR,
"ERROR: Failed to mount LittleFS at /w25: %d\n",
ret);
}
#endif
return 0;
}