Commit graph

2847 commits

Author SHA1 Message Date
raiden00pl
ffe831196b boards/arm/stm32f4/stm32f401rc-rs485: fix compilation
fix compilation error

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-10 22:03:20 +08:00
Erkan Vatan
9bb24d43ce boards/arm/am67: Add support for t3-gem-o1 board.
This commit introduces basic support for the T3 Gemstone O1 (t3-gem-o1)
development board, including board configuration, linker scripts, and
drivers for NSH. Currently only UART console is supported.
All necessary files and configurations are added to enable building and
running NuttX on this TI AM67-based board.

Co-authored-by: Emre Cecanpunar <emreleno@gmail.com>
Co-authored-by: Abdullah Türkmen <abdullahturkmen@protonmail.com>
Co-authored-by: Muhammet Onur Bayraktar <mobayraktar@t3gemstone.org>
Co-authored-by: Bayram Akay <bakay@t3gemstone.org>
Co-authored-by: Nazmi Aras <nazmi.aras@t3gemstone.org>
Signed-off-by: Erkan Vatan <evatan@t3gemstone.org>
2026-05-28 14:16:03 +02:00
Peter Barada
6bba29a2ba arch/arm/src/stm32h7: Add support for CRYP peripheral
Add STM32H7 support for AES-CBC/CTR HW encryption accelerator.
Add nucleo-h753zi:crypt defconfig.

Signed-off-by: Peter Barada <peter.barada@gmail.com>
2026-05-27 23:50:18 +08:00
raiden00pl
a8f8979bfe boards/nucleo-c092rc: add pulse count example
add pulse count example for nucleo-c092rc

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-05-25 14:33:11 +02:00
raiden00pl
d54ed68aa0 boards/nucleo-f446re: add pulse count example
add pulse count example for nucleo-f446re

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-05-25 14:33:11 +02:00
raiden00pl
4f929d63f3 boards/nucleo-h743zi2: add pulse count example
add pulse count example for nucleo-h743zi2

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-05-25 14:33:11 +02:00
ImBonkers
921c9d1c2f boards/arm/stm32n6/nucleo-n657x0-q: Add userleds support.
Add the userleds driver and register the /dev/userleds device so the
three on-board LEDs (LD5/LD6/LD7) can be driven from userspace when
CONFIG_ARCH_LEDS is disabled.  Structure mirrors
boards/arm/stm32h5/nucleo-h563zi with one adjustment: GPIO writes
invert state for the active-low wiring.  ARCH_LEDS / USERLED remain
mutually exclusive per the H5/H7 convention.

stm32_bringup.c now calls userled_lower_initialize("/dev/userleds")
when CONFIG_USERLED_LOWER is set; mirrors the H5 bringup hook.

Ship a nucleo-n657x0-q:leds defconfig that bundles ARCH_LEDS=n +
USERLED + USERLED_LOWER + EXAMPLES_LEDS (LEDSET=0x07) so the userled
path is reproducible with one configure step.

Tested on Nucleo-N657X0-Q with arm-none-eabi-gcc.  Configured with
nucleo-n657x0-q:leds, built and flashed: /dev/userleds appears and
the 'leds' NSH command cycles Red, Green and Blue independently as
expected.

Signed-off-by: ImBonkers <samuelnlinden@pm.me>
2026-05-23 20:23:35 +08:00
ImBonkers
58c07d00d1 boards/arm/stm32n6/nucleo-n657x0-q: Add autoleds support.
Add the autoleds driver for the three on-board user LEDs (LD5 red
PG10, LD6 green PG0, LD7 blue PG8; all active-low).  Structure
mirrors boards/arm/stm32h5/nucleo-h563zi with the polarity and
initial-OFF state corrected for the active-low wiring.

* boards/Kconfig: ARCH_BOARD_NUCLEO_N657X0_Q selects ARCH_HAVE_LEDS
  so the ARCH_LEDS prompt becomes available.
* arch/arm/src/stm32n6/stm32_idle.c: include <arch/board/board.h>
  so LED_IDLE is defined and up_idle() actually calls into the
  autoleds driver around WFI.

The existing nsh and ostest defconfigs do not pin CONFIG_ARCH_LEDS
and therefore inherit its Kconfig default (y when ARCH_HAVE_LEDS is
selected), so after this patch they include the autoleds driver by
default.  This matches the convention on the comparable H5 and H7
Nucleo defconfigs, which also leave ARCH_LEDS at its default.

Tested on Nucleo-N657X0-Q: nsh and ostest still build, flash and
run.  With CONFIG_ARCH_LEDS=y, green is steady at the NSH idle
prompt; red pulses on each IRQ but the on-time is too brief to be
clearly visible to the eye.

Signed-off-by: ImBonkers <samuelnlinden@pm.me>
2026-05-23 20:23:35 +08:00
Peter Barada
fc2f6c9fc5 boards/arm/stm32h7: Add support fpr nucleo-h753zi board
Add BSP for the NUCLEO-H753ZI board using nucleo-h743zi2 as base.

Signed-off-by: Peter Barada <peter.barada@gmail.com>
2026-05-21 08:56:24 +02:00
raiden00pl
4484f16efc boards/nucleo-c0XXX: add PWM support
add PWM support for nucleo-c071rb and nucleo-c092rc

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-05-20 13:13:01 -04:00
Xiang Xiao
2c9f91526a board: enable LTO on g431 nsh boards and fix LTO link with toolchain switch
For boards b-g431b-esc1/nsh, nucleo-g431kb/nsh and nucleo-g431rb/nsh,
the `.data` section of nuttx.elf overflows the 128 KB flash region by a
few hundred bytes on default GNU EABI builds:

    arm-none-eabi-ld: nuttx section `.data' will not fit in region `flash'
    arm-none-eabi-ld: region `flash' overflowed by 296 bytes

Enabling CONFIG_LTO_FULL=y in the corresponding defconfigs brings flash
usage back below the 128 KB limit (~93%).

Additionally, fix arch/arm/src/cmake/gcc.cmake so that when LTO is
enabled it always uses the gcc-ar / gcc-nm / gcc-ranlib wrappers, not
just when CONFIG_ARM_TOOLCHAIN_GNU_EABI is also set.  CI tooling (via
tools/testbuild.sh) configures cmake first, then flips the toolchain
choice in .config with kconfig-tweak before running `cmake --build`.
With the previous "ARM_TOOLCHAIN_GNU_EABI && !LTO_NONE" guard the
regen step would switch to plain `ar` for the .a files, even though the
linker driver picked at configure time is still arm-none-eabi-g++ and
the object files contain GCC LTO IR.  The result was a flood of
"undefined reference to `printf' / `free' / `puts' ..." link errors
when running tools/testbuild.sh -A -N -R on the *_CLANG variants.

Now that we are inside gcc.cmake the toolchain is unambiguously GCC,
so dropping the redundant CONFIG_ARM_TOOLCHAIN_GNU_EABI conjunct keeps
the LTO-aware ar wrappers in place across kconfig-tweak toolchain
switches.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2026-05-19 16:21:28 +08:00
Xiang Xiao
c6654b1106 !sched/clock: remove CONFIG_SYSTEM_TIME64 and always use 64-bit time
The 32-bit system clock has a limited range (~497 days) and the
configuration knob is no longer worth the complexity given that
practically every modern target already enables it.  Make 64-bit
time_t/clock_t/sclock_t/nuttx_time_t the only supported flavor.

Specifically:
  - Drop the SYSTEM_TIME64 Kconfig option and its dependent
    PERF_OVERFLOW_CORRECTION/HRTIMER guards in sched/Kconfig.
  - Remove every #ifdef CONFIG_SYSTEM_TIME64 branch in headers
    (include/{sys/types.h,limits.h,inttypes.h,nuttx/clock.h,
    nuttx/fs/hostfs.h}) and core code paths
    (sched/clock/clock.h, drivers/power/pm/pm_procfs.c,
    drivers/rpmsg/rpmsg_ping.c, fs/procfs/fs_procfsuptime.c,
    libs/libc/wqueue/work_usrthread.c,
    arch/avr/src/avrdx/avrdx_timerisr_tickless_alarm.c).
  - Strip CONFIG_SYSTEM_TIME64=y from every board defconfig.
  - Update Documentation/guides/rust.rst accordingly.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2026-05-19 16:21:28 +08:00
Xiang Xiao
1b3af76bf3 !libc/stream: remove CONFIG_LIBC_LONG_LONG and always support long long
Long long support is now unconditional in printf/scanf and related
helpers. Remove the Kconfig option, the conditional compilation in
libvsprintf/libvscanf/ultoa_invert, the build-time #error in the
rn2xx3 driver, and clean up CONFIG_LIBC_LONG_LONG entries from all
board defconfigs.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2026-05-19 16:21:28 +08:00
ImBonkers
8c0e52ed7d boards/arm/stm32n6/nucleo-n657x0-q: Add Nucleo-N657X0-Q board support.
Add board support for the STMicro Nucleo-N657X0-Q, sufficient to boot
NSH over the on-board ST-LINK virtual COM port (USART1, 115200 8N1)
in DEV (serial) boot mode.

Two defconfigs are shipped:

  - nsh:    minimal NuttShell prompt.
  - ostest: nsh + apps/testing/ostest for RTOS smoke testing.

Production signed XSPI flash boot is deferred to a follow-up; in DEV
mode the image is loaded directly into AXISRAM at 0x34000400 by the
host (e.g. STM32CubeProgrammer over ST-LINK), keeping the linker
script trivial — .text/.rodata/.data/.bss/.heap all in AXISRAM.

Signed-off-by: ImBonkers <samuelnlinden@pm.me>
2026-05-18 14:50:29 -03:00
raiden00pl
4df80e1928 !drivers/pwm: remove PWM_MULTICHAN option
BREAKING CHANGE: remove PWM_MULTICHAN option

PWM_MULTICHAN option is redundant, we can just set CONFIG_PWM_NCHANNELS > 1.
At default CONFIG_PWM_NCHANNELS is set to 1, so the default behavior is preserved.
Access to single channel API is now `info->channels[0].XXX` instead of `info->XXX`

This is the first step to simplify PWM implementation and make it more portable.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-05-18 11:35:25 -04:00
raiden00pl
deb52b0855 !arch/arm/src/stm32: remove STM32_USE_LEGACY_PINMAP
BREAKING CHANGE: remove STM32_USE_LEGACY_PINMAP and all references

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-05-07 11:45:23 +08:00
raiden00pl
cebdcdc692 boards/nucleo-h563zi/nshusbnet: normalize defconfig
boards/nucleo-h563zi/nshusbnet: normalize defconfig

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-05-06 08:33:06 -04:00
raiden00pl
7934a1c21c boards/stm32f3: migrate to new pinmap
migrate stm32f3 to new pinmap

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-05-06 08:33:06 -04:00
daniellizewski
fe67544d5f drivers/usbhost/usbhost_cdcecm.c: Converted CDC-ECM to lower half
Converted USB Host CDC-ECM to a lower half driver.
Removed existing full network driver callbacks and replaced with lower
half.

Signed-off-by: daniellizewski <daniellizewski@geotab.com>
2026-05-06 06:20:03 +08:00
daniellizewski
9b18160893 drivers/usbhost/usbhost_cdcecm.c: Added support for Host CDC-ECM
Added support for USB host to use an USB CDC-ECM device.
This class is used for usb-ethernet adapters as well as many modems.

Signed-off-by: daniellizewski <daniellizewski@geotab.com>
2026-05-06 06:20:03 +08:00
daniellizewski
761c17f1e0 drivers/usbhost/usbhost_enumerate.c: Allow selecting USB configuration
Added support for selecting a different USB configuration.
Certain USB devices offer different classes using different
configurations. This allows a board file to provide a callback
to select the proper configuration for a given USB device.

Signed-off-by: daniellizewski <daniellizewski@geotab.com>
2026-05-06 06:20:03 +08:00
raiden00pl
4b4ba522cb boards/stm32f4: migrate to new pinmap
migrate stm32f4 to new pinmap

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-05-05 13:30:30 -04:00
raiden00pl
ebb53a7ae6 boards/stm32f1: migrate to new pinmap
migrate stm32f1 to new pinmap

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-05-05 11:48:49 -04:00
raiden00pl
1df49fbb36 boards/stm32f2: migrate to new pinmap
migrate stm32f2 to new pinmap

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-05-05 11:47:42 -04:00
Alan Carvalho de Assis
fc89dfdc3c boards/weact-stm32h750: Don't disable compilation optimization
This board was failing because the CONFIG_DEBUG_NOOPT was enabled.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2026-05-05 15:01:35 +08:00
Matteo Golin
96041a7c58 boards/comments: Remove legacy comments
Removing legacy comments referring to calling setup functions from the
NSH library.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2026-05-04 12:16:11 -03:00
Matteo Golin
8e06efb047 boards/stm32f4discovery: Normalize mt6816 defconfig
Normalize board configuration for mt6816 config.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2026-05-04 12:16:11 -03:00
Matteo Golin
a8a492cb4f boards/arm: Remove app-specific initialization
Now that initialization is performed by BOARD_LATE_INITIALIZE,
app-specific initialization options are not needed.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2026-05-03 08:23:18 -03:00
Alan Carvalho de Assis
928d7682ce boards/stm32f4discovery: Add support to MT6816
This commit add support to use MagTek Magnetic Rotary Encoder MT6816
on STM32F4Discovery board.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2026-05-03 07:56:38 -03:00
Alan Carvalho de Assis
f8e78c1075 drivers/qe: Don't compile stm32_qencoder.c if STM32 QE is not enabled
NuttX uses Quadrature Encoder lower half driver to internal QE from
MCUs and also with Magnetic Rotary Encoder sensors. But when the
STM32 QE is not enabled, the board code will try to compile the
stm32_qencoder.c because Magnetic Rotary Encoders enables the
CONFIG_SENSORS_QENCODER. This patch fixes this issue.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2026-05-03 07:56:38 -03:00
Matteo Golin
51f77ee111 boards/config: Remove final mentions of NSH_ARCHINIT
Since `NSH_ARCHINIT` is now removed, this commit cleans the last few
references to this option in the defconfig files that were recently
modified and escaped removal in initialization simplification commit.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2026-05-02 15:25:45 -03:00
Matteo Golin
a5e8ea2b40 arch/ceva: Replace board_app_initialize
Replaced board_app_initialize logic with board_late_initialize.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2026-05-02 18:36:46 +08:00
Matteo Golin
66ae075ae8 boards/arm: Replace board_app_initialize
Replaced board_app_initialize logic with board_late_initialize.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2026-05-02 18:36:46 +08:00
Matteo Golin
48db502daf !boards: Remove NSH_ARCHINIT and board_app_initialize
BREAKING: In an effort to simplify NuttX initialization, NSH_ARCHINIT is
removed. board_app_initialize is also removed. BOARD_LATE_INITIALIZE now
performs all board initialization logic, and is by default enabled. All
references to these symbols are removed. BOARDIOC_INIT remains, but will
result in -ENOTTY when called. It is to be removed in a later commit.

Quick fix: Boards relying on NSH_ARCHINIT should now enable
CONFIG_BOARD_LATE_INITIALIZE instead. If the application needs
fine-grained control over board initialization from userspace, the logic
performed by BOARDIOC_INIT may be copied to the board_finalinitialize
function and used instead via BOARDIOC_FINALINIT. All
board_app_initialize logic provided by NuttX is now moved to
board_late_initialize, and the same should be done for out-of-tree
boards.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2026-05-02 18:36:46 +08:00
raiden00pl
772a51b43a boards/thingy53: add sensors scope demo for fixed16
add sensors scope demo with fixed16 as sensor data type

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-05-02 00:56:42 +08:00
aviralgarg05
57acb80e6b boards/arm/stm32: add nucleo-f412zg ostest and coremark configs.
Add dedicated ostest and coremark defconfigs for nucleo-f412zg.
The ostest config keeps the existing NSH-oriented board setup and
adds the runtime self-test application, while the coremark config
boots directly into the benchmark with an -O3 build profile.

Both configurations were verified with GNU Make and CMake/Ninja
using Arm GNU Toolchain 15.2.Rel1 on macOS arm64.

Signed-off-by: aviralgarg05 <gargaviral99@gmail.com>
2026-04-30 19:24:26 +08:00
raiden00pl
0efe8c4f42 boards/stm32g4: migrate to new pinmap
migrate stm32g4 to new pinmap

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-24 16:03:23 +02:00
raiden00pl
801bf3e9a4 boards/stm32l1: migrate to new pinmap
migrate stm32l1 to new pinmap

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-24 10:39:04 -03:00
raiden00pl
e2cc71f540 !arch/arm/src/stm32l5: remove STM32L5_USE_LEGACY_PINMAP
BREAKING CHANGE: remove STM32L5_USE_LEGACY_PINMAP and all references

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-24 10:44:30 +02:00
raiden00pl
5eb4387a99 !arch/arm/src/stm32wb: remove STM32WB_USE_LEGACY_PINMAP
BREAKING CHANGE: remove STM32WB_USE_LEGACY_PINMAP and all references

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-24 10:44:30 +02:00
raiden00pl
2d8c4baa09 !arch/arm/src/stm32l4: remove STM32L4_USE_LEGACY_PINMAP
BREAKING CHANGE: remove STM32L4_USE_LEGACY_PINMAP and all references

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-24 10:44:30 +02:00
Alan Carvalho de Assis
f2219060c2 boards: Add support to MPR121 Capacitive Keypad
This commit adds support to MPR121 on stm32f4discovery board and a
board config example.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2026-04-23 15:56:32 -03:00
raiden00pl
94e5fb9d3e boards/stm32l4: migrate to new pinmap
migrate stm32l4 to new pinmap

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-23 20:34:00 +08:00
raiden00pl
53c4574ebc boards/stm32l5: migrate to new pinmap
migrate stm32l5 to new pinmap

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-23 20:31:50 +08:00
raiden00pl
ec85c9a708 boards/stm32wb: migrate to new pinmap
migrate stm32wb to new pinmap

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-23 12:59:47 +02:00
raiden00pl
8b0f684a05 arch/arm/src/stm32f0l0g0: remove STM32F0G0L0_USE_LEGACY_PINMAP
remove STM32F0G0L0_USE_LEGACY_PINMAP and all references

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-23 09:30:53 +08:00
raiden00pl
6ab27b3a8a arch/arm/src/stm32f7: remove STM32F7_USE_LEGACY_PINMAP
remove STM32F7_USE_LEGACY_PINMAP option and all references

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-23 09:30:53 +08:00
raiden00pl
c4586c0742 arch/arm/src/stm32h7: remove STM32H7_USE_LEGACY_PINMAP
remove STM32H7_USE_LEGACY_PINMAP option and all references

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-23 09:30:53 +08:00
aviralgarg05
59d44c4997 boards/arm/stm32: switch nucleo-f412zg console to USART3 VCP
Enable USART3 support for STM32F412 and use it as the default NUCLEO-F412ZG nsh console path.

The ST-LINK virtual COM port on this board is wired to USART3 on PD8/PD9. Restore USART2 to its header-pin routing, switch the nsh defconfig to USART3, and update the board documentation to match the shipped solder-bridge configuration described in issue #17722.

Signed-off-by: aviralgarg05 <gargaviral99@gmail.com>
2026-04-22 01:14:39 +02:00
raiden00pl
6f9d6f3d94 boards/nucleo-c071rb: add nxmodbus examples to jumbo
add nxmodbus client and server examples to jumbo

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-04-21 09:39:04 +08:00