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boards/stm32f4: migrate to new pinmap

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migrate stm32f4 to new pinmap

Signed-off-by: raiden00pl <raiden00@railab.me>
This commit is contained in:
raiden00pl 2026-04-23 16:37:45 +02:00 • committed by Matteo Golin
parent de5cc186e4
commit 4b4ba522cb
180 changed files with 1051 additions and 435 deletions
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1
boards/arm/stm32/axoloti/configs/nsh/defconfig
View file

@ -9,6 +9,7 @@
# CONFIG_ARCH_LEDS is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STANDARD_SERIAL is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="axoloti"
CONFIG_ARCH_BOARD_AXOLOTI=y

4
boards/arm/stm32/axoloti/include/board.h
View file

@ -153,8 +153,8 @@
/* USART1 - console on header pins */
#define GPIO_USART1_RX GPIO_USART1_RX_2 /* AF7, PB7 */
#define GPIO_USART1_TX GPIO_USART1_TX_2 /* AF7, PB6 */
#define GPIO_USART1_RX (GPIO_USART1_RX_2|GPIO_SPEED_100MHz) /* AF7, PB7 */
#define GPIO_USART1_TX (GPIO_USART1_TX_2|GPIO_SPEED_100MHz) /* AF7, PB6 */
/* USART6 - midi in/out */

1
boards/arm/stm32/clicker2-stm32/configs/knsh/defconfig
View file

@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
# CONFIG_SYSTEM_DD is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"

1
boards/arm/stm32/clicker2-stm32/configs/mrf24j40-6lowpan/defconfig
View file

@ -8,6 +8,7 @@
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NET_ETHERNET is not set
# CONFIG_NET_IPv4 is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y

1
boards/arm/stm32/clicker2-stm32/configs/mrf24j40-mac/defconfig
View file

@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y

1
boards/arm/stm32/clicker2-stm32/configs/mrf24j40-starhub/defconfig
View file

@ -8,6 +8,7 @@
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NET_ETHERNET is not set
# CONFIG_NET_IPv4 is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y

1
boards/arm/stm32/clicker2-stm32/configs/mrf24j40-starpoint/defconfig
View file

@ -8,6 +8,7 @@
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NET_ETHERNET is not set
# CONFIG_NET_IPv4 is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y

1
boards/arm/stm32/clicker2-stm32/configs/nsh/defconfig
View file

@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y

1
boards/arm/stm32/clicker2-stm32/configs/usbnsh/defconfig
View file

@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_DEV_CONSOLE is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y

1
boards/arm/stm32/clicker2-stm32/configs/xbee-6lowpan/defconfig
View file

@ -8,6 +8,7 @@
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NET_ETHERNET is not set
# CONFIG_NET_IPv4 is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y

39
boards/arm/stm32/clicker2-stm32/include/board.h
View file

@ -252,11 +252,11 @@
* Assuming RS-232 connverted connected on mikroMB1/12
*/
#define GPIO_USART2_RX GPIO_USART2_RX_2 /* PD6 */
#define GPIO_USART2_TX GPIO_USART2_TX_2 /* PD5 */
#define GPIO_USART2_RX (GPIO_USART2_RX_2|GPIO_SPEED_100MHz) /* PD6 */
#define GPIO_USART2_TX (GPIO_USART2_TX_2|GPIO_SPEED_100MHz) /* PD5 */
#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */
#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */
#define GPIO_USART3_RX (GPIO_USART3_RX_3|GPIO_SPEED_100MHz) /* PD9 */
#define GPIO_USART3_TX (GPIO_USART3_TX_3|GPIO_SPEED_100MHz) /* PD8 */
/* SPI
*
@ -264,13 +264,13 @@
* SPI3 - mikroBUS1
*/
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1 /* PC12 */
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1 /* PC11 */
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2 /* PC10 */
#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz) /* PC12 */
#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz) /* PC11 */
#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz) /* PC10 */
#define GPIO_SPI3_MISO GPIO_SPI3_MISO_2 /* PB15 */
#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2 /* PB14 */
#define GPIO_SPI3_SCK GPIO_SPI3_SCK_2 /* PB13 */
#define GPIO_SPI3_MISO (GPIO_SPI3_MISO_2|GPIO_SPEED_50MHz) /* PB15 */
#define GPIO_SPI3_MOSI (GPIO_SPI3_MOSI_2|GPIO_SPEED_50MHz) /* PB14 */
#define GPIO_SPI3_SCK (GPIO_SPI3_SCK_2|GPIO_SPEED_50MHz) /* PB13 */
/* I2C
*
@ -278,11 +278,11 @@
* I2C3 - mikroBUS1
*/
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1 /* PB10 */
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1 /* PB11 */
#define GPIO_I2C2_SCL (GPIO_I2C2_SCL_1|GPIO_SPEED_50MHz) /* PB10 */
#define GPIO_I2C2_SDA (GPIO_I2C2_SDA_1|GPIO_SPEED_50MHz) /* PB11 */
#define GPIO_I2C3_SCL GPIO_I2C3_SCL_1 /* PA8 */
#define GPIO_I2C3_SDA GPIO_I2C3_SDA_1 /* PC9 */
#define GPIO_I2C3_SCL (GPIO_I2C3_SCL_1|GPIO_SPEED_50MHz) /* PA8 */
#define GPIO_I2C3_SDA (GPIO_I2C3_SDA_1|GPIO_SPEED_50MHz) /* PC9 */
/* Analog
*
@ -296,8 +296,8 @@
* mikroBUS1 ADC: PD12-MB2-PWM (TIM4, channel 1)
*/
#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2 /* PE9 */
#define GPIO_TIM4_CH1OUT GPIO_TIM4_CH1OUT_2 /* PD12 */
#define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_2|GPIO_SPEED_50MHz) /* PE9 */
#define GPIO_TIM4_CH1OUT (GPIO_TIM4_CH1OUT_2|GPIO_SPEED_50MHz) /* PD12 */
/* DMA Channel/Stream Selections ********************************************/
@ -311,4 +311,11 @@
#define DMAMAP_SDIO DMAMAP_SDIO_1
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32_CLICKER2_STM32_INCLUDE_BOARD_H */

1
boards/arm/stm32/mikroe-stm32f4/configs/fulldemo/defconfig
View file

@ -15,6 +15,7 @@
# CONFIG_NX_DISABLE_16BPP is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_STM32_CCMEXCLUDE is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mikroe-stm32f4"
CONFIG_ARCH_BOARD_MIKROE_STM32F4=y

1
boards/arm/stm32/mikroe-stm32f4/configs/kostest/defconfig
View file

@ -9,6 +9,7 @@
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mikroe-stm32f4"
CONFIG_ARCH_BOARD_MIKROE_STM32F4=y

1
boards/arm/stm32/mikroe-stm32f4/configs/nsh/defconfig
View file

@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mikroe-stm32f4"
CONFIG_ARCH_BOARD_MIKROE_STM32F4=y

1
boards/arm/stm32/mikroe-stm32f4/configs/nx/defconfig
View file

@ -13,6 +13,7 @@
# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set
# CONFIG_NX_DISABLE_16BPP is not set
# CONFIG_SERIAL is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mikroe-stm32f4"
CONFIG_ARCH_BOARD_MIKROE_STM32F4=y

1
boards/arm/stm32/mikroe-stm32f4/configs/nxlines/defconfig
View file

@ -15,6 +15,7 @@
# CONFIG_NX_DISABLE_16BPP is not set
# CONFIG_NX_WRITEONLY is not set
# CONFIG_SERIAL is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mikroe-stm32f4"
CONFIG_ARCH_BOARD_MIKROE_STM32F4=y

1
boards/arm/stm32/mikroe-stm32f4/configs/nxtext/defconfig
View file

@ -13,6 +13,7 @@
# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set
# CONFIG_NX_DISABLE_16BPP is not set
# CONFIG_SERIAL is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mikroe-stm32f4"
CONFIG_ARCH_BOARD_MIKROE_STM32F4=y

1
boards/arm/stm32/mikroe-stm32f4/configs/usbnsh/defconfig
View file

@ -10,6 +10,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="mikroe-stm32f4"
CONFIG_ARCH_BOARD_MIKROE_STM32F4=y

33
boards/arm/stm32/mikroe-stm32f4/include/board.h
View file

@ -208,8 +208,8 @@
* UART2 to the expansion header.
*/
#define GPIO_USART2_RX GPIO_USART2_RX_2
#define GPIO_USART2_TX GPIO_USART2_TX_2
#define GPIO_USART2_RX (GPIO_USART2_RX_2|GPIO_SPEED_100MHz)
#define GPIO_USART2_TX (GPIO_USART2_TX_2|GPIO_SPEED_100MHz)
/* PWM
*
@ -217,28 +217,35 @@
* be configured to output a pulse train using TIM4 CH2 on PD13.
*/
#define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2
#define GPIO_TIM4_CH2OUT (GPIO_TIM4_CH2OUT_2|GPIO_SPEED_50MHz)
/* SPI - Onboard devices use SPI3, plus SPI2 routes to the I/O header */
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz)
#define DMACHAN_SPI2_RX DMAMAP_SPI2_RX
#define DMACHAN_SPI2_TX DMAMAP_SPI2_TX
#define GPIO_SPI3_MISO GPIO_SPI3_MISO_2
#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2
#define GPIO_SPI3_SCK GPIO_SPI3_SCK_2
#define GPIO_SPI3_MISO (GPIO_SPI3_MISO_2|GPIO_SPEED_50MHz)
#define GPIO_SPI3_MOSI (GPIO_SPI3_MOSI_2|GPIO_SPEED_50MHz)
#define GPIO_SPI3_SCK (GPIO_SPI3_SCK_2|GPIO_SPEED_50MHz)
#define DMACHAN_SPI3_RX DMAMAP_SPI3_RX_2
#define DMACHAN_SPI3_TX DMAMAP_SPI3_TX_2
/* Timer Inputs/Outputs */
#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_2
#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1
#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_2|GPIO_SPEED_50MHz)
#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1|GPIO_SPEED_50MHz)
#define GPIO_TIM8_CH1IN GPIO_TIM8_CH1IN_1
#define GPIO_TIM8_CH2IN GPIO_TIM8_CH2IN_1
#define GPIO_TIM8_CH1IN (GPIO_TIM8_CH1IN_1|GPIO_SPEED_50MHz)
#define GPIO_TIM8_CH2IN (GPIO_TIM8_CH2IN_1|GPIO_SPEED_50MHz)
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32_MIKROE_STM32F4_INCLUDE_BOARD_H */

1
boards/arm/stm32/nucleo-f401re/configs/fb/defconfig
View file

@ -11,6 +11,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f401re"
CONFIG_ARCH_BOARD_COMMON=y

1
boards/arm/stm32/nucleo-f401re/configs/nsh/defconfig
View file

@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f401re"
CONFIG_ARCH_BOARD_NUCLEO_F401RE=y

47
boards/arm/stm32/nucleo-f401re/include/board.h
View file

@ -237,11 +237,11 @@
*/
#if 1
# define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */
# define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */
# define GPIO_USART1_RX (GPIO_USART1_RX_1|GPIO_SPEED_100MHz) /* PA10 */
# define GPIO_USART1_TX (GPIO_USART1_TX_1|GPIO_SPEED_100MHz) /* PA9 */
#else
# define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */
# define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */
# define GPIO_USART1_RX (GPIO_USART1_RX_2|GPIO_SPEED_100MHz) /* PB7 */
# define GPIO_USART1_TX (GPIO_USART1_TX_2|GPIO_SPEED_100MHz) /* PB6 */
#endif
/* USART2:
@ -251,8 +251,8 @@
* PD5
*/
#define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */
#define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */
#define GPIO_USART2_RX (GPIO_USART2_RX_1|GPIO_SPEED_100MHz) /* PA3 */
#define GPIO_USART2_TX (GPIO_USART2_TX_1|GPIO_SPEED_100MHz) /* PA2 */
#define GPIO_USART2_RTS GPIO_USART2_RTS_2
#define GPIO_USART2_CTS GPIO_USART2_CTS_2
@ -263,8 +263,8 @@
* PA11 CN10, pin 14
*/
#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */
#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 */
#define GPIO_USART6_RX (GPIO_USART6_RX_1|GPIO_SPEED_100MHz) /* PC7 */
#define GPIO_USART6_TX (GPIO_USART6_TX_1|GPIO_SPEED_100MHz) /* PC6 */
/* UART RX DMA configurations */
@ -278,15 +278,15 @@
* but are normally-high GPIOs.
*/
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
#define GPIO_I2C1_SDA_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
#define GPIO_I2C2_SCL (GPIO_I2C2_SCL_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SDA (GPIO_I2C2_SDA_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
#define GPIO_I2C2_SDA_GPIO \
@ -297,13 +297,13 @@
* There are sensors on SPI1, and SPI2 is connected to the FRAM.
*/
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz)
/* LEDs
*
@ -367,7 +367,14 @@
#define BUTTON_USER_BIT (1 << BUTTON_USER)
#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP)
#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP)
#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP | GPIO_SPEED_50MHz)
#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP | GPIO_SPEED_50MHz)
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32_NUCLEO_F401RE_INCLUDE_BOARD_H */

1
boards/arm/stm32/nucleo-f410rb/configs/nsh/defconfig
View file

@ -9,6 +9,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y
CONFIG_ANALOG=y
CONFIG_ARCH="arm"

38
boards/arm/stm32/nucleo-f410rb/include/board.h
View file

@ -154,7 +154,7 @@
*/
#define ADC1_DMA_CHAN DMAMAP_ADC1_1
#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1
#define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_1|GPIO_SPEED_50MHz)
#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1
#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1
@ -171,11 +171,11 @@
*/
#if 1
# define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */
# define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */
# define GPIO_USART1_RX (GPIO_USART1_RX_1|GPIO_SPEED_100MHz) /* PA10 */
# define GPIO_USART1_TX (GPIO_USART1_TX_1|GPIO_SPEED_100MHz) /* PA9 */
#else
# define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */
# define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */
# define GPIO_USART1_RX (GPIO_USART1_RX_2|GPIO_SPEED_100MHz) /* PB7 */
# define GPIO_USART1_TX (GPIO_USART1_TX_2|GPIO_SPEED_100MHz) /* PB6 */
#endif
/* USART2:
@ -185,8 +185,8 @@
* PD5
*/
#define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */
#define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */
#define GPIO_USART2_RX (GPIO_USART2_RX_1|GPIO_SPEED_100MHz) /* PA3 */
#define GPIO_USART2_TX (GPIO_USART2_TX_1|GPIO_SPEED_100MHz) /* PA2 */
#define GPIO_USART2_RTS GPIO_USART2_RTS_2
#define GPIO_USART2_CTS GPIO_USART2_CTS_2
@ -197,8 +197,8 @@
* PA11 CN10, pin 14
*/
#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */
#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 */
#define GPIO_USART6_RX (GPIO_USART6_RX_1|GPIO_SPEED_100MHz) /* PC7 */
#define GPIO_USART6_TX (GPIO_USART6_TX_1|GPIO_SPEED_100MHz) /* PC6 */
/* UART RX DMA configurations */
@ -212,15 +212,15 @@
* but are normally-high GPIOs.
*/
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
#define GPIO_I2C1_SDA_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
#define GPIO_I2C2_SCL (GPIO_I2C2_SCL_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SDA (GPIO_I2C2_SDA_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
#define GPIO_I2C2_SDA_GPIO \
@ -230,13 +230,13 @@
*
*/
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz)
/* LEDs
*

4
boards/arm/stm32/nucleo-f410rb/src/stm32_adc.c
View file

@ -69,7 +69,7 @@ static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] =
static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN9, GPIO_ADC1_IN8
GPIO_ADC1_IN9_0, GPIO_ADC1_IN8_0
};
#else
@ -86,7 +86,7 @@ static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] =
static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN9
GPIO_ADC1_IN9_0
};
#endif /* CONFIG_STM32_ADC1_DMA */

1
boards/arm/stm32/nucleo-f411re/configs/mcp2515-extid/defconfig
View file

@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f411re"
CONFIG_ARCH_BOARD_NUCLEO_F411RE=y

1
boards/arm/stm32/nucleo-f411re/configs/nsh/defconfig
View file

@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f411re"
CONFIG_ARCH_BOARD_NUCLEO_F411RE=y

47
boards/arm/stm32/nucleo-f411re/include/board.h
View file

@ -234,11 +234,11 @@
*/
#if 1
# define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */
# define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */
# define GPIO_USART1_RX (GPIO_USART1_RX_1|GPIO_SPEED_100MHz) /* PA10 */
# define GPIO_USART1_TX (GPIO_USART1_TX_1|GPIO_SPEED_100MHz) /* PA9 */
#else
# define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */
# define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */
# define GPIO_USART1_RX (GPIO_USART1_RX_2|GPIO_SPEED_100MHz) /* PB7 */
# define GPIO_USART1_TX (GPIO_USART1_TX_2|GPIO_SPEED_100MHz) /* PB6 */
#endif
/* USART2:
@ -248,8 +248,8 @@
* PD5
*/
#define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */
#define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */
#define GPIO_USART2_RX (GPIO_USART2_RX_1|GPIO_SPEED_100MHz) /* PA3 */
#define GPIO_USART2_TX (GPIO_USART2_TX_1|GPIO_SPEED_100MHz) /* PA2 */
#define GPIO_USART2_RTS GPIO_USART2_RTS_2
#define GPIO_USART2_CTS GPIO_USART2_CTS_2
@ -260,8 +260,8 @@
* PA11 CN10, pin 14
*/
#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */
#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 */
#define GPIO_USART6_RX (GPIO_USART6_RX_1|GPIO_SPEED_100MHz) /* PC7 */
#define GPIO_USART6_TX (GPIO_USART6_TX_1|GPIO_SPEED_100MHz) /* PC6 */
/* UART RX DMA configurations */
@ -275,15 +275,15 @@
* but are normally-high GPIOs.
*/
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
#define GPIO_I2C1_SDA_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
#define GPIO_I2C2_SCL (GPIO_I2C2_SCL_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SDA (GPIO_I2C2_SDA_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
#define GPIO_I2C2_SDA_GPIO \
@ -294,13 +294,13 @@
* There are sensors on SPI1, and SPI2 is connected to the FRAM.
*/
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz)
/* LEDs
*
@ -364,7 +364,14 @@
#define BUTTON_USER_BIT (1 << BUTTON_USER)
#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP)
#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP)
#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP | GPIO_SPEED_50MHz)
#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP | GPIO_SPEED_50MHz)
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32_NUCLEO_F411RE_INCLUDE_BOARD_H */

1
boards/arm/stm32/nucleo-f412zg/configs/nsh/defconfig
View file

@ -12,6 +12,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_SYSCFG is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y
CONFIG_ANALOG=y
CONFIG_ARCH="arm"

26
boards/arm/stm32/nucleo-f412zg/include/board.h
View file

@ -122,32 +122,32 @@
* TXD: PD5 CN9 pin 6
*/
# define GPIO_USART2_RX GPIO_USART2_RX_2
# define GPIO_USART2_TX GPIO_USART2_TX_2
# define GPIO_USART2_RX (GPIO_USART2_RX_2|GPIO_SPEED_100MHz)
# define GPIO_USART2_TX (GPIO_USART2_TX_2|GPIO_SPEED_100MHz)
/* USART3 (ST-LINK Virtual COM Port):
* RXD: PD9
* TXD: PD8
*/
# define GPIO_USART3_RX GPIO_USART3_RX_3
# define GPIO_USART3_TX GPIO_USART3_TX_3
# define GPIO_USART3_RX (GPIO_USART3_RX_3|GPIO_SPEED_100MHz)
# define GPIO_USART3_TX (GPIO_USART3_TX_3|GPIO_SPEED_100MHz)
/* USART6:
* RXD: PG9 CN10 pin 16
* TXD: PG14 CN10 pin 14
*/
#define GPIO_USART6_RX GPIO_USART6_RX_2
#define GPIO_USART6_TX GPIO_USART6_TX_2
#define GPIO_USART6_RX (GPIO_USART6_RX_2|GPIO_SPEED_100MHz)
#define GPIO_USART6_TX (GPIO_USART6_TX_2|GPIO_SPEED_100MHz)
/* I2C1:
* SCL: PB8 CN7 pin2
* SDA: PB9 CN7 pin4
*/
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
@ -160,17 +160,17 @@
* SCK: PA5 CN7 pin 10
*/
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
/* CAN1:
* RX: PD0 CN9 pin 25
* TX: PD1 CN9 pin 27
*/
#define GPIO_CAN1_RX GPIO_CAN1_RX_3
#define GPIO_CAN1_TX GPIO_CAN1_TX_3
#define GPIO_CAN1_RX (GPIO_CAN1_RX_3|GPIO_SPEED_50MHz)
#define GPIO_CAN1_TX (GPIO_CAN1_TX_3|GPIO_SPEED_50MHz)
/* LEDs
*

1
boards/arm/stm32/nucleo-f446re/configs/adc/defconfig
View file

@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y
CONFIG_ANALOG=y
CONFIG_ARCH="arm"

1
boards/arm/stm32/nucleo-f446re/configs/can/defconfig
View file

@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
CONFIG_ARCH_BOARD_NUCLEO_F446RE=y

1
boards/arm/stm32/nucleo-f446re/configs/cansock/defconfig
View file

@ -11,6 +11,7 @@
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ALLOW_BSD_COMPONENTS=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"

1
boards/arm/stm32/nucleo-f446re/configs/dac/defconfig
View file

@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ANALOG=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"

1
boards/arm/stm32/nucleo-f446re/configs/gpio/defconfig
View file

@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
CONFIG_ARCH_BOARD_NUCLEO_F446RE=y

1
boards/arm/stm32/nucleo-f446re/configs/ihm08m1_b16/defconfig
View file

@ -7,6 +7,7 @@
#
# CONFIG_DISABLE_MQUEUE is not set
# CONFIG_DISABLE_PTHREAD is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y
CONFIG_ADC_FIFOSIZE=3
CONFIG_ANALOG=y

1
boards/arm/stm32/nucleo-f446re/configs/ihm08m1_f32/defconfig
View file

@ -7,6 +7,7 @@
#
# CONFIG_DISABLE_MQUEUE is not set
# CONFIG_DISABLE_PTHREAD is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y
CONFIG_ADC_FIFOSIZE=3
CONFIG_ANALOG=y

1
boards/arm/stm32/nucleo-f446re/configs/lcd/defconfig
View file

@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
CONFIG_ARCH_BOARD_NUCLEO_F446RE=y

1
boards/arm/stm32/nucleo-f446re/configs/nsh/defconfig
View file

@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
CONFIG_ARCH_BOARD_NUCLEO_F446RE=y

1
boards/arm/stm32/nucleo-f446re/configs/pwm/defconfig
View file

@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
CONFIG_ARCH_BOARD_NUCLEO_F446RE=y

1
boards/arm/stm32/nucleo-f446re/configs/qenco/defconfig
View file

@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
CONFIG_ARCH_BOARD_COMMON=y

1
boards/arm/stm32/nucleo-f446re/configs/systemview/defconfig
View file

@ -12,6 +12,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f446re"
CONFIG_ARCH_BOARD_NUCLEO_F446RE=y

86
boards/arm/stm32/nucleo-f446re/include/board.h
View file

@ -232,11 +232,11 @@
*/
#if !defined(CONFIG_BOARD_STM32_IHM08M1)
# define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */
# define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */
# define GPIO_USART1_RX (GPIO_USART1_RX_1|GPIO_SPEED_100MHz) /* PA10 */
# define GPIO_USART1_TX (GPIO_USART1_TX_1|GPIO_SPEED_100MHz) /* PA9 */
#else
# define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */
# define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */
# define GPIO_USART1_RX (GPIO_USART1_RX_2|GPIO_SPEED_100MHz) /* PB7 */
# define GPIO_USART1_TX (GPIO_USART1_TX_2|GPIO_SPEED_100MHz) /* PB6 */
#endif
/* USART2:
@ -246,8 +246,8 @@
* PD5
*/
#define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */
#define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */
#define GPIO_USART2_RX (GPIO_USART2_RX_1|GPIO_SPEED_100MHz) /* PA3 */
#define GPIO_USART2_TX (GPIO_USART2_TX_1|GPIO_SPEED_100MHz) /* PA2 */
#define GPIO_USART2_RTS GPIO_USART2_RTS_2
#define GPIO_USART2_CTS GPIO_USART2_CTS_2
@ -258,8 +258,8 @@
* PA11 CN10, pin 14
*/
#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */
#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 */
#define GPIO_USART6_RX (GPIO_USART6_RX_1|GPIO_SPEED_100MHz) /* PC7 */
#define GPIO_USART6_TX (GPIO_USART6_TX_1|GPIO_SPEED_100MHz) /* PC6 */
/* UART RX DMA configurations */
@ -273,8 +273,8 @@
* but are normally-high GPIOs.
*/
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET| \
GPIO_PORTB|GPIO_PIN8)
@ -282,8 +282,8 @@
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET| \
GPIO_PORTB|GPIO_PIN9)
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
#define GPIO_I2C2_SCL (GPIO_I2C2_SCL_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SDA (GPIO_I2C2_SDA_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET| \
GPIO_PORTB|GPIO_PIN10)
@ -296,25 +296,25 @@
* There are sensors on SPI1, and SPI2 is connected to the FRAM.
*/
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz)
#define GPIO_SPI3_MISO GPIO_SPI3_MISO_1
#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_1
#define GPIO_SPI3_SCK GPIO_SPI3_SCK_1
#define GPIO_SPI3_MISO (GPIO_SPI3_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI3_MOSI (GPIO_SPI3_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI3_SCK (GPIO_SPI3_SCK_1|GPIO_SPEED_50MHz)
/* CAN */
#define GPIO_CAN1_RX GPIO_CAN1_RX_2
#define GPIO_CAN1_TX GPIO_CAN1_TX_2
#define GPIO_CAN1_RX (GPIO_CAN1_RX_2|GPIO_SPEED_50MHz)
#define GPIO_CAN1_TX (GPIO_CAN1_TX_2|GPIO_SPEED_50MHz)
#define GPIO_CAN2_RX GPIO_CAN2_RX_2
#define GPIO_CAN2_TX GPIO_CAN2_TX_2
#define GPIO_CAN2_RX (GPIO_CAN2_RX_2|GPIO_SPEED_50MHz)
#define GPIO_CAN2_TX (GPIO_CAN2_TX_2|GPIO_SPEED_50MHz)
/* LEDs
*
@ -380,16 +380,16 @@
/* TIM2 input ***************************************************************/
#ifndef CONFIG_NUCLEO_F446RE_QETIMER_TIM2_IHM08M1_MAP
# define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP) /* PA8 */
# define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP) /* PB0 */
# define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP | GPIO_SPEED_50MHz) /* PA8 */
# define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP | GPIO_SPEED_50MHz) /* PB0 */
#else
# define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_2 | GPIO_PULLUP) /* PA15 */
# define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_2 | GPIO_PULLUP) /* PB3 */
# define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_2 | GPIO_PULLUP | GPIO_SPEED_50MHz) /* PA15 */
# define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_2 | GPIO_PULLUP | GPIO_SPEED_50MHz) /* PB3 */
#endif
/* TIM3 configuration *******************************************************/
#define GPIO_TIM3_CH1OUT GPIO_TIM3_CH1OUT_1
#define GPIO_TIM3_CH1OUT (GPIO_TIM3_CH1OUT_1|GPIO_SPEED_50MHz)
#ifdef CONFIG_BOARD_STM32_IHM08M1
@ -399,13 +399,13 @@
/* TIM1 configuration *******************************************************/
#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1 /* TIM1 CH1 - PA8 - U high */
#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1N_1 /* TIM1 CH1N - PA7 - U low */
#define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_1 /* TIM1 CH2 - PA9 - V high */
#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2N_1 /* TIM1 CH2N - PB0 - V low */
#define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1 /* TIM1 CH3 - PA10 - W high */
#define GPIO_TIM1_CH3NOUT GPIO_TIM1_CH3N_1 /* TIM1 CH3N - PB1 - W low */
#define GPIO_TIM1_CH4OUT 0 /* not used as output */
#define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_1|GPIO_SPEED_50MHz) /* TIM1 CH1 - PA8 - U high */
#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1N_1 /* TIM1 CH1N - PA7 - U low */
#define GPIO_TIM1_CH2OUT (GPIO_TIM1_CH2OUT_1|GPIO_SPEED_50MHz) /* TIM1 CH2 - PA9 - V high */
#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2N_1 /* TIM1 CH2N - PB0 - V low */
#define GPIO_TIM1_CH3OUT (GPIO_TIM1_CH3OUT_1|GPIO_SPEED_50MHz) /* TIM1 CH3 - PA10 - W high */
#define GPIO_TIM1_CH3NOUT GPIO_TIM1_CH3N_1 /* TIM1 CH3N - PB1 - W low */
#define GPIO_TIM1_CH4OUT 0 /* not used as output */
/* Board LED */
@ -425,4 +425,16 @@
#endif /* CONFIG_BOARD_STM32_IHM08M1 */
/* DAC */
#define GPIO_DAC1_OUT1 GPIO_DAC1_OUT1_0
#define GPIO_DAC1_OUT2 GPIO_DAC1_OUT2_0
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32_NUCLEO_F446RE_INCLUDE_BOARD_H */

6
boards/arm/stm32/nucleo-f446re/src/stm32_adc.c
View file

@ -70,8 +70,8 @@ static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] =
static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN0,
GPIO_ADC1_IN1
GPIO_ADC1_IN0_0,
GPIO_ADC1_IN1_0
};
#else
@ -88,7 +88,7 @@ static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] =
static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN0
GPIO_ADC1_IN0_0
};
#endif /* CONFIG_STM32_ADC1_DMA */

10
boards/arm/stm32/nucleo-f446re/src/stm32_foc_ihm08m1.c
View file

@ -107,17 +107,17 @@ static uint8_t g_adc1_chan[] =
static uint32_t g_adc1_pins[] =
{
#ifdef CONFIG_BOARD_STM32_IHM08M1_VBUS
GPIO_ADC1_IN1,
GPIO_ADC1_IN1_0,
#endif
#ifdef CONFIG_BOARD_STM32_IHM08M1_POT
GPIO_ADC1_IN4,
GPIO_ADC1_IN4_0,
#endif
GPIO_ADC1_IN0,
GPIO_ADC1_IN0_0,
#if CONFIG_MOTOR_FOC_SHUNTS > 1
GPIO_ADC1_IN11,
GPIO_ADC1_IN11_0,
#endif
#if CONFIG_MOTOR_FOC_SHUNTS > 2
GPIO_ADC1_IN10
GPIO_ADC1_IN10_0
#endif
};

1
boards/arm/stm32/olimex-stm32-e407/configs/bmp180/defconfig
View file

@ -8,6 +8,7 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
CONFIG_ARCH_BOARD_COMMON=y

1
boards/arm/stm32/olimex-stm32-e407/configs/dac/defconfig
View file

@ -8,6 +8,7 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ANALOG=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"

1
boards/arm/stm32/olimex-stm32-e407/configs/discover/defconfig
View file

@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y

1
boards/arm/stm32/olimex-stm32-e407/configs/ina219/defconfig
View file

@ -7,6 +7,7 @@
#
# CONFIG_ARCH_FPU is not set
# CONFIG_DEV_CONSOLE is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
CONFIG_ARCH_BOARD_COMMON=y

1
boards/arm/stm32/olimex-stm32-e407/configs/mrf24j40-6lowpan/defconfig
View file

@ -10,6 +10,7 @@
# CONFIG_NET_IPv4 is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y

1
boards/arm/stm32/olimex-stm32-e407/configs/mrf24j40-mac/defconfig
View file

@ -8,6 +8,7 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y

1
boards/arm/stm32/olimex-stm32-e407/configs/netnsh/defconfig
View file

@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y

1
boards/arm/stm32/olimex-stm32-e407/configs/nsh/defconfig
View file

@ -8,6 +8,7 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y

1
boards/arm/stm32/olimex-stm32-e407/configs/telnetd/defconfig
View file

@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y

1
boards/arm/stm32/olimex-stm32-e407/configs/timer/defconfig
View file

@ -8,6 +8,7 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y

1
boards/arm/stm32/olimex-stm32-e407/configs/usbnsh/defconfig
View file

@ -7,6 +7,7 @@
#
# CONFIG_ARCH_FPU is not set
# CONFIG_DEV_CONSOLE is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y

1
boards/arm/stm32/olimex-stm32-e407/configs/webserver/defconfig
View file

@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-e407"
CONFIG_ARCH_BOARD_OLIMEX_STM32E407=y

60
boards/arm/stm32/olimex-stm32-e407/include/board.h
View file

@ -198,34 +198,34 @@
/* USART1 */
#define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */
#define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */
#define GPIO_USART1_RX (GPIO_USART1_RX_2|GPIO_SPEED_100MHz) /* PB7 */
#define GPIO_USART1_TX (GPIO_USART1_TX_2|GPIO_SPEED_100MHz) /* PB6 */
/* USART2 */
#define GPIO_USART2_RX GPIO_USART2_RX_2 /* PD6 */
#define GPIO_USART2_TX GPIO_USART2_TX_2 /* PD5 */
#define GPIO_USART2_RX (GPIO_USART2_RX_2|GPIO_SPEED_100MHz) /* PD6 */
#define GPIO_USART2_TX (GPIO_USART2_TX_2|GPIO_SPEED_100MHz) /* PD5 */
/* USART3 */
#define GPIO_USART3_RX GPIO_USART3_RX_1 /* PB11 */
#define GPIO_USART3_TX GPIO_USART3_TX_1 /* PB10 */
#define GPIO_USART3_RX (GPIO_USART3_RX_1|GPIO_SPEED_100MHz) /* PB11 */
#define GPIO_USART3_TX (GPIO_USART3_TX_1|GPIO_SPEED_100MHz) /* PB10 */
/* CAN */
#define GPIO_CAN1_RX GPIO_CAN1_RX_2 /* PB8 */
#define GPIO_CAN1_TX GPIO_CAN1_TX_2 /* PB9 */
#define GPIO_CAN1_RX (GPIO_CAN1_RX_2|GPIO_SPEED_50MHz) /* PB8 */
#define GPIO_CAN1_TX (GPIO_CAN1_TX_2|GPIO_SPEED_50MHz) /* PB9 */
/* I2C */
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 /* PB6 */
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1 /* PB7 */
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_1|GPIO_SPEED_50MHz) /* PB6 */
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_1|GPIO_SPEED_50MHz) /* PB7 */
/* SPI1 */
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 /* PA5 */
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_2 /* PB5 */
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 /* PA6 */
#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz) /* PA5 */
#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_2|GPIO_SPEED_50MHz) /* PB5 */
#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz) /* PA6 */
/* Ethernet *****************************************************************/
@ -244,11 +244,37 @@
/* Pin disambiguation */
# define GPIO_ETH_MII_COL GPIO_ETH_MII_COL_1 /* PA3 */
# define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2 /* PG13 */
# define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2 /* PG14 */
# define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2 /* PG11 */
# define GPIO_ETH_MII_COL (GPIO_ETH_MII_COL_1|GPIO_SPEED_100MHz) /* PA3 */
# define GPIO_ETH_RMII_TXD0 (GPIO_ETH_RMII_TXD0_2|GPIO_SPEED_100MHz) /* PG13 */
# define GPIO_ETH_RMII_TXD1 (GPIO_ETH_RMII_TXD1_2|GPIO_SPEED_100MHz) /* PG14 */
# define GPIO_ETH_RMII_TX_EN (GPIO_ETH_RMII_TX_EN_2|GPIO_SPEED_100MHz) /* PG11 */
#endif
/* ETH MII/RMII inputs and MDC/MDIO (referenced by arch driver) */
#define GPIO_ETH_MDC (GPIO_ETH_MDC_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MDIO (GPIO_ETH_MDIO_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RX_CLK (GPIO_ETH_MII_RX_CLK_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RX_DV (GPIO_ETH_MII_RX_DV_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RXD0 (GPIO_ETH_MII_RXD0_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RXD1 (GPIO_ETH_MII_RXD1_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_CRS_DV (GPIO_ETH_RMII_CRS_DV_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_REF_CLK (GPIO_ETH_RMII_REF_CLK_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_RXD0 (GPIO_ETH_RMII_RXD0_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_RXD1 (GPIO_ETH_RMII_RXD1_0|GPIO_SPEED_100MHz)
#define GPIO_MCO1 (GPIO_MCO1_0|GPIO_SPEED_100MHz)
/* DAC */
#define GPIO_DAC1_OUT1 GPIO_DAC1_OUT1_0
#define GPIO_DAC1_OUT2 GPIO_DAC1_OUT2_0
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32_OLIMEX_STM32_E407_INCLUDE_BOARD_H */

1
boards/arm/stm32/olimex-stm32-h405/configs/usbnsh/defconfig
View file

@ -9,6 +9,7 @@
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y
CONFIG_ANALOG=y
CONFIG_ARCH="arm"

23
boards/arm/stm32/olimex-stm32-h405/include/board.h
View file

@ -165,16 +165,23 @@
/* USART3: */
#define GPIO_USART3_RX GPIO_USART3_RX_1 /* PB11 */
#define GPIO_USART3_TX GPIO_USART3_TX_1 /* PB10 */
#define GPIO_USART3_CTS GPIO_USART3_CTS_1 /* PB13 */
#define GPIO_USART3_RTS GPIO_USART3_RTS_1 /* PB14 */
#define GPIO_USART3_RX (GPIO_USART3_RX_1|GPIO_SPEED_100MHz) /* PB11 */
#define GPIO_USART3_TX (GPIO_USART3_TX_1|GPIO_SPEED_100MHz) /* PB10 */
#define GPIO_USART3_CTS GPIO_USART3_CTS_1 /* PB13 */
#define GPIO_USART3_RTS GPIO_USART3_RTS_1 /* PB14 */
/* CAN: */
#define GPIO_CAN1_RX GPIO_CAN1_RX_2 /* PB8 */
#define GPIO_CAN1_TX GPIO_CAN1_TX_2 /* PB9 */
#define GPIO_CAN2_RX GPIO_CAN1_RX_2 /* PB5 */
#define GPIO_CAN2_TX GPIO_CAN1_TX_2 /* PB6 */
#define GPIO_CAN1_RX (GPIO_CAN1_RX_2|GPIO_SPEED_50MHz) /* PB8 */
#define GPIO_CAN1_TX (GPIO_CAN1_TX_2|GPIO_SPEED_50MHz) /* PB9 */
#define GPIO_CAN2_RX (GPIO_CAN1_RX_2|GPIO_SPEED_50MHz) /* PB5 */
#define GPIO_CAN2_TX (GPIO_CAN1_TX_2|GPIO_SPEED_50MHz) /* PB6 */
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32_OLIMEX_STM32_H405_INCLUDE_BOARD_H */

12
boards/arm/stm32/olimex-stm32-h405/src/stm32_adc.c
View file

@ -95,13 +95,13 @@ static const uint8_t g_chanlist[ADC1_NCHANNELS] =
static const uint32_t g_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN1
GPIO_ADC1_IN1_0
};
/* , GPIO_ADC1_IN2, GPIO_ADC1_IN3,
* GPIO_ADC1_IN4, GPIO_ADC1_IN5, GPIO_ADC1_IN6,
* GPIO_ADC1_IN7, GPIO_ADC1_IN8, GPIO_ADC1_IN9,
* GPIO_ADC1_IN10, GPIO_ADC1_IN11, GPIO_ADC1_IN12,
* GPIO_ADC1_IN13, GPIO_ADC1_IN15
/* , GPIO_ADC1_IN2_0, GPIO_ADC1_IN3_0,
* GPIO_ADC1_IN4_0, GPIO_ADC1_IN5_0, GPIO_ADC1_IN6_0,
* GPIO_ADC1_IN7_0, GPIO_ADC1_IN8_0, GPIO_ADC1_IN9_0,
* GPIO_ADC1_IN10_0, GPIO_ADC1_IN11_0, GPIO_ADC1_IN12_0,
* GPIO_ADC1_IN13_0, GPIO_ADC1_IN15_0
* };
*/
#endif

1
boards/arm/stm32/olimex-stm32-h407/configs/nsh/defconfig
View file

@ -9,6 +9,7 @@
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_SPI_EXCHANGE is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-h407"
CONFIG_ARCH_BOARD_OLIMEX_STM32H407=y

1
boards/arm/stm32/olimex-stm32-h407/configs/nsh_uext/defconfig
View file

@ -9,6 +9,7 @@
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_SPI_EXCHANGE is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-h407"
CONFIG_ARCH_BOARD_OLIMEX_STM32H407=y

40
boards/arm/stm32/olimex-stm32-h407/include/board.h
View file

@ -229,32 +229,48 @@
/* USART3: */
#if 0
#define GPIO_USART3_RX GPIO_USART3_RX_1 /* PB11 */
#define GPIO_USART3_TX GPIO_USART3_TX_1 /* PB10 */
#define GPIO_USART3_CTS GPIO_USART3_CTS_1 /* PB13 */
#define GPIO_USART3_RTS GPIO_USART3_RTS_1 /* PB14 */
#define GPIO_USART3_RX (GPIO_USART3_RX_1|GPIO_SPEED_100MHz) /* PB11 */
#define GPIO_USART3_TX (GPIO_USART3_TX_1|GPIO_SPEED_100MHz) /* PB10 */
#define GPIO_USART3_CTS GPIO_USART3_CTS_1 /* PB13 */
#define GPIO_USART3_RTS GPIO_USART3_RTS_1 /* PB14 */
#endif
/* USART2: */
#define GPIO_USART2_RX GPIO_USART2_RX_1
#define GPIO_USART2_TX GPIO_USART2_TX_1
#define GPIO_USART2_RX (GPIO_USART2_RX_1|GPIO_SPEED_100MHz)
#define GPIO_USART2_TX (GPIO_USART2_TX_1|GPIO_SPEED_100MHz)
#define GPIO_USART2_CTS GPIO_USART2_CTS_1
#define GPIO_USART2_RTS GPIO_USART2_RTS_1
/* USART6: (UEXT connector) */
#define GPIO_USART6_RX GPIO_USART6_RX_1
#define GPIO_USART6_TX GPIO_USART6_TX_1
#define GPIO_USART6_RX (GPIO_USART6_RX_1|GPIO_SPEED_100MHz)
#define GPIO_USART6_TX (GPIO_USART6_TX_1|GPIO_SPEED_100MHz)
/* GPIO_USART6_CTS and GPIO_USART6_RTS aren't used for UEXT */
/* CAN: */
#define GPIO_CAN1_RX GPIO_CAN1_RX_2 /* PB8 */
#define GPIO_CAN1_TX GPIO_CAN1_TX_2 /* PB9 */
#define GPIO_CAN2_RX GPIO_CAN1_RX_2 /* PB5 */
#define GPIO_CAN2_TX GPIO_CAN1_TX_2 /* PB6 */
#define GPIO_CAN1_RX (GPIO_CAN1_RX_2|GPIO_SPEED_50MHz) /* PB8 */
#define GPIO_CAN1_TX (GPIO_CAN1_TX_2|GPIO_SPEED_50MHz) /* PB9 */
#define GPIO_CAN2_RX (GPIO_CAN1_RX_2|GPIO_SPEED_50MHz) /* PB5 */
#define GPIO_CAN2_TX (GPIO_CAN1_TX_2|GPIO_SPEED_50MHz) /* PB6 */
/* SDIO */
#define GPIO_SDIO_CK (GPIO_SDIO_CK_0|GPIO_SPEED_50MHz)
#define GPIO_SDIO_CMD (GPIO_SDIO_CMD_0|GPIO_SPEED_50MHz)
#define GPIO_SDIO_D0 (GPIO_SDIO_D0_0|GPIO_SPEED_50MHz)
#define GPIO_SDIO_D1 (GPIO_SDIO_D1_0|GPIO_SPEED_50MHz)
#define GPIO_SDIO_D2 (GPIO_SDIO_D2_0|GPIO_SPEED_50MHz)
#define GPIO_SDIO_D3 (GPIO_SDIO_D3_0|GPIO_SPEED_50MHz)
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
/* DMA Channel/Stream Selections ********************************************/

1
boards/arm/stm32/olimex-stm32-p407/configs/audio/defconfig
View file

@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-p407"
CONFIG_ARCH_BOARD_OLIMEX_STM32P407=y

1
boards/arm/stm32/olimex-stm32-p407/configs/dhtxx/defconfig
View file

@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-p407"
CONFIG_ARCH_BOARD_COMMON=y

1
boards/arm/stm32/olimex-stm32-p407/configs/hidkbd/defconfig
View file

@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-p407"
CONFIG_ARCH_BOARD_OLIMEX_STM32P407=y

1
boards/arm/stm32/olimex-stm32-p407/configs/kelf/defconfig
View file

@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-p407"
CONFIG_ARCH_BOARD_OLIMEX_STM32P407=y

1
boards/arm/stm32/olimex-stm32-p407/configs/kmodule/defconfig
View file

@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-p407"
CONFIG_ARCH_BOARD_OLIMEX_STM32P407=y

1
boards/arm/stm32/olimex-stm32-p407/configs/knsh/defconfig
View file

@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
# CONFIG_SYSTEM_DD is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-p407"

1
boards/arm/stm32/olimex-stm32-p407/configs/module/defconfig
View file

@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-p407"
CONFIG_ARCH_BOARD_OLIMEX_STM32P407=y

1
boards/arm/stm32/olimex-stm32-p407/configs/mqttc/defconfig
View file

@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_STM32_AUTONEG is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-p407"
CONFIG_ARCH_BOARD_OLIMEX_STM32P407=y

1
boards/arm/stm32/olimex-stm32-p407/configs/nsh/defconfig
View file

@ -5,6 +5,7 @@
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-p407"
CONFIG_ARCH_BOARD_OLIMEX_STM32P407=y

1
boards/arm/stm32/olimex-stm32-p407/configs/zmodem/defconfig
View file

@ -8,6 +8,7 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="olimex-stm32-p407"
CONFIG_ARCH_BOARD_OLIMEX_STM32P407=y

141
boards/arm/stm32/olimex-stm32-p407/include/board.h
View file

@ -225,32 +225,32 @@
/* USART3: */
#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */
#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */
#define GPIO_USART3_CTS GPIO_USART3_CTS_2 /* PD11 */
#define GPIO_USART3_RTS GPIO_USART3_RTS_2 /* PD12 */
#define GPIO_USART3_RX (GPIO_USART3_RX_3|GPIO_SPEED_100MHz) /* PD9 */
#define GPIO_USART3_TX (GPIO_USART3_TX_3|GPIO_SPEED_100MHz) /* PD8 */
#define GPIO_USART3_CTS GPIO_USART3_CTS_2 /* PD11 */
#define GPIO_USART3_RTS GPIO_USART3_RTS_2 /* PD12 */
/* UEXT USART3: This will redefine the above macros if enabled. */
#ifdef CONFIG_STM32_OLIMEXP407_UEXT_USART3
# undef GPIO_USART3_RX GPIO_USART3_RX_3
# undef GPIO_USART3_TX GPIO_USART3_TX_3
# undef GPIO_USART3_RX (GPIO_USART3_RX_3|GPIO_SPEED_100MHz)
# undef GPIO_USART3_TX (GPIO_USART3_TX_3|GPIO_SPEED_100MHz)
# undef GPIO_USART3_CTS GPIO_USART3_CTS_2
# undef GPIO_USART3_RTS GPIO_USART3_RTS_2
# define GPIO_USART3_RX GPIO_USART3_RX_2 /* PC11 */
# define GPIO_USART3_TX GPIO_USART3_TX_2 /* PC10 */
# define GPIO_USART3_RX (GPIO_USART3_RX_2|GPIO_SPEED_100MHz) /* PC11 */
# define GPIO_USART3_TX (GPIO_USART3_TX_2|GPIO_SPEED_100MHz) /* PC10 */
#endif
/* USART6: */
#define GPIO_USART6_RX GPIO_USART6_RX_2 /* PG9 */
#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 */
#define GPIO_USART6_RX (GPIO_USART6_RX_2|GPIO_SPEED_100MHz) /* PG9 */
#define GPIO_USART6_TX (GPIO_USART6_TX_1|GPIO_SPEED_100MHz) /* PC6 */
/* CAN: */
#define GPIO_CAN1_RX GPIO_CAN1_RX_2 /* PB8 */
#define GPIO_CAN1_TX GPIO_CAN1_TX_2 /* PB9 */
#define GPIO_CAN1_RX (GPIO_CAN1_RX_2|GPIO_SPEED_50MHz) /* PB8 */
#define GPIO_CAN1_TX (GPIO_CAN1_TX_2|GPIO_SPEED_50MHz) /* PB9 */
/* microSD Connector:
*
@ -300,19 +300,19 @@
* - PG14 is ETH_MII_TXD1/ETH_RMII_TXD1
*/
#define GPIO_ETH_PPS_OUT GPIO_ETH_PPS_OUT_1
#define GPIO_ETH_MII_CRS GPIO_ETH_MII_CRS_1
#define GPIO_ETH_MII_COL GPIO_ETH_MII_COL_1
#define GPIO_ETH_MII_RX_ER GPIO_ETH_MII_RX_ER_1
#define GPIO_ETH_MII_RXD2 GPIO_ETH_MII_RXD2_1
#define GPIO_ETH_MII_RXD3 GPIO_ETH_MII_RXD3_1
#define GPIO_ETH_MII_TXD3 GPIO_ETH_MII_TXD3_1
#define GPIO_ETH_MII_TX_EN GPIO_ETH_MII_TX_EN_2
#define GPIO_ETH_MII_TXD0 GPIO_ETH_MII_TXD0_2
#define GPIO_ETH_MII_TXD1 GPIO_ETH_MII_TXD1_2
#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_1
#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2
#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2
#define GPIO_ETH_PPS_OUT (GPIO_ETH_PPS_OUT_1|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_CRS (GPIO_ETH_MII_CRS_1|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_COL (GPIO_ETH_MII_COL_1|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RX_ER (GPIO_ETH_MII_RX_ER_1|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RXD2 (GPIO_ETH_MII_RXD2_1|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RXD3 (GPIO_ETH_MII_RXD3_1|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_TXD3 (GPIO_ETH_MII_TXD3_1|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_TX_EN (GPIO_ETH_MII_TX_EN_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_TXD0 (GPIO_ETH_MII_TXD0_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_TXD1 (GPIO_ETH_MII_TXD1_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_TX_EN (GPIO_ETH_RMII_TX_EN_1|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_TXD0 (GPIO_ETH_RMII_TXD0_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_TXD1 (GPIO_ETH_RMII_TXD1_2|GPIO_SPEED_100MHz)
/* DMA Channel/Stream Selections ********************************************/
@ -349,9 +349,9 @@
/* SPI3 - As present in the UEXT header */
#define GPIO_SPI3_MISO GPIO_SPI3_MISO_2
#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2
#define GPIO_SPI3_SCK GPIO_SPI3_SCK_2
#define GPIO_SPI3_MISO (GPIO_SPI3_MISO_2|GPIO_SPEED_50MHz)
#define GPIO_SPI3_MOSI (GPIO_SPI3_MOSI_2|GPIO_SPEED_50MHz)
#define GPIO_SPI3_SCK (GPIO_SPI3_SCK_2|GPIO_SPEED_50MHz)
#define DMACHAN_SPI3_RX DMAMAP_SPI3_RX_1
#define DMACHAN_SPI3_TX DMAMAP_SPI3_TX_1
@ -361,8 +361,93 @@
#define GPIO_I2S3_SD GPIO_I2S3_SD_1
#define GPIO_I2S3_CK GPIO_I2S3_CK_1
#define GPIO_I2S3_WS GPIO_I2S3_WS_2
#define GPIO_I2S3_MCK GPIO_I2S3_MCK_0
#define DMACHAN_I2S3_RX DMAMAP_SPI3_RX_2
#define DMACHAN_I2S3_TX DMAMAP_SPI3_TX_2
/* ETH MII/RMII inputs and MDC/MDIO (referenced by arch driver) */
#define GPIO_ETH_MDC (GPIO_ETH_MDC_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MDIO (GPIO_ETH_MDIO_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RX_CLK (GPIO_ETH_MII_RX_CLK_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RX_DV (GPIO_ETH_MII_RX_DV_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RXD0 (GPIO_ETH_MII_RXD0_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RXD1 (GPIO_ETH_MII_RXD1_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_TX_CLK (GPIO_ETH_MII_TX_CLK_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_TXD2 (GPIO_ETH_MII_TXD2_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_CRS_DV (GPIO_ETH_RMII_CRS_DV_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_REF_CLK (GPIO_ETH_RMII_REF_CLK_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_RXD0 (GPIO_ETH_RMII_RXD0_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_RXD1 (GPIO_ETH_RMII_RXD1_0|GPIO_SPEED_100MHz)
#define GPIO_MCO1 (GPIO_MCO1_0|GPIO_SPEED_100MHz)
/* SDIO */
#define GPIO_SDIO_CK (GPIO_SDIO_CK_0|GPIO_SPEED_50MHz)
#define GPIO_SDIO_CMD (GPIO_SDIO_CMD_0|GPIO_SPEED_50MHz)
#define GPIO_SDIO_D0 (GPIO_SDIO_D0_0|GPIO_SPEED_50MHz)
#define GPIO_SDIO_D1 (GPIO_SDIO_D1_0|GPIO_SPEED_50MHz)
#define GPIO_SDIO_D2 (GPIO_SDIO_D2_0|GPIO_SPEED_50MHz)
#define GPIO_SDIO_D3 (GPIO_SDIO_D3_0|GPIO_SPEED_50MHz)
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
/* FSMC SRAM */
#define GPIO_FSMC_A0 (GPIO_FSMC_A0_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A1 (GPIO_FSMC_A1_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A2 (GPIO_FSMC_A2_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A3 (GPIO_FSMC_A3_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A4 (GPIO_FSMC_A4_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A5 (GPIO_FSMC_A5_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A6 (GPIO_FSMC_A6_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A7 (GPIO_FSMC_A7_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A8 (GPIO_FSMC_A8_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A9 (GPIO_FSMC_A9_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A10 (GPIO_FSMC_A10_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A11 (GPIO_FSMC_A11_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A12 (GPIO_FSMC_A12_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A13 (GPIO_FSMC_A13_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A14 (GPIO_FSMC_A14_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A15 (GPIO_FSMC_A15_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A16 (GPIO_FSMC_A16_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A17 (GPIO_FSMC_A17_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A18 (GPIO_FSMC_A18_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A19 (GPIO_FSMC_A19_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A20 (GPIO_FSMC_A20_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A21 (GPIO_FSMC_A21_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A22 (GPIO_FSMC_A22_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A23 (GPIO_FSMC_A23_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A24 (GPIO_FSMC_A24_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A25 (GPIO_FSMC_A25_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D0 (GPIO_FSMC_D0_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D1 (GPIO_FSMC_D1_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D2 (GPIO_FSMC_D2_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D3 (GPIO_FSMC_D3_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D4 (GPIO_FSMC_D4_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D5 (GPIO_FSMC_D5_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D6 (GPIO_FSMC_D6_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D7 (GPIO_FSMC_D7_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D8 (GPIO_FSMC_D8_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D9 (GPIO_FSMC_D9_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D10 (GPIO_FSMC_D10_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D11 (GPIO_FSMC_D11_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D12 (GPIO_FSMC_D12_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D13 (GPIO_FSMC_D13_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D14 (GPIO_FSMC_D14_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D15 (GPIO_FSMC_D15_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_NOE (GPIO_FSMC_NOE_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_NWE (GPIO_FSMC_NWE_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_NE1 (GPIO_FSMC_NE1_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_NE2 (GPIO_FSMC_NE2_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_NE3 (GPIO_FSMC_NE3_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_NBL0 (GPIO_FSMC_NBL0_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_NBL1 (GPIO_FSMC_NBL1_0|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32_OLIMEX_STM32_P407_INCLUDE_BOARD_H */

1
boards/arm/stm32/omnibusf4/configs/nsh/defconfig
View file

@ -11,6 +11,7 @@
# CONFIG_MMCSD_MMCSUPPORT is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="omnibusf4"
CONFIG_ARCH_BOARD_OMNIBUSF4=y

57
boards/arm/stm32/omnibusf4/include/board.h
View file

@ -160,8 +160,8 @@
#if 0
#define INVERTER_PIN_USART1 PC0 /* DYS F4 Pro, Omnibus F4 AIO 1st Gen only */
#endif
#define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */
#define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */
#define GPIO_USART1_RX (GPIO_USART1_RX_1|GPIO_SPEED_100MHz) /* PA10 */
#define GPIO_USART1_TX (GPIO_USART1_TX_1|GPIO_SPEED_100MHz) /* PA9 */
/* USART2:
*
@ -170,8 +170,8 @@
/* USART3: */
#define GPIO_USART3_TX GPIO_USART3_TX_1 /* PB10 */
#define GPIO_USART3_RX GPIO_USART3_RX_1 /* PB11 */
#define GPIO_USART3_TX (GPIO_USART3_TX_1|GPIO_SPEED_100MHz) /* PB10 */
#define GPIO_USART3_RX (GPIO_USART3_RX_1|GPIO_SPEED_100MHz) /* PB11 */
/* USART4: */
@ -180,15 +180,15 @@
#if 0
#define INVERTER_PIN_UART6 PC8 /* Omnibus F4 V3 and later, EXUAVF4PRO */
#endif
#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */
#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 */
#define GPIO_USART6_RX (GPIO_USART6_RX_1|GPIO_SPEED_100MHz) /* PC7 */
#define GPIO_USART6_TX (GPIO_USART6_TX_1|GPIO_SPEED_100MHz) /* PC6 */
/* PWM - motor outputs, etc. are on these pins: */
#define GPIO_TIM3_CH3OUT GPIO_TIM3_CH3OUT_1 /* S1_OUT PB0 */
#define GPIO_TIM3_CH4OUT GPIO_TIM3_CH4OUT_1 /* S2_OUT PB1 */
#define GPIO_TIM2_CH4OUT GPIO_TIM2_CH4OUT_1 /* S3_OUT PA3 */
#define GPIO_TIM2_CH3OUT GPIO_TIM3_CH3OUT_1 /* S4_OUT PA2 */
#define GPIO_TIM3_CH3OUT (GPIO_TIM3_CH3OUT_1|GPIO_SPEED_50MHz) /* S1_OUT PB0 */
#define GPIO_TIM3_CH4OUT (GPIO_TIM3_CH4OUT_1|GPIO_SPEED_50MHz) /* S2_OUT PB1 */
#define GPIO_TIM2_CH4OUT (GPIO_TIM2_CH4OUT_1|GPIO_SPEED_50MHz) /* S3_OUT PA3 */
#define GPIO_TIM2_CH3OUT (GPIO_TIM3_CH3OUT_1|GPIO_SPEED_50MHz) /* S4_OUT PA2 */
/* SPI1 :
*
@ -204,11 +204,11 @@
* #define ACC_1_ALIGN CW270_DEG
*/
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 /* PA6 */
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 /* PA7 */
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 /* PA5 */
#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz) /* PA6 */
#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz) /* PA7 */
#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz) /* PA5 */
#if 0
#define GPIO_SPI1_NSS GPIO_SPI1_NSS_2 /* PA4 */
#define GPIO_SPI1_NSS (GPIO_SPI1_NSS_2|GPIO_SPEED_50MHz) /* PA4 */
#endif
#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1 /* 2:0:3 */
#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1 /* 2:3:3 */
@ -218,13 +218,13 @@
* Used for MMC/SD on OMNIBUSF4SD.
*/
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1 /* PB14 */
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1 /* PB15 */
#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz) /* PB14 */
#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz) /* PB15 */
#define GPIO_SPI2_NSS (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | \
GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN12)
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2 /* PB13 */
#define DMACHAN_SPI2_RX DMAMAP_SPI2_RX /* 1:3:0 */
#define DMACHAN_SPI2_TX DMAMAP_SPI2_TX /* 1:4:0 */
#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz) /* PB13 */
#define DMACHAN_SPI2_RX DMAMAP_SPI2_RX /* 1:3:0 */
#define DMACHAN_SPI2_TX DMAMAP_SPI2_TX /* 1:4:0 */
#define GPIO_MMCSD_NSS GPIO_SPI2_NSS
#define GPIO_MMCSD_NCD (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | \
@ -240,16 +240,23 @@
* (OMNIBUSF4BASE targets appear to have a cyrf6936 device.)
*/
#define GPIO_SPI3_MISO GPIO_SPI3_MISO_2 /* PC11 */
#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2 /* PC12 */
#define GPIO_SPI3_NSS GPIO_SPI3_NSS_1 /* PA15 */ /* TODO: doesn't work like a chip select */
#define GPIO_SPI3_SCK GPIO_SPI3_SCK_2 /* PC10 */
#define GPIO_SPI3_MISO (GPIO_SPI3_MISO_2|GPIO_SPEED_50MHz) /* PC11 */
#define GPIO_SPI3_MOSI (GPIO_SPI3_MOSI_2|GPIO_SPEED_50MHz) /* PC12 */
#define GPIO_SPI3_NSS (GPIO_SPI3_NSS_1|GPIO_SPEED_50MHz) /* PA15 */ /* TODO: doesn't work like a chip select */
#define GPIO_SPI3_SCK (GPIO_SPI3_SCK_2|GPIO_SPEED_50MHz) /* PC10 */
#if 0
/* I2C : */
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_1|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2|GPIO_SPEED_50MHz)
#endif
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
#endif /* __BOARDS_ARM_STM32_OMNIBUSF4_INCLUDE_BOARD_H */

1
boards/arm/stm32/stm3240g-eval/configs/dhcpd/defconfig
View file

@ -7,6 +7,7 @@
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NETUTILS_DHCPD_IGNOREBROADCAST is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm3240g-eval"
CONFIG_ARCH_BOARD_STM3240G_EVAL=y

1
boards/arm/stm32/stm3240g-eval/configs/discover/defconfig
View file

@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm3240g-eval"
CONFIG_ARCH_BOARD_STM3240G_EVAL=y

1
boards/arm/stm32/stm3240g-eval/configs/fb/defconfig
View file

@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm3240g-eval"
CONFIG_ARCH_BOARD_STM3240G_EVAL=y

1
boards/arm/stm32/stm3240g-eval/configs/knxwm/defconfig
View file

@ -12,6 +12,7 @@
# CONFIG_NX_DISABLE_16BPP is not set
# CONFIG_NX_PACKEDMSFIRST is not set
# CONFIG_NX_WRITEONLY is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm3240g-eval"
CONFIG_ARCH_BOARD_STM3240G_EVAL=y

1
boards/arm/stm32/stm3240g-eval/configs/nettest/defconfig
View file

@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm3240g-eval"
CONFIG_ARCH_BOARD_STM3240G_EVAL=y

1
boards/arm/stm32/stm3240g-eval/configs/nsh/defconfig
View file

@ -8,6 +8,7 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm3240g-eval"
CONFIG_ARCH_BOARD_STM3240G_EVAL=y

1
boards/arm/stm32/stm3240g-eval/configs/nsh2/defconfig
View file

@ -12,6 +12,7 @@
# CONFIG_NSH_CONSOLE is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm3240g-eval"
CONFIG_ARCH_BOARD_STM3240G_EVAL=y

1
boards/arm/stm32/stm3240g-eval/configs/nxterm/defconfig
View file

@ -13,6 +13,7 @@
# CONFIG_NX_DISABLE_16BPP is not set
# CONFIG_NX_PACKEDMSFIRST is not set
# CONFIG_NX_WRITEONLY is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm3240g-eval"
CONFIG_ARCH_BOARD_STM3240G_EVAL=y

1
boards/arm/stm32/stm3240g-eval/configs/nxwm/defconfig
View file

@ -14,6 +14,7 @@
# CONFIG_NX_DISABLE_16BPP is not set
# CONFIG_NX_PACKEDMSFIRST is not set
# CONFIG_NX_WRITEONLY is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm3240g-eval"
CONFIG_ARCH_BOARD_STM3240G_EVAL=y

1
boards/arm/stm32/stm3240g-eval/configs/telnetd/defconfig
View file

@ -6,6 +6,7 @@
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm3240g-eval"
CONFIG_ARCH_BOARD_STM3240G_EVAL=y

1
boards/arm/stm32/stm3240g-eval/configs/webserver/defconfig
View file

@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm3240g-eval"
CONFIG_ARCH_BOARD_STM3240G_EVAL=y

1
boards/arm/stm32/stm3240g-eval/configs/xmlrpc/defconfig
View file

@ -7,6 +7,7 @@
#
# CONFIG_ARCH_FPU is not set
# CONFIG_DISABLE_OS_API is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm3240g-eval"
CONFIG_ARCH_BOARD_STM3240G_EVAL=y

159
boards/arm/stm32/stm3240g-eval/include/board.h
View file

@ -298,8 +298,8 @@
* - PC10 is MicroSDCard_D2 & RSS232/IrDA_TX
*/
#define GPIO_USART3_RX GPIO_USART3_RX_2
#define GPIO_USART3_TX GPIO_USART3_TX_2
#define GPIO_USART3_RX (GPIO_USART3_RX_2|GPIO_SPEED_100MHz)
#define GPIO_USART3_TX (GPIO_USART3_TX_2|GPIO_SPEED_100MHz)
/* Ethernet:
*
@ -323,19 +323,19 @@
* - PG14 is ETH_MII_TXD1/ETH_RMII_TXD1
*/
#define GPIO_ETH_PPS_OUT GPIO_ETH_PPS_OUT_1
#define GPIO_ETH_MII_CRS GPIO_ETH_MII_CRS_2
#define GPIO_ETH_MII_COL GPIO_ETH_MII_COL_2
#define GPIO_ETH_MII_RX_ER GPIO_ETH_MII_RX_ER_2
#define GPIO_ETH_MII_RXD2 GPIO_ETH_MII_RXD2_2
#define GPIO_ETH_MII_RXD3 GPIO_ETH_MII_RXD3_2
#define GPIO_ETH_MII_TXD3 GPIO_ETH_MII_TXD3_1
#define GPIO_ETH_MII_TX_EN GPIO_ETH_MII_TX_EN_2
#define GPIO_ETH_MII_TXD0 GPIO_ETH_MII_TXD0_2
#define GPIO_ETH_MII_TXD1 GPIO_ETH_MII_TXD1_2
#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2
#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2
#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2
#define GPIO_ETH_PPS_OUT (GPIO_ETH_PPS_OUT_1|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_CRS (GPIO_ETH_MII_CRS_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_COL (GPIO_ETH_MII_COL_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RX_ER (GPIO_ETH_MII_RX_ER_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RXD2 (GPIO_ETH_MII_RXD2_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RXD3 (GPIO_ETH_MII_RXD3_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_TXD3 (GPIO_ETH_MII_TXD3_1|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_TX_EN (GPIO_ETH_MII_TX_EN_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_TXD0 (GPIO_ETH_MII_TXD0_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_TXD1 (GPIO_ETH_MII_TXD1_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_TX_EN (GPIO_ETH_RMII_TX_EN_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_TXD0 (GPIO_ETH_RMII_TXD0_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_TXD1 (GPIO_ETH_RMII_TXD1_2|GPIO_SPEED_100MHz)
/* PWM
*
@ -393,29 +393,29 @@
*/
#if !defined(CONFIG_STM32_FSMC)
# define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2
# define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2
# define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_2
# define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_2
# define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_2
# define GPIO_TIM4_CH2OUT (GPIO_TIM4_CH2OUT_2|GPIO_SPEED_50MHz)
# define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_2|GPIO_SPEED_50MHz)
# define GPIO_TIM1_CH2OUT (GPIO_TIM1_CH2OUT_2|GPIO_SPEED_50MHz)
# define GPIO_TIM1_CH3OUT (GPIO_TIM1_CH3OUT_2|GPIO_SPEED_50MHz)
# define GPIO_TIM1_CH4OUT (GPIO_TIM1_CH4OUT_2|GPIO_SPEED_50MHz)
#elif !defined(CONFIG_STM32_OTGFS)
# define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1
# define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_1
# define GPIO_TIM1_CH3OUT (GPIO_TIM1_CH3OUT_1|GPIO_SPEED_50MHz)
# define GPIO_TIM1_CH4OUT (GPIO_TIM1_CH4OUT_1|GPIO_SPEED_50MHz)
#endif
#if !defined(CONFIG_STM32_DCMI)
# define GPIO_TIM8_CH1OUT GPIO_TIM8_CH1OUT_2
# define GPIO_TIM8_CH2OUT GPIO_TIM8_CH2OUT_2
# define GPIO_TIM8_CH3OUT GPIO_TIM8_CH3OUT_2
# define GPIO_TIM8_CH1OUT (GPIO_TIM8_CH1OUT_2|GPIO_SPEED_50MHz)
# define GPIO_TIM8_CH2OUT (GPIO_TIM8_CH2OUT_2|GPIO_SPEED_50MHz)
# define GPIO_TIM8_CH3OUT (GPIO_TIM8_CH3OUT_2|GPIO_SPEED_50MHz)
#else
# define GPIO_TIM8_CH1OUT GPIO_TIM8_CH1OUT_1
# define GPIO_TIM8_CH1OUT (GPIO_TIM8_CH1OUT_1|GPIO_SPEED_50MHz)
# if !defined(CONFIG_STM32_SDIO)
# define GPIO_TIM8_CH3OUT GPIO_TIM8_CH3OUT_1
# define GPIO_TIM8_CH3OUT (GPIO_TIM8_CH3OUT_1|GPIO_SPEED_50MHz)
# endif
#endif
#if !defined(CONFIG_STM32_SDIO)
# define GPIO_TIM8_CH4OUT GPIO_TIM8_CH4OUT_1
# define GPIO_TIM8_CH4OUT (GPIO_TIM8_CH4OUT_1|GPIO_SPEED_50MHz)
#endif
/* CAN
@ -439,11 +439,11 @@
* PB5 = ULPI_D7 & CAN2_RX
*/
#define GPIO_CAN1_RX GPIO_CAN1_RX_3
#define GPIO_CAN1_TX GPIO_CAN1_TX_3
#define GPIO_CAN1_RX (GPIO_CAN1_RX_3|GPIO_SPEED_50MHz)
#define GPIO_CAN1_TX (GPIO_CAN1_TX_3|GPIO_SPEED_50MHz)
#define GPIO_CAN2_RX GPIO_CAN2_RX_2
#define GPIO_CAN2_TX GPIO_CAN2_TX_1
#define GPIO_CAN2_RX (GPIO_CAN2_RX_2|GPIO_SPEED_50MHz)
#define GPIO_CAN2_TX (GPIO_CAN2_TX_1|GPIO_SPEED_50MHz)
/* I2C.
* Only I2C1 is available on the STM3240G-EVAL. I2C1_SCL and I2C1_SDA are
@ -453,8 +453,8 @@
* - PB9 is I2C1_SDA
*/
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_1|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2|GPIO_SPEED_50MHz)
/* DMA Channel/Stream Selections ********************************************/
@ -509,4 +509,95 @@ void stm3240g_lcdclear(uint16_t color);
#endif
#endif /* __ASSEMBLY__ */
/* ETH MII/RMII inputs and MDC/MDIO + MCO1 */
#define GPIO_MCO1 (GPIO_MCO1_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MDC (GPIO_ETH_MDC_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MDIO (GPIO_ETH_MDIO_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RX_CLK (GPIO_ETH_MII_RX_CLK_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RX_DV (GPIO_ETH_MII_RX_DV_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RXD0 (GPIO_ETH_MII_RXD0_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_RXD1 (GPIO_ETH_MII_RXD1_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_TX_CLK (GPIO_ETH_MII_TX_CLK_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MII_TXD2 (GPIO_ETH_MII_TXD2_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_CRS_DV (GPIO_ETH_RMII_CRS_DV_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_REF_CLK (GPIO_ETH_RMII_REF_CLK_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_RXD0 (GPIO_ETH_RMII_RXD0_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_RXD1 (GPIO_ETH_RMII_RXD1_0|GPIO_SPEED_100MHz)
/* SDIO */
#define GPIO_SDIO_CK (GPIO_SDIO_CK_0|GPIO_SPEED_50MHz)
#define GPIO_SDIO_CMD (GPIO_SDIO_CMD_0|GPIO_SPEED_50MHz)
#define GPIO_SDIO_D0 (GPIO_SDIO_D0_0|GPIO_SPEED_50MHz)
#define GPIO_SDIO_D1 (GPIO_SDIO_D1_0|GPIO_SPEED_50MHz)
#define GPIO_SDIO_D2 (GPIO_SDIO_D2_0|GPIO_SPEED_50MHz)
#define GPIO_SDIO_D3 (GPIO_SDIO_D3_0|GPIO_SPEED_50MHz)
/* USB OTG FS */
#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz)
#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz)
/* DAC */
#define GPIO_DAC1_OUT1 GPIO_DAC1_OUT1_0
#define GPIO_DAC1_OUT2 GPIO_DAC1_OUT2_0
/* FSMC SRAM/LCD */
#define GPIO_FSMC_A0 (GPIO_FSMC_A0_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A1 (GPIO_FSMC_A1_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A2 (GPIO_FSMC_A2_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A3 (GPIO_FSMC_A3_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A4 (GPIO_FSMC_A4_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A5 (GPIO_FSMC_A5_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A6 (GPIO_FSMC_A6_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A7 (GPIO_FSMC_A7_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A8 (GPIO_FSMC_A8_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A9 (GPIO_FSMC_A9_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A10 (GPIO_FSMC_A10_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A11 (GPIO_FSMC_A11_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A12 (GPIO_FSMC_A12_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A13 (GPIO_FSMC_A13_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A14 (GPIO_FSMC_A14_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A15 (GPIO_FSMC_A15_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A16 (GPIO_FSMC_A16_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A17 (GPIO_FSMC_A17_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A18 (GPIO_FSMC_A18_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A19 (GPIO_FSMC_A19_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A20 (GPIO_FSMC_A20_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A21 (GPIO_FSMC_A21_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A22 (GPIO_FSMC_A22_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A23 (GPIO_FSMC_A23_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A24 (GPIO_FSMC_A24_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_A25 (GPIO_FSMC_A25_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D0 (GPIO_FSMC_D0_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D1 (GPIO_FSMC_D1_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D2 (GPIO_FSMC_D2_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D3 (GPIO_FSMC_D3_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D4 (GPIO_FSMC_D4_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D5 (GPIO_FSMC_D5_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D6 (GPIO_FSMC_D6_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D7 (GPIO_FSMC_D7_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D8 (GPIO_FSMC_D8_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D9 (GPIO_FSMC_D9_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D10 (GPIO_FSMC_D10_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D11 (GPIO_FSMC_D11_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D12 (GPIO_FSMC_D12_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D13 (GPIO_FSMC_D13_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D14 (GPIO_FSMC_D14_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_D15 (GPIO_FSMC_D15_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_NOE (GPIO_FSMC_NOE_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_NWE (GPIO_FSMC_NWE_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_NE1 (GPIO_FSMC_NE1_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_NE2 (GPIO_FSMC_NE2_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_NE3 (GPIO_FSMC_NE3_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_NE4 (GPIO_FSMC_NE4_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_NBL0 (GPIO_FSMC_NBL0_0|GPIO_SPEED_100MHz)
#define GPIO_FSMC_NBL1 (GPIO_FSMC_NBL1_0|GPIO_SPEED_100MHz)
#endif /* __BOARD_ARM_STM32_STM3240G_EVAL_INCLUDE_BOARD_H */

1
boards/arm/stm32/stm3240g-eval/src/stm32_selectlcd.c
View file

@ -32,6 +32,7 @@
#include "chip.h"
#include "arm_internal.h"
#include "stm32.h"
#include <arch/board/board.h>
#include "stm3240g-eval.h"
#ifdef CONFIG_STM32_FSMC

1
boards/arm/stm32/stm3240g-eval/src/stm32_selectsram.c
View file

@ -32,6 +32,7 @@
#include "chip.h"
#include "arm_internal.h"
#include "stm32.h"
#include <arch/board/board.h>
#include "stm3240g-eval.h"
#ifdef CONFIG_STM32_FSMC

1
boards/arm/stm32/stm32f401rc-rs485/configs/adc/defconfig
View file

@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ADC=y
CONFIG_ANALOG=y
CONFIG_ARCH="arm"

1
boards/arm/stm32/stm32f401rc-rs485/configs/bmp280/defconfig
View file

@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm32f401rc-rs485"
CONFIG_ARCH_BOARD_COMMON=y

1
boards/arm/stm32/stm32f401rc-rs485/configs/dac/defconfig
View file

@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm32f401rc-rs485"
CONFIG_ARCH_BOARD_STM32F401RC_RS485=y

1
boards/arm/stm32/stm32f401rc-rs485/configs/hcsr04/defconfig
View file

@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm32f401rc-rs485"
CONFIG_ARCH_BOARD_COMMON=y

1
boards/arm/stm32/stm32f401rc-rs485/configs/lcd1602/defconfig
View file

@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm32f401rc-rs485"
CONFIG_ARCH_BOARD_COMMON=y

1
boards/arm/stm32/stm32f401rc-rs485/configs/lm75/defconfig
View file

@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm32f401rc-rs485"
CONFIG_ARCH_BOARD_COMMON=y

1
boards/arm/stm32/stm32f401rc-rs485/configs/max7219/defconfig
View file

@ -11,6 +11,7 @@
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_NX_DISABLE_1BPP is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm32f401rc-rs485"
CONFIG_ARCH_BOARD_COMMON=y

1
boards/arm/stm32/stm32f401rc-rs485/configs/mfrc522/defconfig
View file

@ -10,6 +10,7 @@
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm32f401rc-rs485"
CONFIG_ARCH_BOARD_COMMON=y

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