This makes units compatible with what Linux uses for SocketCAN bitrate
and allows representing usual Single Wire Can (SAE J2411) usual bitrates
of 33333 and 83333 bps.
Signed-off-by: Carlos Sanchez <carlossanchez@geotab.com>
This commit bumps common source version for RISC-V-based Espressif
SoCs on NuttX. Specifically, this solves an issue regarding SPI
flash frequency selection on ESP32-C6.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Add the hardware register definition file for the GPDMA peripheral.
This is necessary to support implementing dma driver in the future.
Also adds skeleton arch dma header that includes the hardware file.
Signed-off-by: Tyler Bennett <tbennett@2g-eng.com>
Added menus for usart, I2C, and SPI selection to make the peripheral selection submenu easier to navigate.
Added DMA1 and DMA2 selection options.
Signed-off-by: Tyler Bennett <tbennett@2g-eng.com>
Some hardware configurations require bss and data initialization before being called.
Signed-off-by: Tyler Bennett <tbennett@2g-eng.com>
Fix nxstyle errors
Adds Kconfig options to select UART6 for the STM32H5, and updates the architecture files accordingly.
Signed-off-by: Tyler Bennett <tbennett@2g-eng.com>
Previously, SIOCSCANBITRATE brought the iterface up to ensure changes
where immediately applied. This was confusing, see
https://lists.apache.org/thread/g8d0m6yp7noywhroby5br4hxt3r4og2c
Now SIOCSCANBITRATE fails is interface is up.
All existing SocketCAN drivers updated.
Signed-off-by: Carlos Sanchez <carlossanchez@geotab.com>
H5 implementation of functions defined in include/nuttx/progmem.h.
The driver supports a subset of the flash peripheral functions.
- Assumes non-secure memory accesses. Does not check for memory protection mechanisms.
References implementation in arch/arm/src/stm32h7/stm32h743xx_flash.c
This commit disables the esptool's stubs when flashing ESP32-C3
(`CONFIG_ESPRESSIF_ESPTOOLPY_NO_STUB=y`) if the serial/JTAG console
is enabled (`CONFIG_ESPRESSIF_USBSERIAL=y`).
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit fixes a bug on the `usbconsole` defconfigs for
Espressif's RISC-V SoCs when the serial/JTAG is used and the
Kconfig macro `DEBUG_FEATURES` is enabled. This config enables the
`showprogress` macro during start-up. Previously, `riscv_lowputc`
function was used by this macro, but it is not suitable for the
serial/JTAG console. Instead, use the `esp_rom_printf` function
that is suitable for both serial/JTAG and UART consoles.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
The alignment of the ctrlreq was correct by luck, and was broken
when the spinlock was added to the structure. In non-smp configurations
spinlock_t is currently 8-bits, causing wrong alignment of the
ctrlreq structure.
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
Renaming "modlib" to "libelf" is more in line with the implementation content,
which makes it easier for individual developers to understand the capabilities of this module.
CONFIG_LIBC_MODLIB -> CONFIG_LIBC_ELF
Signed-off-by: chao an <anchao.archer@bytedance.com>
If a process causes a fatal error when it's running a system call, the
whole system should crash as the crash originated from the kernel.
Do this by running the PANIC() branch, if task is in syscall.
Signed-off-by: Ville Juven <ville.juven@unikie.com>
test:
1.use mps3-an547 build helloxx as module and run it
2.use qemu-armv7a:knsh test kernel build helloxx and run it
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
This commit fixes the SPI flash frequency selection for ESP32-S2,
enabling the Kconfig macros to be selected when ESP32-S2 SoC is
enabled. Please note that this was recently changed to make it
compatible with already existing SPI flash Kconfig macros for ESP32
and ESP32-S3 and it introduced this regression for ESP32-S2.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Remove legacy I2S implementation without breaking defconfigs for Xtensa based Espressif devices
Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
SPI flash operation modes - Dual Output (dout), Dual I/O (dio),
Quad Output (qout), Quad I/O (qio) and Octal (opi) were not being
properly selected. This commit fixes this behavior and the device
is now able to boot and initialize the proper SPI flash mode.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
boards/arm: Add CMakeLists for the nucleo-l476rg.
Adds CMakeLists files for the STM32L4 architectures
and one of the development boards. Files are adapted
from the similar STM32F7 boards, but built to reflect
the existing Make.defs.
Signed-off-by: Kye Morton <pryre.dev@outlook.com>
This commit simplifies the selection of the SPI flash frequency for
Espressif SoCs by using a standardized Kconfig-defined macro.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit moves some internal libraries' .bss sections to the
external PSRAM chip, freeing internal memory for other usages. Note
that it is necessary to update `esp32s3-devkit:python` defconfig
otherwise it would fail to build.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Fix and enable ADC calibration. The ADC voltage regulator must be
enabled and regulator start-up time must be respected.
tested on nucleo-c071rb and b-l072z-lrwan1
Signed-off-by: raiden00pl <raiden00@railab.me>
Optimize crc32 standard(poly:0x04C11DB7) and crc32
castagnoli(poly:0x1EDC6F41) with arm crc32 extension instructions.
For example, crc32 standard caculates(lookup crc32 table) 1812 bytes data,
reduced the time from 118 us to 14 us through optimization.
Performance improved ~700%
Signed-off-by: Jinliang Li <lijinliang1@lixiang.com>
In the arm_el_init function, the FPU might be used, for example, the
assembly optimization of memcpy in arm_tcm_load uses FPU and NEON
instructions and registers.
Therefore, it's important to initialize the
FPU as early as possible to prevent system hangs that could occur if the
FPU is used without being initialized.
Signed-off-by: Jinliang Li <lijinliang1@lixiang.com>
