Add ESP32-S3 CAM controller driver implementing the NuttX imgdata
interface. Supports 8-bit DVP camera input with DMA-based frame
capture, VSYNC interrupt handling, and PSRAM frame buffer allocation.
The driver is sensor-agnostic: resolution and pixel format are
negotiated at runtime through the V4L2 pipeline. XCLK output
(24 MHz) is started during initialization for sensor communication.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Add sysctl driver for K210 SoC providing clock and reset control:
- Clock enable/disable with two-stage APB/peripheral enable pattern
- Peripheral reset control with proper timing
- Clock frequency query for PLL, CPU, APB buses, and peripherals
- PLL frequency calculation and CPU frequency configuration
The sysctl driver is built unconditionally for K210 boards as it
provides essential clock and reset control functionality.
Add Kconfig option:
- K210_CPU_FREQ: Target CPU frequency in Hz (default 400MHz)
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Add nxboot bootloader board integration for nucleo-h743zi.
nxboot uses a three-slot layout (primary, secondary, tertiary) with
no scratch partition.
- add STM32_APP_FORMAT_NXBOOT board support and nxboot-specific OTA
slot defaults
- gate scratch partition configuration on MCUboot, where it applies
- select nxboot linker scripts in the board build logic
- add tertiary OTA partition support in stm32_progmem.c
- add nxboot-loader and nxboot-app defconfigs and linker scripts
- validate the fixed nxboot flash layout used by this board so
mismatched config values fail at build time instead of producing
a silently broken image
Signed-off-by: Neil Berkman <neil@xuku.com>
Three fixes to make LPUART1 work as NSH console on Nucleo-L552ZE-Q:
1. stm32l5_lowputc: add LPUART-specific BRR formula (256 * fCK / baud)
instead of reusing the standard USART divisor calculation.
2. stm32_boot: enable VDDIO2 and reconfigure LPUART1 GPIOs (PG7/PG8)
in board_initialize. The low-level setup runs before VDDIO2 is
enabled, so GPIOG writes silently fail.
3. stm32l5_serial: fix LPUART1 apbclock (PCLK1 not PCLK2), add
LPUART BRR branch in setformat, cast to uint64_t to prevent
32-bit overflow in (fCK << 8).
Also switch nsh defconfig from USART3 to LPUART1, add GPIO_LPUART1
pin definitions in board.h, and update board documentation.
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
This PR fixes a typo at `--help--` that causes NuttX Builds to fail, it should have been `---help---`. This is a recurring problem, NuttX CI uses a different way of handling NuttX Configs (it doesn't use `tools/configure.sh`)
https://github.com/lupyuen/nuttx-riscv64/actions/runs/22929878852/job/66548808341#step:5:161
```
$ tools/configure.sh rv-virt:nsh
arch/tricore/Kconfig:124: syntax error
arch/tricore/Kconfig:123: unknown option "--help--"
arch/tricore/Kconfig:124:warning: ignoring unsupported character ','
arch/tricore/Kconfig:124: unknown option "In"
```
Signed-off-by: Lup Yuen Lee <luppy@appkaki.com>
This commit adds support for the Espressif's RISC-V-based ESP32-P4
chip along with its ESP32-P4-Function-EV-Board board.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
* Fix GPIO unspecified behavior on some GPIO ports.
* Fix GPIO undefined behavior caused by uncleared set or reset bits.
Signed-off-by: Saurav Pal <resyfer.dev@gmail.com>
Add definition to setup appropriate reduced SRAM sizes
CONFIG_STM32H7_STM32H72XXX_OR_STM32H73XXX.
The define should make addition of other STM32H72X
and TM32H73X chips easier.
Signed-off-by: Pavel Pisa <pisa@fel.cvut.cz>
Update SIM configuration and CMake toolchain to resolve
linker errors when building on macOS. Adjust POSIX host
implementation to ensure successful compilation and
proper behavior of the sim target.
Modified:
- arch/sim/Kconfig
- arch/sim/src/cmake/Toolchain.cmake
- arch/sim/src/sim/posix/sim_hostmisc.c
Signed-off-by: Aditya Yadav <166515021+aditya0yadav@users.noreply.github.com>
GPIO PIN base address calculation had double right shift, thus call
to SAM_PION_BASE was always with port = 0 instead of correct port
number. As a result, function sam_gpioirq didn't correctly configure
additional interrupt modes (only rising or falling edge and level
interrupts).
The issue occured on SAMv7 and SAM34 platforms (likely copy-pasted
from one to another).
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This commit updates the common-source integration for RISC-V-based
Espressif devices (ESP32-C3, ESP32-C6, and ESP32-H2). This is part of a
larger common-source update split by architecture for better maintainability
of the already-supported devices and upcoming devices.
Major components updated:
- IRQ allocator refactoring with intr_alloc integration
- Common-source drivers (GPIO, RMT, I2C, SPI, UART, etc.)
- Espressif components upgrade to release/master.b
- Peripheral drivers (ADC, PWM, LEDC, MCPWM, PCNT, Temperature Sensor, etc.)
- Wireless adapters (Wi-Fi and BLE)
- Board defconfigs for all RISC-V Espressif boards
- Critical section handling improvements
Key architectural changes:
- IRQ Allocator: The new interrupt allocator enables multiple mapping
options from interrupt sources to CPU interrupts, providing flexibility
required by modern peripherals. Although this introduces breaking changes
to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE
Kconfig option is explicitly checked during startup to ensure proper
configuration. This validation prevents runtime issues from configuration
mismatches.
Note: This is a large commit to maintain bisectability. Breaking the
changes into smaller commits would result in non-building intermediate
states across the common-source infrastructure update.
Tested configurations:
- All defconfigs were built and tested, inclusing `ostest`.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
To be merged with RISC-V implementation
This patch fixes a typo in a comment. (Tested: checkpatch - all checks
pass, compilation yields binary with identical SHA256 checksum
with and without the patch.)
Signed-off-by: Kerogit <kr.git@kerogit.eu>
Add hardware register headers and driver support for the NXP i.MX93
Cortex-M33 core. All new and modified code is guarded by
ARCH_CHIP_IMX93_M33 preprocessor defines; existing i.MX95-M7 builds
are unaffected.
New drivers:
- imx9_xcache.c - off core cache init and maintenance
- imx9_ccm.c - generic CCM abstraction layer
Signed-off-by: Maarten Zanders <maarten@zanders.be>
Rename imx95_mu_* functions to imx9_mu_*, decoupling the MU driver
API from the iMX95-specific naming in preparation for iMX93-M33
support.
Add ARCH_CHIP_IMX95_M7 dependency to the MU instance Kconfig entries
so they are only visible for the appropriate target.
Switch imx9_mu.c to include the generic imx9_memorymap.h instead of
the imx95-specific header.
Fix incorrect help text for MU8 (was copy-pasted from MU5).
Signed-off-by: Maarten Zanders <maarten@zanders.be>
Extract chip-specific constants from imx9_rptun.c and imx9_rsctable.c
into new dispatch headers:
- hardware/imx9_rsctable.h: VDEV0_VRING_BASE and RESOURCE_TABLE_BASE,
selected per ARCH_CHIP define
- hardware/imx9_rptun.h: MU_INSTANCE, selected per ARCH_CHIP define
Rename the misnamed VRING_SHMEM constant in imx9_rptun.c to
RESOURCE_TABLE_BASE, which correctly reflects that this address points
to the resource table, not the vring shared memory region.
No functional change for i.MX95-M7 builds.
Signed-off-by: Maarten Zanders <maarten@zanders.be>
Use NVIC_IRQ_ENABLE(n) and NVIC_IRQ_PRIORITY(n) macros in
imx9_dumpnvic() to iterate over all NVIC registers programmatically
based on CONFIG_ARCH_NINTS (IMX9_IRQ_NEXTINT), rather than
enumerating named per-range register defines. Output is grouped
4-per-line for priority and 4-per-line for enable registers,
matching the original layout.
This avoids accessing registers which don't exist when extending
the interrupt count.
Also replace named NVIC_IRQxx_yy_ENABLE constants in imx9_irqinfo()
with NVIC_IRQ_ENABLE(n), avoiding naming conflicts between chips
with different IRQ counts.
Fix the upper boundary in the >192 IRQ branch from 219 to 224 to
align with the 32-interrupt register granularity.
Change %08x to %08lx to silence warnings from the compiler for
the debug dump.
No functional change for existing i.MX95-M7 builds.
Signed-off-by: Maarten Zanders <maarten@zanders.be>
The GPIO mux range check in imx9_iomux_gpio() used a hardcoded
IOMUXC_MUX_CTL_GPIO_IO37_OFFSET as the upper bound, which is
i.MX95-specific. Move the define to imx95_iomuxc.h as an alias of
the last GPIO_IO entry, and use the named constant in the comparison.
No functional change; i.MX95 builds are unaffected.
Signed-off-by: Maarten Zanders <maarten@zanders.be>
- Guard imx9_gpc.h inclusion with CONFIG_IMX9_WFI_AWAKES_AT_SYSTICK
to avoid a GPC dependency on chips that lack GPC
- Add depends on ARCH_CHIP_IMX95_M7 to IMX9_WFI_AWAKES_AT_SYSTICK
since GPC wake configuration is i.MX95-specific
- Move XTAL_FREQ and ROOT_CLOCK_OFFSET defines to imx95_clock.h
- Make imx9_sm_setrootclock() and imx9_sm_getipfreq() static;
they are not referenced outside this translation unit
Signed-off-by: Maarten Zanders <maarten@zanders.be>
When testing tickless scheme with default arm_systick.c, we found the
count writed to systick register is too smaller the expected, just the
ticks not count, and os runing abnormally with too much interrupter.
Add necessary coversion, then system run well.
Signed-off-by: taoliu <taoliu@asrmicro.com>
The X11 event loop in the POSIX simulator was processing MotionNotify
(touch/mouse movement)and ButtonPress/ButtonRelease events unconditionally,
even when the touchscreen feature(CONFIG_SIM_TOUCHSCREEN) was disabled.
This could lead to unnecessary event processing, potential compiler warnings
about unusedfunctions (e.g., sim_buttonevent), or unintended behavior in simulator
builds withouttouchscreen support. The touchscreen-related event handling should
only be active whenthe corresponding configuration is enabled.
This fix wraps the MotionNotify and ButtonPress/ButtonRelease event handling
logicwith #ifdef CONFIG_SIM_TOUCHSCREEN guards to:
1. Ensure touchscreen/mouse event processing is only compiled when CONFIG_SIM_TOUCHSCREEN is enabled.
2. Eliminate unused code warnings in non-touchscreen simulator builds.
3. Align event loop behavior with the configured feature set, reducing unnecessary runtime overhead.
The change maintains full touchscreen functionality when the config is enabled, whilecleaning up the
code path for builds that don't require touchscreen support.
Signed-off-by: chao an <anchao.archer@bytedance.com>
The X11 framebuffer implementation in the POSIX simulator was creating a window
and graphics context but failing to map (display) the window to thescreen with XMapWindow().
This omission meant the framebuffer window would be created in the X11server but remain hidden,
making it impossible to see any graphics outputfrom the simulator. The window existed in the X11
server's state but wasnot rendered to the screen.
This fix adds the missing XMapWindow(display, g_window) call aftercreating the graphics context, which:
1. Maps the created X11 window to the screen (makes it visible).
2. Ensures framebuffer output is rendered to the display as expected.
3. Maintains compatibility with existing X11 framebuffer logic.
The change restores basic visibility of the simulator's framebuffer window,
fixing a critical usability issue for graphics-related testing in the POSIX simulator.
Signed-off-by: chao an <anchao.archer@bytedance.com>
This commits adds a function that can be implemented by any vendor
to allow SoC-specific functions to be called by `up_initialize`.
Please note that `up_initialize` is provided by the arch level, but
it doesn't allow SoC-specific initialization. Although it could be
possible to run such initialization on board-level, semantically
it isn't related to the board, but with the SoC. As an example of
such implementation, some SoCs require RTC subsystem initialization
to occur before the OS is completely initialized.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commits adds a function that can be implemented by any vendor
to allow SoC-specific functions to be called by `up_initialize`.
Please note that `up_initialize` is provided by the arch level, but
it doesn't allow SoC-specific initialization. Although it could be
possible to run such initialization on board-level, semantically
it isn't related to the board, but with the SoC. As an example of
such implementation, some SoCs require RTC subsystem initialization
to occur before the OS is completely initialized.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
The esp32_spi_poll_exchange() function previously used a hardcoded
length of sizeof(uint32_t) (4 bytes) for memcpy() operations and
pointer increments, disregarding the actual remaining transfer_size.
When an SPI transaction involved a data length not aligned to 4 bytes
(such as a 1-byte payload commonly used in sub-GHz radio drivers),
the driver forced a 4-byte memory transfer. This caused out-of-bounds
reads and writes, leading to stack smashing and fatal CPU exceptions
(e.g., EXCCAUSE=0000).
This patch resolves the memory corruption vulnerability by:
1. Calculating a precise `chunk` size for each iteration, strictly
bounded by the remaining `transfer_size`.
2. Limiting the memcpy() operations and the subsequent pointer
increments (tp and rp) to this exact chunk size.
3. Zero-initializing the temporary TX register (w_wd) before copying
to clear padding and prevent reading uninitialized memory.
4. Adding a NULL check for the receive pointer (rp) prior to the
memcpy operation to prevent unintended memory writes.
Signed-off-by: Chip L. <chplee@gmail.com>
The sim_bthcisock_interrupt() handler for Bluetooth HCI sockets in the simulatorwas using
an if statement to check for available data on the HCI socket. Thismeant that only a single
packet would be read and processed per interrupt trigger,even if multiple packets were waiting
in the socket buffer.
This led to incomplete data processing: unread packets would remain in the bufferuntil the next
interrupt tick, causing delayed handling of Bluetooth HCI events/commands,packet backlogs,
or missed data in high-throughput scenarios.
This fix replaces the if with a while loop to:
1. Continuously check for and read available data from the HCI socket until no more
packets are present in the buffer.
2. Ensure all pending HCI packets are processed in a single interrupt handler invocation.
3. Eliminate packet backlogs and reduce latency in Bluetooth HCI communication.
The change maintains the same core data reception logic (bthcisock_receive()) butensures it runs
for all available packets, improving the reliability and responsivenessof the simulator's Bluetooth HCI socket implementation.
Signed-off-by: chao an <anchao.archer@bytedance.com>
Changes the default value for CONFIG_BOARD_LOOPSPERMSEC to -1, which is
invalid. All boards that forget to configure this value will encounter a
static assertion at compile time, enforcing that configurations
upstreamed to NuttX have calibrated values for correct delay timings.
Boards which implement ALARM_ARCH or TIMER_ARCH do not rely on the
busy-loop delay implementation and thus only have a run-time check to
ensure proper delay-timings (in the case where delays are used before
the alarm/timer driver is registered).
Some boards already in the NuttX upstream do not have calibrated values,
but there are no users who currently own the board to submit a
calibrated value for the configurations to use. In this scenario, the
value is temporarily set to 0 and a warning is displayed so that users
of these boards are informed of the calibration process.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
