arch/arm/imx9: irq: replace hardcoded NVIC register lists with loops.

Use NVIC_IRQ_ENABLE(n) and NVIC_IRQ_PRIORITY(n) macros in
imx9_dumpnvic() to iterate over all NVIC registers programmatically
based on CONFIG_ARCH_NINTS (IMX9_IRQ_NEXTINT), rather than
enumerating named per-range register defines. Output is grouped
4-per-line for priority and 4-per-line for enable registers,
matching the original layout.
This avoids accessing registers which don't exist when extending
the interrupt count.

Also replace named NVIC_IRQxx_yy_ENABLE constants in imx9_irqinfo()
with NVIC_IRQ_ENABLE(n), avoiding naming conflicts between chips
with different IRQ counts.

Fix the upper boundary in the >192 IRQ branch from 219 to 224 to
align with the 32-interrupt register granularity.

Change %08x to %08lx to silence warnings from the compiler for
the debug dump.

No functional change for existing i.MX95-M7 builds.

Signed-off-by: Maarten Zanders <maarten@zanders.be>
This commit is contained in:
Maarten Zanders 2026-02-24 10:26:37 +01:00 committed by Xiang Xiao
parent 2c5ffacff5
commit 3631256219

View file

@ -81,11 +81,14 @@
static void imx9_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;
int i;
char buf[64];
int len;
flags = enter_critical_section();
irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
irqinfo(" INTCTRL: %08lx VECTAB: %08lx\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x "
@ -95,120 +98,57 @@ static void imx9_dumpnvic(const char *msg, int irq)
getreg32(NVIC_SYSHCON_USGFAULTENA),
getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
irqinfo(" IRQ ENABLE: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE),
getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE),
getreg32(NVIC_IRQ96_127_ENABLE));
#if IMX9_IRQ_NEXTINT > 128
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ128_159_ENABLE),
getreg32(NVIC_IRQ160_191_ENABLE),
getreg32(NVIC_IRQ192_223_ENABLE),
getreg32(NVIC_IRQ224_239_ENABLE));
#endif
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
len = 0;
for (i = 0; i < IMX9_IRQ_NEXTINT; i += 32)
{
if (i % 128 == 0)
{
len = 0;
len += snprintf(buf + len, sizeof(buf) - len, "%s",
i == 0 ? " IRQ ENABLE: " : " ");
}
len += snprintf(buf + len, sizeof(buf) - len, "%08lx",
getreg32(NVIC_IRQ_ENABLE(i)));
if ((i + 32) >= IMX9_IRQ_NEXTINT || (i + 32) % 128 == 0)
{
irqinfo("%s\n", buf);
}
else
{
len += snprintf(buf + len, sizeof(buf) - len, " ");
}
}
irqinfo(" SYSH_PRIO: %08lx %08lx %08lx\n",
getreg32(NVIC_SYSH4_7_PRIORITY),
getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY),
getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY),
getreg32(NVIC_IRQ12_15_PRIORITY));
#if IMX9_IRQ_NEXTINT > 16
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY),
getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY),
getreg32(NVIC_IRQ28_31_PRIORITY));
#endif
#if IMX9_IRQ_NEXTINT > 32
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY),
getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY),
getreg32(NVIC_IRQ44_47_PRIORITY));
#endif
#if IMX9_IRQ_NEXTINT > 48
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY),
getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY),
getreg32(NVIC_IRQ60_63_PRIORITY));
#endif
#if IMX9_IRQ_NEXTINT > 64
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY),
getreg32(NVIC_IRQ68_71_PRIORITY),
getreg32(NVIC_IRQ72_75_PRIORITY),
getreg32(NVIC_IRQ76_79_PRIORITY));
#endif
#if IMX9_IRQ_NEXTINT > 80
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ80_83_PRIORITY),
getreg32(NVIC_IRQ84_87_PRIORITY),
getreg32(NVIC_IRQ88_91_PRIORITY),
getreg32(NVIC_IRQ92_95_PRIORITY));
#endif
#if IMX9_IRQ_NEXTINT > 96
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ96_99_PRIORITY),
getreg32(NVIC_IRQ100_103_PRIORITY),
getreg32(NVIC_IRQ104_107_PRIORITY),
getreg32(NVIC_IRQ108_111_PRIORITY));
#endif
#if IMX9_IRQ_NEXTINT > 112
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ112_115_PRIORITY),
getreg32(NVIC_IRQ116_119_PRIORITY),
getreg32(NVIC_IRQ120_123_PRIORITY),
getreg32(NVIC_IRQ124_127_PRIORITY));
#endif
#if IMX9_IRQ_NEXTINT > 128
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ128_131_PRIORITY),
getreg32(NVIC_IRQ132_135_PRIORITY),
getreg32(NVIC_IRQ136_139_PRIORITY),
getreg32(NVIC_IRQ140_143_PRIORITY));
#endif
#if IMX9_IRQ_NEXTINT > 144
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ144_147_PRIORITY),
getreg32(NVIC_IRQ148_151_PRIORITY),
getreg32(NVIC_IRQ152_155_PRIORITY),
getreg32(NVIC_IRQ156_159_PRIORITY));
#endif
#if IMX9_IRQ_NEXTINT > 160
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ160_163_PRIORITY),
getreg32(NVIC_IRQ164_167_PRIORITY),
getreg32(NVIC_IRQ168_171_PRIORITY),
getreg32(NVIC_IRQ172_175_PRIORITY));
#endif
#if IMX9_IRQ_NEXTINT > 176
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ176_179_PRIORITY),
getreg32(NVIC_IRQ180_183_PRIORITY),
getreg32(NVIC_IRQ184_187_PRIORITY),
getreg32(NVIC_IRQ188_191_PRIORITY));
#endif
#if IMX9_IRQ_NEXTINT > 192
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ192_195_PRIORITY),
getreg32(NVIC_IRQ196_199_PRIORITY),
getreg32(NVIC_IRQ200_203_PRIORITY),
getreg32(NVIC_IRQ204_207_PRIORITY));
#endif
#if IMX9_IRQ_NEXTINT > 208
irqinfo(" %08x %08x %08x\n",
getreg32(NVIC_IRQ208_211_PRIORITY),
getreg32(NVIC_IRQ212_215_PRIORITY),
getreg32(NVIC_IRQ216_219_PRIORITY));
#endif
#if IMX9_IRQ_NEXTINT > 218
# warning Missing logic
#endif
len = 0;
for (i = 0; i < IMX9_IRQ_NEXTINT; i += 4)
{
if (i % 16 == 0)
{
len = 0;
len += snprintf(buf + len, sizeof(buf) - len, "%s",
i == 0 ? " IRQ PRIO: " : " ");
}
len += snprintf(buf + len, sizeof(buf) - len, "%08lx",
getreg32(NVIC_IRQ_PRIORITY(i)));
if ((i + 4) >= IMX9_IRQ_NEXTINT || (i + 4) % 16 == 0)
{
irqinfo("%s\n", buf);
}
else
{
len += snprintf(buf + len, sizeof(buf) - len, " ");
}
}
leave_critical_section(flags);
}
@ -295,14 +235,14 @@ static int imx9_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
{
if (extint < 32)
{
*regaddr = (NVIC_IRQ0_31_ENABLE + offset);
*regaddr = (NVIC_IRQ_ENABLE(0) + offset);
*bit = 1 << extint;
}
else
#if IMX9_IRQ_NEXTINT > 32
if (extint < 64)
{
*regaddr = (NVIC_IRQ32_63_ENABLE + offset);
*regaddr = (NVIC_IRQ_ENABLE(32) + offset);
*bit = 1 << (extint - 32);
}
else
@ -310,7 +250,7 @@ static int imx9_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
#if IMX9_IRQ_NEXTINT > 64
if (extint < 96)
{
*regaddr = (NVIC_IRQ64_95_ENABLE + offset);
*regaddr = (NVIC_IRQ_ENABLE(64) + offset);
*bit = 1 << (extint - 64);
}
else
@ -318,7 +258,7 @@ static int imx9_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
#if IMX9_IRQ_NEXTINT > 96
if (extint < 128)
{
*regaddr = (NVIC_IRQ96_127_ENABLE + offset);
*regaddr = (NVIC_IRQ_ENABLE(96) + offset);
*bit = 1 << (extint - 96);
}
else
@ -326,7 +266,7 @@ static int imx9_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
#if IMX9_IRQ_NEXTINT > 128
if (extint < 160)
{
*regaddr = (NVIC_IRQ128_159_ENABLE + offset);
*regaddr = (NVIC_IRQ_ENABLE(128) + offset);
*bit = 1 << (extint - 128);
}
else
@ -334,15 +274,15 @@ static int imx9_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
#if IMX9_IRQ_NEXTINT > 160
if (extint < 192)
{
*regaddr = (NVIC_IRQ160_191_ENABLE + offset);
*regaddr = (NVIC_IRQ_ENABLE(160) + offset);
*bit = 1 << (extint - 160);
}
else
#endif
#if IMX9_IRQ_NEXTINT > 192
if (extint < 219)
if (extint < 224)
{
*regaddr = (NVIC_IRQ192_223_ENABLE + offset);
*regaddr = (NVIC_IRQ_ENABLE(192) + offset);
*bit = 1 << (extint - 192);
}
else