The I- and D-Caches were disabled, so all code ran from flash through
the prefetch buffer and all data accesses went to SRAM. Enable both
caches in nsh and netnsh, and link the data memory in KSEG0 instead of
KSEG1 so that it goes through the D-Cache (KSEG0 is uncached when the
caches are disabled). CONFIG_BOARD_LOOPSPERMSEC is recalibrated with
calib_udelay for the cached configuration.
CoreMark (XC32 v6.00, -O2) goes from 82.5 to 544.6 iterations/s. The
average ping round trip time drops from 0.74 to 0.56 ms for 64-byte
packets and from 1.92 to 0.93 ms for 1400-byte packets.
Tested on the EV49N51A with XC32: 5000 pings of 1472 bytes at 2 ms
intervals with payload checking, ifdown/ifup cycles, telnet sessions
and CoreMark. With Pinguino GCC: 2000 pings of 1472 bytes and 1000
small pings at 3 ms intervals.
Assisted-by: Claude Code:claude-opus-5-5
Signed-off-by: Daniel P. Carvalho <danieloak@gmail.com>
Add CONFIG_EV49N51A_PHY_INTERRUPT, which provides arch_phy_irq() with
the LAN8720A nINT output on RK6 as a falling-edge change notification
interrupt. nINT reaches RK6 only through R309, which is not fitted on
the EV49N51A, so the option defaults to off.
With CONFIG_NETINIT_MONITOR the interface now goes down when the cable
is removed and comes back up when it is reconnected.
Assisted-by: Claude Code:claude-opus-5-5
Signed-off-by: Daniel P. Carvalho <danieloak@gmail.com>
- Reset the LAN8720A PHY (nRST on RA14) at boot, after the RMII
reference clock is running.
- Define BOARD_EMAC_MIIM_DIV for a 2.5 MHz MDC.
- Add the netnsh configuration: Ethernet, IPv4, TCP, UDP, ICMP, ping and
telnetd, with the default static address of the network initialization
and a locally administered MAC address (PIC32MZ-W1 has no factory MAC
address).
- Document the Ethernet interface, the RMII reference clock options and
the netnsh configuration.
Assisted-by: Claude Code:claude-opus-5-5
Signed-off-by: Daniel P. Carvalho <danieloak@gmail.com>
Add the Microchip EV49N51A Ethernet to Wi-Fi Bridge board, built around
the WFI32E01PE module (PIC32MZ-W1) with a LAN8720A Ethernet PHY.
The nsh configuration runs SYSCLK at 200 MHz with the console on UART1
(dedicated pins RA8/RA9, header J203, 115200 8N1) and drives the red and
green user LEDs on RK1/RK3. It selects PGC2/PGD2 as the debug channel.
The SST26VF032B serial flash on SPI1 (dedicated pins, CS on RA1) is
exported as /dev/mtdblock0. Its SPI frequency is set to 20 MHz: the SST26
driver's 64 MHz default is above PBCLK3/2 (25 MHz), which pic32mz_spi.c
does not handle.
mips-debug.ld is used with every toolchain. It has no OUTPUT_FORMAT,
because XC32 and Pinguino name their little-endian ELF targets
differently; the board passes -EL to the linker instead. With XC32 the
board builds with -mno-dsp -mno-dspr2: NuttX does not enable or save the
DSP ASE state.
Assisted-by: Claude Code:claude-opus-5-5
Signed-off-by: Daniel P. Carvalho <danieloak@gmail.com>
The documentation grew one page at a time, so the tree follows the
history of who wrote what and not the shape of NuttX. Scheduling is
spread over three places, a driver page can sit above the subsystem
that owns it, and the front page lists everything at the same level.
That is a lot to face when all you want to know is where the scheduler
lives.
This change files every page under the code it describes. It is a move,
not a rewrite: outside the ten pages named below, every page keeps the
text that is already in master, and no page's text is deleted.
What it does:
* Groups the table of contents into nine chapters.
* Moves the OS subsystems under os/: scheduling, memory, drivers,
filesystem, networking, IPC, interrupts, libs, time.
* Renames the platform pages to the names the source tree uses, and
derives their tags from the tree instead of by hand.
* Splits guides/ by subject.
* Adds Documentation/redirects.py, with a rule for every page that left
its old path, so old URLs keep working. The redirect page also carries
a link's #anchor across to the new page.
Ten pages have text that is new or rewritten. Nine of them are the
landing page of a chapter, which has to exist for the new structure:
index the front page
os/index OS Design
os/scheduling/index Scheduling
os/interrupts/index Interrupts
os/ipc/index IPC
os/time/index Time and timers
about/index About
developing/index Developing NuttX
ReleaseNotes/index Release notes
The tenth is os/libs/libbuiltin, the only page here with technical
content: libs/libbuiltin/ had no page at all. Five SVG diagrams come
with these pages, hand-written XML with no editor metadata.
Nothing outside Documentation/ is touched.
How it was checked:
* Sphinx builds with -W: no warnings, and no document left outside a
toctree.
* A script, offered in the PR, proves the narrow claim this rests on.
For every page outside the ten named above it erases what a move
touches -- link target, path, tag line, toctree block, table border --
from the whole old text and the whole new text, and requires the two
to be byte for byte identical. It also requires every sentence of a
deleted page to turn up somewhere, and every page that left its old
path to have a redirect, from a URL that existed, to where its content
went. It exits non-zero and names the page if any of that is not true,
and it tests added pages too, so forgetting to declare one cannot make
it pass.
* An independent audit checked 133 factual claims on these ten pages
against the tree, one shell command per claim: 130 confirmed, 1
refuted and fixed here, 2 not checkable.
* tools/checkpatch.sh is clean over the range.
The diff is large because moving a page changes every link that points
to it. Most of it is pure renames, and board pages that gained one tag
line.
Assisted-by: Claude:claude-opus-5
This commit introduces EDID reading and parsing to the JZ4780 display
driver, replacing hardcoded resolution limits with dynamic mode selection
based on the connected display's capabilities.
Specific changes include:
- Implemented I2C DDC master communication for the HDMI controller to
read EDID blocks from monitors.
- Added dynamic mode selection to calculate bandwidth and pick the best
supported resolution, prioritizing the EDID preferred mode.
- Dynamically allocated framebuffer bounds (g_planeinfo and g_videoinfo)
based on parsed EDID dimensions.
- Configured GPIO pin multiplexing for HDMI power, DDC, and control pins
(POWER_EN, CEC, SCL, SDA) to enable display power and communication
on the CI20 board.
Signed-off-by: Lwazi Dube <lwazeh@gmail.com>
Update the MIPS Creator CI20 board documentation to include a detailed
peripherals support table. This replaces the basic bulleted list with
comprehensive status details for CPU cores, RAM, Display, Ethernet,
GPIO, TRNG, Timers, UART0, USB Host, and Watchdog.
Signed-off-by: Lwazi Dube <lwazeh@gmail.com>
Remove the manual mkimage step because CONFIG_UBOOT_UIMAGE=y already
generates a valid uImage. This brings the documentation up to date
with the uImage usage that was already standard in practice.
Add EHCI and OHCI USB host drivers for the Ingenic JZ4780 SoC, derived
from the existing sama5 implementation.
Additionally, introduce the display controller driver using code ported
from FreeBSD under its original license terms. Note that this driver
lacks EDID support and is currently hardcoded to 1360x768.
Update the linker script memory layout to utilize the full 256 MiB RAM,
excluding the 8 MiB reserved at the top of memory for the framebuffer.
Signed-off-by: Lwazi Dube <lwazeh@gmail.com>
Introduce networking capabilities to the Creator CI20 board by leveraging
the pre-existing dm9000 ethernet driver.
To achieve this, the following changes were made:
- Integrated the jz4780 GPIO module to properly configure and enable the
interrupt pin required by the ethernet controller.
- Added `dm90x0.h` to export the dm9000 initialization function, allowing
the board-specific setup code to initialize the network interface.
Signed-off-by: Lwazi Dube <lwazeh@gmail.com>
This commit introduces a rudimentary architecture and board port for the
MIPS Creator CI20, featuring the dual core Ingenic JZ4780 SoC (MIPS32).
Included in this initial implementation:
- Basic architectural initialization and startup code for the JZ4780 Core 0.
- Minimal configuration required to execute from RAM.
- Early UART/serial console support for basic debugging and NSH output.
- Minimal board-specific configuration for the CI20 target.
- Console output is routed via UART0 on the expansion header.
This establishes basic support for running NuttX on the MIPS CI20.
Further peripherals, optimization, and extended documentation are left for
future iterations or community contributions.
Build and Runtime Deployment Info:
----------------------------------
The baseline can be configured, compiled using the MIPS MTI toolchain,
and loaded via U-Boot using the following commands (replace
<tftp_dir> with your local TFTP root directory).
./tools/configure.sh -l ci20/nsh
make CROSSDEV=mips-mti-elf-
mkimage -A mips -O linux -T kernel -C none -a 0x80000180 -e 0x800004ac \
-n "nx" -d nuttx.bin <tftp_dir>/nuttx.umg
Note: U-Boot must be properly configured for networking (e.g., valid ipaddr,
serverip, and ethaddr environment variables) to fetch the image over TFTP.
Run this from U-Boot prompt:
tftp nuttx.umg && bootm $fileaddr
Signed-off-by: Lwazi Dube <lwazeh@gmail.com>
BREAKING: In an effort to simplify NuttX initialization, NSH_ARCHINIT is
removed. board_app_initialize is also removed. BOARD_LATE_INITIALIZE now
performs all board initialization logic, and is by default enabled. All
references to these symbols are removed. BOARDIOC_INIT remains, but will
result in -ENOTTY when called. It is to be removed in a later commit.
Quick fix: Boards relying on NSH_ARCHINIT should now enable
CONFIG_BOARD_LATE_INITIALIZE instead. If the application needs
fine-grained control over board initialization from userspace, the logic
performed by BOARDIOC_INIT may be copied to the board_finalinitialize
function and used instead via BOARDIOC_FINALINIT. All
board_app_initialize logic provided by NuttX is now moved to
board_late_initialize, and the same should be done for out-of-tree
boards.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
- migrated /README are removed from /boards
- there are a lot of READMEs that should be further converted to rst.
At the moment they are moved to Documentation/platforms and included in rst files
