arch/mips/jz4780: Add USB host and display controller drivers

Add EHCI and OHCI USB host drivers for the Ingenic JZ4780 SoC, derived
from the existing sama5 implementation.

Additionally, introduce the display controller driver using code ported
from FreeBSD under its original license terms. Note that this driver
lacks EDID support and is currently hardcoded to 1360x768.

Update the linker script memory layout to utilize the full 256 MiB RAM,
excluding the 8 MiB reserved at the top of memory for the framebuffer.

Signed-off-by: Lwazi Dube <lwazeh@gmail.com>
This commit is contained in:
Lwazi Dube 2026-07-21 22:13:12 -04:00 committed by Xiang Xiao
parent c6722e9c53
commit 2099ceda33
20 changed files with 12201 additions and 15 deletions

View file

@ -66,3 +66,10 @@ net
The telnet daemon is included, so the CI20 board can be connected to through telnet.
jumbo
-----
* Basic serial console access to the NSH shell.
* Networking support through the RJ45 connector.
* USB host support: mass storage, hub, keyboard and mouse.
* Builtin Apps: dd, hidkbd, ping, tc, fb, nsh, sh, telnetd

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@ -67,27 +67,57 @@
#define OSTCSR (JZTMR_BASE + 0xec)
#define TESR (JZTMR_BASE + 0x14)
#define TESR_OSTEN (1 << 15)
#define TESR_TCEN(n) (1 << (n))
# define TESR_OSTEN (1 << 15)
# define TESR_TCEN(n) (1 << (n))
#define TMSR (JZTMR_BASE + 0x34)
#define TMCR (JZTMR_BASE + 0x38)
#define TMCR_OSTMCL (1 << 15)
#define TMCR_FMCL5 (1 << 5)
#define TMCR_FMCL(n) (1 << (n))
# define TMCR_OSTMCL (1 << 15)
# define TMCR_FMCL5 (1 << 5)
# define TMCR_FMCL(n) (1 << (n))
#define TFR (JZTMR_BASE + 0x20)
#define TFCR (JZTMR_BASE + 0x28)
#define TFCR_OSTFCL (1 << 15)
#define TFCR_FFCL5 (1 << 5)
#define TFCR_FFCL(n) (1 << (n))
# define TFCR_OSTFCL (1 << 15)
# define TFCR_FFCL5 (1 << 5)
# define TFCR_FFCL(n) (1 << (n))
#define TCNT(n) (JZTMR_BASE + 0x48 + (n)*0x10)
#define TCSR(n) (JZTMR_BASE + 0x4C + (n)*0x10)
#define TDFR(n) (JZTMR_BASE + 0x40 + (n)*0x10)
#define CLKGR0_REG 0xb0000020
# define CLKGR0_OTG0 (1 << 2)
# define CLKGR0_UHC (1 << 24)
# define CLKGR0_LCD (1 << 28)
# define CLKGR0_TVE (1 << 27)
#define OPCR_REG 0xb0000024
# define OPCR_SPENDN1 (1 << 6)
#define CLKGR1_REG 0xb0000028
# define CLKGR1_HDMI (1 << 9)
#define USBPCR_REG 0xb000003c
# define USBPCR_POR (1 << 22)
#define USBPCR1_REG 0xb0000048
# define REFCLK_DIV_MSK 0xfcffffff /* clears bits 25:24 */
# define REFCLK_DIV_48MHZ 0x02000000 /* bits 25:24 */
# define WORD_IF_16BIT 0x000c0000 /* bits 19:18 */
#define LP1CDR_REG 0xb0000054
# define LPCDR_VAL 0x15
# define LPCS_VPLL 0X80000000
# define CE_LCD (1 << 28)
# define LCD_BUSY (1 << 27)
#define HDMICDR_REG 0xb000008c
#define SRBC_REG 0xb00000c4
# define SRBC_UHC_SR (1 << 14)
#define TICKS_PER_MS (48000/16)
#define CHIP_JZ4780 1

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@ -4,4 +4,102 @@
#
if ARCH_CHIP_JZ4780
comment "JZ4780 Configuration Options"
menu "JZ4780 Peripheral Support"
config JZ4780_LCD
bool "LCD controller"
default n
config JZ4780_OHCI
bool "Full/low speed OHCI support"
default n
select SCHED_HPWORK
select USBHOST
select USBHOST_HAVE_ASYNCH
select USBHOST_ASYNCH
select USBHOST_WAITER
---help---
Build support for the JZ4780 USB full speed Open Host Controller
Interface (OHCI).
if JZ4780_OHCI
config JZ4780_OHCI_NEDS
int "Number of endpoint descriptors"
default 6
config JZ4780_OHCI_NTDS
int "Number of transfer descriptors"
default 9
config JZ4780_OHCI_TDBUFFERS
int "Number of transfer descriptor buffers"
default 6
config JZ4780_OHCI_TDBUFSIZE
int "Size of one transfer descriptor buffer"
default 128
---help---
The size of one transfer descriptor (TD) buffer in bytes. The TD
buffer size must be an even number of 32-bit words
config JZ4780_OHCI_REGDEBUG
bool "Enable low-level OHCI register debug"
default n
depends on DEBUG_USB_INFO
endif # JZ4780_OHCI
config JZ4780_EHCI
bool "High speed EHCI support"
default n
select USBHOST
select USBHOST_HAVE_ASYNCH
select USBHOST_WAITER
---help---
Build support for the JZ4780 USB high speed Enhanced Host Controller
Interface (EHCI). If low/full speed is needed too, then you must
also enable the OHCI controller.
if JZ4780_EHCI
config JZ4780_EHCI_NQHS
int "Number of Queue Head (QH) structures"
default 8
---help---
Configurable number of Queue Head (QH) structures. The default is
one per Root hub port plus one for EP0 (4).
config JZ4780_EHCI_NQTDS
int "Number of Queue Element Transfer Descriptor (qTDs)"
default 10
---help---
Configurable number of Queue Element Transfer Descriptor (qTDs).
The default is one per root hub plus three from EP0 (6).
config JZ4780_EHCI_BUFSIZE
int "Size of one request/descriptor buffer"
default 1024
---help---
The size of one request/descriptor buffer in bytes. The TD buffe
size must be an even number of 32-bit words and must be large enough
to hangle the largest transfer via a SETUP request.
config JZ4780_EHCI_PREALLOCATE
bool "Preallocate descriptor pool"
default y
---help---
Select this option to pre-allocate EHCI queue and descriptor
structure pools in .bss. Otherwise, these pools will be
dynamically allocated using kmm_memalign().
config JZ4780_EHCI_REGDEBUG
bool "Enable low-level EHCI register debug"
default n
depends on DEBUG_USB_INFO
endif # JZ4780_EHCI
endmenu # JZ4780 Peripheral Support
endif

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@ -51,3 +51,21 @@ endif
CHIP_CSRCS = jz4780_lowinit.c jz4780_exception.c jz4780_decodeirq.c
CHIP_CSRCS += jz4780_irq.c jz4780_timerisr.c jz4780_gpio.c
CHIP_CSRCS += jz4780_cache.c
ifeq ($(CONFIG_USBHOST),y)
CHIP_CSRCS += jz_usbhost.c
ifeq ($(CONFIG_JZ4780_OHCI),y)
CHIP_CSRCS += jz4780_ohci.c
endif
ifeq ($(CONFIG_JZ4780_EHCI),y)
CHIP_CSRCS += jz4780_ehci.c
endif
endif
ifeq ($(CONFIG_ALLOW_BSD_COMPONENTS),y)
ifeq ($(CONFIG_JZ4780_LCD),y)
CHIP_CSRCS += jz4780_lcd.c
endif
endif

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@ -0,0 +1,80 @@
/****************************************************************************
* arch/mips/src/jz4780/jz4780_ehci.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_MIPS_SRC_JZ4780_JZ_EHCI_H
#define __ARCH_MIPS_SRC_JZ4780_JZ_EHCI_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/usb/ohci.h>
#include "chip.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define JZ_UHPEHCI_VSECTION 0xb3490000
/* The JZ4780 supports 3 root hub ports */
#define JZ_EHCI_NRHPORT 3
/* Registers ****************************************************************/
/* Traditionally, NuttX specifies register locations using individual
* register offsets from a base address. That tradition is broken here and,
* instead, register blocks are represented as structures. This is done here
* because, in principle, EHCI operational register address may not be known
* at compile time; the operational registers lie at an offset specified in
* the 'caplength' byte of the Host Controller Capability Registers.
*
* However, for the case of the JZ4780 EHCI, we know apriori that the value
* of 'caplength' is 0x10. We keep this structure, however, to facilitate
* porting this driver to other environments where, perhaps, such knowledge
* is not available.
*/
/* Host Controller Capability Registers */
#define HCCR ((struct ehci_hccr_s *)JZ_UHPEHCI_VSECTION)
/* Host Controller Operational Registers */
#define HCOR ((volatile struct ehci_hcor_s *)(JZ_UHPEHCI_VSECTION + 0x10))
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_MIPS_SRC_JZ4780_JZ_EHCI_H */

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@ -37,6 +37,7 @@
#include "mips_internal.h"
#include "jz4780_lowinit.h"
#include "jz4780_gpio.h"
#include "jz4780_cache.h"
/****************************************************************************
@ -63,6 +64,36 @@
* Private Functions
****************************************************************************/
static void usb_preinit(void)
{
uint32_t reg;
jz4780_configgpio(POWER_LED);
jz4780_gpiowrite(POWER_LED, true);
reg = getreg32(USBPCR1_REG);
reg &= REFCLK_DIV_MSK;
reg |= REFCLK_DIV_48MHZ;
reg |= WORD_IF_16BIT;
putreg32(reg, USBPCR1_REG);
putreg32(OPCR_SPENDN1 | getreg32(OPCR_REG), OPCR_REG);
/* PHY power on reset. */
reg = getreg32(USBPCR_REG);
putreg32(reg | USBPCR_POR, USBPCR_REG);
up_mdelay(1);
putreg32(reg & ~USBPCR_POR, USBPCR_REG);
/* UHC soft reset */
reg = getreg32(SRBC_REG);
putreg32(reg | SRBC_UHC_SR, SRBC_REG);
up_mdelay(30);
putreg32(reg & ~SRBC_UHC_SR, SRBC_REG);
}
/****************************************************************************
* Name: jz4780_pbclk
*
@ -109,6 +140,11 @@ void jz4780_lowinit(void)
#ifdef USE_EARLYSERIALINIT
u16550_earlyserialinit();
#endif
uint32_t val = getreg32(CLKGR0_REG);
val &= ~CLKGR0_UHC;
val &= ~CLKGR0_OTG0;
putreg32(val, CLKGR0_REG);
usb_preinit();
/* Perform board-level initialization */

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@ -0,0 +1,102 @@
/****************************************************************************
* arch/mips/src/jz4780/jz4780_ohci.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_MIPS_SRC_JZ4780_JZ4780_OHCI_H
#define __ARCH_MIPS_SRC_JZ4780_JZ4780_OHCI_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/usb/ohci.h>
#include "chip.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define JZ_UHPOHCI_VSECTION 0xb34a0000 /* JZ4780 OHCI */
/* The JZ4780 supports 1 root hub port */
#define JZ_OHCI_NRHPORT 1
/* Register offsets *********************************************************/
/* See nuttx/usb/ohci.h */
/* Register addresses *******************************************************/
#define JZ_USBHOST_HCIREV (JZ_UHPOHCI_VSECTION + OHCI_HCIREV_OFFSET)
#define JZ_USBHOST_CTRL (JZ_UHPOHCI_VSECTION + OHCI_CTRL_OFFSET)
#define JZ_USBHOST_CMDST (JZ_UHPOHCI_VSECTION + OHCI_CMDST_OFFSET)
#define JZ_USBHOST_INTST (JZ_UHPOHCI_VSECTION + OHCI_INTST_OFFSET)
#define JZ_USBHOST_INTEN (JZ_UHPOHCI_VSECTION + OHCI_INTEN_OFFSET)
#define JZ_USBHOST_INTDIS (JZ_UHPOHCI_VSECTION + OHCI_INTDIS_OFFSET)
/* Memory pointers (section 7.2) */
#define JZ_USBHOST_HCCA (JZ_UHPOHCI_VSECTION + OHCI_HCCA_OFFSET)
#define JZ_USBHOST_PERED (JZ_UHPOHCI_VSECTION + OHCI_PERED_OFFSET)
#define JZ_USBHOST_CTRLHEADED (JZ_UHPOHCI_VSECTION + OHCI_CTRLHEADED_OFFSET)
#define JZ_USBHOST_CTRLED (JZ_UHPOHCI_VSECTION + OHCI_CTRLED_OFFSET)
#define JZ_USBHOST_BULKHEADED (JZ_UHPOHCI_VSECTION + OHCI_BULKHEADED_OFFSET)
#define JZ_USBHOST_BULKED (JZ_UHPOHCI_VSECTION + OHCI_BULKED_OFFSET)
#define JZ_USBHOST_DONEHEAD (JZ_UHPOHCI_VSECTION + OHCI_DONEHEAD_OFFSET)
/* Frame counters (section 7.3) */
#define JZ_USBHOST_FMINT (JZ_UHPOHCI_VSECTION + OHCI_FMINT_OFFSET)
#define JZ_USBHOST_FMREM (JZ_UHPOHCI_VSECTION + OHCI_FMREM_OFFSET)
#define JZ_USBHOST_FMNO (JZ_UHPOHCI_VSECTION + OHCI_FMNO_OFFSET)
#define JZ_USBHOST_PERSTART (JZ_UHPOHCI_VSECTION + OHCI_PERSTART_OFFSET)
/* Root hub ports (section 7.4) */
#define JZ_USBHOST_LSTHRES (JZ_UHPOHCI_VSECTION + OHCI_LSTHRES_OFFSET)
#define JZ_USBHOST_RHDESCA (JZ_UHPOHCI_VSECTION + OHCI_RHDESCA_OFFSET)
#define JZ_USBHOST_RHDESCB (JZ_UHPOHCI_VSECTION + OHCI_RHDESCB_OFFSET)
#define JZ_USBHOST_RHSTATUS (JZ_UHPOHCI_VSECTION + OHCI_RHSTATUS_OFFSET)
#define JZ_USBHOST_RHPORTST(n) (JZ_UHPOHCI_VSECTION + OHCI_RHPORTST_OFFSET(n))
#define JZ_USBHOST_RHPORTST1 (JZ_UHPOHCI_VSECTION + OHCI_RHPORTST1_OFFSET)
#define JZ_USBHOST_RHPORTST2 (JZ_UHPOHCI_VSECTION + OHCI_RHPORTST2_OFFSET)
#define JZ_USBHOST_RHPORTST3 (JZ_UHPOHCI_VSECTION + OHCI_RHPORTST3_OFFSET)
/* Register bit definitions *************************************************/
/* See include/nuttx/usb/ohci.h */
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_MIPS_SRC_JZ4780_JZ4780_OHCI_H */

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@ -36,7 +36,6 @@
#include "clock/clock.h"
#include "mips_internal.h"
#include "mips_internal.h"
#include "jz4780_lowinit.h"
/****************************************************************************

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@ -0,0 +1,425 @@
/****************************************************************************
* arch/mips/src/jz4780/jz_usbhost.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <stddef.h>
#include <assert.h>
#include <nuttx/usb/usbhost_trace.h>
#include "jz_usbhost.h"
#ifdef HAVE_USBHOST_TRACE
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define TR_OHCI false
#define TR_EHCI true
#define TR_FMT1 false
#define TR_FMT2 true
#define TRENTRY(id,ehci,fmt1,string) {string}
/****************************************************************************
* Private Types
****************************************************************************/
struct sam_usbhost_trace_s
{
#if 0
uint16_t id;
bool ehci;
bool fmt2;
#endif
const char *string;
};
/****************************************************************************
* Private Data
****************************************************************************/
static const struct sam_usbhost_trace_s g_trace1[TRACE1_NSTRINGS] =
{
#ifdef CONFIG_JZ4780_OHCI
TRENTRY(OHCI_TRACE1_DEVDISCONN,
TR_OHCI, TR_FMT1,
"OHCI ERROR: RHport%d Device disconnected\n"),
TRENTRY(OHCI_TRACE1_INTRUNRECOVERABLE,
TR_OHCI, TR_FMT1,
"OHCI ERROR: Unrecoverable error. pending: %06x\n"),
TRENTRY(OHCI_TRACE1_INTRUNHANDLED,
TR_OHCI, TR_FMT1,
"OHCI ERROR: Unhandled interrupts pending: %06x\n"),
TRENTRY(OHCI_TRACE1_EPLISTALLOC_FAILED,
TR_OHCI, TR_FMT1,
"OHCI ERROR: Failed to allocate EP list\n"),
TRENTRY(OHCI_TRACE1_EDALLOC_FAILED,
TR_OHCI, TR_FMT1,
"OHCI ERROR: Failed to allocate ED\n"),
TRENTRY(OHCI_TRACE1_TDALLOC_FAILED,
TR_OHCI, TR_FMT1,
"OHCI ERROR: Failed to allocate TD\n"),
TRENTRY(OHCI_TRACE1_IRQATTACH,
TR_OHCI, TR_FMT1,
"OHCI ERROR: Failed to attach IRQ%d\n"),
#ifdef CONFIG_USBHOST_ASYNCH
TRENTRY(OHCI_TRACE1_BADTDSTATUS,
TR_OHCI, TR_FMT1,
"OHCI ERROR: Bad asynch TD completion status: %d\n"),
#endif
#ifdef HAVE_USBHOST_TRACE_VERBOSE
TRENTRY(OHCI_VTRACE1_PHYSED,
TR_OHCI, TR_FMT1,
"OHCI physed: %06x\n"),
TRENTRY(OHCI_VTRACE1_VIRTED,
TR_OHCI, TR_FMT1,
"OHCI ed: %06x\n"),
TRENTRY(OHCI_VTRACE1_CSC,
TR_OHCI, TR_FMT1,
"OHCI Connect Status Change, RHSTATUS: %06x\n"),
TRENTRY(OHCI_VTRACE1_DRWE,
TR_OHCI, TR_FMT1,
"OHCI DRWE: Remote wake-up, RHSTATUS: %06x\n"),
TRENTRY(OHCI_VTRACE1_ALREADYCONN,
TR_OHCI, TR_FMT1,
"OHCI Already connected, RHPORTST: %06x\n"),
TRENTRY(OHCI_VTRACE1_SPEED,
TR_OHCI, TR_FMT1,
"OHCI Port speed: %d\n"),
TRENTRY(OHCI_VTRACE1_ALREADYDISCONN,
TR_OHCI, TR_FMT1,
"OHCI Already disconnected, RHPORTST: %06x\n"),
TRENTRY(OHCI_VTRACE1_RHSC,
TR_OHCI, TR_FMT1,
"OHCI Root Hub Status Change. Pending: %06x\n"),
TRENTRY(OHCI_VTRACE1_WDHINTR,
TR_OHCI, TR_FMT1,
"OHCI Writeback Done Head interrupt. Pending: %06x\n"),
TRENTRY(OHCI_VTRACE1_CLASSENUM,
TR_OHCI, TR_FMT1,
"OHCI Hub port %d: Enumerate device\n"),
TRENTRY(OHCI_VTRACE1_ENUMDISCONN,
TR_OHCI, TR_FMT1,
"OHCI RHport%dNot connected\n"),
TRENTRY(OHCI_VTRACE1_INITIALIZING,
TR_OHCI, TR_FMT1,
"OHCI Initializing Stack\n"),
TRENTRY(OHCI_VTRACE1_INITIALIZED,
TR_OHCI, TR_FMT1,
"OHCI Initialized\n"),
TRENTRY(OHCI_VTRACE1_INTRPENDING,
TR_OHCI, TR_FMT1,
"OHCI Interrupts pending: %06x\n"),
#endif
#endif
#ifdef CONFIG_JZ4780_EHCI
TRENTRY(EHCI_TRACE1_SYSTEMERROR,
TR_EHCI, TR_FMT1,
"EHCI ERROR: System error: %06x\n"),
TRENTRY(EHCI_TRACE1_QTDFOREACH_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: sam_qtd_foreach failed: %d\n"),
TRENTRY(EHCI_TRACE1_QHALLOC_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: Failed to allocate a QH\n"),
TRENTRY(EHCI_TRACE1_BUFTOOBIG,
TR_EHCI, TR_FMT1,
"EHCI ERROR: Buffer too big. Remaining %d\n"),
TRENTRY(EHCI_TRACE1_REQQTDALLOC_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: Failed to allocate request qTD"),
TRENTRY(EHCI_TRACE1_ADDBPL_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: sam_qtd_addbpl failed: %d\n"),
TRENTRY(EHCI_TRACE1_DATAQTDALLOC_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: Failed to allocate data buffer qTD, 0"),
TRENTRY(EHCI_TRACE1_DEVDISCONNECTED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: Device disconnected %d\n"),
TRENTRY(EHCI_TRACE1_QHCREATE_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: sam_qh_create failed\n"),
TRENTRY(EHCI_TRACE1_QTDSETUP_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: sam_qtd_setupphase failed\n"),
TRENTRY(EHCI_TRACE1_QTDDATA_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: sam_qtd_dataphase failed\n"),
TRENTRY(EHCI_TRACE1_QTDSTATUS_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: sam_qtd_statusphase failed\n"),
TRENTRY(EHCI_TRACE1_TRANSFER_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: Transfer failed %d\n"),
TRENTRY(EHCI_TRACE1_QHFOREACH_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: sam_qh_foreach failed: %d\n"),
TRENTRY(EHCI_TRACE1_SYSERR_INTR,
TR_EHCI, TR_FMT1,
"EHCI: Host System Error Interrupt\n"),
TRENTRY(EHCI_TRACE1_USBERR_INTR,
TR_EHCI, TR_FMT1,
"EHCI: USB Error Interrupt (USBERRINT) Interrupt: %06x\n"),
TRENTRY(EHCI_TRACE1_EPALLOC_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: Failed to allocate EP info structure\n"),
TRENTRY(EHCI_TRACE1_BADXFRTYPE,
TR_EHCI, TR_FMT1,
"EHCI ERROR: Support for transfer type %d not implemented\n"),
TRENTRY(EHCI_TRACE1_HCHALTED_TIMEOUT,
TR_EHCI, TR_FMT1,
"EHCI ERROR: Timed out waiting for HCHalted. USBSTS: %06x\n"),
TRENTRY(EHCI_TRACE1_QHPOOLALLOC_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: Failed to allocate the QH pool\n"),
TRENTRY(EHCI_TRACE1_QTDPOOLALLOC_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: Failed to allocate the qTD pool\n"),
TRENTRY(EHCI_TRACE1_PERFLALLOC_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: Failed to allocate the periodic frame list\n"),
TRENTRY(EHCI_TRACE1_RESET_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: sam_reset failed: %d\n"),
TRENTRY(EHCI_TRACE1_RUN_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: EHCI Failed to run: USBSTS=%06x\n"),
TRENTRY(EHCI_TRACE1_IRQATTACH_FAILED,
TR_EHCI, TR_FMT1,
"EHCI ERROR: Failed to attach IRQ%d\n"),
#ifdef HAVE_USBHOST_TRACE_VERBOSE
TRENTRY(EHCI_VTRACE1_PORTSC_CSC,
TR_EHCI, TR_FMT1,
"EHCI Connect Status Change: %06x\n"),
TRENTRY(EHCI_VTRACE1_PORTSC_CONNALREADY,
TR_EHCI, TR_FMT1,
"EHCI Already connected: %06x\n"),
TRENTRY(EHCI_VTRACE1_PORTSC_DISCALREADY,
TR_EHCI, TR_FMT1,
"EHCI Already disconnected: %06x\n"),
TRENTRY(EHCI_VTRACE1_TOPHALF,
TR_EHCI, TR_FMT1,
"EHCI Interrupt: %06x\n"),
TRENTRY(EHCI_VTRACE1_AAINTR,
TR_EHCI, TR_FMT1,
"EHCI Async Advance Interrupt\n"),
TRENTRY(EHCI_VTRACE1_USBINTR,
TR_EHCI, TR_FMT1,
"EHCI USB Interrupt (USBINT) Interrupt: %06x\n"),
TRENTRY(EHCI_VTRACE1_CLASSENUM,
TR_EHCI, TR_FMT1,
"EHCI Hub port %d: Enumerate device\n"),
TRENTRY(EHCI_VTRACE1_ENUM_DISCONN,
TR_EHCI, TR_FMT1,
"EHCI Enumeration not connected\n"),
TRENTRY(EHCI_VTRACE1_INITIALIZING,
TR_EHCI, TR_FMT1,
"EHCI Initializing EHCI Stack\n"),
TRENTRY(EHCI_VTRACE1_HCCPARAMS,
TR_EHCI, TR_FMT1,
"EHCI HCCPARAMS=%06x\n"),
TRENTRY(EHCI_VTRACE1_INIITIALIZED,
TR_EHCI, TR_FMT1,
"EHCI USB EHCI Initialized\n"),
#endif
#endif
};
static const struct sam_usbhost_trace_s g_trace2[TRACE2_NSTRINGS] =
{
#ifdef CONFIG_JZ4780_OHCI
TRENTRY(OHCI_TRACE2_BADTDSTATUS,
TR_OHCI, TR_FMT2,
"OHCI ERROR: RHport%d Bad TD completion status: %d\n"),
TRENTRY(OHCI_TRACE2_WHDTDSTATUS,
TR_OHCI, TR_FMT2,
"OHCI ERROR: WHD Bad TD completion status: %d xfrtype: %d\n"),
TRENTRY(OHCI_TRACE2_EP0ENQUEUE_FAILED,
TR_OHCI, TR_FMT2,
"OHCI ERROR: RHport%d Failed to enqueue EP0: %d\n"),
TRENTRY(OHCI_TRACE2_EDENQUEUE_FAILED,
TR_OHCI, TR_FMT2,
"OHCI ERROR: Failed to queue ED for transfer type %d: %d\n"),
TRENTRY(OHCI_TRACE2_CLASSENUM_FAILED,
TR_OHCI, TR_FMT2,
"OHCI Hub port %d usbhost_enumerate() failed: %d\n"),
#ifdef HAVE_USBHOST_TRACE_VERBOSE
TRENTRY(OHCI_VTRACE2_EP0CONFIG,
TR_OHCI, TR_FMT2,
"OHCI EP0 configure speed=%d funcaddr=%d\n"),
TRENTRY(OHCI_VTRACE2_INTERVAL,
TR_OHCI, TR_FMT2,
"OHCI interval: %d->%d\n"),
TRENTRY(OHCI_VTRACE2_MININTERVAL,
TR_OHCI, TR_FMT2,
"OHCI MIN interval: %d offset: %d\n"),
TRENTRY(OHCI_VTRACE2_RHPORTST,
TR_OHCI, TR_FMT2,
"OHCI RHPORTST%d: %04x\n"),
TRENTRY(OHCI_VTRACE2_CONNECTED,
TR_OHCI, TR_FMT2,
"OHCI RHPort%d connected, rhswait: %d\n"),
TRENTRY(OHCI_VTRACE2_DISCONNECTED,
TR_OHCI, TR_FMT2,
"OHCI RHPort%d disconnected, rhswait: %d\n"),
TRENTRY(OHCI_VTRACE2_WAKEUP,
TR_OHCI, TR_FMT2,
"OHCI RHPort%d connected: %d\n"),
TRENTRY(OHCI_VTRACE2_EP0CTRLED,
TR_OHCI, TR_FMT2,
"OHCI RHPort%d EP0 CTRL: %04x\n"),
TRENTRY(OHCI_VTRACE2_EPALLOC,
TR_OHCI, TR_FMT2,
"OHCI EP%d CTRL: %04x\n"),
TRENTRY(OHCI_VTRACE2_CTRLIN,
TR_OHCI, TR_FMT2,
"OHCI CTRLIN RHPort%d req: %02x\n"),
TRENTRY(OHCI_VTRACE2_CTRLOUT,
TR_OHCI, TR_FMT2,
"OHCI CTRLOUT RHPort%d req: %02x\n"),
TRENTRY(OHCI_VTRACE2_TRANSFER,
TR_OHCI, TR_FMT2,
"OHCI EP%d buflen: %d\n"),
TRENTRY(OHCI_VTRACE2_INITCONNECTED,
TR_OHCI, TR_FMT2,
"OHCI RHPort%d Device connected: %d\n"),
#ifdef CONFIG_USBHOST_HUB
TRENTRY(OHCI_VTRACE2_HUBWAKEUP,
TR_OHCI, TR_FMT2,
"OHCI Hub Port%d connected: %d\n"),
#endif
#endif
#endif
#ifdef CONFIG_JZ4780_EHCI
TRENTRY(EHCI_TRACE2_EPSTALLED,
TR_EHCI, TR_FMT2,
"EHCI EP%d Stalled: TOKEN=%04x\n"),
TRENTRY(EHCI_TRACE2_EPIOERROR,
TR_EHCI, TR_FMT2,
"EHCI ERROR: EP%d TOKEN=%04x\n"),
TRENTRY(EHCI_TRACE2_CLASSENUM_FAILED,
TR_EHCI, TR_FMT2,
"EHCI Hub port %d usbhost_enumerate() failed: %d\n"),
#ifdef HAVE_USBHOST_TRACE_VERBOSE
TRENTRY(EHCI_VTRACE2_EP0CONFIG,
TR_EHCI, TR_FMT2,
"EHCI EP0 configure speed=%d funcaddr=%d\n"),
TRENTRY(EHCI_VTRACE2_ASYNCXFR,
TR_EHCI, TR_FMT2,
"EHCI Async transfer EP%d buflen=%d\n"),
TRENTRY(EHCI_VTRACE2_INTRXFR,
TR_EHCI, TR_FMT2,
"EHCI Intr Transfer EP%d buflen=%d\n"),
TRENTRY(EHCI_VTRACE2_IOCCHECK,
TR_EHCI, TR_FMT2,
"EHCI IOC EP%d TOKEN=%04x\n"),
TRENTRY(EHCI_VTRACE2_PORTSC,
TR_EHCI, TR_FMT2,
"EHCI PORTSC%d: %04x\n"),
TRENTRY(EHCI_VTRACE2_PORTSC_CONNECTED,
TR_EHCI, TR_FMT2,
"EHCI RHPort%d connected, pscwait: %d\n"),
TRENTRY(EHCI_VTRACE2_PORTSC_DISCONND,
TR_EHCI, TR_FMT2,
"EHCI RHport%d disconnected, pscwait: %d\n"),
TRENTRY(EHCI_VTRACE2_MONWAKEUP,
TR_EHCI, TR_FMT2,
"EHCI Hub port%d connected: %d\n"),
TRENTRY(EHCI_VTRACE2_EPALLOC,
TR_EHCI, TR_FMT2,
"EHCI EPALLOC: EP%d TYPE=%d\n"),
TRENTRY(EHCI_VTRACE2_CTRLINOUT,
TR_EHCI, TR_FMT2,
"EHCI CTRLIN/OUT: RHPort%d req: %02x\n"),
TRENTRY(EHCI_VTRACE2_HCIVERSION,
TR_EHCI, TR_FMT2,
"EHCI HCIVERSION %x.%02x\n"),
TRENTRY(EHCI_VTRACE2_HCSPARAMS,
TR_EHCI, TR_FMT2,
"EHCI nports=%d, HCSPARAMS=%04x\n"),
#endif
#endif
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: usbhost_trformat1 and usbhost_trformat2
*
* Description:
* This interface must be provided by platform specific logic that knows
* the HCDs encoding of USB trace data.
*
* Given an 9-bit index, return a format string suitable for use with, say,
* printf. The returned format is expected to handle two unsigned integer
* values.
*
****************************************************************************/
const char *usbhost_trformat1(uint16_t id)
{
int ndx = TRACE1_INDEX(id);
if (ndx < TRACE1_NSTRINGS)
{
return g_trace1[ndx].string;
}
return NULL;
}
const char *usbhost_trformat2(uint16_t id)
{
int ndx = TRACE2_INDEX(id);
if (ndx < TRACE2_NSTRINGS)
{
return g_trace2[ndx].string;
}
return NULL;
}
#endif /* HAVE_USBHOST_TRACE */

View file

@ -0,0 +1,280 @@
/****************************************************************************
* arch/mips/src/jz4780/jz_usbhost.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_MIPS_SRC_JZ4780_JZ_USBHOST_H
#define __ARCH_MIPS_SRC_JZ4780_JZ_USBHOST_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/usb/usbhost_trace.h>
#ifdef CONFIG_USBHOST
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* This is the interface argument for call outs to board-specific functions
* which need to know which USB host interface is being used.
*/
#define JZ_EHCI_IFACE 0
#define JZ_OHCI_IFACE 1
/****************************************************************************
* Public Types
****************************************************************************/
#ifdef HAVE_USBHOST_TRACE
enum usbhost_trace1codes_e
{
__TRACE1_BASEVALUE = 0, /* This will force the first value to be 1 */
#ifdef CONFIG_JZ4780_OHCI
OHCI_TRACE1_DEVDISCONN, /* OHCI ERROR: RHport Device disconnected */
OHCI_TRACE1_INTRUNRECOVERABLE, /* OHCI ERROR: Unrecoverable error */
OHCI_TRACE1_INTRUNHANDLED, /* OHCI ERROR: Unhandled interrupts */
OHCI_TRACE1_EPLISTALLOC_FAILED, /* OHCI ERROR: Failed to allocate EP list */
OHCI_TRACE1_EDALLOC_FAILED, /* OHCI ERROR: Failed to allocate ED */
OHCI_TRACE1_TDALLOC_FAILED, /* OHCI ERROR: Failed to allocate TD */
OHCI_TRACE1_IRQATTACH, /* OHCI ERROR: Failed to attach IRQ */
#ifdef CONFIG_USBHOST_ASYNCH
OHCI_TRACE1_BADTDSTATUS, /* OHCI ERROR: Bad asynch TD completion status */
#endif
#ifdef HAVE_USBHOST_TRACE_VERBOSE
OHCI_VTRACE1_PHYSED, /* OHCI physed */
OHCI_VTRACE1_VIRTED, /* OHCI ed */
OHCI_VTRACE1_CSC, /* OHCI Connect Status Change */
OHCI_VTRACE1_DRWE, /* OHCI DRWE: Remote wake-up */
OHCI_VTRACE1_ALREADYCONN, /* OHCI Already connected */
OHCI_VTRACE1_SPEED, /* OHCI Low speed */
OHCI_VTRACE1_ALREADYDISCONN, /* OHCI Already disconnected */
OHCI_VTRACE1_RHSC, /* OHCI Root Hub Status Change */
OHCI_VTRACE1_WDHINTR, /* OHCI Writeback Done Head interrupt */
OHCI_VTRACE1_CLASSENUM, /* OHCI Enumerate the device */
OHCI_VTRACE1_ENUMDISCONN, /* OHCI RHport Not connected */
OHCI_VTRACE1_INITIALIZING, /* OHCI Initializing Stack */
OHCI_VTRACE1_INITIALIZED, /* OHCI Initialized */
OHCI_VTRACE1_INTRPENDING, /* OHCI Interrupts pending */
#endif
#endif
#ifdef CONFIG_JZ4780_EHCI
EHCI_TRACE1_SYSTEMERROR, /* EHCI ERROR: System error */
EHCI_TRACE1_QTDFOREACH_FAILED, /* EHCI ERROR: jz_qtd_foreach failed */
EHCI_TRACE1_QHALLOC_FAILED, /* EHCI ERROR: Failed to allocate a QH */
EHCI_TRACE1_BUFTOOBIG, /* EHCI ERROR: Buffer too big */
EHCI_TRACE1_REQQTDALLOC_FAILED, /* EHCI ERROR: Failed to allocate request qTD */
EHCI_TRACE1_ADDBPL_FAILED, /* EHCI ERROR: jz_qtd_addbpl failed */
EHCI_TRACE1_DATAQTDALLOC_FAILED, /* EHCI ERROR: Failed to allocate data buffer qTD */
EHCI_TRACE1_DEVDISCONNECTED, /* EHCI ERROR: Device disconnected */
EHCI_TRACE1_QHCREATE_FAILED, /* EHCI ERROR: jz_qh_create failed */
EHCI_TRACE1_QTDSETUP_FAILED, /* EHCI ERROR: jz_qtd_setupphase failed */
EHCI_TRACE1_QTDDATA_FAILED, /* EHCI ERROR: jz_qtd_dataphase failed */
EHCI_TRACE1_QTDSTATUS_FAILED, /* EHCI ERROR: jz_qtd_statusphase failed */
EHCI_TRACE1_TRANSFER_FAILED, /* EHCI ERROR: Transfer failed */
EHCI_TRACE1_QHFOREACH_FAILED, /* EHCI ERROR: jz_qh_foreach failed: */
EHCI_TRACE1_SYSERR_INTR, /* EHCI: Host System Error Interrupt */
EHCI_TRACE1_USBERR_INTR, /* EHCI: USB Error Interrupt (USBERRINT) Interrupt */
EHCI_TRACE1_EPALLOC_FAILED, /* EHCI ERROR: Failed to allocate EP info structure */
EHCI_TRACE1_BADXFRTYPE, /* EHCI ERROR: Support for transfer type not implemented */
EHCI_TRACE1_HCHALTED_TIMEOUT, /* EHCI ERROR: Timed out waiting for HCHalted */
EHCI_TRACE1_QHPOOLALLOC_FAILED, /* EHCI ERROR: Failed to allocate the QH pool */
EHCI_TRACE1_QTDPOOLALLOC_FAILED, /* EHCI ERROR: Failed to allocate the qTD pool */
EHCI_TRACE1_PERFLALLOC_FAILED, /* EHCI ERROR: Failed to allocate the periodic frame list */
EHCI_TRACE1_RESET_FAILED, /* EHCI ERROR: jz_reset failed */
EHCI_TRACE1_RUN_FAILED, /* EHCI ERROR: EHCI Failed to run */
EHCI_TRACE1_IRQATTACH_FAILED, /* EHCI ERROR: Failed to attach IRQ */
#ifdef HAVE_USBHOST_TRACE_VERBOSE
EHCI_VTRACE1_PORTSC_CSC, /* EHCI Connect Status Change */
EHCI_VTRACE1_PORTSC_CONNALREADY, /* EHCI Already connected */
EHCI_VTRACE1_PORTSC_DISCALREADY, /* EHCI Already disconnected */
EHCI_VTRACE1_TOPHALF, /* EHCI Interrupt top half */
EHCI_VTRACE1_AAINTR, /* EHCI Async Advance Interrupt */
EHCI_VTRACE1_USBINTR, /* EHCI USB Interrupt (USBINT) Interrupt */
EHCI_VTRACE1_CLASSENUM, /* EHCI Enumerate the device */
EHCI_VTRACE1_ENUM_DISCONN, /* EHCI Enumeration not connected */
EHCI_VTRACE1_INITIALIZING, /* EHCI Initializing EHCI Stack */
EHCI_VTRACE1_HCCPARAMS, /* EHCI HCCPARAMS */
EHCI_VTRACE1_INIITIALIZED, /* EHCI USB EHCI Initialized */
#endif
#endif
__TRACE1_NSTRINGS, /* Separates the format 1 from the format 2 strings */
#ifdef CONFIG_JZ4780_OHCI
OHCI_TRACE2_BADTDSTATUS, /* OHCI ERROR: RHport Bad TD completion status */
OHCI_TRACE2_WHDTDSTATUS, /* OHCI ERROR: WDH Bad TD completion status */
OHCI_TRACE2_EP0ENQUEUE_FAILED, /* OHCI ERROR: RHport Failed to enqueue EP0 */
OHCI_TRACE2_EDENQUEUE_FAILED, /* OHCI ERROR: Failed to queue ED for transfer type */
OHCI_TRACE2_CLASSENUM_FAILED, /* OHCI usbhost_enumerate() failed */
#ifdef HAVE_USBHOST_TRACE_VERBOSE
OHCI_VTRACE2_EP0CONFIG, /* OHCI EP0 configuration */
OHCI_VTRACE2_INTERVAL, /* OHCI interval */
OHCI_VTRACE2_MININTERVAL, /* OHCI MIN interval/offset */
OHCI_VTRACE2_RHPORTST, /* OHCI RHPORTST */
OHCI_VTRACE2_CONNECTED, /* OHCI RHPort connected */
OHCI_VTRACE2_DISCONNECTED, /* OHCI RHPort disconnected */
OHCI_VTRACE2_WAKEUP, /* OHCI RHPort connected wakeup */
OHCI_VTRACE2_EP0CTRLED, /* OHCI RHPort EP0 CTRL */
OHCI_VTRACE2_EPALLOC, /* OHCI EP CTRL */
OHCI_VTRACE2_CTRLIN, /* OHCI CTRLIN */
OHCI_VTRACE2_CTRLOUT, /* OHCI CTRLOUT */
OHCI_VTRACE2_TRANSFER, /* OHCI EP buflen */
OHCI_VTRACE2_INITCONNECTED, /* OHCI RHPort Device connected */
#ifdef CONFIG_USBHOST_HUB
OHCI_VTRACE2_HUBWAKEUP, /* EHCI Hub Port connected wakeup */
#endif
#endif
#endif
#ifdef CONFIG_JZ4780_EHCI
EHCI_TRACE2_EPSTALLED, /* EHCI EP Stalled */
EHCI_TRACE2_EPIOERROR, /* EHCI ERROR: EP TOKEN */
EHCI_TRACE2_CLASSENUM_FAILED, /* EHCI usbhost_enumerate() failed */
#ifdef HAVE_USBHOST_TRACE_VERBOSE
EHCI_VTRACE2_EP0CONFIG, /* EHCI EP0 configuration */
EHCI_VTRACE2_ASYNCXFR, /* EHCI Async transfer */
EHCI_VTRACE2_INTRXFR, /* EHCI Interrupt Transfer */
EHCI_VTRACE2_IOCCHECK, /* EHCI IOC */
EHCI_VTRACE2_PORTSC, /* EHCI PORTSC */
EHCI_VTRACE2_PORTSC_CONNECTED, /* EHCI RHPort connected */
EHCI_VTRACE2_PORTSC_DISCONND, /* EHCI RHport disconnected */
EHCI_VTRACE2_MONWAKEUP, /* EHCI RHPort connected wakeup */
EHCI_VTRACE2_EPALLOC, /* EHCI EPALLOC */
EHCI_VTRACE2_CTRLINOUT, /* EHCI CTRLIN/OUT */
EHCI_VTRACE2_HCIVERSION, /* EHCI HCIVERSION */
EHCI_VTRACE2_HCSPARAMS, /* EHCI HCSPARAMS */
#endif
#endif
__TRACE2_NSTRINGS /* Total number of enumeration values */
};
# define TRACE1_FIRST ((int)__TRACE1_BASEVALUE + 1)
# define TRACE1_INDEX(id) ((int)(id) - TRACE1_FIRST)
# define TRACE1_NSTRINGS TRACE1_INDEX(__TRACE1_NSTRINGS)
# define TRACE2_FIRST ((int)__TRACE1_NSTRINGS + 1)
# define TRACE2_INDEX(id) ((int)(id) - TRACE2_FIRST)
# define TRACE2_NSTRINGS TRACE2_INDEX(__TRACE2_NSTRINGS)
#endif
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
/****************************************************************************
* Name: jz_ohci_initialize
*
* Description:
* Initialize USB OHCI host controller hardware.
*
* Input Parameters:
* controller -- If the device supports more than one USB OHCI interface,
* then this identifies which controller is being initializeed.
* Normally, this is just zero.
*
* Returned Value:
* And instance of the USB host interface. The controlling task should
* use this interface to (1) call the wait() method to wait for a device
* to be connected, and (2) call the enumerate() method to bind the device
* to a class driver.
*
* Assumptions:
* - This function should called in the initialization sequence in order
* to initialize the USB device functionality.
* - Class drivers should be initialized prior to calling this function.
* Otherwise, there is a race condition if the device is already connected.
*
****************************************************************************/
#ifdef CONFIG_JZ4780_OHCI
struct usbhost_connection_s;
struct usbhost_connection_s *jz_ohci_initialize(int controller);
#endif
/****************************************************************************
* Name: jz_ehci_initialize
*
* Description:
* Initialize USB EHCI host controller hardware.
*
* Input Parameters:
* controller -- If the device supports more than one EHCI interface, then
* this identifies which controller is being initializeed. Normally,
* this is just zero.
*
* Returned Value:
* And instance of the USB host interface. The controlling task should
* use this interface to (1) call the wait() method to wait for a device
* to be connected, and (2) call the enumerate() method to bind the device
* to a class driver.
*
* Assumptions:
* - This function should called in the initialization sequence in order
* to initialize the USB device functionality.
* - Class drivers should be initialized prior to calling this function.
* Otherwise, there is a race condition if the device is already connected.
*
****************************************************************************/
#ifdef CONFIG_JZ4780_EHCI
struct usbhost_connection_s;
struct usbhost_connection_s *jz_ehci_initialize(int controller);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_USBHOST */
#endif /* __ARCH_MIPS_SRC_JZ4780_JZ_USBHOST_H */

View file

@ -0,0 +1,95 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
CONFIG_16550_ADDRWIDTH=32
CONFIG_16550_REGWIDTH=32
CONFIG_16550_SUPRESS_CONFIG=y
CONFIG_16550_UART0=y
CONFIG_16550_UART0_BASE=0xB0030000
CONFIG_16550_UART0_CLOCK=14745600
CONFIG_16550_UART0_IRQ=51
CONFIG_16550_UART0_SERIAL_CONSOLE=y
CONFIG_16550_UART=y
CONFIG_ALLOW_BSD_COMPONENTS=y
CONFIG_ARCH="mips"
CONFIG_ARCH_BOARD="ci20"
CONFIG_ARCH_BOARD_CI20=y
CONFIG_ARCH_CHIP="jz4780"
CONFIG_ARCH_CHIP_JZ4780=y
CONFIG_ARCH_MIPS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=72450
CONFIG_BUILTIN=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_FS_ERROR=y
CONFIG_DEBUG_FS_WARN=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DM9X_BASE=0xB6000000
CONFIG_DM9X_BUSWIDTH8=y
CONFIG_DM9X_IRQ=13
CONFIG_DRIVERS_VIDEO=y
CONFIG_EXAMPLES_FB=y
CONFIG_EXAMPLES_HIDKBD=y
CONFIG_EXAMPLES_TOUCHSCREEN=y
CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_GRAN=y
CONFIG_HIDKBD_NOGETREPORT=y
CONFIG_HIDMOUSE_XMAX=1359
CONFIG_HIDMOUSE_YMAX=767
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_JZ4780_EHCI=y
CONFIG_JZ4780_LCD=y
CONFIG_JZ4780_OHCI=y
CONFIG_LIBC_EXECFUNCS=y
CONFIG_MQ_MAXMSGSIZE=64
CONFIG_NET=y
CONFIG_NETDEV_IFINDEX=y
CONFIG_NETDEV_PHY_IOCTL=y
CONFIG_NETINIT_DRIPADDR=0xc0a80250
CONFIG_NETINIT_IPADDR=0xc0a80203
CONFIG_NETUTILS_TELNETD=y
CONFIG_NET_DM90x0=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_TCP=y
CONFIG_NET_UDP=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=33554432
CONFIG_RAM_START=0x80000000
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_TABCOMPLETION=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_LPWORKPRIORITY=50
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=7
CONFIG_START_MONTH=7
CONFIG_START_YEAR=2026
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_PING=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_UBOOT_UIMAGE=y
CONFIG_UIMAGE_ENTRY_POINT=0x800004AC
CONFIG_UIMAGE_LOAD_ADDRESS=0x80000180
CONFIG_USBHOST_HIDKBD=y
CONFIG_USBHOST_HIDMOUSE=y
CONFIG_USBHOST_HUB=y
CONFIG_USBHOST_HUB_POLLMSEC=100
CONFIG_USBHOST_MSC=y
CONFIG_USBHOST_NPREALLOC=8
CONFIG_VIDEO_FB=y
CONFIG_WQUEUE_NOTIFIER=y

View file

@ -38,6 +38,7 @@
****************************************************************************/
#define BOARD_ETH_FLG (1 << 19)
#define POWER_LED (GPIO_MODE_OUTPUT0 | GPIO_PORTF | GPIO_PIN15)
/****************************************************************************
* Public Types
@ -61,6 +62,8 @@ extern "C"
* Public Function Prototypes
****************************************************************************/
int jz_usbhost_initialize(void);
#undef EXTERN
#ifdef __cplusplus
}

View file

@ -24,7 +24,7 @@
MEMORY
{
kseg0_progmem (rx) : ORIGIN = 0x80020000, LENGTH = 32M
kseg0_progmem (rx) : ORIGIN = 0x80020000, LENGTH = 0x0F7E0000
kseg0_genexcpt (rx) : ORIGIN = 0x80000180, LENGTH = 128
kseg0_ebexcpt0 (rx) : ORIGIN = 0x80000200, LENGTH = 32

View file

@ -24,7 +24,7 @@
MEMORY
{
kseg0_progmem (rx) : ORIGIN = 0x80020000, LENGTH = 32M
kseg0_progmem (rx) : ORIGIN = 0x80020000, LENGTH = 0x0F7E0000
kseg0_genexcpt (rx) : ORIGIN = 0x80000180, LENGTH = 128
kseg0_ebexcpt0 (rx) : ORIGIN = 0x80000200, LENGTH = 32

View file

@ -25,4 +25,8 @@
ASRCS =
CSRCS = jz4780_boot.c jz4780_bringup.c ci20_network.c
ifeq ($(CONFIG_USBHOST),y)
CSRCS += jz4780_usb.c
endif
include $(TOPDIR)/boards/Board.mk

View file

@ -28,15 +28,18 @@
#include <stdio.h>
#include <unistd.h>
#include <syslog.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/debug.h>
#include <nuttx/signal.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#ifdef CONFIG_VIDEO_FB
# include <nuttx/video/fb.h>
#endif
#include "ci20.h"
/****************************************************************************
@ -73,10 +76,30 @@ int jz4780_bringup(void)
ret = nx_mount(NULL, "/proc", "procfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n",
_err("ERROR: Failed to mount procfs at /proc: %d\n",
ret);
}
#endif
#if defined(CONFIG_USBHOST)
ret = jz_usbhost_initialize();
if (ret != OK)
{
_err("ERROR: Failed to start USB host services: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_VIDEO_FB
/* Initialize and register the framebuffer driver */
ret = fb_register(0, 0);
if (ret < 0)
{
_err("ERROR: fb_register() failed: %d\n", ret);
}
#endif
return ret;
}

View file

@ -0,0 +1,202 @@
/****************************************************************************
* boards/mips/jz4780/ci20/src/jz4780_usb.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <sched.h>
#include <errno.h>
#include <assert.h>
#include <nuttx/debug.h>
#include <nuttx/irq.h>
#include <nuttx/kthread.h>
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbhost.h>
#include <nuttx/usb/usbdev_trace.h>
#include "mips_internal.h"
#include "chip.h"
#include "jz_usbhost.h"
#include <arch/board/board.h>
#if defined(CONFIG_USBHOST)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: jz_usbhost_bootinitialize
*
* Description:
* Called from jz_boardinitialize very early in initialization to setup
* USB host-related hardware for the board.
*
*
****************************************************************************/
void weak_function jz_usbhost_bootinitialize(void)
{
}
/****************************************************************************
* Name: jz_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host
* functionality.
* This function will start a thread that will monitor for device
* connection/disconnection events.
*
****************************************************************************/
int jz_usbhost_initialize(void)
{
int ret;
#ifdef CONFIG_JZ4780_OHCI
struct usbhost_connection_s *ohciconn;
#endif
#ifdef CONFIG_JZ4780_EHCI
struct usbhost_connection_s *ehciconn;
#endif
/* First, register all of the class drivers needed to support the drivers
* that we care about
*/
#ifdef CONFIG_USBHOST_HUB
/* Initialize USB hub support */
ret = usbhost_hub_initialize();
if (ret < 0)
{
uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_MSC
/* Register theUSB host Mass Storage Class */
ret = usbhost_msc_initialize();
if (ret != OK)
{
uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_CDCACM
/* Register the CDC/ACM serial class */
ret = usbhost_cdcacm_initialize();
if (ret != OK)
{
uerr("ERROR: Failed to register the CDC/ACM serial class\n");
}
#endif
#ifdef CONFIG_USBHOST_HIDKBD
/* Register the USB host HID keyboard class driver */
ret = usbhost_kbdinit();
if (ret != OK)
{
uerr("ERROR: Failed to register the KBD class\n");
}
#endif
#ifdef CONFIG_USBHOST_HIDMOUSE
/* Initialize the HID mouse class */
ret = usbhost_mouse_init();
if (ret != OK)
{
uerr("ERROR: Failed to register the HID mouse class\n");
}
#endif
#ifdef CONFIG_JZ4780_OHCI
/* Get an instance of the USB OHCI interface. */
ohciconn = jz_ohci_initialize(0);
if (!ohciconn)
{
uerr("ERROR: jz_ohci_initialize failed\n");
return ENODEV;
}
/* Initialize waiter */
ret = usbhost_waiter_initialize(ohciconn);
if (ret < 0)
{
uerr("ERROR: Failed to create ohci_waiter task: %d\n", ret);
return -ENODEV;
}
#endif
#ifdef CONFIG_JZ4780_EHCI
/* Then get an instance of the USB EHCI interface. */
ehciconn = jz_ehci_initialize(0);
if (!ehciconn)
{
uerr("ERROR: jz_ehci_initialize failed\n");
return ENODEV;
}
/* Initialize waiter */
ret = usbhost_waiter_initialize(ehciconn);
if (ret < 0)
{
uerr("ERROR: Failed to create ehci_waiter task: %d\n", ret);
return -ENODEV;
}
#endif
return OK;
}
#endif /* CONFIG_USBHOST */