Add documentation for the gprof command, which controls NuttX
function-call profiling. Covers the start, stop, dump, and help
subcommands, configuration dependencies on CONFIG_PROFILE and
CONFIG_SYSTEM_GPROF, and a worked example showing how to collect
and analyse a gmon.out file.
Refs #11081
Signed-off-by: hanzj <hanzhijian@zepp.com>
mcp48xx_initialize() and mcp47x6_initialize() share the same two bugs
in their allocation error paths:
1. Dead code: when the first kmm_malloc() fails and priv is NULL, the
code calls free(priv) which is a no-op on NULL. Remove it.
2. Memory leak: when the second kmm_malloc() fails (dacdev), the
function returns NULL without freeing the already-allocated priv.
Add kmm_free(priv) before the return.
Signed-off-by: hanzj <hanzhijian@zepp.com>
Initially Xiang contributed NXInit as Init, but then the community
suggested to rename it to NXInit to avoid conflict with other init
systems.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
The STM32 serial drivers already treat 0 as not present for optional
GPIO fields (CTS, RTS), guarding each call site with a != 0 check.
TX and RX GPIO fields lacked this guard, so boards that
define GPIO_UARTx_TX or GPIO_UARTx_RX as 0 (pin not routed) caused
stm32_configgpio(0) to be called, which silently configures PA0 as a
floating input, corrupting any other peripheral using that pin.
Having an optional TX/RX UART is useful for several cases:
* RX-only connections: e.g. radio control input on flight-controllers where no TX is wired.
* Single-wire (half-duplex) connections: e.g. ESC telemetry connections.
* Output-only NSH which prints output but does not allow entering inputs.
Without a sentinel value for these cases one must assign the unused GPIO to
a NC pin, which is misleading when reading board configuration files.
Add != 0 guards for tx_gpio and rx_gpio across all STM32 serial driver
families.
Using 0 as the sentinel is safe for TX/RX because any valid UART config requires
GPIO_ALT bits set in the config word, so 0 can never represent a real
TX or RX pin configuration.
Signed-off-by: alexcekay <alexander@auterion.com>
Fill the blank hex2bin documentation page with an overview,
configuration options, usage synopsis, option descriptions,
examples, and notes. All claims are sourced from the
hex2bin_main.c implementation and the Kconfig in
apps/system/hex2bin/.
Refs #11081
Signed-off-by: Zepp-Hanzj <han6569084@gmail.com>
Fill the blank documentation page for the lm75 (LM75 Temperature)
system command. The command reads temperature data from an LM75
I2C sensor and supports sample count and unit configuration.
Refs #11081
Signed-off-by: hanzhijian <hanzhijian@zepp.com>
sim_x11events() polls g_display from the idle loop while the
framebuffer teardown path closes the X connection. Clear the global
Display handle before teardown so the event path stops using it, but
keep the saved local Display pointer for XShmDetach(), XUngrabButton(),
and XCloseDisplay().
This only changes the sim X11 framebuffer shutdown ordering and does
not change user-visible APIs or build configuration.
Signed-off-by: hanzhijian <hanzhijian@zepp.com>
Add documentation for the dd command, which copies data from
an input file or device to an output file or device.
Refs #11081
Signed-off-by: hanzj <your-email@example.com>
Add documentation for the stackmonitor command, which starts a
background daemon to monitor stack usage for all tasks and threads.
Refs #11081
Signed-off-by: hanzj <your-email@example.com>
The RWDT register offsets were incorrectly set to ESP32-S3 values
instead of ESP32 values. This was introduced when the code was
refactored from using the local NuttX header hardware/esp32_rtccntl.h
(which had the correct offsets) to using the HAL library headers, and
the offsets were moved inline into esp32_wdt.c with wrong values.
Correct the offsets to match the actual ESP32 register layout from
soc/rtc_cntl_reg.h (RTC_CNTL_WDTCONFIG0_REG at 0x8c, INT_ENA at
0x3c, etc). Without this fix, all RWDT operations (enable, configure
timeout, enable interrupt, acknowledge interrupt, feed, write-protect)
were targeting wrong memory addresses, rendering the RWDT completely
non-functional.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Under the BOARD_LATE_INITIALIZE boot flow, rtc_clk_xtal_freq_get()
may return 0 (SOC_XTAL_FREQ_AUTO) because the XTAL frequency has
not yet been stored to the RTC register when the WDT driver is
initialized. This causes rtc_clk_cal() to divide by zero
internally (EXCCAUSE=0006) when computing the RTC slow clock
period.
Fix by explicitly calling rtc_clk_xtal_freq_update() with the
board's configured crystal frequency if rtc_clk_xtal_freq_get()
returns 0. Also add a guard in esp32_wdt_settimeout() to return
-EIO if ESP32_RWDT_CLK() still returns 0 cycles/ms, preventing
a subsequent divide-by-zero when computing the maximum timeout.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Same issue as ESP32-S3/S2: with BOARD_LATE_INITIALIZE, the
constructor function enable_timer_group0_for_calibration() resets
Timer Group 0 registers after board_late_initialize() has
configured the MWDT0 prescaler, causing the watchdog to fire at an
incorrect rate.
Re-apply the prescaler, timeout, and feed the WDT counter in
esp32_wdt_start() just before enabling the timer.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Same issue as ESP32-S3: with BOARD_LATE_INITIALIZE, the constructor
function enable_timer_group0_for_calibration() resets Timer Group 0
registers after board_late_initialize() has configured the MWDT0
prescaler, causing the watchdog to fire at an incorrect rate.
Re-apply the prescaler, timeout, and feed the WDT counter in
wdt_lh_start() just before enabling the timer.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
With the BOARD_LATE_INITIALIZE flow, board_late_initialize() runs
on a kernel thread and sets the MWDT0 prescaler. However, after it
returns, the init task (NSH) is spawned and lib_cxx_initialize()
invokes constructor functions, including
enable_timer_group0_for_calibration() from esp-hal-3rdparty which
calls timg_ll_reset_register(0), resetting all Timer Group 0
registers (including the WDT prescaler) back to their defaults.
Re-apply the prescaler, timeout, and feed the WDT counter in
wdt_lh_start() just before enabling the timer. This ensures
correct WDT configuration regardless of any intermediate register
resets by external code.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
When CONFIG_MM_UMM_CUSTOMIZE_MANAGER is enabled, the sim heap
bypasses mm_heap/tlsf entirely and calls host malloc/free directly,
so MM_FILL_ALLOCATIONS has no effect. Add fill pattern support
directly in sim_ummheap.c:
- malloc: fill user region with 0xaa
- free: fill user region with 0x55
- realloc: fill extended region with 0xaa
This helps detect uninitialized reads in sim environment,
which ASan does not support.
Signed-off-by: yushuailong <yyyusl@qq.com>
Fill the taskset application reference page with source-backed usage,
configuration, forms, examples, and notes. The documented command forms and
mask constraints come from apps/system/taskset/taskset.c and the enabling
configuration comes from apps/system/taskset/Kconfig.
Signed-off-by: hanzj <han.zhijiang@zte.com.cn>
Add the missing application reference for the tee system command. The
page now documents the command purpose, build configuration, usage,
options, arguments, examples, and error behavior using the implementation
in apps/system/tee as source evidence.
Signed-off-by: hanzhijian <hanzhijian@zepp.com>
BREAKING CHANGE: Remove BOARDIOC_INIT macro now that the interface is
removed in favour of CONFIG_BOARD_LATE_INITIALIZE.
Quick fix: instead of calling BOARDIOC_INIT from your application,
instead enable late initialization to have it performed automatically
prior to application entry.
If you need custom initialization logic, use the board_final_initialize
function and `BOARDIOC_FINALINIT` command instead.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
remove PULSECOUNT references from PWM drivers that not implemet PWM feature.
PULSECOUNT for these architectures was not implemented, so we just remove all references to it.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: separate pulse count from PWM driver
Pulse count handling was removed from PWM driver and moved to a separate driver.
For details about this change, look at previous commit.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: separate pulse count from PWM driver
Pulse count handling was removed from PWM driver and moved to a separate driver.
For details about this change, look at previous commit.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: separate pulse count from PWM driver
Pulse count handling was removed from PWM driver and moved to a separate driver.
For details about this change, look at previous commit.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: separate pulse count from PWM driver
Pulse count handling was removed from PWM driver and moved to a separate driver.
For details about this change, look at previous commit.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: separate pulse count from PWM driver
Pulse count handling was removed from PWM driver and moved to a separate driver.
For details about this change, look at previous commit.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: separate pulse count from PWM driver
Pulse count handling was removed from PWM driver and moved to a separate driver.
For details about this change, look at previous commit.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: separate pulse count from PWM driver
Pulse count handling was removed from PWM driver and moved to a separate driver.
For details about this change, look at previous commit.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: separate pulse count from PWM driver
Pulse count handling was removed from PWM driver and moved to a separate driver.
For details about this change, look at previous commit.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: separate pulse count from PWM driver
Pulse count handling was removed from PWM driver and moved to a separate driver.
For details about this change, look at previous commit.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: separate pulse count feature from PWM driver.
Coupling PWM driver with pulse count feature was bad decision from the beginning,
these are two different things:
- PWM is a modulation scheme: it continuously represents a value by varying duty
cycle, usually at a fixed frequency.
- Pulse train generation is a finite waveform transaction: generate N edges/pulses
with selected timing, then complete.
This change introduce a new pulse count driver with new API.
Now user can generate pulse train by providing:
- high pulse length in ns
- low pulse length in ns
- pulse count
All architectures supporting pulse count have been adapted in subsequent commits.
Users must migrate their code to use the new driver with new API.
Signed-off-by: raiden00pl <raiden00@railab.me>
Fix an issue where `SIM_TOOLCHAIN_GCC` was incorrectly set when
configuring `sim:nsh` using CMake on macOS.
Ensure that `nuttx_sethost()` is called before `nuttx_olddefconfig()`.
Signed-off-by: Shoji Tokunaga <toku@mac.com>
