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!arch/tivia: separate pulse count from PWM driver
BREAKING CHANGE: separate pulse count from PWM driver Pulse count handling was removed from PWM driver and moved to a separate driver. For details about this change, look at previous commit. Signed-off-by: raiden00pl <raiden00@railab.me>
This commit is contained in:
raiden00pl
Alin Jerpelea
parent
adf0a2fc25
commit
ab8262eb62
6 changed files with 930 additions and 264 deletions
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@ -593,6 +593,18 @@ config TIVA_TIMER
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bool
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default n
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config TIVA_PWM
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bool
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default n
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config TIVA_PULSECOUNT
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bool "PWM pulse count"
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default n
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select ARCH_HAVE_PULSECOUNT
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select PULSECOUNT
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---help---
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Enables the Tiva PWM peripheral pulse count lower-half driver.
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# Peripheral Selections
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config TIVA_ADC0
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@ -606,6 +618,42 @@ config TIVA_ADC1
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depends on TIVA_HAVE_ADC0
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select TIVA_ADC
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if TIVA_PULSECOUNT
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config TIVA_PULSECOUNT0_CHAN0
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bool "Pulse count 0 channel 0"
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default n
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config TIVA_PULSECOUNT0_CHAN1
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bool "Pulse count 0 channel 1"
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default n
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config TIVA_PULSECOUNT0_CHAN2
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bool "Pulse count 0 channel 2"
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default n
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config TIVA_PULSECOUNT0_CHAN3
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bool "Pulse count 0 channel 3"
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default n
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config TIVA_PULSECOUNT0_CHAN4
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bool "Pulse count 0 channel 4"
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default n
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config TIVA_PULSECOUNT0_CHAN5
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bool "Pulse count 0 channel 5"
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default n
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config TIVA_PULSECOUNT0_CHAN6
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bool "Pulse count 0 channel 6"
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default n
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config TIVA_PULSECOUNT0_CHAN7
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bool "Pulse count 0 channel 7"
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default n
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endif # TIVA_PULSECOUNT
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config TIVA_CAN0
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bool "CAN0"
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default n
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@ -77,6 +77,12 @@ ifeq ($(CONFIG_TIVA_PWM),y)
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CHIP_CSRCS += tiva_pwm.c
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endif
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ifeq ($(CONFIG_TIVA_PULSECOUNT),y)
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ifeq ($(CONFIG_PULSECOUNT),y)
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CHIP_CSRCS += tiva_pulsecount.c
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endif
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endif
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ifeq ($(CONFIG_TIVA_QEI),y)
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CHIP_CSRCS += tiva_qencoder.c
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endif
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@ -64,6 +64,10 @@ if(CONFIG_TIVA_PWM)
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list(APPEND SRCS tiva_pwm.c)
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endif()
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if(CONFIG_TIVA_PULSECOUNT AND CONFIG_PULSECOUNT)
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list(APPEND SRCS tiva_pulsecount.c)
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endif()
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if(CONFIG_TIVA_QEI)
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list(APPEND SRCS tiva_qencoder.c)
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endif()
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834
arch/arm/src/tiva/common/tiva_pulsecount.c
Normal file
834
arch/arm/src/tiva/common/tiva_pulsecount.c
Normal file
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@ -0,0 +1,834 @@
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/****************************************************************************
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* arch/arm/src/tiva/common/tiva_pulsecount.c
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdio.h>
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#include <errno.h>
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#include <nuttx/debug.h>
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#include <nuttx/timers/pulsecount.h>
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#include "arm_internal.h"
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#include "tiva_gpio.h"
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#include "tiva_pulsecount.h"
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#include "tiva_enablepwr.h"
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#include "tiva_enableclks.h"
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#include "hardware/tiva_pwm.h"
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#include "hardware/tiva_pinmap.h"
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#include "hardware/tiva_memorymap.h"
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/****************************************************************************
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* Private Types
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****************************************************************************/
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uint32_t g_pulsecount_pinset[] =
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{
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GPIO_M0_PWM0,
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GPIO_M0_PWM1,
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GPIO_M0_PWM2,
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GPIO_M0_PWM3,
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GPIO_M0_PWM4,
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GPIO_M0_PWM5,
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GPIO_M0_PWM6,
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GPIO_M0_PWM7,
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};
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struct tiva_pulsecount_chan_s
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{
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const struct pulsecount_ops_s *ops;
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uint8_t controller_id;
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uintptr_t controller_base;
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uint8_t generator_id;
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uintptr_t generator_base;
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uint8_t channel_id;
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bool inited;
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uint8_t irq;
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uint32_t count;
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uint32_t cur_count;
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void *handle;
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN0
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static int tiva_pulsecount_gen0_interrupt(int irq,
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void *context, void *arg);
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#endif
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN2
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static int tiva_pulsecount_gen1_interrupt(int irq,
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void *context, void *arg);
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#endif
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN4
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static int tiva_pulsecount_gen2_interrupt(int irq,
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void *context, void *arg);
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#endif
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN6
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static int tiva_pulsecount_gen3_interrupt(int irq,
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void *context, void *arg);
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#endif
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#if defined(CONFIG_TIVA_PULSECOUNT0_CHAN0) || defined(CONFIG_TIVA_PULSECOUNT0_CHAN2) || \
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defined(CONFIG_TIVA_PULSECOUNT0_CHAN4) || defined(CONFIG_TIVA_PULSECOUNT0_CHAN6)
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static int tiva_pulsecount_interrupt(struct tiva_pulsecount_chan_s *chan);
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#endif
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static inline void
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tiva_pulsecount_putreg(struct tiva_pulsecount_chan_s *chan,
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unsigned int offset, uint32_t regval);
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static inline uint32_t
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tiva_pulsecount_getreg(struct tiva_pulsecount_chan_s *chan,
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unsigned int offset);
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static inline int tiva_pulsecount_timer(struct tiva_pulsecount_chan_s *chan,
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const struct pulsecount_info_s *info);
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static int tiva_pulsecount_setup(struct pulsecount_lowerhalf_s *dev);
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static int tiva_pulsecount_shutdown(struct pulsecount_lowerhalf_s *dev);
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static int tiva_pulsecount_start(struct pulsecount_lowerhalf_s *dev,
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const struct pulsecount_info_s *info,
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void *handle);
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static int tiva_pulsecount_stop(struct pulsecount_lowerhalf_s *dev);
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static int tiva_pulsecount_ioctl(struct pulsecount_lowerhalf_s *dev,
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int cmd, unsigned long arg);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static uint32_t g_pulsecount_freq = 1875000;
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static uint32_t g_pulsecount_counter = (1 << 16);
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static const struct pulsecount_ops_s g_pulsecount_ops =
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{
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.setup = tiva_pulsecount_setup,
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.shutdown = tiva_pulsecount_shutdown,
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.start = tiva_pulsecount_start,
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.stop = tiva_pulsecount_stop,
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.ioctl = tiva_pulsecount_ioctl,
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};
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN0
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static struct tiva_pulsecount_chan_s g_pulsecount_chan0 =
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{
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.ops = &g_pulsecount_ops,
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.controller_id = 0,
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.controller_base = TIVA_PWM0_BASE,
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.generator_id = 0,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
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TIVA_PWMN_INTERVAL * 0,
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.channel_id = 0,
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN0,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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};
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#endif
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN1
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static struct tiva_pulsecount_chan_s g_pulsecount_chan1 =
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{
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.ops = &g_pulsecount_ops,
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.controller_id = 0,
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.controller_base = TIVA_PWM0_BASE,
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.generator_id = 0,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
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TIVA_PWMN_INTERVAL * 0,
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.channel_id = 1,
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN0,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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};
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#endif
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN2
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static struct tiva_pulsecount_chan_s g_pulsecount_chan2 =
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{
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.ops = &g_pulsecount_ops,
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.controller_id = 0,
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.controller_base = TIVA_PWM0_BASE,
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.generator_id = 1,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
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TIVA_PWMN_INTERVAL * 1,
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.channel_id = 2,
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN1,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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};
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#endif
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN3
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static struct tiva_pulsecount_chan_s g_pulsecount_chan3 =
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{
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.ops = &g_pulsecount_ops,
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.controller_id = 0,
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.controller_base = TIVA_PWM0_BASE,
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.generator_id = 1,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
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TIVA_PWMN_INTERVAL * 1,
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.channel_id = 3,
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN1,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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};
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#endif
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN4
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static struct tiva_pulsecount_chan_s g_pulsecount_chan4 =
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{
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.ops = &g_pulsecount_ops,
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.controller_id = 0,
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.controller_base = TIVA_PWM0_BASE,
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.generator_id = 2,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
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TIVA_PWMN_INTERVAL * 2,
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.channel_id = 4,
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN2,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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};
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#endif
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN5
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static struct tiva_pulsecount_chan_s g_pulsecount_chan5 =
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{
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.ops = &g_pulsecount_ops,
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.controller_id = 0,
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.controller_base = TIVA_PWM0_BASE,
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.generator_id = 2,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
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TIVA_PWMN_INTERVAL * 2,
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.channel_id = 5,
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN2,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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};
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#endif
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN6
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static struct tiva_pulsecount_chan_s g_pulsecount_chan6 =
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{
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.ops = &g_pulsecount_ops,
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.controller_id = 0,
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.controller_base = TIVA_PWM0_BASE,
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.generator_id = 3,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
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TIVA_PWMN_INTERVAL * 3,
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.channel_id = 6,
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN3,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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};
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#endif
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN7
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static struct tiva_pulsecount_chan_s g_pulsecount_chan7 =
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{
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.ops = &g_pulsecount_ops,
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.controller_id = 0,
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.controller_base = TIVA_PWM0_BASE,
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.generator_id = 3,
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.generator_base = TIVA_PWM0_BASE + TIVA_PWMN_BASE +
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TIVA_PWMN_INTERVAL * 3,
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.channel_id = 7,
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.inited = false,
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.irq = TIVA_IRQ_PWM0_GEN3,
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.count = 0,
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.cur_count = 0,
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.handle = NULL,
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};
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: tiva_pulsecount_gen[n]_interrupt
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*
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* Description:
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* Pulse count interrupt handlers for PWM[n]
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*
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****************************************************************************/
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN0
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static int tiva_pulsecount_gen0_interrupt(int irq, void *context, void *arg)
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{
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return tiva_pulsecount_interrupt(&g_pulsecount_chan0);
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}
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#endif
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN2
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static int tiva_pulsecount_gen1_interrupt(int irq, void *context, void *arg)
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{
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return tiva_pulsecount_interrupt(&g_pulsecount_chan2);
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}
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#endif
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN4
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static int tiva_pulsecount_gen2_interrupt(int irq, void *context, void *arg)
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{
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return tiva_pulsecount_interrupt(&g_pulsecount_chan4);
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}
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#endif
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#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN6
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static int tiva_pulsecount_gen3_interrupt(int irq, void *context, void *arg)
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{
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return tiva_pulsecount_interrupt(&g_pulsecount_chan6);
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}
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#endif
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/****************************************************************************
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* Name: tiva_pulsecount_interrupt
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*
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* Description:
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* Common pulse count interrupt handler.
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*
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****************************************************************************/
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#if defined(CONFIG_TIVA_PULSECOUNT0_CHAN0) || defined(CONFIG_TIVA_PULSECOUNT0_CHAN2) || \
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defined(CONFIG_TIVA_PULSECOUNT0_CHAN4) || defined(CONFIG_TIVA_PULSECOUNT0_CHAN6)
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static int tiva_pulsecount_interrupt(struct tiva_pulsecount_chan_s *chan)
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{
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/* Clear interrupt */
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tiva_pulsecount_putreg(chan, TIVA_PWMN_ISC_OFFSET, INT_SET << INTCMPAD);
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/* Count down current pulse count */
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chan->cur_count--;
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/* Disable generator and reload current pulse count */
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if (chan->cur_count == 0)
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{
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tiva_pulsecount_putreg(chan, TIVA_PWMN_CTL_OFFSET,
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CTL_DISABLE << TIVA_PWMN_CTL_ENABLE);
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chan->cur_count = chan->count;
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pulsecount_expired(chan->handle);
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}
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return 0;
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}
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#endif
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/****************************************************************************
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* Name: tiva_pulsecount_getreg
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*
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* Description:
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* Get a 32-bit register value by offset
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*
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****************************************************************************/
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static inline uint32_t
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tiva_pulsecount_getreg(struct tiva_pulsecount_chan_s *chan,
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unsigned int offset)
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{
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uintptr_t regaddr = chan->generator_base + offset;
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return getreg32(regaddr);
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}
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|
||||
/****************************************************************************
|
||||
* Name: tiva_pulsecount_putreg
|
||||
*
|
||||
* Description:
|
||||
* Put a 32-bit register value by offset
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void
|
||||
tiva_pulsecount_putreg(struct tiva_pulsecount_chan_s *chan,
|
||||
unsigned int offset, uint32_t regval)
|
||||
{
|
||||
uintptr_t regaddr = chan->generator_base + offset;
|
||||
putreg32(regval, regaddr);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_pulsecount_setup
|
||||
*
|
||||
* Description:
|
||||
* This method is called when the driver is opened. The lower half driver
|
||||
* will be configured and initialized the device so that it is ready for
|
||||
* use. It will not, however, output pulses until the start method is
|
||||
* called.
|
||||
*
|
||||
* Input Parameters:
|
||||
* dev - A reference to the lower half pulsecount driver state structure
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on success; a negated errno value on failure
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int tiva_pulsecount_setup(struct pulsecount_lowerhalf_s *dev)
|
||||
{
|
||||
struct tiva_pulsecount_chan_s *chan = (struct tiva_pulsecount_chan_s *)dev;
|
||||
_info("setup pulsecount for channel %d\n", chan->channel_id);
|
||||
|
||||
/* Enable GPIO port, GPIO pin type and GPIO alternate function (refer to
|
||||
* TM4C1294NCPDT 23.4.2-4)
|
||||
*/
|
||||
|
||||
int ret = tiva_configgpio(g_pulsecount_pinset[chan->channel_id]);
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: tiva_configgpio failed (%x)\n",
|
||||
g_pulsecount_pinset[chan->channel_id]);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_pulsecount_shutdown
|
||||
*
|
||||
* Description:
|
||||
* This method is called when the driver is closed. The lower half driver
|
||||
* stop pulsed output, free any resources, disable the timer hardware, and
|
||||
* put the system into the lowest possible power usage state
|
||||
*
|
||||
* Input Parameters:
|
||||
* dev - A reference to the lower half pulsecount driver state structure
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on success; a negated errno value on failure
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int tiva_pulsecount_shutdown(struct pulsecount_lowerhalf_s *dev)
|
||||
{
|
||||
struct tiva_pulsecount_chan_s *chan = (struct tiva_pulsecount_chan_s *)dev;
|
||||
_info("shutdown pulsecount for channel %d\n", chan->channel_id);
|
||||
|
||||
/* Remove unused-variable warning */
|
||||
|
||||
UNUSED(chan);
|
||||
|
||||
/* Ensure the PWM channel has been stopped */
|
||||
|
||||
tiva_pulsecount_stop(dev);
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_pulsecount_start
|
||||
*
|
||||
* Description:
|
||||
* (Re-)initialize the timer resources and start the pulsed output
|
||||
*
|
||||
* Input Parameters:
|
||||
* dev - A reference to the lower half pulsecount driver state structure
|
||||
* info - A reference to the characteristics of the pulsed output
|
||||
* handle - This is the handle that was provided to the lower-half
|
||||
* start() method.
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on success; a negated errno value on failure
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int tiva_pulsecount_start(struct pulsecount_lowerhalf_s *dev,
|
||||
const struct pulsecount_info_s *info,
|
||||
void *handle)
|
||||
{
|
||||
struct tiva_pulsecount_chan_s *chan = (struct tiva_pulsecount_chan_s *)dev;
|
||||
_info("start pulsecount for channel %d\n", chan->channel_id);
|
||||
|
||||
/* Save the handle */
|
||||
|
||||
chan->handle = handle;
|
||||
|
||||
/* Load pulse count and current pulse count
|
||||
*
|
||||
* Workaround:
|
||||
* Count should be add 1 for the first time
|
||||
*/
|
||||
|
||||
chan->count = info->count;
|
||||
chan->cur_count = info->count;
|
||||
|
||||
if (!chan->inited)
|
||||
{
|
||||
chan->count++;
|
||||
chan->cur_count++;
|
||||
chan->inited = true;
|
||||
}
|
||||
|
||||
/* Count 0 means to generate indefinite number of pulses */
|
||||
|
||||
if (info->count == 0)
|
||||
{
|
||||
pulsecount_expired(chan->handle);
|
||||
|
||||
/* Disable interrupt */
|
||||
|
||||
uint32_t enable = getreg32(chan->controller_base +
|
||||
TIVA_PWM_INTEN_OFFSET);
|
||||
enable &= ~(INT_ENABLE << chan->generator_id);
|
||||
putreg32(enable, chan->controller_base + TIVA_PWM_INTEN_OFFSET);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Enable interrupt */
|
||||
|
||||
uint32_t enable = getreg32(chan->controller_base +
|
||||
TIVA_PWM_INTEN_OFFSET);
|
||||
enable |= (INT_ENABLE << chan->generator_id);
|
||||
putreg32(enable, chan->controller_base + TIVA_PWM_INTEN_OFFSET);
|
||||
}
|
||||
|
||||
/* Start the timer */
|
||||
|
||||
return tiva_pulsecount_timer(chan, info);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_pulsecount_timer
|
||||
*
|
||||
* Description:
|
||||
* Configure PWM registers and start pulsecount
|
||||
*
|
||||
* Input Parameters:
|
||||
* dev - A reference to the lower half pulsecount driver state structure
|
||||
* info - A reference to the characteristics of the pulsed output
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on success; a negated errno value on failure
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline int tiva_pulsecount_timer(struct tiva_pulsecount_chan_s *chan,
|
||||
const struct pulsecount_info_s *info)
|
||||
{
|
||||
uint16_t duty = pulsecount_duty(info);
|
||||
uint32_t frequency = pulsecount_frequency(info);
|
||||
|
||||
_info("> high = %" PRIu32 " ns\n", info->high_ns);
|
||||
_info("> low = %" PRIu32 " ns\n", info->low_ns);
|
||||
_info("> frequency = %" PRIu32 "\n", frequency);
|
||||
_info("> duty = %u\n", duty);
|
||||
|
||||
/* Configure PWM countdown mode (refer to TM4C1294NCPDT 23.4.6) */
|
||||
|
||||
tiva_pulsecount_putreg(chan, TIVA_PWMN_CTL_OFFSET, 0);
|
||||
|
||||
if (chan->channel_id % 2 == 0)
|
||||
{
|
||||
tiva_pulsecount_putreg(chan, TIVA_PWMN_GENA_OFFSET,
|
||||
GENX_LOW << TIVA_PWMN_GENX_ACTCMPAD |
|
||||
GENX_HIGH << TIVA_PWMN_GENX_ACTLOAD);
|
||||
}
|
||||
else
|
||||
{
|
||||
tiva_pulsecount_putreg(chan, TIVA_PWMN_GENB_OFFSET,
|
||||
GENX_LOW << TIVA_PWMN_GENX_ACTCMPBD |
|
||||
GENX_HIGH << TIVA_PWMN_GENX_ACTLOAD);
|
||||
}
|
||||
|
||||
/* Set the PWM period (refer to TM4C1294NCPDT 23.4.7) */
|
||||
|
||||
uint32_t pulsecount_min_freq =
|
||||
(uint32_t)(g_pulsecount_freq / g_pulsecount_counter) + 1;
|
||||
uint32_t pulsecount_max_freq = g_pulsecount_freq;
|
||||
uint32_t load = (uint32_t)(g_pulsecount_freq / frequency);
|
||||
|
||||
_info("> load = %u (%08x)\n", load, load);
|
||||
|
||||
if (load >= g_pulsecount_counter || load < 1)
|
||||
{
|
||||
_err("ERROR: frequency should be in [%d, %d] Hz\n",
|
||||
pulsecount_min_freq, pulsecount_max_freq);
|
||||
return -ERANGE;
|
||||
}
|
||||
|
||||
tiva_pulsecount_putreg(chan, TIVA_PWMN_LOAD_OFFSET, load - 1);
|
||||
|
||||
/* Configure PWM duty (refer to TM4C1294NCPDT 23.4.8-9)
|
||||
*
|
||||
* Workaround:
|
||||
* When comp equals to load, the signal is never pulled down,
|
||||
* so let comp equals to (comp-1)
|
||||
*/
|
||||
|
||||
uint32_t comp =
|
||||
(uint32_t)((1 - (float)duty / g_pulsecount_counter) * load);
|
||||
comp = (duty == 0) ? (comp - 1) : (comp);
|
||||
_info("> comp = %u (%08x)\n", comp, comp);
|
||||
|
||||
if (chan->channel_id % 2 == 0)
|
||||
{
|
||||
tiva_pulsecount_putreg(chan, TIVA_PWMN_CMPA_OFFSET, comp - 1);
|
||||
}
|
||||
else
|
||||
{
|
||||
tiva_pulsecount_putreg(chan, TIVA_PWMN_CMPB_OFFSET, comp - 1);
|
||||
}
|
||||
|
||||
/* Enable the PWM generator (refer to TM4C1294NCPDT 23.4.10) */
|
||||
|
||||
tiva_pulsecount_putreg(chan,
|
||||
TIVA_PWMN_CTL_OFFSET,
|
||||
CTL_ENABLE << TIVA_PWMN_CTL_ENABLE);
|
||||
|
||||
/* Enable PWM channel (refer to TM4C1294NCPDT 23.4.11) */
|
||||
|
||||
uint32_t enable = getreg32(chan->controller_base + TIVA_PWM_ENABLE_OFFSET);
|
||||
enable |= (1 << chan->channel_id);
|
||||
putreg32(enable, chan->controller_base + TIVA_PWM_ENABLE_OFFSET);
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_pulsecount_stop
|
||||
*
|
||||
* Description:
|
||||
* Stop the pulsed output and reset the timer resources
|
||||
*
|
||||
* Input Parameters:
|
||||
* dev - A reference to the lower half pulsecount driver state structure
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on success; a negated errno value on failure
|
||||
*
|
||||
* Assumptions:
|
||||
* This function is called to stop the pulsed output at anytime. This
|
||||
* method is also called from the timer interrupt handler when a repetition
|
||||
* count expires... automatically stopping the timer.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int tiva_pulsecount_stop(struct pulsecount_lowerhalf_s *dev)
|
||||
{
|
||||
struct tiva_pulsecount_chan_s *chan = (struct tiva_pulsecount_chan_s *)dev;
|
||||
_info("stop pulsecount for channel %d\n", chan->channel_id);
|
||||
|
||||
/* Disable PWM channel */
|
||||
|
||||
uint32_t value = getreg32(chan->controller_base + TIVA_PWM_ENABLE_OFFSET);
|
||||
value &= ~(1 << chan->channel_id);
|
||||
putreg32(value, chan->controller_base + TIVA_PWM_ENABLE_OFFSET);
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_pulsecount_ioctl
|
||||
*
|
||||
* Description:
|
||||
* Lower-half logic may support platform-specific ioctl commands
|
||||
*
|
||||
* Input Parameters:
|
||||
* dev - A reference to the lower half pulsecount driver state structure
|
||||
* cmd - The ioctl command
|
||||
* arg - The argument accompanying the ioctl command
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on success; a negated errno value on failure
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int tiva_pulsecount_ioctl(struct pulsecount_lowerhalf_s *dev, int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
struct tiva_pulsecount_chan_s *chan = (struct tiva_pulsecount_chan_s *)dev;
|
||||
_info("ioctl pulsecount for channel %d\n", chan->channel_id);
|
||||
|
||||
/* Remove unused-variable warning */
|
||||
|
||||
UNUSED(chan);
|
||||
|
||||
/* There are no platform-specific ioctl commands */
|
||||
|
||||
return -ENOTTY;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_pulsecount_initialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize one channel for use with the upper-level pulsecount driver.
|
||||
*
|
||||
* Input Parameters:
|
||||
* channel - A number identifying the pulsecount channel to use.
|
||||
*
|
||||
* Returned Value:
|
||||
* On success, a pointer to the Tiva lower half pulsecount driver is
|
||||
* returned.
|
||||
* NULL is returned on any failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
struct pulsecount_lowerhalf_s *tiva_pulsecount_initialize(int channel)
|
||||
{
|
||||
ASSERT(channel >= 0 && channel <= 7);
|
||||
struct tiva_pulsecount_chan_s *chan;
|
||||
|
||||
switch (channel)
|
||||
{
|
||||
#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN0
|
||||
case 0:
|
||||
chan = &g_pulsecount_chan0;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN1
|
||||
case 1:
|
||||
chan = &g_pulsecount_chan1;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN2
|
||||
case 2:
|
||||
chan = &g_pulsecount_chan2;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN3
|
||||
case 3:
|
||||
chan = &g_pulsecount_chan3;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN4
|
||||
case 4:
|
||||
chan = &g_pulsecount_chan4;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN5
|
||||
case 5:
|
||||
chan = &g_pulsecount_chan5;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN6
|
||||
case 6:
|
||||
chan = &g_pulsecount_chan6;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN7
|
||||
case 7:
|
||||
chan = &g_pulsecount_chan7;
|
||||
break;
|
||||
#endif
|
||||
|
||||
default:
|
||||
_err("ERROR: invalid channel %d\n", channel);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
_info("channel %d:\n", channel);
|
||||
_info("> channel_id = %d\n", chan->channel_id);
|
||||
_info("> controller_id = %d\n", chan->controller_id);
|
||||
_info("> controller_base = %08x\n", chan->controller_base);
|
||||
_info("> generator_id = %d\n", chan->generator_id);
|
||||
_info("> generator_base = %08x\n", chan->generator_base);
|
||||
|
||||
/* Enable PWM controller (refer to TM4C1294NCPDT 23.4.1) */
|
||||
|
||||
ASSERT(chan->controller_id == 0);
|
||||
tiva_pwm_enablepwr(chan->controller_id);
|
||||
tiva_pwm_enableclk(chan->controller_id);
|
||||
|
||||
/* Configure PWM Clock Configuration (refer to TM4C1294NCPDT 23.4.5)
|
||||
*
|
||||
* On TM4C1294NCPDT, configure the PWM clock source as 1.875MHz (the system
|
||||
* clock 120MHz divided by 64)
|
||||
*
|
||||
* Keep the existing fixed divider/load selection in this split.
|
||||
*/
|
||||
|
||||
putreg32(CC_USEPWM << TIVA_PWM_CC_USEPWM |
|
||||
CC_PWMDIV_64 << TIVA_PWM_CC_PWMDIV,
|
||||
chan->controller_base + TIVA_PWM_CC);
|
||||
|
||||
/* Enable interrupt INTCMPAD mode */
|
||||
|
||||
tiva_pulsecount_putreg(chan, TIVA_PWMN_INTEN_OFFSET, INT_SET << INTCMPAD);
|
||||
|
||||
/* Attach IRQ handler and enable interrupt */
|
||||
|
||||
switch (chan->channel_id)
|
||||
{
|
||||
#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN0
|
||||
case 0:
|
||||
irq_attach(chan->irq, tiva_pulsecount_gen0_interrupt, NULL);
|
||||
up_enable_irq(chan->irq);
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN2
|
||||
case 2:
|
||||
irq_attach(chan->irq, tiva_pulsecount_gen1_interrupt, NULL);
|
||||
up_enable_irq(chan->irq);
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN4
|
||||
case 4:
|
||||
irq_attach(chan->irq, tiva_pulsecount_gen2_interrupt, NULL);
|
||||
up_enable_irq(chan->irq);
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PULSECOUNT0_CHAN6
|
||||
case 6:
|
||||
irq_attach(chan->irq, tiva_pulsecount_gen3_interrupt, NULL);
|
||||
up_enable_irq(chan->irq);
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
|
||||
return (struct pulsecount_lowerhalf_s *)chan;
|
||||
}
|
||||
|
|
@ -83,45 +83,12 @@ struct tiva_pwm_chan_s
|
|||
uintptr_t generator_base;
|
||||
uint8_t channel_id;
|
||||
bool complementary;
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
bool inited;
|
||||
uint8_t irq;
|
||||
uint32_t count;
|
||||
uint32_t cur_count;
|
||||
void *handle;
|
||||
#endif
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Private Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN0)
|
||||
static int tiva_pwm_gen0_interrupt(int irq,
|
||||
void *context, void *arg);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN2)
|
||||
static int tiva_pwm_gen1_interrupt(int irq,
|
||||
void *context, void *arg);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN4)
|
||||
static int tiva_pwm_gen2_interrupt(int irq,
|
||||
void *context, void *arg);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN6)
|
||||
static int tiva_pwm_gen3_interrupt(int irq,
|
||||
void *context, void *arg);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PWM_PULSECOUNT) && \
|
||||
(defined(CONFIG_TIVA_PWM0_CHAN0) || defined(CONFIG_TIVA_PWM0_CHAN2) || \
|
||||
defined(CONFIG_TIVA_PWM0_CHAN4) || defined(CONFIG_TIVA_PWM0_CHAN6))
|
||||
static int tiva_pwm_interrupt(struct tiva_pwm_chan_s *chan);
|
||||
#endif
|
||||
|
||||
static inline void tiva_pwm_putreg(struct tiva_pwm_chan_s *chan,
|
||||
unsigned int offset, uint32_t regval);
|
||||
static inline uint32_t tiva_pwm_getreg(struct tiva_pwm_chan_s *chan,
|
||||
|
|
@ -131,14 +98,8 @@ static inline int tiva_pwm_timer(struct tiva_pwm_chan_s *chan,
|
|||
|
||||
static int tiva_pwm_setup(struct pwm_lowerhalf_s *dev);
|
||||
static int tiva_pwm_shutdown(struct pwm_lowerhalf_s *dev);
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
static int tiva_pwm_start(struct pwm_lowerhalf_s *dev,
|
||||
const struct pwm_info_s *info,
|
||||
void *handle);
|
||||
#else
|
||||
static int tiva_pwm_start(struct pwm_lowerhalf_s *dev,
|
||||
const struct pwm_info_s *info);
|
||||
#endif
|
||||
static int tiva_pwm_stop(struct pwm_lowerhalf_s *dev);
|
||||
static int tiva_pwm_ioctl(struct pwm_lowerhalf_s *dev,
|
||||
int cmd, unsigned long arg);
|
||||
|
|
@ -174,13 +135,6 @@ static struct tiva_pwm_chan_s g_pwm_chan0 =
|
|||
#else
|
||||
.complementary = false,
|
||||
#endif
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
.inited = false,
|
||||
.irq = TIVA_IRQ_PWM0_GEN0,
|
||||
.count = 0,
|
||||
.cur_count = 0,
|
||||
.handle = NULL,
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
@ -199,13 +153,6 @@ static struct tiva_pwm_chan_s g_pwm_chan1 =
|
|||
#else
|
||||
.complementary = false,
|
||||
#endif
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
.inited = false,
|
||||
.irq = TIVA_IRQ_PWM0_GEN0,
|
||||
.count = 0,
|
||||
.cur_count = 0,
|
||||
.handle = NULL,
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
@ -224,13 +171,6 @@ static struct tiva_pwm_chan_s g_pwm_chan2 =
|
|||
#else
|
||||
.complementary = false,
|
||||
#endif
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
.inited = false,
|
||||
.irq = TIVA_IRQ_PWM0_GEN1,
|
||||
.count = 0,
|
||||
.cur_count = 0,
|
||||
.handle = NULL,
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
@ -249,13 +189,6 @@ static struct tiva_pwm_chan_s g_pwm_chan3 =
|
|||
#else
|
||||
.complementary = false,
|
||||
#endif
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
.inited = false,
|
||||
.irq = TIVA_IRQ_PWM0_GEN1,
|
||||
.count = 0,
|
||||
.cur_count = 0,
|
||||
.handle = NULL,
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
@ -274,13 +207,6 @@ static struct tiva_pwm_chan_s g_pwm_chan4 =
|
|||
#else
|
||||
.complementary = false,
|
||||
#endif
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
.inited = false,
|
||||
.irq = TIVA_IRQ_PWM0_GEN2,
|
||||
.count = 0,
|
||||
.cur_count = 0,
|
||||
.handle = NULL,
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
@ -299,13 +225,6 @@ static struct tiva_pwm_chan_s g_pwm_chan5 =
|
|||
#else
|
||||
.complementary = false,
|
||||
#endif
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
.inited = false,
|
||||
.irq = TIVA_IRQ_PWM0_GEN2,
|
||||
.count = 0,
|
||||
.cur_count = 0,
|
||||
.handle = NULL,
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
@ -324,13 +243,6 @@ static struct tiva_pwm_chan_s g_pwm_chan6 =
|
|||
#else
|
||||
.complementary = false,
|
||||
#endif
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
.inited = false,
|
||||
.irq = TIVA_IRQ_PWM0_GEN3,
|
||||
.count = 0,
|
||||
.cur_count = 0,
|
||||
.handle = NULL,
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
@ -349,13 +261,6 @@ static struct tiva_pwm_chan_s g_pwm_chan7 =
|
|||
#else
|
||||
.complementary = false,
|
||||
#endif
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
.inited = false,
|
||||
.irq = TIVA_IRQ_PWM0_GEN3,
|
||||
.count = 0,
|
||||
.cur_count = 0,
|
||||
.handle = NULL,
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
@ -363,77 +268,6 @@ static struct tiva_pwm_chan_s g_pwm_chan7 =
|
|||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_pwm_gen[n]_interrupt
|
||||
*
|
||||
* Description:
|
||||
* Pulse count interrupt handlers for PWM[n]
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN0)
|
||||
static int tiva_pwm_gen0_interrupt(int irq, void *context, void *arg)
|
||||
{
|
||||
return tiva_pwm_interrupt(&g_pwm_chan0);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN2)
|
||||
static int tiva_pwm_gen1_interrupt(int irq, void *context, void *arg)
|
||||
{
|
||||
return tiva_pwm_interrupt(&g_pwm_chan2);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN4)
|
||||
static int tiva_pwm_gen2_interrupt(int irq, void *context, void *arg)
|
||||
{
|
||||
return tiva_pwm_interrupt(&g_pwm_chan4);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_TIVA_PWM0_CHAN6)
|
||||
static int tiva_pwm_gen3_interrupt(int irq, void *context, void *arg)
|
||||
{
|
||||
return tiva_pwm_interrupt(&g_pwm_chan6);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_pwm_interrupt
|
||||
*
|
||||
* Description:
|
||||
* Common pulse count interrupt handler.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_PWM_PULSECOUNT) && \
|
||||
(defined(CONFIG_TIVA_PWM0_CHAN0) || defined(CONFIG_TIVA_PWM0_CHAN2) || \
|
||||
defined(CONFIG_TIVA_PWM0_CHAN4) || defined(CONFIG_TIVA_PWM0_CHAN6))
|
||||
static int tiva_pwm_interrupt(struct tiva_pwm_chan_s *chan)
|
||||
{
|
||||
/* Clear interrupt */
|
||||
|
||||
tiva_pwm_putreg(chan, TIVA_PWMN_ISC_OFFSET, INT_SET << INTCMPAD);
|
||||
|
||||
/* Count down current pulse count */
|
||||
|
||||
chan->cur_count--;
|
||||
|
||||
/* Disable PWM generator and reload current pulse count */
|
||||
|
||||
if (chan->cur_count == 0)
|
||||
{
|
||||
tiva_pwm_putreg(chan, TIVA_PWMN_CTL_OFFSET,
|
||||
CTL_DISABLE << TIVA_PWMN_CTL_ENABLE);
|
||||
chan->cur_count = chan->count;
|
||||
pwm_expired(chan->handle);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_pwm_getreg
|
||||
*
|
||||
|
|
@ -550,62 +384,6 @@ static int tiva_pwm_shutdown(struct pwm_lowerhalf_s *dev)
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
static int tiva_pwm_start(struct pwm_lowerhalf_s *dev,
|
||||
const struct pwm_info_s *info,
|
||||
void *handle)
|
||||
{
|
||||
struct tiva_pwm_chan_s *chan = (struct tiva_pwm_chan_s *)dev;
|
||||
pwminfo("start PWM for channel %d\n", chan->channel_id);
|
||||
|
||||
/* Save the handle */
|
||||
|
||||
chan->handle = handle;
|
||||
|
||||
/* Load pulse count and current pulse count
|
||||
*
|
||||
* Workaround:
|
||||
* Count should be add 1 for the first time
|
||||
*/
|
||||
|
||||
chan->count = info->channels[0].count;
|
||||
chan->cur_count = info->channels[0].count;
|
||||
|
||||
if (!chan->inited)
|
||||
{
|
||||
chan->count++;
|
||||
chan->cur_count++;
|
||||
chan->inited = true;
|
||||
}
|
||||
|
||||
/* Count 0 means to generate indefinite number of pulses */
|
||||
|
||||
if (info->channels[0].count == 0)
|
||||
{
|
||||
pwm_expired(chan->handle);
|
||||
|
||||
/* Disable interrupt */
|
||||
|
||||
uint32_t enable = getreg32(chan->controller_base +
|
||||
TIVA_PWM_INTEN_OFFSET);
|
||||
enable &= ~(INT_ENABLE << chan->generator_id);
|
||||
putreg32(enable, chan->controller_base + TIVA_PWM_INTEN_OFFSET);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Enable interrupt */
|
||||
|
||||
uint32_t enable = getreg32(chan->controller_base +
|
||||
TIVA_PWM_INTEN_OFFSET);
|
||||
enable |= (INT_ENABLE << chan->generator_id);
|
||||
putreg32(enable, chan->controller_base + TIVA_PWM_INTEN_OFFSET);
|
||||
}
|
||||
|
||||
/* Start the timer */
|
||||
|
||||
return tiva_pwm_timer(chan, info);
|
||||
}
|
||||
#else
|
||||
static int tiva_pwm_start(struct pwm_lowerhalf_s *dev,
|
||||
const struct pwm_info_s *info)
|
||||
{
|
||||
|
|
@ -616,7 +394,6 @@ static int tiva_pwm_start(struct pwm_lowerhalf_s *dev,
|
|||
|
||||
return tiva_pwm_timer(chan, info);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tiva_pwm_timer
|
||||
|
|
@ -898,46 +675,5 @@ struct pwm_lowerhalf_s *tiva_pwm_initialize(int channel)
|
|||
CC_PWMDIV_64 << TIVA_PWM_CC_PWMDIV,
|
||||
chan->controller_base + TIVA_PWM_CC);
|
||||
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
|
||||
/* Enable interrupt INTCMPAD mode */
|
||||
|
||||
tiva_pwm_putreg(chan, TIVA_PWMN_INTEN_OFFSET, INT_SET << INTCMPAD);
|
||||
|
||||
/* Attach IRQ handler and enable interrupt */
|
||||
|
||||
switch (chan->channel_id)
|
||||
{
|
||||
#ifdef CONFIG_TIVA_PWM0_CHAN0
|
||||
case 0:
|
||||
irq_attach(chan->irq, tiva_pwm_gen0_interrupt, NULL);
|
||||
up_enable_irq(chan->irq);
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PWM0_CHAN2
|
||||
case 2:
|
||||
irq_attach(chan->irq, tiva_pwm_gen1_interrupt, NULL);
|
||||
up_enable_irq(chan->irq);
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PWM0_CHAN4
|
||||
case 4:
|
||||
irq_attach(chan->irq, tiva_pwm_gen2_interrupt, NULL);
|
||||
up_enable_irq(chan->irq);
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TIVA_PWM0_CHAN6
|
||||
case 6:
|
||||
irq_attach(chan->irq, tiva_pwm_gen3_interrupt, NULL);
|
||||
up_enable_irq(chan->irq);
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
return (struct pwm_lowerhalf_s *)chan;
|
||||
}
|
||||
|
|
|
|||
38
arch/arm/src/tiva/tiva_pulsecount.h
Normal file
38
arch/arm/src/tiva/tiva_pulsecount.h
Normal file
|
|
@ -0,0 +1,38 @@
|
|||
/****************************************************************************
|
||||
* arch/arm/src/tiva/tiva_pulsecount.h
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_TIVA_TIVA_PULSECOUNT_H
|
||||
#define __ARCH_ARM_SRC_TIVA_TIVA_PULSECOUNT_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/timers/pulsecount.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
struct pulsecount_lowerhalf_s *tiva_pulsecount_initialize(int channel);
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_TIVA_TIVA_PULSECOUNT_H */
|
||||
Loading…
Add table
Add a link
Reference in a new issue