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Under sustained dual-core critical-section traffic (e.g. several UART ISRs) the two Cortex-A32 cores live-lock trading failed STREX. The generic critical-section lock g_cpu_irqlock (an LDREX/STREX spinlock) and the plain non-atomic bitmap g_cpu_irqset are defined back-to-back in sched/irq/irq_csection.c and land in the same 64-byte cache line. The A32 exclusive monitor reserves a full cache line, so one core's ordinary store to g_cpu_irqset clears the other core's LDREX reservation on g_cpu_irqlock. Separate the two symbols onto their own cache lines in the board link script, leaving the generic scheduler source untouched (relies on the toolchain emitting per-object -fdata-sections). Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn> Assisted-by: Claude <noreply@anthropic.com> |
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| .. | ||
| arm | ||
| arm64 | ||
| avr | ||
| dummy | ||
| hc/m9s12 | ||
| mips | ||
| misoc/lm32/misoc | ||
| or1k/mor1kx/or1k | ||
| renesas | ||
| risc-v | ||
| sim/sim/sim | ||
| sparc | ||
| tricore | ||
| x86/qemu/qemu-i486 | ||
| x86_64/qemu/qemu-intel64 | ||
| xtensa | ||
| z16/z16f/z16f2800100zcog | ||
| z80 | ||
| .gitignore | ||
| Board.mk | ||
| boardctl.c | ||
| CMakeLists.txt | ||
| dummy.c | ||
| Kconfig | ||
| Makefile | ||