xiezhanpeng3 fc0647491b arch/armv8-r: use -mfpu=fpv5-sp-d16 for SP-only Cortex-R52 targets ... The specific Cortex-R52 implementation could be configured with a Single-Precision-only FPU (SP-only) and no Neon unit. Executing double-precision instructions (e.g., `vadd.f64`) triggers an Undefined Instruction exception. The standard `-mfpu=fp-armv8` implicitly enables double-precision, which is unsafe for this hardware. `-mfpu=fpv5-sp-d16` is selected as the closest architectural match. - It enforces Single Precision code generation (preventing crashes). - It enables VFPv4/FPv5 features like FMA (Fused Multiply-Add) supported by the CR52 FPU. - It restricts the register set to d0-d15, matching the hardware constraints. This ensures the compiler utilizes hardware FPU and FMA acceleration without emitting illegal double-precision instructions. Signed-off-by: xiezhanpeng3 <xiezhanpeng3@lixiang.com>		2025-12-08 21:09:05 +08:00
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include	arch/arm: Simplify ARM generic timer drivers.	2025-11-17 10:25:37 +08:00
src	arch/armv8-r: use -mfpu=fpv5-sp-d16 for SP-only Cortex-R52 targets	2025-12-08 21:09:05 +08:00
CMakeLists.txt	arch/arm: migrate to SPDX identifier	2024-12-06 09:25:23 +08:00
Kconfig	arch/arm: Add clkdev driver for generic timer.	2025-11-24 19:43:07 +08:00