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arch/armv8-r: use -mfpu=fpv5-sp-d16 for SP-only Cortex-R52 targets

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The specific Cortex-R52 implementation could be configured with
a Single-Precision-only FPU (SP-only) and no Neon unit.
Executing double-precision instructions (e.g., `vadd.f64`) triggers
an Undefined Instruction exception.

The standard `-mfpu=fp-armv8` implicitly enables double-precision,
which is unsafe for this hardware.

`-mfpu=fpv5-sp-d16` is selected as the closest architectural match.
  - It enforces Single Precision code generation (preventing crashes).
  - It enables VFPv4/FPv5 features like FMA (Fused Multiply-Add) supported by the CR52 FPU.
  - It restricts the register set to d0-d15, matching the hardware constraints.

This ensures the compiler utilizes hardware FPU and FMA acceleration
without emitting illegal double-precision instructions.

Signed-off-by: xiezhanpeng3 <xiezhanpeng3@lixiang.com>
This commit is contained in:
xiezhanpeng3 2025-12-05 17:51:12 +08:00 • committed by archer
parent a51e45d5b3
commit fc0647491b
2 changed files with 10 additions and 2 deletions
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6
arch/arm/src/armv8-r/Toolchain.defs
View file

@ -28,7 +28,11 @@ ifeq ($(CONFIG_ARCH_FPU),y)
ifeq ($(CONFIG_ARM_NEON),y)
ARCHCPUFLAGS += -mfpu=neon-fp-armv8
else
ARCHCPUFLAGS += -mfpu=fp-armv8
ifeq ($(CONFIG_ARCH_DPFPU),y)
ARCHCPUFLAGS += -mfpu=fp-armv8
else
ARCHCPUFLAGS += -mfpu=fpv5-sp-d16
endif
endif
ifeq ($(CONFIG_ARM_FPU_ABI_SOFT),y)
ARCHCPUFLAGS += -mfloat-abi=softfp

6
arch/arm/src/cmake/armv8-r.cmake
View file

@ -31,7 +31,11 @@ if(CONFIG_ARCH_FPU)
if(CONFIG_ARM_NEON)
list(APPEND PLATFORM_FLAGS -mfpu=neon-fp-armv8)
else()
list(APPEND PLATFORM_FLAGS -mfpu=fp-armv8)
if(CONFIG_ARCH_DPFPU)
list(APPEND PLATFORM_FLAGS -mfpu=fp-armv8)
else()
list(APPEND PLATFORM_FLAGS -mfpu=fpv5-sp-d16)
endif()
endif()
if(CONFIG_ARM_FPU_ABI_SOFT)
list(APPEND PLATFORM_FLAGS -mfloat-abi=softfp)