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The SYSCFG peripheral clock was gated on CONFIG_STM32_SYSCFG, but that symbol is not defined by the STM32L0 Kconfig (only stm32h7 declares it), so RCC_APB2ENR_SYSCFGEN was never set on this chip. With SYSCFG unclocked every write performed by vrefint_enable() is discarded and SYSCFG_CFGR3 reads back as 0x00000000. VREFINT and, in particular, the ENBUFVREFINTHSI48 reference for the HSI48 oscillator are therefore never enabled. HSI48 still reports HSI48RDY, but it runs without its voltage reference and the 48MHz clock supplied to the USB device controller is unusable: the controller cannot sample the bus, never latches a reset condition in USB_ISTR, and never raises its interrupt. The result is a USB device that is configured correctly in every visible register yet never enumerates. VREFINT is configured exclusively through SYSCFG_CFGR3, so enable the SYSCFG clock whenever CONFIG_STM32_VREFINT is selected. Observed on NUCLEO-L073RZ (STM32L073RZ): before: SYSCFG_CFGR3 = 0x00000000, no enumeration after: SYSCFG_CFGR3 non-zero, device enumerates as CDC/ACM Assisted-by: GitHub Copilot:claude-opus-5 Signed-off-by: jsanchez-2g <jsanchez@2g-eng.com> |
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| arm | ||
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| avr | ||
| ceva | ||
| dummy | ||
| hc | ||
| mips | ||
| misoc | ||
| or1k | ||
| renesas | ||
| risc-v | ||
| sim | ||
| sparc | ||
| tricore | ||
| x86 | ||
| x86_64 | ||
| xtensa | ||
| z16 | ||
| z80 | ||
| CMakeLists.txt | ||
| Kconfig | ||