- Updated information about the RA4M1 microcontroller capabilities, including the General Purpose Timer (GPT).
- Added information about the PWM driver support for the Arduino R4 Minima board using the GPT timer.
Signed-off-by: leocafonso <leocafonso@gmail.com>
- Added PWM support on Arduino R4 Minima board.
This board has 5 PWM channels available using the GPT timer from the RA4M1 microcontroller.
- Added a pwm config file to enable PWM supporting GTP2 GTIOCB on P102.
Signed-off-by: leocafonso <leocafonso@gmail.com>
- Added PWM driver support for the RA4M1 microcontroller using the GPT timer.
- This driver supports Saw-wave mode and one of the two output channels (A or B).
- Added necessary configurations in CMakeLists.txt, Kconfig, and Make.defs.
- Created new header file for GPT.
Signed-off-by: leocafonso <leocafonso@gmail.com>
This commit added the clkcnt abstraction.
Clkcnt is used to abstract the cycle counter of hardware timer, which can represent almost all existing timers. Time conversion through API provided by clkcnt can avoid any timing conversion problem (multiplication overflow, division precision loss, etc.).
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
This commit added support for pure function attributes and compile-time
constant condition.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
If the initial value of the MSR_IA32_TSC_ADJUST register is not 0 (may be modified by BIOS or bootloader), it may cause timing errors. This commit addressed the issue.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
On newer x86 CPUs, the MSR_IA32_TSC_ADJUST register is utilized to fine-tune the offset of the Time Stamp Counter (TSC). This commit introduces support for MSR_IA32_TSC_ADJUST and enhances the TSC tickless
driver, optimizing its performance.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
This commit aligned the arm64 generic timer count to the tick boundary. Notice that this is just a work-around. We should pass both the current system ticks and the delay ticks as input parameters. But we only have the delay tick here due to the oneshot interfaces.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
This patch adds the description for NSH_BUILTIN_AS_COMMAND including its advantage and disadvantage.
NSH_BUILTIN_AS_COMMAND is an optional configuration in nsh. It allows nsh builtin apps to run directly like nsh command without creating a thread. This is done in pull request https://github.com/apache/nuttx-apps/pull/3168
Signed-off-by: Haokun Dong <donghaokun@lixiang.com>
The improvement includes symbols that help employees visualise any errors detected during the PR check phase (check.yml).
Error -> ❌ U+274C Cross Mark
https://en.wikipedia.org/wiki/X_mark
Checks pass -> ✔️ U+2714 Heavy Check Mark
https://en.wikipedia.org/wiki/Check_mark
These characters are emojis that are recognized by the Unicode standards which define what each character represents.
Signed-off-by: simbit18 <simbit18@gmail.com>
Adds another configuration which includes the CGOL game application.
This gives users something animated and interesting to see on the HDMI
video output, since the frame-buffer example is not as interesting.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
Espressif common initialization and lib_cxx_initialize are having
conflicts and multiple linker script issues.
Removing CXX_INITIALIZE solves those problems with no side effects.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Use clock_get_sched_tclock_systime_ticks() to access system ticks
in order to fix the build error and improve code safety.
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
Make g_system_ticks a static variable, as it is only accessed by
clock_get_sched_ticks().
This change improves code modularity and enhances safety, since
clock_get_sched_ticks() performs proper synchronization when
reading g_system_ticks.
Signed-off-by: Chengdong Wang wangchengdong@lixiang.com
The .align N syntax in GHS means the alignment is N Bytes. In GCC
compiler, it means 2**N Bytes. Therefore, .align 32 in GHS and
.align 5 in GCC are equivalent.
Co-authored-by: Chengdong Wang <wangchengdong@lixiang.com>
Signed-off-by: xiezhanpeng3 <xiezhanpeng3@lixiang.com>
The $+0x0 is not accepted by Ghs compiler. Therefore, we change it to a
more common syntax " b ." for endless self loop.
Signed-off-by: xiezhanpeng3 <xiezhanpeng3@lixiang.com>
The GreenHills Compiler uses Unified Assembler Language by default and
it does not recognize .syntax unified instruction. Therefore, remove
them if GHS compiler is used.
Co-authored-by: Chengdong Wang <wangchengdong@lixiang.com>
Signed-off-by: xiezhanpeng3 <xiezhanpeng3@lixiang.com>
The GreenHills Compiler uses different grammer for the .type directive
in asm, this patch adds support for the grammer for arm-v8r.
Similar change for arm-v7r was done in pull request #12883.
Co-authored-by: Chengdong Wang <wangchengdong@lixiang.com>
Signed-off-by: xiezhanpeng3 <xiezhanpeng3@lixiang.com>
We found that specific chip pin definitions were used in the generic UART source file. Since pin definitions vary across different chips, the UART pin definitions have been moved to the corresponding chip-specific directory.
Co-authored-by: Chengdong Wang <wangchengdong@lixiang.com>
Signed-off-by: Qinshuo Duan <duanqinshuo@lixiang.com>
reorganize the content structure:
- Add the new "Network Interfaces Overview" section
- Reorganize the document structure and optimize formatting
Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
nxsched_deliver_task() or nxsched_merge_pending() should only be
called when a context switch is required. This behavior is
independent of whether the current task is locked.
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
It acts as register_driver but also populates the inode size.
This allows to return a non-zero size when calling stat() on an eeprom
driver.
The conditions (CONFIG_PSEUDOFS_FILE or CONFIG_FS_SHMFS) for the
declaration of the inode size field have also been removed so that other
drivers can populate this field in the future.
Signed-off-by: Antoine Juckler <6445757+ajuckler@users.noreply.github.com>
1. up_irq_save should not mask fiq if CONFIG_ARCH_HIPRI_INTERRUPT=y
2. up_irq_save should mask fiq if CONFIG_ARCH_TRUSTZONE_SECURE=y
3. up_irq_save should mask irq if CONFIG_ARCH_TRUSTZONE_SECURE=n
4. add up_secure_irq in arm64
5. add ARCH_HAVE_TRUSTZONE support for ARCH_CORTEX_R82
Signed-off-by: hujun5 <hujun5@xiaomi.com>
MTDIOC_RESET ioctl command executes "Reset Enable" and "Reset Memory"
commands to enter a power-on reset condition.
Signed-off-by: Jani Paalijarvi <jani.paalijarvi@unikie.com>
Fix a transfer issue in the Kinetis DSPI driver when operating
with transmit and receive FIFOs disabled (`MCR[DIS_TXF]=1`,
`MCR[DIS_RXF]=1`). In this mode, the DSPI module behaves as a
simple double-buffered SPI interface without TX staging.
When FIFOs are disabled, `PUSHR` acts as a single 32-bit
command/data register. Partial (16-bit) writes to its upper or
lower halves can result in incomplete or corrupted transfers.
This patch ensures the full 32-bit packet is prepared and
written in a single operation.
* Resolves broken SPI transactions with LAN9252 (EasyCAT).
* Improves reliability in non-FIFO DSPI configurations.
* No impact on DMA or FIFO-enabled modes.
Signed-off-by: trns1997 <trns1997@gmail.com>
