Bad block management and the logical->physical mapping is only needed
with raw NAND type memories, so we can compile that in conditionally,
saving ~600 bytes of flash on a 32-bit arm when NAND is not used.
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
MX25L12873G is a SPI memory very similar to MX25L25673G,
but 128Mbit, which means it does not use 4-byte addresses.
Signed-off-by: Carlos Sanchez <carlossanchez@geotab.com>
Split mnemofs into allocation, directory, file, CTZ, and read/write
modules, and update direntry traversal and file handling. Add superblock
format version 1 support, reject newer on-flash versions, and preserve
the mounted version when rewriting metadata.
Update the NAND simulator drivers for the new mnemofs behavior by fixing
spare writes, exposing the erase state, allowing raw reads, and documenting
the background-task startup flow.
Signed-off-by: Saurav Pal <resyfer.dev@gmail.com>
- Replace syslog() with finfo()/fwarn() to follow the NuttX subsystem
debug convention.
- Merge adjacent early-continue `if` branches in w25n_pick_free_spare
and w25n_scan_factory_bad.
- Add Input Parameters / Returned Value sections to the BBM helper
headers.
- Clarify why only -EIO triggers a remap retry in w25n_erase and
w25n_bwrite (block-level E-FAIL/P-FAIL vs. transient bus faults).
Signed-off-by: Julian Oes <julian@oes.ch>
Use the chip's built-in 20-entry non-volatile Bad Block Management
Look-Up Table (datasheet section 8.2.7) to transparently route around
bad blocks.
Init:
- Reserve the top 24 blocks of the array as a spare pool
- Clamp the MTD geometry to W25N_USER_BLOCKS = 1000 so upper layers
never see the spare area (125 MB usable instead of 128 MB)
- Force BUF=1 alongside enabling ECC. The W25N01GVxxIT variant
power-ups with BUF=0 (Continuous Read mode), in which Read Data
ignores the column address and always starts at byte 0 - which
silently broke any read targeting a non-zero column (OOB markers,
sub-page reads in w25n_read).
- Scan all 1024 blocks for factory bad markers (non-FFh at byte 0 of
the spare area of page 0) and remap any user-area bad blocks via the
A1h BBM command. Idempotent across reboots: blocks already present
in the LUT are skipped, so repeated scans don't consume LUT slots.
Runtime:
- On E-FAIL from w25n_block_erase or P-FAIL from w25n_program_execute,
allocate a spare and issue A1h, then retry the operation once. The
chip routes the retry to the spare PBA transparently. Data buffer is
reloaded on program retry.
- Uncorrectable read ECC is left as -EIO (soft errors shouldn't trigger
permanent remap, and remapping discards data we may still recover).
Safeguards against burning LUT slots on bogus bad blocks:
- w25n_pick_free_spare erases each candidate spare as an active proof
of life before returning it - the factory OOB marker alone isn't
trusted.
- w25n_bbm_swap rejects A1h with LBA outside the user area or PBA
outside the spare pool.
Stack discipline for the logger-thread hot path:
- The 20-entry cached LUT lives in the device struct, not on the stack.
- w25n_read_bbm_lut decodes 4 bytes at a time instead of reading the
full 80-byte LUT dump into a local buffer.
Boot diagnostics are emitted via syslog so they appear unconditionally:
- [w25n] BBM scan summary (new/remapped/unremapped/previously-remapped/
LUT slots used)
- [w25n] W25N01GV ready line with user blocks, spare count, geometry,
and actual SPI frequency
- [w25n] per-remap info and warnings on runtime E-FAIL/P-FAIL paths
Note: existing littlefs filesystems become unmountable because the
block count shrinks from 1024 to 1000; both PX4 board init.c paths
already mount with autoformat so they reformat on first boot after
this change.
Signed-off-by: Julian Oes <julian@oes.ch>
On power-up, MX25L25673G uses 3-byte addresses, so only the lower
128Mb (half the memory) can be accessed. This change ensures 4-byte
addresses are used so the whole memory can be used.
Co-Authored-By: Randy Rossi <randyrossi@geotab.com>
Signed-off-by: Carlos Sanchez <carlossanchez@geotab.com>
debug.h is a NuttX-specific, non-POSIX header. Placing it in the
top-level include/ directory creates naming conflicts with external
projects that define their own debug.h.
This commit moves the canonical header to include/nuttx/debug.h,
following the NuttX convention for non-POSIX/non-standard headers,
and updates all in-tree references.
A backward-compatibility shim is left at include/debug.h that
emits a deprecation #warning and re-includes <nuttx/debug.h>,
allowing out-of-tree code to continue building while migrating.
Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
Correct duplicate "is is" word found in 181 files throughout the
codebase.
In most cases "is is" was changed to "is", but in contexts like
"MCU is is sleep mode" it was corrected to "MCU in sleep mode".
Also fixes a "the the" typo in net/inet/inet_sockif.c.
This is a pure style/documentation fix that improves code readability.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Fix 269 occurrences of duplicate "the" word typo found in 209 files
across source code, header files, and configuration.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
If power down mode is set, trying to read ID ends in an infinite loop
because w25_waitwritecomplete never returns as status register never
signalizes write complete. Therefore ensure the device is not in a
power down mode before trying to read from it.
This can be an issue if the board is trying to check for more NOR
memories on one SPI bus and one chip select. For example GD25 driver
returns the memory to power down state after read id is finished,
therefore board initialization is stuck in an infinite loop if it first
checks for GD25 and then fallbacks to W25.
The commit fixes the possible issue by ensuring W25 is brought back
to normal operation mode before trying to obtain the manufacturer ID.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
ftl_write() unconditionally routes writes through rwb_write() when
FTL_HAVE_RWBUFFER is defined, ignoring the O_DIRECT flag stored in
dev->oflags. This means callers that open with O_DIRECT expecting
unbuffered writes still get their data buffered in RAM.
The O_DIRECT flag is already checked in ftl_flush() to select
between direct and read-modify-write paths, but the buffering
decision in ftl_write() never consults it.
Add O_DIRECT checks in both ftl_write() and ftl_read() to bypass
rwbuffer entirely when the flag is set. For writes, go directly to
ftl_flush() and normalize the return value to match the block
driver convention (nsectors on success). For reads, go directly to
ftl_reload(), bypassing any read-ahead cache.
This gives O_DIRECT callers a complete bypass of the rwbuffer layer
for both reads and writes, matching the documented contract.
Signed-off-by: Neil Berkman <neil@xuku.com>
Invalid data is cleared during garbage collection rather than
deleted during initialization, thus accelerating the
initialization speed.
Signed-off-by: zhaoxingyu1 <zhaoxingyu1@xiaomi.com>
When key string found corrupted during garbage collection,
then remove key-value pair from the flash.
Signed-off-by: zhaoxingyu1 <zhaoxingyu1@xiaomi.com>
mtd_config/mtd_config_nvs should all support
mtdconfig_register_by_path/mtdconfig_unregister_by_path api
Signed-off-by: zhaoxingyu1 <zhaoxingyu1@xiaomi.com>
change filename mtd/mtd_config_fs.c to mtd/mtd_config_nvs.c
and optimize the configuration related to mtdconfig
Signed-off-by: zhaoxingyu1 <zhaoxingyu1@xiaomi.com>
We have added a defconfig configuration to set the page size of the flash.
According to the CFI protocol, the flash supports a single write operation
with a data volume ranging from byte size up to the maximum number of bytes.
However, the MTD device structure requires defining a page size, which serves
as the minimum write unit of the flash. Hence, this configuration is introduced.
Any page size within the range of 1 to the maximum number of bytes is considered
valid.
Signed-off-by: jingfei <jingfei@xiaomi.com>
the MTD ERASE interface has inconsistent return values.
Some implementations return the number of erased sectors,
while others return OK (0). It is currently recommended
to uniformly treat ERASE success as OK. Therefore, the
logic for judging the return value of MTD_ERASE in the
FTL erase interface should be changed to check if it is
greater than 0.
Signed-off-by: jingfei <jingfei@xiaomi.com>
Since there is a storage device like RRAM that doesn't
require erasing, the MTD erase function may not exist.
Here, we should first check whether the erase interface
exists before performing the erasing operation.
Signed-off-by: jingfei <jingfei@xiaomi.com>
Accessing RRAM/MRAM from the FTL interface can
cause errors because RRAM lacks an erase interface.
To make RRAM/MRAM compatible with FTL, the FTL layer
erase interface needs to be modified.
Signed-off-by: jingfei <jingfei@xiaomi.com>
When there's no erase function for mtd, we decide if we
need erase_buffer based on this:
1. If we've got bad block marking, we still need the erase buffer.
If a write fails, it's used to read back the entire bad block's
contents before writing to a new block.
2. If we don't have bad block marking, the erase buffer isn't
needed and can be skipped.
Signed-off-by: jingfei <jingfei@xiaomi.com>
1. In cfi_write_unalign(): Add additional check to ensure nbytes is
at least bankwidth size before skipping unaligned start handling.
This prevents incorrect behavior when writing small amounts of
data that are less than bankwidth.
2. In cfi_write(): Align down the write size to bankwidth boundary
when the remaining nbytes is less than the buffer write size.
This ensures the buffer write operation always works with properly
aligned data size, preventing write failures.))
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
Add MTD driver for Winbond W25N series SPI NAND flash.
Currently supports W25N01GV (1Gbit/128MB).
Features:
- Standard SPI interface with configurable frequency (up to 104 MHz)
- Hardware ECC enabled by default
- Block erase with sleep-based wait (releases SPI bus)
- Page read/write with busy-wait for fast operations
Limitations:
- No bad block management (BBM). Factory bad blocks and runtime bad
blocks are not tracked.
- No bad block table (BBT) scanning at initialization.
- No Quad SPI support (standard SPI only).
- No access to spare area (64 bytes/page) or OTP region.
Tested using:
- Board with STM32H743
- W25N01GV on SPI at 96 MHz with DMA enabled
- Flash mounted using littlefs
- Tested using sdbench:
- Sequential write speed of 1760 KB/s
- Sequential read speed of 4900 KB/s
Signed-off-by: Julian Oes <julian@oes.ch>
In order to reduce code duplication, use the eeprom/spi_xx25xx
driver within mtd/at25ee.
The eeprom/xxx.h includes have been merged into eeprom/eeprom.h, to
provide a common include file like mtd/mtd.h.
Signed-off-by: Antoine Juckler <6445757+ajuckler@users.noreply.github.com>
This commit adds SPI_SETDELAY interface if CONFIG_SPI_DELAY_CONTROL
option is set. This allows to set custom delay between SPI transfers,
chip selects and so on.
Default values are set to 0. W25 SPI NOR flash works with them and
I haven't found any other values in the datasheet.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Adds a device ID to at25ee_initialize, which is stored in the
at25ee_dev_s structure. This ID is used when calling SPI_SELECT.
The implementation is based on the handling of the chip select in
mtd/ramtron.c
This change is NOT backward compatible: the function signature has changed
Signed-off-by: Antoine Juckler <6445757+ajuckler@users.noreply.github.com>
Nuttx currently has 2 types of sleep interfaces:
1. Signal-scheduled sleep: nxsig_sleep() / nxsig_usleep() / nxsig_nanosleep()
Weaknesses:
a. Signal-dependent: The signal-scheduled sleep method is bound to the signal framework, while some driver sleep operations do not depend on signals.
b. Timespec conversion: Signal-scheduled sleep involves timespec conversion, which has a significant impact on performance.
2. Busy sleep: up_mdelay() / up_udelay()
Weaknesses:
a. Does not actively trigger scheduling, occupy the CPU loading.
3. New interfaces: Scheduled sleep: nxsched_sleep() / nxsched_usleep() / nxsched_msleep() / nxsched_ticksleep()
Strengths:
a. Does not depend on the signal framework.
b. Tick-based, without additional computational overhead.
Currently, the Nuttx driver framework extensively uses nxsig_* interfaces. However, the driver does not need to rely on signals or timespec conversion.
Therefore, a new set of APIs is added to reduce dependencies on other modules.
(This PR also aims to make signals optional, further reducing the code size of Nuttx.)
Signed-off-by: chao an <anchao.archer@bytedance.com>
This patch will report events in the following scenarios:
1. Events that have changed but not been waited for before being added to
the interest list.
2. Events that occur after `epoll_wait()` returns and before it is called
again.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
