Aksal/nuttx
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sched/sleep: replace all Signal-based sleep implement to Scheduled sleep

Browse source 
Nuttx currently has 2 types of sleep interfaces:

1. Signal-scheduled sleep: nxsig_sleep() / nxsig_usleep() / nxsig_nanosleep()
Weaknesses:
a. Signal-dependent: The signal-scheduled sleep method is bound to the signal framework, while some driver sleep operations do not depend on signals.
b. Timespec conversion: Signal-scheduled sleep involves timespec conversion, which has a significant impact on performance.

2. Busy sleep: up_mdelay() / up_udelay()
Weaknesses:
a. Does not actively trigger scheduling, occupy the CPU loading.

3. New interfaces: Scheduled sleep: nxsched_sleep() / nxsched_usleep() / nxsched_msleep() / nxsched_ticksleep()
Strengths:
a. Does not depend on the signal framework.
b. Tick-based, without additional computational overhead.

Currently, the Nuttx driver framework extensively uses nxsig_* interfaces. However, the driver does not need to rely on signals or timespec conversion.
Therefore, a new set of APIs is added to reduce dependencies on other modules.

(This PR also aims to make signals optional, further reducing the code size of Nuttx.)

Signed-off-by: chao an <anchao.archer@bytedance.com>
This commit is contained in:
chao an 2025-10-16 10:34:39 +08:00 • committed by Xiang Xiao
parent 7297ecc02e
commit 87f134cfaa
273 changed files with 574 additions and 588 deletions
Download patch file Download diff file Expand all files Collapse all files

8
arch/arm/src/at32/at32_otgfshost.c
View file

@ -1947,7 +1947,7 @@ static ssize_t at32_in_transfer(struct at32_usbhost_s *priv, int chidx,
* Small delays could require more resolution than is
* provided by the system timer. For example, if the
* system timer resolution is 10MS, then
* nxsig_usleep(1000) will actually request a delay 20MS
* nxsched_usleep(1000) will actually request a delay 20MS
* (due to both quantization and rounding).
*
* REVISIT: So which is better? To ignore tiny delays and
@ -1957,7 +1957,7 @@ static ssize_t at32_in_transfer(struct at32_usbhost_s *priv, int chidx,
if (delay > CONFIG_USEC_PER_TICK)
{
nxsig_usleep(delay - CONFIG_USEC_PER_TICK);
nxsched_usleep(delay - CONFIG_USEC_PER_TICK);
}
}
}
@ -2262,7 +2262,7 @@ static ssize_t at32_out_transfer(struct at32_usbhost_s *priv,
* transfer using the same buffer pointer and length.
*/
nxsig_usleep(5 * 1000);
nxsched_usleep(5 * 1000);
}
else
{
@ -3958,7 +3958,7 @@ static int at32_rh_enumerate(struct at32_usbhost_s *priv,
* 100ms.
*/
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Reset the host port */

4
arch/arm/src/cxd56xx/cxd56_farapi.c
View file

@ -205,7 +205,7 @@ void farapi_main(int id, void *arg, struct modulelist_s *mlist)
/* NOTE: a workaround to finish rescheduling */
nxsig_usleep(10 * 1000);
nxsched_usleep(10 * 1000);
}
#endif
@ -273,7 +273,7 @@ err:
/* NOTE: a workaround to finish rescheduling */
nxsig_usleep(10 * 1000);
nxsched_usleep(10 * 1000);
}
#endif
}

6
arch/arm/src/cxd56xx/cxd56_gnss.c
View file

@ -452,7 +452,7 @@ static int cxd56_gnss_start(struct file *filep, unsigned long arg)
{
/* GNSS requires stable RTC */
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
}
ret = cxd56_gnss_cpufifo_api(filep, CXD56_GNSS_GD_GNSS_START,
@ -1453,7 +1453,7 @@ static int cxd56_gnss_start_test(struct file *filep, unsigned long arg)
{
/* GNSS requires stable RTC */
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
}
/* set parameter */
@ -2768,7 +2768,7 @@ static int cxd56_gnss_open(struct file *filep)
{
/* GNSS requires stable RTC */
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
}
ret = nxmutex_lock(&priv->devlock);

2
arch/arm/src/cxd56xx/cxd56_nxaudio.c
View file

@ -2957,7 +2957,7 @@ static int cxd56_start(struct audio_lowerhalf_s *lower)
if (time < CXD56_MIC_BOOT_WAIT)
{
nxsig_usleep((CXD56_MIC_BOOT_WAIT - time) * 1000);
nxsched_usleep((CXD56_MIC_BOOT_WAIT - time) * 1000);
}
}
}

2
arch/arm/src/cxd56xx/cxd56_sdhci.c
View file

@ -3338,7 +3338,7 @@ void cxd56_sdhci_mediachange(struct sdio_dev_s *dev)
break;
}
nxsig_usleep(100000);
nxsched_usleep(100000);
timeout -= 100000;
}
}

4
arch/arm/src/efm32/efm32_usbhost.c
View file

@ -2276,7 +2276,7 @@ static ssize_t efm32_out_transfer(struct efm32_usbhost_s *priv,
* transfer using the same buffer pointer and length.
*/
nxsig_usleep(20 * 1000);
nxsched_usleep(20 * 1000);
}
else
{
@ -3960,7 +3960,7 @@ static int efm32_rh_enumerate(struct efm32_usbhost_s *priv,
/* USB 2.0 spec says at least 50ms delay before port reset. wait 100ms. */
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Reset the host port */

4
arch/arm/src/imx6/imx_enet.c
View file

@ -2043,7 +2043,7 @@ static inline int imx_initphy(struct imx_driver_s *priv, bool renogphy)
retries = 0;
do
{
nxsig_usleep(LINK_WAITUS);
nxsched_usleep(LINK_WAITUS);
ninfo("%s: Read PHYID1, retries=%d\n",
BOARD_PHY_NAME, retries + 1);
@ -2216,7 +2216,7 @@ static inline int imx_initphy(struct imx_driver_s *priv, bool renogphy)
break;
}
nxsig_usleep(LINK_WAITUS);
nxsched_usleep(LINK_WAITUS);
}
if (phydata & MII_MSR_ANEGCOMPLETE)

6
arch/arm/src/imxrt/imxrt_ehci.c
View file

@ -3811,7 +3811,7 @@ static int imxrt_rh_enumerate(struct usbhost_connection_s *conn,
* reset for 50Msec, not wait 50Msec before resetting.
*/
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Paragraph 2.3.9:
*
@ -3905,7 +3905,7 @@ static int imxrt_rh_enumerate(struct usbhost_connection_s *conn,
* 50 ms."
*/
nxsig_usleep(50 * 1000);
nxsched_usleep(50 * 1000);
regval = imxrt_getreg(regaddr);
regval &= ~EHCI_PORTSC_RESET;
@ -3926,7 +3926,7 @@ static int imxrt_rh_enumerate(struct usbhost_connection_s *conn,
*/
while ((imxrt_getreg(regaddr) & EHCI_PORTSC_RESET) != 0);
nxsig_usleep(200 * 1000);
nxsched_usleep(200 * 1000);
/* EHCI Paragraph 4.2.2:
*

8
arch/arm/src/imxrt/imxrt_enet.c
View file

@ -2226,7 +2226,7 @@ static int imxrt_determine_phy(struct imxrt_driver_s *priv)
retries = 0;
do
{
nxsig_usleep(100);
nxsched_usleep(100);
phydata = 0xffff;
ret = imxrt_readmii(priv, phyaddr, MII_PHYID1, &phydata);
}
@ -2237,7 +2237,7 @@ static int imxrt_determine_phy(struct imxrt_driver_s *priv)
{
do
{
nxsig_usleep(100);
nxsched_usleep(100);
phydata = 0xffff;
ret = imxrt_readmii(priv, phyaddr, MII_PHYID2, &phydata);
}
@ -2550,7 +2550,7 @@ static inline int imxrt_initphy(struct imxrt_driver_s *priv, bool renogphy)
retries = 0;
do
{
nxsig_usleep(LINK_WAITUS);
nxsched_usleep(LINK_WAITUS);
ninfo("%s: Read PHYID1, retries=%d\n",
BOARD_PHY_NAME, retries + 1);
@ -2786,7 +2786,7 @@ static inline int imxrt_initphy(struct imxrt_driver_s *priv, bool renogphy)
break;
}
nxsig_usleep(LINK_WAITUS);
nxsched_usleep(LINK_WAITUS);
}
if (phydata & MII_MSR_ANEGCOMPLETE)

4
arch/arm/src/kinetis/kinetis_enet.c
View file

@ -1564,7 +1564,7 @@ static inline int kinetis_initphy(struct kinetis_driver_s *priv)
retries = 0;
do
{
nxsig_usleep(LINK_WAITUS);
nxsched_usleep(LINK_WAITUS);
ninfo("%s: Read PHYID1, retries=%d\n",
BOARD_PHY_NAME, retries + 1);
phydata = 0xffff;
@ -1646,7 +1646,7 @@ static inline int kinetis_initphy(struct kinetis_driver_s *priv)
break;
}
nxsig_usleep(LINK_WAITUS);
nxsched_usleep(LINK_WAITUS);
}
if (phydata & MII_MSR_ANEGCOMPLETE)

4
arch/arm/src/kinetis/kinetis_usbhshost.c
View file

@ -3696,7 +3696,7 @@ static int kinetis_rh_enumerate(struct usbhost_connection_s *conn,
* reset for 50Msec, not wait 50Msec before resetting.
*/
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Paragraph 2.3.9:
*
@ -3800,7 +3800,7 @@ static int kinetis_rh_enumerate(struct usbhost_connection_s *conn,
*/
while ((kinetis_getreg(regaddr) & EHCI_PORTSC_RESET) != 0);
nxsig_usleep(200 * 1000);
nxsched_usleep(200 * 1000);
/* EHCI Paragraph 4.2.2:
*

2
arch/arm/src/lc823450/lc823450_i2c.c
View file

@ -1024,7 +1024,7 @@ static int lc823450_i2c_transfer(struct i2c_master_s *dev,
* transaction, STOP condition for write transaction
*/
nxsig_usleep(10 * 1000);
nxsched_usleep(10 * 1000);
}
else
{

6
arch/arm/src/lc823450/lc823450_i2s.c
View file

@ -291,7 +291,7 @@ static void _setup_audio_pll(uint32_t freq)
/* TODO: Wait */
nxsig_usleep(50 * 1000);
nxsched_usleep(50 * 1000);
/* Switch to the PLL */
@ -1052,7 +1052,7 @@ struct i2s_dev_s *lc823450_i2sdev_initialize(void)
/* Set the new affinity which assigns to CPU0 */
nxsched_set_affinity(nxsched_gettid(), sizeof(cpuset1), &cpuset1);
nxsig_usleep(10 * 1000);
nxsched_usleep(10 * 1000);
#endif
irq_attach(LC823450_IRQ_AUDIOBUF0, _i2s_isr, NULL);
@ -1065,7 +1065,7 @@ struct i2s_dev_s *lc823450_i2sdev_initialize(void)
/* Restore the original affinity */
nxsched_set_affinity(nxsched_gettid(), sizeof(cpuset0), &cpuset0);
nxsig_usleep(10 * 1000);
nxsched_usleep(10 * 1000);
#endif
/* Success exit */

14
arch/arm/src/lc823450/lc823450_ipl2.c
View file

@ -357,7 +357,7 @@ static int check_forceusbboot(void)
modifyreg32(MCLKCNTAPB, 0, MCLKCNTAPB_ADC_CLKEN);
modifyreg32(MRSTCNTAPB, 0, MRSTCNTAPB_ADC_RSTB);
nxsig_usleep(10000);
nxsched_usleep(10000);
/* start ADC0,1 */
@ -416,7 +416,7 @@ static void sysreset(void)
{
/* workaround to flush eMMC cache */
nxsig_usleep(100000);
nxsched_usleep(100000);
up_systemreset();
}
@ -520,7 +520,7 @@ static void chg_disable(void)
}
else
{
nxsig_usleep(20);
nxsched_usleep(20);
}
}
@ -568,7 +568,7 @@ static int msc_enable(int forced)
return 0;
}
nxsig_usleep(10000);
nxsched_usleep(10000);
}
#else
@ -576,7 +576,7 @@ static int msc_enable(int forced)
while (g_update_flag == 0)
{
nxsig_usleep(10000);
nxsched_usleep(10000);
}
#endif
@ -585,7 +585,7 @@ static int msc_enable(int forced)
/* check recovery kernel update */
nx_mount(CONFIG_MTD_CP_DEVPATH, "/mnt/sd0", "evfat", 0, NULL);
nxsig_usleep(10000);
nxsched_usleep(10000);
/* recovery kernel install from UPG.img */
@ -677,7 +677,7 @@ int ipl2_main(int argc, char *argv[])
/* check recovery kernel update */
nx_mount(CONFIG_MTD_CP_DEVPATH, "/mnt/sd0", "evfat", 0, NULL);
nxsig_usleep(10000);
nxsched_usleep(10000);
/* recovery kernel install from UPG.img */

6
arch/arm/src/lc823450/lc823450_sddrv_dep.c
View file

@ -182,7 +182,7 @@ SINT_T sddep1_hw_init(struct sddrcfg_s *cfg)
/* wait 15ms */
nxsig_usleep(15000);
nxsched_usleep(15000);
irqstate_t flags = enter_critical_section();
@ -276,7 +276,7 @@ void sddep_voltage_switch(struct sddrcfg_s *cfg)
lc823450_gpio_config(GPIO_PORT0 | GPIO_PIN6 |
GPIO_MODE_OUTPUT | GPIO_VALUE_ONE);
nxsig_usleep(200 * 1000);
nxsched_usleep(200 * 1000);
#endif
}
@ -333,7 +333,7 @@ SINT_T sddep_wait(UI_32 ms, struct sddrcfg_s *cfg)
}
else
{
nxsig_usleep(ms * 1000);
nxsched_usleep(ms * 1000);
}
#endif

2
arch/arm/src/lc823450/lc823450_usbdev.c
View file

@ -1581,7 +1581,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
putreg32(~USB_DEVS_SOF, USB_DEVS);
nxsig_usleep(100000);
nxsched_usleep(100000);
/* SOF is not arrived & D+/D- is HIGH */

2
arch/arm/src/lpc17xx_40xx/lpc17_40_ethernet.c
View file

@ -2488,7 +2488,7 @@ static inline int lpc17_40_phyinit(struct lpc17_40_driver_s *priv)
while ((lpc17_40_phyread(phyaddr, MII_DP83848C_STS) & 0x0001) == 0)
{
nxsig_usleep(40000);
nxsched_usleep(40000);
}
#endif

4
arch/arm/src/lpc17xx_40xx/lpc17_40_usbhost.c
View file

@ -2076,7 +2076,7 @@ static int lpc17_40_rh_enumerate(struct usbhost_connection_s *conn,
/* USB 2.0 spec says at least 50ms delay before port reset */
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Put RH port 1 in reset (the LPC176x supports only a single downstream
* port).
@ -2094,7 +2094,7 @@ static int lpc17_40_rh_enumerate(struct usbhost_connection_s *conn,
/* Release RH port 1 from reset and wait a bit */
lpc17_40_putreg(OHCI_RHPORTST_PRSC, LPC17_40_USBHOST_RHPORTST1);
nxsig_usleep(200 * 1000);
nxsched_usleep(200 * 1000);
return OK;
}

6
arch/arm/src/lpc31xx/lpc31_ehci.c
View file

@ -3620,7 +3620,7 @@ static int lpc31_rh_enumerate(struct usbhost_connection_s *conn,
* reset for 50Msec, not wait 50Msec before resetting.
*/
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Paragraph 2.3.9:
*
@ -3723,7 +3723,7 @@ static int lpc31_rh_enumerate(struct usbhost_connection_s *conn,
* 50 ms."
*/
nxsig_usleep(50 * 1000);
nxsched_usleep(50 * 1000);
regval = lpc31_getreg(regaddr);
regval &= ~EHCI_PORTSC_RESET;
@ -3744,7 +3744,7 @@ static int lpc31_rh_enumerate(struct usbhost_connection_s *conn,
*/
while ((lpc31_getreg(regaddr) & EHCI_PORTSC_RESET) != 0);
nxsig_usleep(200 * 1000);
nxsched_usleep(200 * 1000);
/* Paragraph 4.2.2:
*

6
arch/arm/src/lpc43xx/lpc43_ehci.c
View file

@ -3458,7 +3458,7 @@ static int lpc43_rh_enumerate(struct usbhost_connection_s *conn,
* reset for 50Msec, not wait 50Msec before resetting.
*/
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Paragraph 2.3.9:
*
@ -3561,7 +3561,7 @@ static int lpc43_rh_enumerate(struct usbhost_connection_s *conn,
* 50 ms."
*/
nxsig_usleep(50 * 1000);
nxsched_usleep(50 * 1000);
regval = lpc43_getreg(regaddr);
regval &= ~EHCI_PORTSC_RESET;
@ -3582,7 +3582,7 @@ static int lpc43_rh_enumerate(struct usbhost_connection_s *conn,
*/
while ((lpc43_getreg(regaddr) & EHCI_PORTSC_RESET) != 0);
nxsig_usleep(200 * 1000);
nxsched_usleep(200 * 1000);
/* Paragraph 4.2.2:
*

4
arch/arm/src/lpc54xx/lpc54_usb0_ohci.c
View file

@ -2172,7 +2172,7 @@ static int lpc54_rh_enumerate(struct usbhost_connection_s *conn,
/* USB 2.0 spec says at least 50ms delay before port reset */
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Put RH port 1 in reset
* (the LPC546x supports only a single downstream port)
@ -2187,7 +2187,7 @@ static int lpc54_rh_enumerate(struct usbhost_connection_s *conn,
/* Release RH port 1 from reset and wait a bit */
lpc54_putreg(OHCI_RHPORTST_PRSC, LPC54_OHCI_RHPORTST1);
nxsig_usleep(200 * 1000);
nxsched_usleep(200 * 1000);
return OK;
}

6
arch/arm/src/mx8mp/mx8mp_i2c.c
View file

@ -543,9 +543,9 @@ static void mx8mp_i2c_set_frequency(struct mx8mp_i2c_s *priv,
static void mx8mp_i2c_reset_bus(struct mx8mp_i2c_s *priv)
{
mx8mp_i2c_disable(priv);
nxsig_usleep(50);
nxsched_usleep(50);
mx8mp_i2c_enable(priv);
nxsig_usleep(50);
nxsched_usleep(50);
}
/****************************************************************************
@ -679,7 +679,7 @@ error:
break;
}
nxsig_usleep(10);
nxsched_usleep(10);
}
/* Release access to I2C bus */

2
arch/arm/src/nrf53/nrf53_rptun.c
View file

@ -223,7 +223,7 @@ nrf53_rptun_get_resource(struct rptun_dev_s *dev)
while (priv->shmem->base == 0)
{
nxsig_usleep(100);
nxsched_usleep(100);
}
}

2
arch/arm/src/nrf91/nrf91_modem_os.c
View file

@ -389,7 +389,7 @@ int nrf_modem_os_sleep(uint32_t timeout)
{
/* Timeout in ms */
nxsig_usleep(timeout * 1000);
nxsched_usleep(timeout * 1000);
return OK;
}

2
arch/arm/src/nrf91/nrf91_modem_sock.c
View file

@ -685,7 +685,7 @@ static void nrf91_usrsock_poll_work(void *arg)
{
while (g_usrsock.sock[pollfd->fd].recvpending == true)
{
nxsig_usleep(100);
nxsched_usleep(100);
}
}

4
arch/arm/src/rp2040/rp2040_cyw43439.c
View file

@ -166,11 +166,11 @@ static int my_init(gspi_dev_t *gspi)
rp2040_gpio_setdir(rp_io->gpio_data, true);
rp2040_gpio_put(rp_io->gpio_data, false);
nxsig_usleep(50000); /* Leave off for at least 50ms. */
nxsched_usleep(50000); /* Leave off for at least 50ms. */
rp2040_gpio_put(rp_io->gpio_on, true); /* power on */
nxsig_usleep(50000); /* Wait a bit to let the power come up. */
nxsched_usleep(50000); /* Wait a bit to let the power come up. */
/* Don't let anyone else grab a PIO while we are doing so. */

2
arch/arm/src/rp2040/rp2040_ws2812.c
View file

@ -143,7 +143,7 @@ static void update_pixels(struct ws2812_dev_s *dev_data)
if (time_delta < 50)
{
nxsig_usleep(50 - time_delta);
nxsched_usleep(50 - time_delta);
}
rp2040_dmastart(dma_handle, dma_complete, dev_data);

2
arch/arm/src/rp23xx/rp23xx_ws2812.c
View file

@ -143,7 +143,7 @@ static void update_pixels(struct ws2812_dev_s *dev_data)
if (time_delta < 50)
{
nxsig_usleep(50 - time_delta);
nxsched_usleep(50 - time_delta);
}
rp23xx_dmastart(dma_handle, dma_complete, dev_data);

2
arch/arm/src/rtl8720c/ameba_hci.c
View file

@ -330,7 +330,7 @@ static int hci_load_firmware(struct file *filep)
command[1] = 0x20;
command[2] = 0xfc;
buffer_size = header_size + command[3];
nxsig_usleep(10);
nxsched_usleep(10);
ret = hci_send(filep, command, buffer_size);
if (ret != buffer_size)
{

2
arch/arm/src/rtl8720c/amebaz_depend.c
View file

@ -400,7 +400,7 @@ void rtw_yield_os(void)
void rtw_usleep_os(int us)
{
nxsig_usleep(us);
nxsched_usleep(us);
}
void rtw_msleep_os(int ms)

4
arch/arm/src/rtl8720c/amebaz_driver.c
View file

@ -961,7 +961,7 @@ int amebaz_wl_set_mode(struct amebaz_dev_s *priv, struct iwreq *iwr)
while (!rltk_wlan_running(priv->devnum))
{
nxsig_usleep(1000);
nxsched_usleep(1000);
}
ret = amebaz_wl_disable_powersave(0);
@ -1128,7 +1128,7 @@ static int amebaz_wl_on(int mode)
while (!rltk_wlan_running(gp_wlan_dev[i]->devnum))
{
nxsig_usleep(1000);
nxsched_usleep(1000);
}
}

4
arch/arm/src/s32k1xx/s32k1xx_enet.c
View file

@ -1909,7 +1909,7 @@ static inline int s32k1xx_initphy(struct s32k1xx_driver_s *priv,
retries = 0;
do
{
nxsig_usleep(LINK_WAITUS);
nxsched_usleep(LINK_WAITUS);
ninfo("%s: Read PHYID1, retries=%d\n",
BOARD_PHY_NAME, retries + 1);
@ -2040,7 +2040,7 @@ static inline int s32k1xx_initphy(struct s32k1xx_driver_s *priv,
break;
}
nxsig_usleep(LINK_WAITUS);
nxsched_usleep(LINK_WAITUS);
}
if (phydata & MII_MSR_ANEGCOMPLETE)

4
arch/arm/src/s32k3xx/s32k3xx_emac.c
View file

@ -2805,7 +2805,7 @@ static inline int s32k3xx_initphy(struct s32k3xx_driver_s *priv,
retries = 0;
do
{
nxsig_usleep(LINK_WAITUS);
nxsched_usleep(LINK_WAITUS);
ninfo("%s: Read PHYID1, retries=%d\n",
BOARD_PHY_NAME, retries + 1);
@ -2962,7 +2962,7 @@ static inline int s32k3xx_initphy(struct s32k3xx_driver_s *priv,
break;
}
nxsig_usleep(LINK_WAITUS);
nxsched_usleep(LINK_WAITUS);
}
if (phydata & MII_MSR_ANEGCOMPLETE)

2
arch/arm/src/sam34/sam_hsmci.c
View file

@ -1792,7 +1792,7 @@ static int sam_sendcmd(struct sdio_dev_s *dev,
* correct solution.
*/
nxsig_usleep(10);
nxsched_usleep(10);
return OK;
}

2
arch/arm/src/sam34/sam_udp.c
View file

@ -3524,7 +3524,7 @@ static int sam_wakeup(struct usbdev_s *dev)
/* Wait 5msec in case we just entered the resume state */
nxsig_usleep(5 * 1000);
nxsched_usleep(5 * 1000);
/* Set the ESR bit to send the remote resume */

2
arch/arm/src/sama5/sam_classd.c
View file

@ -668,7 +668,7 @@ void classd_enable_audio(struct classd_dev_s *priv, bool pmc_clock_enable)
/* wait for Audio PLL startup time */
nxsig_usleep(100);
nxsched_usleep(100);
#endif
}

6
arch/arm/src/sama5/sam_ehci.c
View file

@ -3394,7 +3394,7 @@ static int sam_rh_enumerate(struct usbhost_connection_s *conn,
* reset for 50Msec, not wait 50Msec before resetting.
*/
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Paragraph 2.3.9:
*
@ -3504,7 +3504,7 @@ static int sam_rh_enumerate(struct usbhost_connection_s *conn,
* 50 ms."
*/
nxsig_usleep(50 * 1000);
nxsched_usleep(50 * 1000);
regval = sam_getreg(regaddr);
regval &= ~EHCI_PORTSC_RESET;
@ -3525,7 +3525,7 @@ static int sam_rh_enumerate(struct usbhost_connection_s *conn,
*/
while ((sam_getreg(regaddr) & EHCI_PORTSC_RESET) != 0);
nxsig_usleep(200 * 1000);
nxsched_usleep(200 * 1000);
/* Paragraph 4.2.2:
*

10
arch/arm/src/sama5/sam_sdmmc.c
View file

@ -1581,7 +1581,7 @@ static void sam_reset(struct sdio_dev_s *dev)
}
timeout_ms--;
nxsig_usleep(100);
nxsched_usleep(100);
}
mcinfo("Reset complete\n");
@ -1967,7 +1967,7 @@ static void sam_clock(struct sdio_dev_s *dev, enum sdio_clock_e rate)
if (wait_microseconds > 0)
{
nxsig_usleep(wait_microseconds);
nxsched_usleep(wait_microseconds);
}
}
@ -2677,7 +2677,7 @@ static int sam_recvshortcrc(struct sdio_dev_s *dev, uint32_t cmd,
/* We need a short delay here to let the SDMMC peripheral respond */
nxsig_usleep(10);
nxsched_usleep(10);
return ret;
}
@ -3326,7 +3326,7 @@ static int sam_set_clock(struct sam_dev_s *priv, uint32_t clock)
}
timeout--;
nxsig_usleep(100);
nxsched_usleep(100);
}
sam_putreg16(priv, 0, SAMA5_SDMMC_SYSCTL_OFFSET);
@ -3436,7 +3436,7 @@ static int sam_set_clock(struct sam_dev_s *priv, uint32_t clock)
}
timeout--;
nxsig_usleep(100);
nxsched_usleep(100);
}
/* High Speed Mode? */

8
arch/arm/src/samd5e5/sam_usb.c
View file

@ -5690,7 +5690,7 @@ static ssize_t sam_out_transfer(struct sam_usbhost_s *priv,
* using the same buffer pointer and length.
*/
nxsig_usleep(20 * 1000);
nxsched_usleep(20 * 1000);
}
else
{
@ -6464,7 +6464,7 @@ static ssize_t sam_in_transfer(struct sam_usbhost_s *priv,
*
* Small delays could require more resolution than is provided
* by the system timer. For example, if the system timer
* resolution is 10MS, then nxsig_usleep(1000) will actually request
* resolution is 10MS, then nxsched_usleep(1000) will actually request
* a delay 20MS (due to both quantization and rounding).
*
* REVISIT: So which is better? To ignore tiny delays and
@ -6474,7 +6474,7 @@ static ssize_t sam_in_transfer(struct sam_usbhost_s *priv,
if (delay > CONFIG_USEC_PER_TICK)
{
nxsig_usleep(delay - CONFIG_USEC_PER_TICK);
nxsched_usleep(delay - CONFIG_USEC_PER_TICK);
}
}
}
@ -6850,7 +6850,7 @@ static int sam_rh_enumerate(struct sam_usbhost_s *priv,
/* USB 2.0 spec says at least 50ms delay before port reset. */
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Reset the host port */

6
arch/arm/src/samv7/sam_serial_spi.c
View file

@ -246,7 +246,7 @@ static inline void serial_flush(struct sam_serial_spi_s *priv)
status = serial_getreg(priv, SAM_UART_SR_OFFSET);
while ((status & UART_INT_TXRDY) == 0)
{
nxsig_usleep(100);
nxsched_usleep(100);
status = serial_getreg(priv, SAM_UART_SR_OFFSET);
}
@ -639,7 +639,7 @@ static void serial_spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
status = serial_getreg(priv, SAM_UART_SR_OFFSET);
while ((status & UART_INT_TXRDY) == 0)
{
nxsig_usleep(100);
nxsched_usleep(100);
status = serial_getreg(priv, SAM_UART_SR_OFFSET);
}
@ -652,7 +652,7 @@ static void serial_spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
status = serial_getreg(priv, SAM_UART_SR_OFFSET);
while ((status & UART_INT_RXRDY) == 0)
{
nxsig_usleep(100);
nxsched_usleep(100);
status = serial_getreg(priv, SAM_UART_SR_OFFSET);
}

2
arch/arm/src/stm32/stm32_dfumode.c
View file

@ -61,7 +61,7 @@ void stm32_dfumode(void)
{
#ifdef CONFIG_DEBUG_WARN
_warn("Entering DFU mode...\n");
nxsig_sleep(1);
nxsched_sleep(1);
#endif
asm("ldr r0, =0x40023844\n\t" /* RCC_APB2ENR */

8
arch/arm/src/stm32/stm32_otgfshost.c
View file

@ -1947,7 +1947,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
* Small delays could require more resolution than is
* provided by the system timer. For example, if the
* system timer resolution is 10MS, then
* nxsig_usleep(1000) will actually request a delay 20MS
* nxsched_usleep(1000) will actually request a delay 20MS
* (due to both quantization and rounding).
*
* REVISIT: So which is better? To ignore tiny delays and
@ -1957,7 +1957,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
if (delay > CONFIG_USEC_PER_TICK)
{
nxsig_usleep(delay - CONFIG_USEC_PER_TICK);
nxsched_usleep(delay - CONFIG_USEC_PER_TICK);
}
}
}
@ -2262,7 +2262,7 @@ static ssize_t stm32_out_transfer(struct stm32_usbhost_s *priv,
* transfer using the same buffer pointer and length.
*/
nxsig_usleep(20 * 1000);
nxsched_usleep(20 * 1000);
}
else
{
@ -3958,7 +3958,7 @@ static int stm32_rh_enumerate(struct stm32_usbhost_s *priv,
* 100ms.
*/
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Reset the host port */

8
arch/arm/src/stm32/stm32_otghshost.c
View file

@ -1948,7 +1948,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
* Small delays could require more resolution than is
* provided by the system timer. For example, if the
* system timer resolution is 10MS, then
* nxsig_usleep(1000) will actually request a delay 20MS
* nxsched_usleep(1000) will actually request a delay 20MS
* (due to both quantization and rounding).
*
* REVISIT: So which is better? To ignore tiny delays and
@ -1958,7 +1958,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
if (delay > CONFIG_USEC_PER_TICK)
{
nxsig_usleep(delay - CONFIG_USEC_PER_TICK);
nxsched_usleep(delay - CONFIG_USEC_PER_TICK);
}
}
}
@ -2263,7 +2263,7 @@ static ssize_t stm32_out_transfer(struct stm32_usbhost_s *priv,
* transfer using the same buffer pointer and length.
*/
nxsig_usleep(20 * 1000);
nxsched_usleep(20 * 1000);
}
else
{
@ -3959,7 +3959,7 @@ static int stm32_rh_enumerate(struct stm32_usbhost_s *priv,
* 100ms.
*/
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Reset the host port */

4
arch/arm/src/stm32f7/stm32_ethernet.c
View file

@ -3195,7 +3195,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
break;
}
nxsig_usleep(100);
nxsched_usleep(100);
}
if (timeout >= PHY_RETRY_TIMEOUT)
@ -3228,7 +3228,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
break;
}
nxsig_usleep(100);
nxsched_usleep(100);
}
if (timeout >= PHY_RETRY_TIMEOUT)

8
arch/arm/src/stm32f7/stm32_otghost.c
View file

@ -1935,7 +1935,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
* Small delays could require more resolution than is
* provided by the system timer. For example, if the
* system timer resolution is 10MS, then
* nxsig_usleep(1000) will actually request a delay 20MS
* nxsched_usleep(1000) will actually request a delay 20MS
* (due to both quantization and rounding).
*
* REVISIT: So which is better? To ignore tiny delays and
@ -1945,7 +1945,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
if (delay > CONFIG_USEC_PER_TICK)
{
nxsig_usleep(delay - CONFIG_USEC_PER_TICK);
nxsched_usleep(delay - CONFIG_USEC_PER_TICK);
}
}
}
@ -2250,7 +2250,7 @@ static ssize_t stm32_out_transfer(struct stm32_usbhost_s *priv,
* transfer using the same buffer pointer and length.
*/
nxsig_usleep(20 * 1000);
nxsched_usleep(20 * 1000);
}
else
{
@ -3934,7 +3934,7 @@ static int stm32_rh_enumerate(struct stm32_usbhost_s *priv,
* 100ms.
*/
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Reset the host port */

4
arch/arm/src/stm32h5/stm32_ethernet.c
View file

@ -3375,7 +3375,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
break;
}
nxsig_usleep(100);
nxsched_usleep(100);
}
if (timeout >= PHY_RETRY_TIMEOUT)
@ -3409,7 +3409,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
break;
}
nxsig_usleep(100);
nxsched_usleep(100);
}
if (timeout >= PHY_RETRY_TIMEOUT)

4
arch/arm/src/stm32h7/stm32_ethernet.c
View file

@ -3338,7 +3338,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
break;
}
nxsig_usleep(100);
nxsched_usleep(100);
}
if (timeout >= PHY_RETRY_TIMEOUT)
@ -3373,7 +3373,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
break;
}
nxsig_usleep(100);
nxsched_usleep(100);
}
if (timeout >= PHY_RETRY_TIMEOUT)

8
arch/arm/src/stm32h7/stm32_otghost.c
View file

@ -1962,7 +1962,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
* Small delays could require more resolution than is
* provided by the system timer. For example, if the
* system timer resolution is 10MS, then
* nxsig_usleep(1000) will actually request a delay 20MS
* nxsched_usleep(1000) will actually request a delay 20MS
* (due to both quantization and rounding).
*
* REVISIT: So which is better? To ignore tiny delays and
@ -1972,7 +1972,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
if (delay > CONFIG_USEC_PER_TICK)
{
nxsig_usleep(delay - CONFIG_USEC_PER_TICK);
nxsched_usleep(delay - CONFIG_USEC_PER_TICK);
}
}
}
@ -2277,7 +2277,7 @@ static ssize_t stm32_out_transfer(struct stm32_usbhost_s *priv,
* transfer using the same buffer pointer and length.
*/
nxsig_usleep(20 * 1000);
nxsched_usleep(20 * 1000);
}
else
{
@ -3960,7 +3960,7 @@ static int stm32_rh_enumerate(struct stm32_usbhost_s *priv,
* 100ms.
*/
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Reset the host port */

2
arch/arm/src/stm32h7/stm32_rptun.c
View file

@ -228,7 +228,7 @@ stm32_rptun_get_resource(struct rptun_dev_s *dev)
while (priv->shmem->base == 0)
{
nxsig_usleep(100);
nxsched_usleep(100);
}
}

6
arch/arm/src/stm32h7/stm32_sdmmc.c
View file

@ -1927,11 +1927,11 @@ static void stm32_reset(struct sdio_dev_s *dev)
regval = getreg32(regaddress);
putreg32(regval | restval, regaddress);
nxsig_usleep(2);
nxsched_usleep(2);
putreg32(regval, regaddress);
stm32_setpwrctrl(priv, STM32_SDMMC_POWER_PWRCTRL_CYCLE);
nxsig_usleep(1000);
nxsched_usleep(1000);
/* Put SDIO registers in their default, reset state */
@ -1960,7 +1960,7 @@ static void stm32_reset(struct sdio_dev_s *dev)
/* Configure the SDIO peripheral */
stm32_setpwrctrl(priv, STM32_SDMMC_POWER_PWRCTRL_OFF);
nxsig_usleep(1000);
nxsched_usleep(1000);
stm32_setpwrctrl(priv, STM32_SDMMC_POWER_PWRCTRL_ON);
stm32_setclkcr(priv, STM32_CLCKCR_INIT);

8
arch/arm/src/stm32l4/stm32l4_otgfshost.c
View file

@ -1951,7 +1951,7 @@ static ssize_t stm32l4_in_transfer(struct stm32l4_usbhost_s *priv,
* Small delays could require more resolution than is
* provided by the system timer. For example, if the
* system timer resolution is 10MS, then
* nxsig_usleep(1000) will actually request a delay 20MS
* nxsched_usleep(1000) will actually request a delay 20MS
* (due to both quantization and rounding).
*
* REVISIT: So which is better? To ignore tiny delays and
@ -1961,7 +1961,7 @@ static ssize_t stm32l4_in_transfer(struct stm32l4_usbhost_s *priv,
if (delay > CONFIG_USEC_PER_TICK)
{
nxsig_usleep(delay - CONFIG_USEC_PER_TICK);
nxsched_usleep(delay - CONFIG_USEC_PER_TICK);
}
}
}
@ -2267,7 +2267,7 @@ static ssize_t stm32l4_out_transfer(struct stm32l4_usbhost_s *priv,
* transfer using the same buffer pointer and length.
*/
nxsig_usleep(20 * 1000);
nxsched_usleep(20 * 1000);
}
else
{
@ -3961,7 +3961,7 @@ static int stm32l4_rh_enumerate(struct stm32l4_usbhost_s *priv,
* 100ms.
*/
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Reset the host port */

2
arch/arm/src/tiva/common/tiva_adclow.c
View file

@ -603,7 +603,7 @@ static int tiva_adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg)
tiva_adc_proc_trig(priv->devno, (uint8_t)SSE_PROC_TRIG(sse));
while (!tiva_adc_sse_int_status(priv->devno, sse))
{
nxsig_usleep(100);
nxsched_usleep(100);
}
tiva_adc_sse_clear_int(priv->devno, sse);

10
arch/arm64/src/imx9/imx9_enet.c
View file

@ -2172,7 +2172,7 @@ static int imx9_determine_phy(struct imx9_driver_s *priv)
retries = 0;
do
{
nxsig_usleep(100);
nxsched_usleep(100);
phydata = 0xffff;
ret = imx9_readmii(priv, MII_PHYID1, &phydata);
ninfo("phy %s addr %d received PHYID1 %x\n",
@ -2186,7 +2186,7 @@ static int imx9_determine_phy(struct imx9_driver_s *priv)
{
do
{
nxsig_usleep(100);
nxsched_usleep(100);
phydata = 0xffff;
ret = imx9_readmii(priv, MII_PHYID2, &phydata);
ninfo("phy %s addr %d received PHYID2 %x\n",
@ -2448,7 +2448,7 @@ int imx9_reset_phy(struct imx9_driver_s *priv)
ret = -ETIMEDOUT;
for (timeout = 0; timeout < PHY_RESET_WAIT_COUNT; timeout++)
{
nxsig_usleep(100);
nxsched_usleep(100);
result = imx9_readmii(priv, MII_MCR, &mcr);
if (result < 0)
{
@ -2670,7 +2670,7 @@ static int imx9_phy_wait_autoneg_complete(struct imx9_driver_s *priv)
break;
}
nxsig_usleep(LINK_WAITUS);
nxsched_usleep(LINK_WAITUS);
}
if (timeout == LINK_NLOOPS)
@ -2821,7 +2821,7 @@ static inline int imx9_initphy(struct imx9_driver_s *priv, bool renogphy)
retries = 0;
do
{
nxsig_usleep(LINK_WAITUS);
nxsched_usleep(LINK_WAITUS);
ninfo("%s: Read PHYID1, retries=%d\n", phy_name, retries + 1);

10
arch/renesas/src/rx65n/rx65n_usbhost.c
View file

@ -3921,7 +3921,7 @@ static uint16_t usb_cstd_is_set_frdy(uint16_t pipe, uint16_t fifosel,
buffer = hw_usb_read_syscfg();
buffer = hw_usb_read_syssts();
nxsig_usleep(1);
nxsched_usleep(1);
}
return RX65N_USB_FIFO_ERROR;
@ -6287,7 +6287,7 @@ static void rx65n_usbhost_bottomhalf(void *arg)
else
{
nxsig_usleep(100);
nxsched_usleep(100);
uwarn("WARNING: un known bottomhalf. Value is %d\n",
bottom_half_processing);
syslog(LOG_INFO, "WARNING: un known bottomhalf. Value is %d\n",
@ -6445,13 +6445,13 @@ static int rx65n_usbhost_rh_enumerate(struct usbhost_connection_s *conn,
/* USB 2.0 spec says at least 50ms delay before port reset */
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* Put RH port 1 in reset.
* Currently supporting only single downstream port)
*/
nxsig_usleep(200 * 1000);
nxsched_usleep(200 * 1000);
return OK;
}
@ -8139,7 +8139,7 @@ static void rx65n_usbhost_disconnect(struct usbhost_driver_s *drvr,
*
*/
nxsig_usleep(100000);
nxsched_usleep(100000);
}
for (i = 0; i < CONFIG_RX65N_USBHOST_NEDS; i++)

8
arch/risc-v/src/bl602/bl602_netdev.c
View file

@ -804,9 +804,9 @@ static int bl602_net_soft_reset(void)
int idx;
wifi_mgmr_sta_disconnect();
nxsig_sleep(1);
nxsched_sleep(1);
wifi_mgmr_api_ap_stop();
nxsig_sleep(1);
nxsched_sleep(1);
wifi_mgmr_api_idle();
wifi_mgmr_reset();
@ -1302,7 +1302,7 @@ static int bl602_ioctl_wifi_stop(struct bl602_net_driver_s *priv,
}
wifi_mgmr_sta_disconnect();
nxsig_sleep(1);
nxsched_sleep(1);
wifi_mgmr_api_idle();
}
else if (priv->current_mode == IW_MODE_MASTER)
@ -1313,7 +1313,7 @@ static int bl602_ioctl_wifi_stop(struct bl602_net_driver_s *priv,
}
wifi_mgmr_api_ap_stop();
nxsig_sleep(1);
nxsched_sleep(1);
wifi_mgmr_api_idle();
}

8
arch/risc-v/src/bl602/bl602_os_hal.c
View file

@ -518,7 +518,9 @@ int bl_os_msleep(long msec)
{
useconds_t usec = msec * 1000;
return nxsig_usleep(usec);
nxsched_usleep(usec);
return 0;
}
/****************************************************************************
@ -534,7 +536,9 @@ int bl_os_msleep(long msec)
int bl_os_sleep(unsigned int seconds)
{
return nxsig_sleep(seconds);
nxsched_sleep(seconds);
return 0;
}
/****************************************************************************

4
arch/risc-v/src/common/espressif/esp_i2c_slave.c
View file

@ -718,14 +718,14 @@ static int esp_i2c_slave_thread(int argc, char **argv)
(struct esp_i2c_priv_s *)((uintptr_t)strtoul(argv[1], NULL, 16));
int ret;
nxsig_usleep(1000);
nxsched_usleep(1000);
while (true)
{
esp_i2c_slave_polling_waitdone(priv);
/* Sleeping thread before checking i2c peripheral */
nxsig_usleep(100);
nxsched_usleep(100);
}
return OK;

2
arch/risc-v/src/common/espressif/esp_temperature_sensor.c
View file

@ -683,7 +683,7 @@ static int esp_temperature_sensor_thread(int argc, char **argv)
/* Sleeping thread before fetching the next sensor data */
nxsig_usleep(priv->interval);
nxsched_usleep(priv->interval);
}
return OK;

2
arch/risc-v/src/common/espressif/esp_wlan_netdev.c
View file

@ -448,7 +448,7 @@ static int esp_wlan_connect(struct netdev_lowerhalf_s *dev)
break;
}
nxsig_usleep(timeout);
nxsched_usleep(timeout);
timeout_count--;
}

2
arch/risc-v/src/esp32c3-legacy/esp32c3_ble_adapter.c
View file

@ -2209,7 +2209,7 @@ int esp32c3_bt_controller_disable(void)
while (!btdm_power_state_active())
{
nxsig_usleep(1000); /* wait */
nxsched_usleep(1000); /* wait */
}
btdm_controller_disable();

2
arch/risc-v/src/esp32c3-legacy/esp32c3_twai.c
View file

@ -1220,7 +1220,7 @@ struct can_dev_s *esp32c3_twaiinitialize(int port)
modifyreg32(SYSTEM_PERIP_RST_EN0_REG, 0, SYSTEM_TWAI_RST_M);
modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, SYSTEM_TWAI_CLK_EN_M, 0);
nxsig_usleep(1);
nxsched_usleep(1);
modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, 0, SYSTEM_TWAI_CLK_EN_M);
modifyreg32(SYSTEM_PERIP_RST_EN0_REG, SYSTEM_TWAI_RST_M, 0);

4
arch/risc-v/src/esp32c3-legacy/esp32c3_wifi_adapter.c
View file

@ -2053,7 +2053,7 @@ static void esp_task_delay(uint32_t tick)
{
useconds_t us = TICK2USEC(tick);
nxsig_usleep(us);
nxsched_usleep(us);
}
/****************************************************************************
@ -6929,6 +6929,6 @@ void esp_wifi_stop_callback(void)
}
else
{
nxsig_sleep(1);
nxsched_sleep(1);
}
}

2
arch/risc-v/src/esp32c3/esp_ble_adapter.c
View file

@ -3405,7 +3405,7 @@ int esp_bt_controller_disable(void)
async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_DISA);
while (!btdm_power_state_active())
{
nxsig_usleep(1000); /* wait */
nxsched_usleep(1000); /* wait */
}
btdm_controller_disable();

2
arch/risc-v/src/esp32c3/esp_wifi_adapter.c
View file

@ -2694,7 +2694,7 @@ static void task_delay_wrapper(uint32_t tick)
{
useconds_t us = TICK2USEC(tick);
nxsig_usleep(us);
nxsched_usleep(us);
}
/****************************************************************************

2
arch/risc-v/src/esp32c6/esp_wifi_adapter.c
View file

@ -2682,7 +2682,7 @@ static void task_delay_wrapper(uint32_t tick)
{
useconds_t us = TICK2USEC(tick);
nxsig_usleep(us);
nxsched_usleep(us);
}
/****************************************************************************

2
arch/risc-v/src/k230/k230_rptun.c
View file

@ -226,7 +226,7 @@ static struct rptun_rsc_s *rp_get_resource(struct rptun_dev_s *dev)
rpinfo("wait for shmem %p...\n", priv->shmem);
while (priv->shmem->base == 0)
{
nxsig_usleep(100);
nxsched_usleep(100);
}
rpinfo("shmem:%lx, dev:%p\n", priv->shmem->base, dev);

6
arch/risc-v/src/litex/litex_emac.c
View file

@ -776,7 +776,7 @@ static int litex_linkup(struct litex_emac_s *priv)
for (i = 0; i < LITEX_WAITLINKTIMEOUT; ++i)
{
nxsig_usleep(1000);
nxsched_usleep(1000);
ret = litex_phyread(priv, priv->phyaddr, MII_MSR, &msr);
if (ret < 0)
@ -1292,9 +1292,9 @@ static int litex_phyinit(struct litex_emac_s *priv)
ninfo("%s: PHY RESET\n", BOARD_PHY_NAME);
putreg32(1, LITEX_ETHPHY_CRG_RESET);
nxsig_usleep(LITEX_PHY_RESETTIMEOUT);
nxsched_usleep(LITEX_PHY_RESETTIMEOUT);
putreg32(0, LITEX_ETHPHY_CRG_RESET);
nxsig_usleep(LITEX_PHY_RESETTIMEOUT);
nxsched_usleep(LITEX_PHY_RESETTIMEOUT);
/* Check the PHY responds at configured address */

2
arch/risc-v/src/litex/litex_sdio.c
View file

@ -955,7 +955,7 @@ static int litex_waitresponse(struct sdio_dev_s *dev, uint32_t cmd)
if (ev & LITEX_EV_CMDDONE)
break;
nxsig_usleep(10);
nxsched_usleep(10);
}
if (ev & LITEX_EV_WRERROR)

10
arch/risc-v/src/mpfs/mpfs_coremmc.c
View file

@ -1039,19 +1039,19 @@ static bool mpfs_device_reset(struct sdio_dev_s *dev)
modifyreg32(MPFS_SYSREG_SUBBLK_CLOCK_CR, 0, SYSREG_SUBBLK_CLOCK_CR_FIC0);
nxsig_usleep(100);
nxsched_usleep(100);
/* Perform module and slave reset */
mpfs_modifyreg8(MPFS_COREMMC_CTRL, 0, COREMMC_CTRL_SLRST |
COREMMC_CTRL_SWRST);
nxsig_usleep(100);
nxsched_usleep(100);
mpfs_modifyreg8(MPFS_COREMMC_CTRL, COREMMC_CTRL_SLRST | COREMMC_CTRL_SWRST,
0);
nxsig_usleep(100);
nxsched_usleep(100);
/* Clear interrupt status and disable interrupts */
@ -1067,7 +1067,7 @@ static bool mpfs_device_reset(struct sdio_dev_s *dev)
mpfs_setclkrate(priv, MPFS_MMC_CLOCK_400KHZ);
nxsig_usleep(100);
nxsched_usleep(100);
/* Store fifo size for later to check no fifo overruns occur */
@ -1351,7 +1351,7 @@ static void mpfs_clock(struct sdio_dev_s *dev, enum sdio_clock_e rate)
{
/* Need to settle a bit before issuing this CMD6 after clk change */
nxsig_usleep(100);
nxsched_usleep(100);
mpfs_set_4bit_mode(dev);
}

2
arch/risc-v/src/mpfs/mpfs_dsn.c
View file

@ -99,7 +99,7 @@ int mpfs_read_dsn(uint8_t *dsn, size_t len)
while ((getreg32(SERVICES_SR) & SCBCTRL_SERVICESSR_BUSY) && --retries > 0)
{
spin_unlock_irqrestore(&g_dsn_lock, flags);
nxsig_usleep(1000);
nxsched_usleep(1000);
flags = spin_lock_irqsave(&g_dsn_lock);
}

8
arch/risc-v/src/mpfs/mpfs_emmcsd.c
View file

@ -1298,7 +1298,7 @@ static void mpfs_set_sdhost_power(struct mpfs_dev_s *priv, uint32_t voltage)
DEBUGPANIC();
}
nxsig_usleep(1000);
nxsched_usleep(1000);
}
/****************************************************************************
@ -1483,13 +1483,13 @@ static bool mpfs_device_reset(struct sdio_dev_s *dev)
modifyreg32(MPFS_SYSREG_SOFT_RESET_CR,
SYSREG_SOFT_RESET_CR_MMC, 0);
nxsig_sleep(1);
nxsched_sleep(1);
/* Perform module-level reset */
modifyreg32(MPFS_EMMCSD_HRS00, 0, MPFS_EMMCSD_HRS00_SWR);
nxsig_usleep(1000);
nxsched_usleep(1000);
do
{
@ -1637,7 +1637,7 @@ static bool mpfs_device_reset(struct sdio_dev_s *dev)
mpfs_setclkrate(priv, MPFS_MMC_CLOCK_400KHZ);
}
nxsig_usleep(1000);
nxsched_usleep(1000);
/* Reset data */

2
arch/risc-v/src/mpfs/mpfs_i2c.c
View file

@ -813,7 +813,7 @@ static int mpfs_i2c_force_idle(struct mpfs_i2c_priv_s *priv)
/* Wait for a while for the command to go through */
nxsig_usleep(1000);
nxsched_usleep(1000);
}
while (retries--);

2
arch/risc-v/src/mpfs/mpfs_usb.c
View file

@ -3805,7 +3805,7 @@ static void mpfs_hw_shutdown(struct mpfs_usbdev_s *priv)
/* Force disconnect and give some time to finish it up */
mpfs_modifyreg8(MPFS_USB_POWER, POWER_REG_SOFT_CONN_MASK, 0);
nxsig_usleep(1000);
nxsched_usleep(1000);
/* Disable all interrupts */

2
arch/risc-v/src/qemu-rv/qemu_rv_rptun.c
View file

@ -253,7 +253,7 @@ static struct rptun_rsc_s *rp_get_resource(struct rptun_dev_s *dev)
while (priv->shmem->base == 0)
{
nxsig_usleep(100);
nxsched_usleep(100);
}
}

2
arch/risc-v/src/rp23xx-rv/rp23xx_ws2812.c
View file

@ -143,7 +143,7 @@ static void update_pixels(struct ws2812_dev_s *dev_data)
if (time_delta < 50)
{
nxsig_usleep(50 - time_delta);
nxsched_usleep(50 - time_delta);
}
rp23xx_dmastart(dma_handle, dma_complete, dev_data);

4
arch/xtensa/src/common/espressif/esp_i2c_slave.c
View file

@ -778,14 +778,14 @@ static int esp_i2c_slave_thread(int argc, char **argv)
(struct esp_i2c_priv_s *)((uintptr_t)strtoul(argv[1], NULL, 16));
int ret;
nxsig_usleep(1000);
nxsched_usleep(1000);
while (true)
{
esp_i2c_slave_polling_waitdone(priv);
/* Sleeping thread before checking i2c peripheral */
nxsig_usleep(100);
nxsched_usleep(100);
}
return OK;

2
arch/xtensa/src/common/espressif/esp_temperature_sensor.c
View file

@ -682,7 +682,7 @@ static int esp_temperature_sensor_thread(int argc, char **argv)
/* Sleeping thread before fetching the next sensor data */
nxsig_usleep(priv->interval);
nxsched_usleep(priv->interval);
}
return OK;

2
arch/xtensa/src/common/espressif/esp_wlan_netdev.c
View file

@ -448,7 +448,7 @@ static int esp_wlan_connect(struct netdev_lowerhalf_s *dev)
break;
}
nxsig_usleep(timeout);
nxsched_usleep(timeout);
timeout_count--;
}

2
arch/xtensa/src/esp32/esp32_ble_adapter.c
View file

@ -3237,7 +3237,7 @@ int esp32_bt_controller_disable(void)
async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA);
while (btdm_power_state_active() == false)
{
nxsig_usleep(1000);
nxsched_usleep(1000);
}
}

2
arch/xtensa/src/esp32/esp32_spiflash.c
View file

@ -683,7 +683,7 @@ static inline void IRAM_ATTR esp32_spiflash_oposyield(void)
/* Delay 1 tick */
useconds_t us = TICK2USEC(1);
nxsig_usleep(us);
nxsched_usleep(us);
}
/****************************************************************************

2
arch/xtensa/src/esp32/esp32_wifi_adapter.c
View file

@ -1639,7 +1639,7 @@ static void esp_task_delay(uint32_t tick)
{
useconds_t us = TICK2USEC(tick);
nxsig_usleep(us);
nxsched_usleep(us);
}
/****************************************************************************

2
arch/xtensa/src/esp32s2/esp32s2_wifi_adapter.c
View file

@ -1574,7 +1574,7 @@ static void esp_task_delay(uint32_t tick)
{
useconds_t us = TICK2USEC(tick);
nxsig_usleep(us);
nxsched_usleep(us);
}
/****************************************************************************

2
arch/xtensa/src/esp32s3/esp32s3_ble_adapter.c
View file

@ -3576,7 +3576,7 @@ int esp32s3_bt_controller_disable(void)
async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_DISA);
while (!btdm_power_state_active())
{
nxsig_usleep(1000); /* wait */
nxsched_usleep(1000); /* wait */
}
btdm_controller_disable();

2
arch/xtensa/src/esp32s3/esp32s3_spiflash.c
View file

@ -867,7 +867,7 @@ static inline void IRAM_ATTR spiflash_os_yield(void)
/* Delay 1 tick */
useconds_t us = TICK2USEC(1);
nxsig_usleep(us);
nxsched_usleep(us);
}
#endif /* CONFIG_ESP32S3_SPI_FLASH_DONT_USE_ROM_CODE */

2
arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c
View file

@ -1637,7 +1637,7 @@ static void esp_task_delay(uint32_t tick)
{
useconds_t us = TICK2USEC(tick);
nxsig_usleep(us);
nxsched_usleep(us);
}
/****************************************************************************

4
boards/arm/cxd56xx/common/src/cxd56_audio.c
View file

@ -292,13 +292,13 @@ int board_external_amp_mute_control(bool en)
/* Mute ON */
ret = board_power_control(POWER_AUDIO_MUTE, false);
nxsig_usleep(MUTE_ON_DELAY);
nxsched_usleep(MUTE_ON_DELAY);
}
else
{
/* Mute OFF */
nxsig_usleep(MUTE_OFF_DELAY);
nxsched_usleep(MUTE_OFF_DELAY);
ret = board_power_control(POWER_AUDIO_MUTE, true);
}

4
boards/arm/cxd56xx/common/src/cxd56_bcm20706.c
View file

@ -119,9 +119,9 @@ int board_bluetooth_uart_pin_cfg(void)
void board_bluetooth_reset(void)
{
cxd56_gpio_write(BCM20707_RST_N, false);
nxsig_usleep(BCM20707_RST_DELAY);
nxsched_usleep(BCM20707_RST_DELAY);
cxd56_gpio_write(BCM20707_RST_N, true);
nxsig_usleep(BCM20707_RST_DELAY);
nxsched_usleep(BCM20707_RST_DELAY);
}
/****************************************************************************

2
boards/arm/cxd56xx/common/src/cxd56_emmcdev.c
View file

@ -78,7 +78,7 @@ int board_emmc_initialize(void)
{
/* Wait time until eMMC device is turned power on */
nxsig_usleep(EMMC_POWER_ON_WAIT_MSEC * USEC_PER_MSEC);
nxsched_usleep(EMMC_POWER_ON_WAIT_MSEC * USEC_PER_MSEC);
}
/* Initialize the eMMC device */

12
boards/arm/cxd56xx/common/src/cxd56_isx012.c
View file

@ -91,7 +91,7 @@ int board_isx012_power_on(void)
{
/* Need to wait for a while after power-on */
nxsig_usleep(POWER_CHECK_TIME);
nxsched_usleep(POWER_CHECK_TIME);
if (true == board_power_monitor(POWER_IMAGE_SENSOR))
{
@ -117,7 +117,7 @@ int board_isx012_power_off(void)
/* Need to wait for power-off to be reflected */
nxsig_usleep(POWER_OFF_TIME);
nxsched_usleep(POWER_OFF_TIME);
ret = -ETIMEDOUT;
for (i = 0; i < POWER_CHECK_RETRY; i++)
@ -128,7 +128,7 @@ int board_isx012_power_off(void)
break;
}
nxsig_usleep(POWER_CHECK_TIME);
nxsched_usleep(POWER_CHECK_TIME);
}
return ret;
@ -151,20 +151,20 @@ void board_isx012_set_sleep(int kind)
{
/* PowerON -> sleep */
nxsig_usleep(DEVICE_STARTUP_TIME);
nxsched_usleep(DEVICE_STARTUP_TIME);
}
else
{
/* active -> sleep */
nxsig_usleep(STANDBY_TIME);
nxsched_usleep(STANDBY_TIME);
}
}
void board_isx012_release_sleep(void)
{
cxd56_gpio_write(IMAGER_SLEEP, true);
nxsig_usleep(SLEEP_CANCEL_TIME);
nxsched_usleep(SLEEP_CANCEL_TIME);
}
int isx012_register(struct i2c_master_s *i2c);

8
boards/arm/cxd56xx/common/src/cxd56_isx019.c
View file

@ -86,7 +86,7 @@ int board_isx019_power_on(void)
{
/* Need to wait for a while after power-on */
nxsig_usleep(POWER_CHECK_TIME);
nxsched_usleep(POWER_CHECK_TIME);
if (board_power_monitor(POWER_IMAGE_SENSOR))
{
@ -112,7 +112,7 @@ int board_isx019_power_off(void)
/* Need to wait for power-off to be reflected */
nxsig_usleep(POWER_OFF_TIME);
nxsched_usleep(POWER_OFF_TIME);
ret = -ETIMEDOUT;
for (i = 0; i < POWER_CHECK_RETRY; i++)
@ -123,7 +123,7 @@ int board_isx019_power_off(void)
break;
}
nxsig_usleep(POWER_CHECK_TIME);
nxsched_usleep(POWER_CHECK_TIME);
}
return ret;
@ -153,7 +153,7 @@ struct i2c_master_s *board_isx019_initialize(void)
{
/* ISX019 requires stable RTC */
nxsig_usleep(100 * USEC_PER_MSEC);
nxsched_usleep(100 * USEC_PER_MSEC);
}
cxd56_gpio_config(IMAGER_RST, false);

2
boards/arm/cxd56xx/drivers/audio/cxd56_audio_analog.c
View file

@ -81,7 +81,7 @@ static void wait_mic_boot_finish(void)
if (time < CXD56_AUDIO_MIC_BOOT_WAIT)
{
nxsig_usleep((CXD56_AUDIO_MIC_BOOT_WAIT - time) * 1000);
nxsched_usleep((CXD56_AUDIO_MIC_BOOT_WAIT - time) * 1000);
}
}
}

4
boards/arm/cxd56xx/drivers/audio/cxd56_audio_volume.c
View file

@ -115,7 +115,7 @@ static CXD56_AUDIO_ECODE set_mute(cxd56_audio_volid_t id,
if (wait)
{
nxsig_usleep(waittime);
nxsched_usleep(waittime);
}
g_volparam[id].mute_bit |= type;
@ -181,7 +181,7 @@ static CXD56_AUDIO_ECODE set_unmute(cxd56_audio_volid_t id,
if (wait)
{
nxsig_usleep(waittime);
nxsched_usleep(waittime);
}
}

2
boards/arm/cxd56xx/drivers/sensors/cxd5610_gnss.c
View file

@ -1633,7 +1633,7 @@ static int cxd5610_gnss_finalize(struct cxd5610_gnss_dev_s *priv)
/* Finalize CXD5610 device */
cxd5610_gnss_core_finalize(priv);
nxsig_sleep(1);
nxsched_sleep(1);
/* Terminate thread */

4
boards/arm/cxd56xx/spresense/src/cxd56_power.c
View file

@ -236,7 +236,7 @@ int board_power_control(int target, bool en)
if (!g_rtc_enabled && (PMIC_GET_TYPE(target) == PMIC_TYPE_GPO))
{
nxsig_usleep(1);
nxsched_usleep(1);
}
}
@ -274,7 +274,7 @@ int board_power_control_tristate(int target, int value)
if (!g_rtc_enabled)
{
nxsig_usleep(1);
nxsched_usleep(1);
}
}
else if (PMIC_GET_TYPE(target) == CHIP_TYPE_GPIO)

4
boards/arm/lc823450/lc823450-xgevk/src/lc823450_bt.c
View file

@ -56,9 +56,9 @@ void up_bt_enable(int enable)
if (enable)
{
lc823450_gpio_write(BT_POWER, 0);
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
lc823450_gpio_write(BT_POWER, 1);
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
}
else
{

6
boards/arm/lpc17xx_40xx/u-blox-c027/src/lpc17_40_ubxmdm.c
View file

@ -268,7 +268,7 @@ static int lpc17_40_poweron(struct ubxmdm_lower * lower)
/* Min. time for power_on_n being low is 5 ms */
nxsig_usleep(10 * 1000);
nxsched_usleep(10 * 1000);
if (priv->usb_used)
{
@ -287,7 +287,7 @@ static int lpc17_40_poweron(struct ubxmdm_lower * lower)
/* Delay to obtain correct voltage on shifters */
nxsig_usleep(1 * 1000);
nxsched_usleep(1 * 1000);
/* UART shifter enabled */
@ -339,7 +339,7 @@ static int lpc17_40_reset(struct ubxmdm_lower * lower)
/* The minimum reset_n low time is 50 ms */
nxsig_usleep(75 * 1000);
nxsched_usleep(75 * 1000);
/* Modem not in reset */

2
boards/arm/nrf52/nrf52840-dk/src/nrf52_highpri.c
View file

@ -257,7 +257,7 @@ int highpri_main(int argc, char *argv[])
/* Flush stdout and wait a bit */
fflush(stdout);
nxsig_sleep(1);
nxsched_sleep(1);
seconds++;
/* Sample counts so that they are not volatile. Missing a count now

4
boards/arm/nrf52/nrf52840-dk/src/nrf52_sx127x.c
View file

@ -110,7 +110,7 @@ static void sx127x_chip_reset(void)
/* Wait 1 ms */
nxsig_usleep(1000);
nxsched_usleep(1000);
/* Configure reset as input */
@ -118,7 +118,7 @@ static void sx127x_chip_reset(void)
/* Wait 10 ms */
nxsig_usleep(10000);
nxsched_usleep(10000);
}
/****************************************************************************

2
boards/arm/s32k3xx/mr-canhubk3/src/s32k3xx_tja1153.c
View file

@ -310,7 +310,7 @@ int s32k3xx_tja1153_initialize(int bus)
/* Sleep for 100 ms to ensure that CAN frames have been transmitted */
nxsig_usleep(100 * 1000);
nxsched_usleep(100 * 1000);
/* TJA1153 must be taken out of STB mode */

4
boards/arm/sam34/sam4s-xplained-pro/src/sam_wdt.c
View file

@ -105,10 +105,10 @@ static int wdog_daemon(int argc, char *argv[])
goto errout_with_dev;
}
nxsig_usleep(200);
nxsched_usleep(200);
while (1)
{
nxsig_usleep((CONFIG_WDT_THREAD_INTERVAL)*1000);
nxsched_usleep((CONFIG_WDT_THREAD_INTERVAL)*1000);
wdinfo("ping\n");
ret = file_ioctl(&filestruct, WDIOC_KEEPALIVE, 0);

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