Commit graph

951 commits

Author SHA1 Message Date
Vlad Pruteanu
ad168fdf2d arch/xtensa/esp32: Add support for hardware accelerated PBKDF2
This adds support for the PBKDF2 algorithm in the ESP32 crypto
driver. Here, it will take advantage of the hardware-accelerated
implementation of SHA.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2026-04-10 20:32:46 +08:00
Eren Terzioglu
44ffb7521b arch/xtensa/esp32: Fix IRAM heap boot issue
Fix IRAM heap boot issue for esp32

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-04-09 20:14:44 +08:00
Piyush Patle
13d0e64ee6 style: fix checkpatch issues after debug.h move
Fixed copespell errors, for CI sucess!

Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
2026-04-07 07:50:06 -03:00
Piyush Patle
0dccc8ba21 include/debug.h: Move to include/nuttx/debug.h
debug.h is a NuttX-specific, non-POSIX header. Placing it in the
top-level include/ directory creates naming conflicts with external
projects that define their own debug.h.
This commit moves the canonical header to include/nuttx/debug.h,
following the NuttX convention for non-POSIX/non-standard headers,
and updates all in-tree references.

A backward-compatibility shim is left at include/debug.h that
emits a deprecation #warning and re-includes <nuttx/debug.h>,
allowing out-of-tree code to continue building while migrating.

Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
2026-04-07 07:50:06 -03:00
Tiago Medicci Serrano
c17e16eaed xtensa/espressif: Update common-source integration for Xtensa devices
This commit updates the common-source integration for Xtensa-based
Espressif devices (ESP32, ESP32-S2, and ESP32-S3). This is part of a larger
common-source update split by architecture for better maintainability.

Major components updated:
- IRQ allocator refactoring with intr_alloc integration
- Common-source drivers (GPIO, RMT, I2C, SPI, UART, etc.)
- Espressif components upgrade to release/master.b-test
- Peripheral drivers (ADC, PWM, LEDC, MCPWM, PCNT, Temperature Sensor, etc.)
- Wireless adapters (Wi-Fi and BLE)
- esp_timer migration to the common-source path for Xtensa devices
- Common-source power management implementation (auto-sleep and wakeup paths)
- Board defconfigs for all Xtensa Espressif boards
- SMP support improvements for ESP32-S3
- Critical section handling improvements

Key architectural changes:
- IRQ Allocator: The new interrupt allocator enables multiple mapping
  options from interrupt sources to CPU interrupts, providing flexibility
  required by modern peripherals. Although this introduces breaking changes
  to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE
  Kconfig option is explicitly checked during startup to ensure proper
  configuration. This validation prevents runtime issues from configuration
  mismatches.
- Xtensa-specific interrupt handling via esp_xtensa_intr.c providing
  NuttX-native implementations of xt_ints_on/off and interrupt handlers,
  avoiding conflicts with NuttX's core Xtensa macros.
- Timer/RTC unification: ESP32/ESP32-S2/ESP32-S3 move from chip-specific
  RTC/RT-timer code to common-source Espressif integration, including
  esp_timer_adapter/esp_rtc paths and the required bringup/defconfig updates.
- Power management consolidation: Xtensa PM follows the common-source
  implementation, including common-source auto-sleep behavior, UART/Wi-Fi
  wakeup coordination, and tickless-safe sleep flow compatibility.

Note: This is a large commit to maintain bisectability. Breaking the
changes into smaller commits would result in non-building intermediate
states across the common-source infrastructure update.

Tested configurations:
- All defconfigs were tested, including `ostest`.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2026-03-29 00:33:11 +08:00
Huang Qi
e3eeaefd6d style: Fix "the the" typo across the codebase.
Fix 269 occurrences of duplicate "the" word typo found in 209 files
across source code, header files, and configuration.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2026-03-23 11:07:49 +01:00
Chip L.
6cb6c45987 arch/xtensa/esp32: Fix buffer overflow in SPI poll exchange
The esp32_spi_poll_exchange() function previously used a hardcoded
length of sizeof(uint32_t) (4 bytes) for memcpy() operations and
pointer increments, disregarding the actual remaining transfer_size.

When an SPI transaction involved a data length not aligned to 4 bytes
(such as a 1-byte payload commonly used in sub-GHz radio drivers),
the driver forced a 4-byte memory transfer. This caused out-of-bounds
reads and writes, leading to stack smashing and fatal CPU exceptions
(e.g., EXCCAUSE=0000).

This patch resolves the memory corruption vulnerability by:
1. Calculating a precise `chunk` size for each iteration, strictly
   bounded by the remaining `transfer_size`.
2. Limiting the memcpy() operations and the subsequent pointer
   increments (tp and rp) to this exact chunk size.
3. Zero-initializing the temporary TX register (w_wd) before copying
   to clear padding and prevent reading uninitialized memory.
4. Adding a NULL check for the receive pointer (rp) prior to the
   memcpy operation to prevent unintended memory writes.

Signed-off-by: Chip L. <chplee@gmail.com>
2026-02-27 08:10:46 -03:00
Vlad Pruteanu
4775f5ba21 xtensa/esp32: Fix HMAC-SHA when a long key is used
When using a key that is longer than the block size of the hashing
algorithm used, the key must be hashed before it is used.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2026-02-24 08:32:19 -03:00
Filipe Cavalcanti
293d33f5dd arch/xtensa/esp32: select I2C_DRIVER on I2C
Automatically select I2C_DRIVER when ESP32_I2C is selected.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-02-20 14:56:54 +01:00
zhanghongyu
a7567677a8 netdev_driver: add carrier_on to xxx_ifup where carrier_on is absent
since the judgment for network card selection was changed from IS_UP to
IS_RUNNING, drivers that lack carrier_on need to add the carrier_on
operation; otherwise, network access issues will occur.

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2026-02-02 13:23:05 +08:00
wangchengdong
15f6e399b8 nuttx/arch: merge tickless and tick process
merge nxsched_timer_expiration() into nxsched_process_timer()
    to improve code efficient

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2026-01-12 16:20:42 +08:00
simbit18
bfa7025c28 arch/xtensa: Fix Kconfig style
- Replace help => ---help---

- Remove TAB

- Add comments

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-01-06 06:35:08 +08:00
anjiahao
0a2b01950c sched:use tcb_s inside of task_tcb_s , remove all cast
Simplify the code and remove different tcb

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2025-12-22 17:55:45 +08:00
Alan Carvalho de Assis
30a7420349 boards/esp32: Add initial support to heltec_wifi_lora32
This commit adds basic/initial support to Heltec WiFi LoRa32 board.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-12-21 15:18:08 -03:00
Alan Carvalho de Assis
3bf8b55d64 arch/xtensa/esp32: Add CONFIG_ESP32_IGNORE_CHIP_REVISION_CHECK
This commit add the option that was missing in the esp32_start.c
to ignore the chip version for boards with old ESP32 silicon tape out.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-12-21 15:18:08 -03:00
Filipe Cavalcanti
49d6177c68 espressif: automate build system for flash enc
Modifies Kconfig and build tools to support flash encryption
and E-Fuse burning when flash encryption is enabled.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Filipe Cavalcanti
3a74b82e09 arch/xtensa: flash encryption support for ESP32|S2|S3
Deprecates ESP32_STORAGE_MTD_ENCRYPT and ESP32_OTA_PARTITION_ENCRYPT options.
Add ESPRESSIF_SECURE_FLASH_ENC_ENABLED Kconfig option.
Updates SPI Flash driver to handle encryption automatically.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Vlad Pruteanu
70455f1890 xtensa/esp32: Add support for hardware accelerated HMAC-SHA
This add support for using the cryptographic accelerator
within the ESP32 for HMAC-SHA operations. The supported
algorithms are: SHA1 and SHA512.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2025-11-27 03:38:09 +08:00
v-tangmeng
a221df7175 arch/xtensa/esp32[-s2|-s3]: add USE_NXTMPDIR_ESP_REPO_DIRECTLY
Directly downloading the Git repository is inconvenient for local debugging.
This will allow to automatically download external packages from the Internet.
If not set, the repo need to be download will need to provide them manually,
otherwise an error will occur and the build will be aborted.

Add `USE_NXTMPDIR_ESP_REPO_DIRECTLY`, with this we can use
`USE_NXTMPDIR_ESP_REPO_DIRECTLY=y make` which can directly use esp-hal-3rdparty
under nxtmpdir without CLONE, CHECK_COMMITSHA, reset, checkout and update. Just
`cp -rf nxtmpdir/esp-hal-3rdparty chip/$(ESP_HAL_3RDPARTY_REPO)`.

Signed-off-by: v-tangmeng <v-tangmeng@xiaomi.com>
2025-11-18 21:46:50 +08:00
ouyangxiangzhen
fc28b93224 timers/oneshot: Remove all callback and args.
This commit remove all callback and args in the APIs.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-11-18 13:02:29 +01:00
ouyangxiangzhen
5c113f79b7 timers/oneshot: Remove all private callback.
This commit removed all private callback and handle it on the upperhalf
of oneshot.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-11-18 13:02:29 +01:00
wangchengdong
97b24a1a0b xtensa/esp32: Replace spinlock/sched_lock with spin_lock_irqsave_nopreempt
Replace the spinlock/sched_lock pair in xtensa/esp32 with
    spin_lock_irqsave_nopreempt() to improve code clarity and consistency.

Signed-off-by: Chengdong Wang wangchengdong@lixiang.com
2025-11-04 22:46:15 +08:00
Filipe Cavalcanti
680766d304 arch/xtensa: update SPI Flash driver for ESP32-S2|S3
Updates the SPI Flash driver used for user storage MTD.
Moves ESP32 and ESP32S3 to use common driver.
Updates KConfig options to keep backwards compatibility.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-29 09:44:55 -04:00
Vlad Pruteanu
8a10e35c0b arch/xtensa/esp32: Fix support for hardware accelerated AES
Curently, the driver code for HW accelerated AES is not usable
since it's not registered within esp32_crypto. This commit fixes
it as well as a few bugs.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2025-10-24 11:20:04 -03:00
Eren Terzioglu
734068890a arch/xtensa/esp32[-|-s3]: Fix exception issue when pm active
Fix exception issue when PM and DEBUG_ASSERTIONS enabled for esp32 and esp32s3.
This error happens due to PM system workflow, when system gets into sleep-modes with
removing PM_NORMAL count, system is raising an exception for not having
enough number of PM_NORMAL state count if DEBUG_ASSERTIONS enabled.

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-23 09:38:26 -04:00
chao an
87f134cfaa sched/sleep: replace all Signal-based sleep implement to Scheduled sleep
Nuttx currently has 2 types of sleep interfaces:

1. Signal-scheduled sleep: nxsig_sleep() / nxsig_usleep() / nxsig_nanosleep()
Weaknesses:
a. Signal-dependent: The signal-scheduled sleep method is bound to the signal framework, while some driver sleep operations do not depend on signals.
b. Timespec conversion: Signal-scheduled sleep involves timespec conversion, which has a significant impact on performance.

2. Busy sleep: up_mdelay() / up_udelay()
Weaknesses:
a. Does not actively trigger scheduling, occupy the CPU loading.

3. New interfaces: Scheduled sleep: nxsched_sleep() / nxsched_usleep() / nxsched_msleep() / nxsched_ticksleep()
Strengths:
a. Does not depend on the signal framework.
b. Tick-based, without additional computational overhead.

Currently, the Nuttx driver framework extensively uses nxsig_* interfaces. However, the driver does not need to rely on signals or timespec conversion.
Therefore, a new set of APIs is added to reduce dependencies on other modules.

(This PR also aims to make signals optional, further reducing the code size of Nuttx.)

Signed-off-by: chao an <anchao.archer@bytedance.com>
2025-10-17 14:05:02 +08:00
Filipe Cavalcanti
df6e5384fe arch/xtensa: update MCUBoot and virtual E-Fuse offset
Updates MCUBoot version and default address for virtual E-Fuse, depending
if MCUBoot is enabled.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-14 17:44:15 +08:00
guoshengyuan1
79711737bc arch/init: call up_color_intstack before up_irq_enable
Make sure interrupt stack is colored before IRQ is enabled.

Currently, after calling irq_initialize in nx_start to
enable interrupts, there is still a period of execution
path before the interrupt stack is colored.

Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
2025-10-14 17:42:01 +08:00
guoshengyuan1
3f55710184 arch: remove nxsched_resume_scheduler in cpustart
Idle thread initialization does not require calling nxsched_resume_scheduler

Co-authored-by: yinshengkai <yinshengkai@xiaomi.com>
Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
2025-09-30 23:26:28 +08:00
Filipe Cavalcanti
20ff68bd65 arch/xtensa: refactor Wi-Fi driver for ESP32|S2|S3
Fixes low and inconsistent bandwidth issues.
Adds new configuration options for buffer management.
Moves code around to make the implementation cleaner and easier to debug.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-14 10:41:15 +08:00
Filipe Cavalcanti
ed751889de arch/xtensa/esp32: Update E-Fuse driver
Updates E-Fuse driver for ESP32, now sharing a common implementation across Xtensa devices.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-06 14:46:32 -03:00
Filipe Cavalcanti
1d51cfbda7 arch/xtensa: add sys_startup_fn call
Adds SYS_STARTUP_FN which calls constructors and init functions on
common source code. Requires compatibility changes on linker script.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-06 14:46:32 -03:00
Jukka Laitinen
80cb2cf9c6 arch/xtensa/esp32,esp32s3: Start the "spiflash_op" thread with correct affinity
Set the affinity of the task before activating it. There is no parameter
or other interface in "kthread_create" to set the affinity mask,
like in "pthread_create".

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2025-08-22 15:46:47 -03:00
nuttxs
46bbde02b1 esp32/esp32_spiflash.c: during the SPI Flash erasure operation, task
scheduling (yield) is added to prevent the Watchdog Timer from
triggering a reset due to timeout

Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
2025-08-22 20:47:03 +08:00
nuttxs
0ff26f0850 esp32/esp32_partition.c: based on the latest revision, in the ESP32 compilation
environment, uint32_t is defined as long unsigned int (i.e., unsigned long)

Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
2025-08-22 00:26:46 +08:00
Filipe Cavalcanti
a7cd6bb401 arch/xtensa: add E-Fuse support on ESP32S2
Adds support for e-fuse on ESP32S2 and fixes a gitignore issue.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-07-22 10:55:08 -03:00
nuttxs
d1fababfc5 arch/xtensa: esp32(s3)_async_op() using nxsem_wait(), threads may
return early due to signal interruption (EINTR). This makes the
main thread think the async operation is done, but the background
worker thread is still running—risking access to freed memory,
race conditions, crashes or undefined behavior.

Using nxsem_wait_uninterruptible():the main thread waits until the
worker thread finishes, preventing these issues.

Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
2025-07-18 22:34:13 +08:00
chenxiaoyi
886718ade1 xtensa: support more than 32 cpu interrupts
The architecture defines maximum of 128 interrupts, whereas previous
code only supported 32 interrupts.  For every 32 interrupts added,
there are three additional registers: INTERRUPT, INTCLEAR, and INTENABLE.
This patch adds support for handling these registers.

Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
2025-07-04 11:26:07 -03:00
Filipe Cavalcanti
187a386cc7 arch/xtensa: update lower-half drivers for ESP32|S2|S3 2025-06-30 22:40:26 +08:00
Filipe Cavalcanti
294848e623 arch/xtensa: decouple common source for Espressif's MCUBoot port
Decouples the NuttX build from the MCUBoot common source on Xtensa
devices. Allows using different branches for each.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-06-14 17:11:58 +08:00
Vlad Pruteanu
82effd4b2f xtensa/esp32: Add support for hardware accelerated SHA
This enables the use of the cryptographic accelerator within
the ESP32. The support algorithms are: SHA1, SHA256, SHA384
and SHA512.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2025-05-26 15:23:51 +08:00
Lars Kruse
3dc53adb28 arch | boards | drivers: fix whitespace issues for switch case statements 2025-05-23 10:48:41 +08:00
Lars Kruse
3ce85ca54e style: fix spelling in code comments and strings 2025-05-23 10:48:41 +08:00
Lars Kruse
4568110d63 fix misspelled names in locally scoped code
These misspelled words are used in strictly local scopes.
Renaming these variables should not cause any problems.
2025-05-15 10:12:12 +08:00
Eren Terzioglu
39465d2156 arch/xtensa: Add SDM peripheral support for esp32[-|-s2|-s3]
Add SDM peripheral support for Xtensa based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-05-09 19:20:47 +08:00
Tiago Medicci Serrano
c22df41ca6 espressif: Add variable to override MCUboot version and URL
The version and the git repository of Espressif's MCUboot port can
be changed by setting the `MCUBOOT_VERSION` and `MCUBOOT_URL`
environment variables before running the `make bootloader` command.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-05-07 01:51:40 +08:00
nuttxs
c4506929e9 arch/esp32_partition.c: fix the issue of switching from Factory to OTA_1
with a fixed seq of 1, which causes ota_get_bootseq() to return ota_0.

The current solution is to directly use the target partition's number (num)
as next_seq to ensure the correct increment logic of seq. Ensure the formula
(seq-1) % OTA_DATA_NUM + OTA_IMG_BOOT_OTA_0 correctly maps to ota_0 or ota_1

Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
2025-04-28 22:23:16 +08:00
Filipe Cavalcanti
b8e9bc3313 arch/xtensa: fix build errors related to data types on ESP32|S2|S3
Fix format specifier macros after compiler type changes.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-04-18 09:32:58 +08:00
Tiago Medicci Serrano
7a3e67d59a xtensa/esp32: Fix getting the flash mappings by openocd-esp32
This adds new fields to the metadata section used by MCUBoot.
The openocd-esp32 project requires these fields to properly map the
flash segments and enable using SW breakpoints and flash through
openocd-esp32.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-04-18 02:25:14 +08:00
Filipe Cavalcanti
99099a1a9d arch/xtensa: ADC support on ESP32|S2|S3
Add common ADC source for ESP32|S2|S3.
Remove legacy ADC from ESP32S3.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-04-17 13:56:40 +08:00