Enable SYSCALL_HOOKS architecture capability for TriCore platform.
This allows runtime interception and hooking of system calls on
TriCore architecture, enabling profiling, tracing, and debugging features.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Add a new getrecvbuf callback to the SPI slave device operations
that allows the slave device to provide a pre-allocated receive
buffer directly to the controller. This enables zero-copy data
transfer by allowing the controller to receive data directly into
the device's buffer instead of copying.
Changes:
- Add SPIS_DEV_GETRECVBUF macro and getrecvbuf callback to
spi_slave_devops_s structure in include/nuttx/spi/slave.h
- Implement getrecvbuf in rpmsg_port_spi_slave driver
- Update getdata to return 0 as it's no longer used for this path
Signed-off-by: liaoao <liaoao@xiaomi.com>
The cmdhdr->len was uninitialized before being used in SPI exchange
operations. This caused incorrect transfer lengths.
Changes:
- Initialize cmdhdr->len to sizeof(struct rpmsg_port_header_s) during
initialization for both SPI master and slave drivers
- Use port.txq.len instead of cmdhdr->len for TX exchange length
- Use port.rxq.len instead of cmdhdr->len for RX getdata length
Signed-off-by: liaoao <liaoao@xiaomi.com>
CC: vfs/fs_unlink.c rpmsg/rpmsg_port_spi.c: In function ‘rpmsg_port_spi_complete_handler’:
rpmsg/rpmsg_port_spi.c:415:11: warning: implicit declaration of function ‘rpmsg_port_spi_drop_packets’; did you mean ‘rpmsg_port_drop_packets’? [-Wimplicit-function-declaration]
415 | rpmsg_port_spi_drop_packets(rpspi, RPMSG_PORT_SPI_DROP_ALL);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
| rpmsg_port_drop_packets
rpmsg/rpmsg_port_spi.c:415:46: error: ‘RPMSG_PORT_SPI_DROP_ALL’ undeclared (first use in this function); did you mean ‘RPMSG_PORT_DROP_ALL’?
415 | rpmsg_port_spi_drop_packets(rpspi, RPMSG_PORT_SPI_DROP_ALL);
| ^~~~~~~~~~~~~~~~~~~~~~~
| RPMSG_PORT_DROP_ALL
rpmsg/rpmsg_port_spi_slave.c:292:5: warning: implicit declaration of function ‘container_of’; did you mean ‘list_container_of’? [-Wimplicit-function-declaration]
292 | container_of(port, struct rpmsg_port_spi_s, port);
| ^~~~~~~~~~~~
| list_container_of
Signed-off-by: liaoao <liaoao@xiaomi.com>
The default stack size should be large enough to avoid the stack
overflow:
0x18551ad8 1968 1968 100.0%! 24.2% rpmsg-spi
Signed-off-by: liaoao <liaoao@xiaomi.com>
Use pm wakelock is enough to make sure system will not suspend
when there is a transfer in process, and it can actually sleep when
there is buffer to send but peer side not response in 1ms which is
the timeout we set.
Signed-off-by: liaoao <liaoao@xiaomi.com>
Unbind the spictrl to close the spi controller, and bind it again
when peer boots.
This can help to reduce the leak current caused by the spi gpio.
Signed-off-by: liaoao <liaoao@xiaomi.com>
Only call rpmsg_port_spi_pm_action(false) when no more data to
transfer to avoid unnecessary pm unlock/lock operations.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Now rpmsg_port_spi/slave support send shutdown command to remote
core to notify then local core will reboot, so remote core can
notify all the rpmsg services to do the unregister.
Signed-off-by: liaoao <liaoao@xiaomi.com>
Add low power support for the rpmsg port spi/slave transport, now
the rpmsg port spi/slave transport will not allow enter into the
low power state when there are still tx data to sent or rx data
to processed.
Signed-off-by: liaoao <liaoao@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
Remove atomic64-based 64-bit perf counter support for 32-bit systems
where atomic64 operations are unavailable, simplifying userspace perf
implementation to avoid unsupported atomic operations.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Add ARCH_HAVE_PERF_EVENTS_USER_ACCESS capability to allow applications
to directly access hardware perf counters via perf_gettime() from
userspace, enabling performance monitoring and profiling without syscalls.
Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com>
Remove perf_init() function and automatic initialization call, relying
on static initialization instead to reduce code complexity and avoid
global variable access in perf_update callback.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
dd ARCH_PERF_COUNT_BITWIDTH configuration to support architectures
with different perf counter bit widths (TriCore 31-bit, others 32-bit),
enabling proper overflow correction across diverse platforms.
Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
Move hardware perf counter read after spinlock acquisition to prevent
reading stale values due to concurrent overflow updates.
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
This commit fixes a memory alignment issue in the rpmsg subsystem.
The previous implementation used a flexible array member (rdev[0])
in struct rpmsg_s, but due to automatic 8-byte padding, rpmsg->rdev
could differ from the transport layer's rdev address (e.g.,
rpmsg_virtio->rvdev.rdev), causing potential memory corruption.
Changes:
- Remove rdev[0] flexible array member from struct rpmsg_s
- Add rpmsg_get_rdev_by_rpmsg() inline helper to calculate rdev
address as (rpmsg + 1), ensuring correct pointer arithmetic
- Update all rpmsg->rdev references to use the new helper function
- Fix rpmsg_virtio_notify_wait() to use correct container_of macro
Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
Extract fixed MPU region configuration into arm64_mpu_init_regiions() function to
allow board-specific initialization. Refactor memory layout to minimize fixed region
requirements and improve dynamic MPU configuration flexibility for FVP platform.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Reduce macro definition duplication by consolidating REGION_*_ATTR macros into a unified
SHAREABLE_MSK definition. This improves code maintainability and reduces configuration
complexity while preserving all attribute functionality.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Refactor mpu_modify_region() and mpu_configure_region() functions to use direct parameters
(base, size, flags) instead of struct pointers. This ensures consistent interface across
all ARM64 MPU implementations including Cortex-R82, improving code uniformity.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Rename MPU region attribute macros (REGION_RAM_ATTR → REGION_RW_NA_ATTR,
REGION_URAM_ATTR → REGION_RW_RW_ATTR) to explicitly indicate access permissions.
Add new REGION_RO_RO_ATTR and REGION_RO_NA_ATTR macros for read-only region definitions.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Change the default pthread mutex robustness from ROBUST to UNSAFE when
CONFIG_PTHREAD_MUTEX_BOTH is enabled. This reflects the practical default
and allows removal of tracking code for non-robust mutexes, improving
performance and reducing memory overhead.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
This lock is currently used in three places,
mainly to protect tls->tl_mhead. Among them,
pthread_mutex_add and pthread_mutex_remove involve
writing to tls->tl_mhead, and there is
certainly no conflict within the same thread.
As for pthread_mutex_inconsistent, it involves reading. Currently,
it can only be called when the TCB task corresponding to
this tls exits, and the TCB corresponding to the
tls can no longer continue to run.
It seems that adding the lock serves no real purpose.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Replace direct up_irq_save/up_irq_restore calls with spinlock IRQ-safe
interfaces (spin_lock_irqsave, spin_trylock_irqsave, spin_unlock_irqrestore)
to maintain semantic consistency when both spinlock and IRQ flags are used together.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
According to ARM GIC documentation, GICD_CTLR.DS bit is read-only and cannot be
modified by software. Remove the unnecessary runtime check that attempts to set this bit
for CONFIG_ARCH_SINGLE_SECURITY_STATE configuration, simplifying the GIC initialization flow.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Add mpu_usedregion() function to query the number of MPU regions currently in use.
This interface complements existing mpu_allocregion() and mpu_freeregion() functions,
allowing callers to determine the occupancy of the MPU region pool.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Enable SCTLR_EL1.BR bit to activate MPU background region support. This simplifies MPU
configuration by providing a default MAIR attribute for unmapped regions, reducing the
need for exhaustive region coverage and improving MPU flexibility.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
ARM specifies that SysTick RELOAD must be programmed with N-1 to get a period of N CPU cycles.
Adjust the timeout/reload conversions accordingly: subtract 1 when writing RELOAD and add 1 back when converting RELOAD to a timeout/interval.
Also clamp RELOAD to the valid 24-bit range (1..0x00ffffff) for Armv7-M/Armv8-M to avoid invalid values.
Reference: https://developer.arm.com/documentation/dui0646/c/Cortex-M7-Peripherals/System-timer--SysTick/SysTick-Reload-Value-Register
Signed-off-by: Gao Jiawei <gaojiawei@xiaomi.com>
This commit fixed the functional correctness issue in hrtimer_start by
adding HRTIMER_MAX_DELAY fr the HRTIMER_MODE_REL.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
This commit added hrtimer_gettime API to support the query of the
rest of the delay time of the hrtimer in nanoseconds.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
This commit move the hrtimer_gettime to clock_systime_nsec to improve
the code reusability.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
On 32-bit platform with 64-bit pointer, read/write to the
`g_hrtimer_running` is not atomic, we should protect it with the
seqcount to ensure the value we read is correct.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
Since the hrtimer->expired is not monotonic, it can not be used as the
version. This commit added the ownership encoding to ensure the
invariant that the cancelled the timer can not modify the hrtimer again.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
This commit fixed the functional correctness issues in tick mode
and non-tickless alarm mode.
- In tick mode, we do not need reprogram the timer.
- In non-tickless alarm mode, the up_timer_start receive the relative time as the parameter.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
Replace CONFIG_ARM64_SMP_BUSY_WAIT_FLAG_ADDR with global variable g_smp_busy_wait_flag for
SMP CPU synchronization. This improves flexibility over fixed memory addresses and aligns
with standard kernel variable patterns for multi-core startup.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Enable fvp_userspace.c compilation when
CONFIG_BUILD_PROTECTED is enabled, providing user-space
isolation support for FVP platform. Include
board memory map definitions for protected build
configuration and update MPU regions for
kernel/user space separation.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Add CONFIG_BUILD_PROTECTED support alongside
CONFIG_BUILD_KERNEL for saved register
pointers and task startup functions. Fix
arm64_fork() to properly handle Thumb bit masking.
Enable weak_function for up_allocate_kheap()
to support board-specific heap allocation.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
