Commit graph

24104 commits

Author SHA1 Message Date
yezhonghui
96db23e7df sim/spi: ioctl stytemcall use host_uninterruptible
syscall use macro host_uninterruptible

Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
2025-12-21 06:37:39 +08:00
dirksavage88
c792601963 imxrt/serial: Fix uart registration order when no console defined.
* Explicit registration of ttys0 when no console defined
* Fixes overwriting registration of lpuart1 on ttys1 when no console on ttys0
* Change regstration logic to check for console assignment
* See issue 17116

Signed-off-by: dirksavage88 <dirksavage88@gmail.com>
2025-12-20 11:12:04 +08:00
Justin Erenkrantz
18a1d159a7 risc-v/litex: For vexriscv_smp, match default FDT address in upstream opensbi.
The default opensbi fw_jump.bin expects to see the FDT in 0x40EF0000 per FW_JUMP_FDT_ADDR.

Definitions:

https://github.com/litex-hub/opensbi/blob/0.8-linux-on-litex-vexriscv/platform/litex/vexriscv/config.mk
https://github.com/litex-hub/opensbi/blob/1.3.1-linux-on-litex-vexriscv/platform/litex/vexriscv/objects.mk

Signed-off-by: Justin Erenkrantz <justin@erenkrantz.com>
2025-12-20 11:09:38 +08:00
anjiahao
fb8da4b89d mps3-an547:support protect mode
add mps3-an547:knsh configs

./tools/configure.sh mps3-an547:knsh
make -j20
qemu-system-arm -M mps3-an547 -m 2G -device loader,file=nuttx.hex -device loader,file=nuttx_user.hex -gdb tcp::1129 -nographic

nsh>ostest

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2025-12-18 22:19:44 +08:00
guohao15
635d81a76b cmake:add missing cflag "-D_FILE_OFFSET_BITS=64" of sim
The -D_FILE_OFFSET_BITS=64 parameter is missing
during the CMake compilation of the sim (simulator) build,
which causes incorrect version invocations of interfaces
such as hostfs_stat.

Signed-off-by: guohao15 <guohao15@xiaomi.com>
2025-12-18 22:18:49 +08:00
anjiahao
b623c781c5 arch:use ARCH_64BIT to mark arch is support 64bit
Add ARCH_64BIT macro to indicate architectures with 64-bit support,
improving portability and conditional compilation.

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2025-12-18 22:05:12 +08:00
anjiahao
431cffa5d8 x86_64:fix syscall type mismatch
/home/ajh/work/vela_system/nuttx/include/arch/syscall.h:181: Error: operand type mismatch for `movq'

`rax`: Used in 64-bit mode, suitable for storing 64 bits of data.

`eax`: In 64-bit mode, typically used for operating on 32-bit data. When writing to `eax`, the high 32 bits of `rax` are automatically cleared to zero.

`nbr` is an unsigned int, is 32-bit.

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2025-12-18 06:31:43 +01:00
Yanfeng Liu
495f6cc31f arch/Toolchain.defs: use _start entry
This adjusts more archs to use _start as ELF entry.

Signed-off-by: Yanfeng Liu <p-liuyanfeng9@xiaomi.com>
2025-12-16 13:07:37 -03:00
Lars Kruse
ec906cfb0b rp2040,rp23xx,rp23xx-rv: allow up to 32 PIO instructions
Previously only up to 31 PIO instructions were accepted.
But the hardware allowed 32 instructions.

Now we accept 32 instructions.

See the corresponding commit in the pico-sdk repository:

  6f7dc67791

Signed-off-by: Lars Kruse <devel@sumpfralle.de>
2025-12-15 18:01:27 +01:00
anjiahao
b95cfa1b14 risc-v:need add crt0 to LDELFFLAG
riscv64-unknown-elf-ld: warning: cannot find entry symbol __start; defaulting to 0000000000000000

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2025-12-15 17:35:44 +08:00
zhanghongyu
aa8ffea3cf netdev_upperhalf: convert Kconfig to variable
Upperhalf supports multiple working modes at the same time,
which is specified by NIC when register

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2025-12-14 10:01:22 +08:00
yangsong8
3a76917058 sim/usbdev: Process all pending data at once
After processing a packet of data, do not exit interrupt, but continues
to check whether there is data to be processed. If there is, continue
processing.

Signed-off-by: yangsong8 <yangsong8@xiaomi.com>
2025-12-12 09:35:26 +08:00
ligd
6736558d10 sim_usb: fix host function caused up_interrupt_context() failed
use host_uninterruptible to protect some system functions

Signed-off-by: ligd <liguiding1@xiaomi.com>
2025-12-12 09:35:26 +08:00
yangsong8
8bf88945ce sim/usbdev: Supports registering multiple USB devices on a same host
when start multiple sim, the host refuses to recognize multiple USB
devices, and the prompt message is as follows:
[365652.175289] UDC core: USB Raw Gadget: couldn't find an available UDC or it's busy
[365652.175304] misc raw-gadget: fail, usb_gadget_probe_driver returned -16

Signed-off-by: yangsong8 <yangsong8@xiaomi.com>
2025-12-12 09:35:26 +08:00
yangsong8
3a0d2cbd41 sim_usb: fix dev function caused up_interrupt_context() failed
use host_uninterruptible to protect some system functions.

Signed-off-by: yangsong8 <yangsong8@xiaomi.com>
2025-12-12 09:35:26 +08:00
Filipe Cavalcanti
49d6177c68 espressif: automate build system for flash enc
Modifies Kconfig and build tools to support flash encryption
and E-Fuse burning when flash encryption is enabled.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Filipe Cavalcanti
8f42a6f6d7 arch/xtensa: add critical section on e-fuse bringup
The efuse initialization requires critical section to avoid a very
hidden corner case when flash encryption is enabled.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Filipe Cavalcanti
151776f0a5 arch/xtensa: change .bss clear location on start
Moves the clearing of global variables to the very start
of the chip start up process. This avoids clearing some
globals that are initialized between the new location and
previous location.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Filipe Cavalcanti
3a74b82e09 arch/xtensa: flash encryption support for ESP32|S2|S3
Deprecates ESP32_STORAGE_MTD_ENCRYPT and ESP32_OTA_PARTITION_ENCRYPT options.
Add ESPRESSIF_SECURE_FLASH_ENC_ENABLED Kconfig option.
Updates SPI Flash driver to handle encryption automatically.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Filipe Cavalcanti
0835b345e8 arch/risc-v: flash encryption support for ESP32-C3|C6|H2
Add Kconfig option to enable flash encryption.
Default E-Fuse state is now VIRTUAL.
Modifies SPI Flash driver for encrypted operation.
Limitations:
- Requires MCUBoot
- Flash fully encrypted (no unencrypted MTD part. support)

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Yanfeng Liu
c38042941f arch/crt0.c: revert entry _start
This reverts crt0.c entry name to _start to fix LTO issue/17443,
needs apps/ side pull/3235.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2025-12-10 19:06:04 +08:00
Jiri Vlasak
af205ebd39 arm/kinetis: Fix warning
8th bit of SCGC3 is NFC, see K60 Reference Manual
(K60P144M150SF3RM.pdf, 12.2.11).

Signed-off-by: Jiri Vlasak <jiri.vlasak@posteo.net>
2025-12-10 11:40:36 +01:00
Jiri Vlasak
5090572b2a arm/kinetis: K60 has SPI1, SPI2, improve errors
K60 family has support for SPI1 and SPI2.

Signed-off-by: Jiri Vlasak <jiri.vlasak@posteo.net>
2025-12-10 11:40:36 +01:00
Jiri Vlasak
207767d0d6 arm/kinetis: Add FTM3 PIN defines, K60 has FTM3
Found in K60P144M150SF3RM.pdf, used for MK60FN1M0VLQ12.

Signed-off-by: Jiri Vlasak <jiri.vlasak@posteo.net>
2025-12-10 11:40:36 +01:00
Miloš Pokorný
b404e30332 arch/arm/kinetis: Add option to use RTS as RS-485 transmit enable
Support RS-485 on UART peripheral.

Signed-off-by: Jiri Vlasak <jiri.vlasak@posteo.net>
2025-12-10 11:40:36 +01:00
lipengfei28
84d99b7329 arch/arm64: fix create page table err
arm64 only PA_BITS=52 level 0 can be used as BlockDescriptors

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2025-12-09 20:25:02 +08:00
xiezhanpeng3
fc0647491b arch/armv8-r: use -mfpu=fpv5-sp-d16 for SP-only Cortex-R52 targets
The specific Cortex-R52 implementation could be configured with
a Single-Precision-only FPU (SP-only) and no Neon unit.
Executing double-precision instructions (e.g., `vadd.f64`) triggers
an Undefined Instruction exception.

The standard `-mfpu=fp-armv8` implicitly enables double-precision,
which is unsafe for this hardware.

`-mfpu=fpv5-sp-d16` is selected as the closest architectural match.
  - It enforces Single Precision code generation (preventing crashes).
  - It enables VFPv4/FPv5 features like FMA (Fused Multiply-Add) supported by the CR52 FPU.
  - It restricts the register set to d0-d15, matching the hardware constraints.

This ensures the compiler utilizes hardware FPU and FMA acceleration
without emitting illegal double-precision instructions.

Signed-off-by: xiezhanpeng3 <xiezhanpeng3@lixiang.com>
2025-12-08 21:09:05 +08:00
kywwilson11
2c0e105cad arch/arm/stm32h5: Add RS-485 support to serial driver
Initial commit for adding rs-485 support to serial driver. More is needed as well as testing.

Style fixes.

Added unconfigure functionality.

Added Unconfigure configs to CONFIG.

More style fixes.

Changed depend spacing from 4 spaces to tab.

Fixed priv types, changed serialin to getreg.

Do not unconfigure tx/rx/dir pins by default.

Signed-off-by: kywwilson11 <kwilson@2g-eng.com>
2025-12-06 11:35:53 -03:00
Michal Lenc
58be428e37 arch/arm/src/samv7/Kconfig: allow 0 in MCANx_RXFIFOx_SIZE
Zero can be used to disable the FIFO queue. Fix the range to allow
to configure this value.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2025-12-04 16:32:39 +01:00
Mathias Duckeck
21b9b919cc arch/arm/samv7: allow all values for count in read
The parameter count of read had to be a multiple of 4, otherwise the
result was truncated. Now all values are possible.

Signed-off-by: Mathias Duckeck <mathias.duckeck@avat.de>
2025-12-03 22:05:53 +08:00
adriendesp
ec04ef9ccf arch/arm/xmc4 : various fixes and clean
- Fix EtherCAT signals drive strengh (from errata PORTS_CM.H002), caused bus faults.
- Changed xmc4_ecat.c for compile time pin definition.
- Fixed xmc4_ecat.c register not written (reset value already used).
- Removed EXTCLK for xmc4800 as pin is used for ECAT.
- Clean xmc4 familly board.h and clocks config.

Signed-off-by: adriendesp <adrien.desproges@gmail.com>
2025-12-03 13:47:34 +08:00
Filipe Cavalcanti
6ccc5847fb arch/risc-v/esp32c3: rename ESP32-C3 Generic configs
- ARCH_CHIP_ESP32C3_LEGACY created
- ARCH_CHIP_ESP32C3_GENERIC is now ARCH_CHIP_ESP32C3

This is part of deprecating esp32c3-devkit as esp32c3-legacy and
using esp32c3-generic (now esp32c3-devkit) instead.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-03 13:45:13 +08:00
Filipe Cavalcanti
0158eda813 arch/risc-v/espressif: add PWM capture getedges function
Create esp_capture_getedges function which was missing from
the capture API.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-03 13:44:25 +08:00
Filipe Cavalcanti
027bc43df7 arch/xtensa/espressif: add PWM capture getedges function
Create esp_capture_getedges function which was missing from
the capture API.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-03 13:44:25 +08:00
simbit18
bb66e96023 arch/arm/src/stm32l4: Removed repeated addition of CONFIG_STM32L4_IWDG
- Removed

   if(CONFIG_STM32L4_IWDG)
      list(APPEND SRCS stm32l4_iwdg.c)
   endif()

Signed-off-by: simbit18 <simbit18@gmail.com>
2025-12-03 08:36:06 +08:00
simbit18
0af53187b5 arch/arm/src/kl: CMake build implemented for NXP KL Series Arm MCUs
- added NXP KL Series Arm MCUs

Signed-off-by: simbit18 <simbit18@gmail.com>
2025-12-02 02:42:55 +08:00
Eren Terzioglu
6b53141c9e arch/xtensa/esp32[-s2|-s3]: Refactor PM support
Refactor PM modes for Xtensa based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-12-02 02:37:06 +08:00
Jukka Laitinen
5ae35b619a arch/mpfs/mpfs_ddr.c: Improve CA training validity check heuristics
Update the CA training result check to match the HSS reference code.

The original check which required phase delays to be 5 taps separated was wrong.
This has also been removed from the HSS.

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2025-12-02 02:36:55 +08:00
Jukka Laitinen
3560a28eef arch/mpfs/mpfs_ddr.c: Make sure eye doesn't grow past the window end
The window is 32 taps, so in order to the eye to be completely inside the window,
the (offset + width) has to be less or equal than (32 - margin).

Add this additional sanity check in the mpfs_training_verify.

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2025-12-02 02:36:55 +08:00
wangchengdong
930cc984a2 arch/tricore: Fix build errors in Tricore architecture
Fix build errors in the Tricore architecture caused by the missing `lock`
member in `struct tricore_systimer_lowerhalf_s`, as well as the missing
definition of the `IFX_CFG_CPU_CLOCK_FREQUENCY` macro.

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-12-02 02:35:59 +08:00
hujun5
9461c70fcd x86_64: fix bootup problem in SMP
We need to initialize the per - CPU registers as early as possible.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2025-12-01 14:28:11 +01:00
Jukka Laitinen
2e9a43571a arch/imx9/ethernet: Add a configuration option to use HPWORK queue
Add an option to use HPWORK queue for ethernet driver, to reduce
delays if more time critical messaging via ethernet is wanted.

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2025-12-01 10:20:29 -03:00
Kerogit
5318c1aa78 arch/avr/src/avrdx: add support for TWI (I2C and SMBus) peripheral
This patch adds support for Two-Wire interface in AVR Dx chips.
Only master mode is supported in this version.

The driver was tested using TC74Ax thermal sensor and simple application
that read the temperature from it. (Driver for the sensor is not in-tree.)

Signed-off-by: Kerogit <kr.git@kerogit.eu>
2025-12-01 19:12:26 +08:00
Kerogit
b8e4ced860 arch/avr/src/avrdx: fix missing code for alternate pin positions
The Kconfig configuration was offering alternate routing options
for USART peripherals but there was no code which would act
on those settings. This patch fixes it.

Additionally, since the code is being worked on, this patch
also renames USART-related configuration options from AVR_HAS_
to AVR_HAVE_ . This is based on GitHub and mailing list discussion
where it was pointed out that other architectures use "HAVE".

Patch was tested by choosing few combinations of the configuration
and verifying which registers are being set in disassembly. Base
configuration was also tested by an application that uses two ports.

Signed-off-by: Kerogit <kr.git@kerogit.eu>
2025-12-01 19:12:26 +08:00
Kerogit
48585b21b5 arch/avr: fix MCU type for 64 pin chips
Toolchain.defs file was treating all supported chips as AVR128DA28,
which became apparent while testing changes in USART handling.

Signed-off-by: Kerogit <kr.git@kerogit.eu>
2025-11-29 09:48:11 -05:00
Eren Terzioglu
d4c76b1f60 arch/risc-v/esp32[-c3|-c6|-h2]: Add deep sleep support
Add deep sleep support for risc-v based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-11-29 14:35:34 +08:00
Eren Terzioglu
8417cf0c83 arch/risc-v/esp32[-c3|-c6|-h2]: Add PM support
Add PM support for esp32[-c3|-c6|-h2]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-11-29 14:35:34 +08:00
Michal Lenc
5743edd0e9 arch/arm/src/samv7/sam_qspi_spi.c: add support for SPI_SETDELAY
This commit adds support for SPI_SETDELAY operation on SAMv7 QSPI
peripheral running in SPI mode. The logic is the same as for standard
SPI peripheral, just different registers. The change allows to set
custom delays between transfers, chip selects and so on.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2025-11-27 22:46:03 +08:00
Vlad Pruteanu
70455f1890 xtensa/esp32: Add support for hardware accelerated HMAC-SHA
This add support for using the cryptographic accelerator
within the ESP32 for HMAC-SHA operations. The supported
algorithms are: SHA1 and SHA512.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2025-11-27 03:38:09 +08:00
Max Kriegleder
a9ecff5f1c arch/arm/{nrf52|nrf53|nrf91}/i2c: fix I2C bus getting stuck during read
During I2C read, one-too-many byte is read, which can lead to the I2C bus
getting stuck. This is likely due to the STOP condition being set at the
wrong time or being missed completely. The chip offers a shortcut, such
that the STOP condition is set automatically after the last byte is being
written/read.

Signed-off-by: Max Kriegleder <max.kriegleder@gmail.com>
2025-11-24 14:57:10 +01:00