Commit graph

60363 commits

Author SHA1 Message Date
Vlad Pruteanu
8a10e35c0b arch/xtensa/esp32: Fix support for hardware accelerated AES
Curently, the driver code for HW accelerated AES is not usable
since it's not registered within esp32_crypto. This commit fixes
it as well as a few bugs.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2025-10-24 11:20:04 -03:00
Matteo Golin
b2e823d0b9 docs/platforms/risc-v/esp32c3-legacy/boards/esp32c3-devkit-rust-1: Migrate README.txt
Migrate README.txt to RST, adhering to the standard board documentation
template.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:16:36 +02:00
Matteo Golin
b7de650968 docs/platforms/risc-v/fe310/boards/hifive1-revb: Migrate README.txt
Migrate README.txt to RST format adhering to the standard board
documentation template.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:16:36 +02:00
Matteo Golin
cb710a71d1 docs/platforms/risc-v/rv32m1/boards/rv32m1-vega: Migrate README.txt
Migrate README.txt to RST format adhering to the standard board
documentation template.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:16:36 +02:00
Matteo Golin
6056fd61f3 docs/platforms/risc-v/c906/boards/smartl-c906: Migrate README.txt
Migrate README.txt to RST documentation format adhering to standard
board documentation template.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:16:36 +02:00
Matteo Golin
865753fd80 docs/platforms/risc-v/hpm6750/boards/hpm6750evk2: Migrate README.txt
Migrate README.txt to RST format adhering to standard board
documentation template.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:16:36 +02:00
Matteo Golin
525db5309d docs/platforms/risc-v/litex/boards/arty_a7: Migrate README.txt
Migrated legacy README.txt documentation to RST format which aligns with
the standard template for board documentation.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:16:36 +02:00
Matteo Golin
a0c878ad96 docs/platforms/risc-v/k210/boards/maix-bit: Migrate README.txt
Migrated legacy README.txt documentation to RST format following the
standard board documentation template.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:16:36 +02:00
Matteo Golin
286bec29d9 docs/platforms/sim/sim/boards/sim: Clean up legacy SIM documentation.
Migrate README.txt about ROMFS to SIM documentation in RST format. Also
cleans up the formatting of the board documentation to leverage RST's
features.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:15:24 +02:00
Eren Terzioglu
3893350287 Documentation/xtensa/esp32s3: Add ULP RISCV coprocessor wakeup docs
Add ULP RISCV coprocessor wakeup docs for esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-24 11:16:11 +08:00
Eren Terzioglu
de9cb4be9f arch/xtensa/esp32[-s3]: Add ULP RISCV coprocessor wakeup board support
Add ULP RISC-V coprocessor wakeup board support for esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-24 11:16:11 +08:00
Eren Terzioglu
a590599c7e arch/xtensa/esp32[-s3]: Add ULP RISCV coprocessor wakeup
Add ULP RISCV coprocessor wakeup support for esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-24 11:16:11 +08:00
Alan C. Assis
ff0fa9807a doc: Add semihost syslog guide instructions
Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-10-24 09:56:24 +08:00
Eren Terzioglu
734068890a arch/xtensa/esp32[-|-s3]: Fix exception issue when pm active
Fix exception issue when PM and DEBUG_ASSERTIONS enabled for esp32 and esp32s3.
This error happens due to PM system workflow, when system gets into sleep-modes with
removing PM_NORMAL count, system is raising an exception for not having
enough number of PM_NORMAL state count if DEBUG_ASSERTIONS enabled.

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-23 09:38:26 -04:00
kywwilson11
aa8fb9ae2e arch/arm/stm32h5: Add defines for ADC_HAVE_WDG
AWD defines needed by stm32_adc.c were missing from PR #17007. This commit adds them in.

Signed-off-by: kywwilson11 <kwilson@2g-eng.com>
2025-10-23 20:46:20 +08:00
Alan C. Assis
1f15756156 fs/fat: Ignore //... sequences in the file path
This fixes an issue reported by user harishn6 on github.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-10-23 08:44:12 -04:00
Filipe Cavalcanti
fb4274187b boards/risc-v: optimize linker script IRAM section
Adds lipbb (Wi-Fi related) to IRAM and removes unnecessary E-Fuse sources.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-23 20:34:59 +08:00
Filipe Cavalcanti
58cdb9cfea boards/xtensa: optimize linker script IRAM section
Improve IRAM usage.
- Remove unnecessary E-Fuse sources;
- Optimizing (ESP32) and add (S2|S3) libpp(Wi-Fi related).

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-23 20:34:59 +08:00
Geoffroy Du Prey
28a6f7c541 docs/config: Wrong term.
Fixes #17225

Signed-off-by: Geoffroy Du Prey <geoffroy.duprey@wandercraft.health>
2025-10-23 16:46:31 +08:00
simbit18
bbe1d420a7 arch/risc-v/rp23xx-rv: CMake build implemented for Raspberry Pi RP2350 RISCV
- added Raspberry Pi RP2350 RISCV (Hazard3 RISC-V cores)

Signed-off-by: simbit18 <simbit18@gmail.com>
2025-10-22 09:01:39 -04:00
simbit18
fc536babfa board/risc-v/rp23xx-rv: Added CMake build for Raspberry Pi Pico 2 RISC-V board
- CMake added board Raspberry Pi Pico 2 RISC-V

- Created a file rp23xx_common_pico.h with function
   prototype

     int rp23xx_dev_gpio_init(void);

 to allow cmake + ninja to build without errors.

Signed-off-by: simbit18 <simbit18@gmail.com>
2025-10-22 09:01:39 -04:00
ouyangxiangzhen
be413af022 compiler: Fix inlining stack-overflow.
If the compiler optimization is disabled, the stack-usage of inlining functions will not be optimized.
In this case, force inlining can lead to stack-overflow (e.g.
qemu-armeabi-v7a-bl). This commit replaced the definition of the
always_inline_function and inline_function with the inline
keyword to avoid force-inlining.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-10-22 09:46:42 +08:00
ouyangxiangzhen
f309d65a7f lib/math32: improve the performance of invdiv_u32.
This commit provided a better invdiv_u32 implementation on 64-bit architectures. The test results showed it is 25% faster than the original implementation on x86_64.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-10-22 09:46:42 +08:00
ouyangxiangzhen
f6dfd3f6d0 lib/math32: Support optimized runtime-invariant integer division.
This commit implemented optimized runtime-invariant integer division
proposed by T. Granlund and L. Montgomery. It can be used to convert the
hardware clock cycles to seconds, where the clock frequency is runtime-invariant.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-10-22 09:46:42 +08:00
Eren Terzioglu
f564f4fc56 Documentation/risc-v/esp32[c6]: Add multiple ULP bin docs for esp32c6
Add multiple ULP bin docs for esp32c6

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
Eren Terzioglu
11b1361a96 boards/risc-v/esp32[c6]: Add multiple ULP bin board support for esp32c6
Add multiple ULP bin board support for esp32c6

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
Eren Terzioglu
7aaac3ed8e arch/risc-v/esp32[c6]: Add multiple ULP bin support for esp32c6
Add multiple ULP bin support for esp32c6

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
Eren Terzioglu
a3841a1678 Documentation/xtensa/esp32[-s2|-s3]: Add multiple ULP RISC-V bin docs
Add multiple ULP RISC-V bin docs for esp32s2 and esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
Eren Terzioglu
6702b4fdb4 boards/xtensa/esp32[-s2|-s3]: Add multiple ULP RISC-V bin board support
Add multiple ULP RISC-V bin board support for esp32s2 and esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
Eren Terzioglu
24eeff91c0 arch/xtensa/esp32[-s2|-s3]: Add multiple ULP RISC-V bin support
Add multiple ULP RISC-V bin support for esp32s2 and esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
Eren Terzioglu
7403177473 arch/risc-v/espressif: Add ULP as char device to support multiple ULP bins
Add ULP as char device to change binary that runs on ULP

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
simbit18
90a881271e CI MSYS2 : added the genromfs tool for creating romfs file systems
Add:

 - the genromfs tool for creating romfs file systems

https://github.com/chexum/genromfs

Signed-off-by: simbit18 <simbit18@gmail.com>
2025-10-21 01:14:15 +08:00
Alexander Lerach
a9b258aa68 arch/arm/stm32h7: Fix UART TX DMA getting stuck
When closing a serial port an ongoing TX DMA transfer will be stopped. This can cause
one (or multiple) the following:

- dev->dmatx.length != 0
- dev->dmatx.nlength != 0
- stm32_dmaresidual returning a non-zero residual

This is caused by length/nlength not being set to 0 at startup or during closing.
In addition the DMA_SxNDTR register is not set to 0 at startup or during closing.

This commit solves the issue by setting the variables and register to 0 during closing.

Signed-off-by: Alexander Lerach <alexander@auterion.com>

arch/arm/stm32h7: Add review feedback regarding style

Removed non-needed spaces.
Aligned style of documentation.

Signed-off-by: Alexander Lerach <alexander@auterion.com>
2025-10-21 01:10:05 +08:00
wangchengdong
fca1010a5b arch/risc-v: remove duplicated nxsched_switch_context() call
The nxsched_switch_context() function should only be called
    when a task switch actually occurs. The RISC-V architecture
    already performs this call in riscv_perform_syscall(),
    so this PR removed the redundant nxsched_switch_context() call in
    up_switch_context().

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-10-21 01:05:33 +08:00
Tiago Medicci Serrano
fcb96babc5 risc-v/espressif/spi: Update common source code functions
Updates the common source code for the SPI peripheral used by
Espressif's RISC-Vs SoCs. This enables newer SoCs to be supported
in the future while maintaining backwards compatibility.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-10-21 01:03:36 +08:00
wangchengdong
97db9a499c sched/signal: use list_waitingforsignal() to access g_waitingforsignal
Replace direct access to the g_waitingforsignal list with the
    NuttX-defined macro list_waitingforsignal() to improve code
    consistency and maintainability.

Signed-off-by: Chengdong Wang wangchengdong@lixiang.com
2025-10-20 11:24:25 -03:00
wangchengdong
4bdd33a035 nuttx/cmake: Remove redundant logic in CMake scripts
Simplify the CMake scripts by removing redundant logic to
    improve code readability and maintainability.

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-10-20 10:08:28 +08:00
wangchengdong
519ffe66d0 sched/sched: Replace nxsched_alarm_tick_expiration()
Introduce a new function nxsched_tick_expiration() to replace
    nxsched_alarm_tick_expiration(). The new function provides a
    common implementation that can be shared by both the alarm
    and timer architectures.

    This change reduces code duplication and provides a unified
    function that can be directly reused.

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-10-18 20:07:59 +08:00
wangchengdong
590ea0567d board/sam3u-ek: Adjust memory.ld to fix build error
Enlarge kflash memory size for the sam3u-ek board
    to resolve the build error.

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-10-18 20:07:59 +08:00
wangchengdong
c7b6442974 sched/clock: Improve CLOCK_MONOTONIC nxclock_gettime()
Improve nxclock_gettime(), to get the system time excluding
   the time that the system is suspended, when the clockid is
   CLOCK_MONOTONIC

Signed-off-by: Chengdong Wang wangchengdong@lixiang.com
2025-10-18 20:07:59 +08:00
wangchengdong
1a22f4bf28 sched/clock: Improve clock implementation with sched ticks functions
Replace direct usage of g_system_ticks with clock_increase_sched_ticks()
   and clock_get_sched_ticks()

Signed-off-by: Chengdong Wang wangchengdong@lixiang.com
2025-10-18 20:07:59 +08:00
wangchengdong
54adf5979c sched/clock: Add clock_increase_sched_ticks() and clock_get_sched_ticks()
In the current NuttX kernel implementation, there is no function
    to represent pure scheduler ticks.
    The existing clock_systime_ticks() cannot serve this purpose,
    because it keeps increasing even when the scheduler is not running.
    This happens since the returned value reflects real hardware time:
    as long as the timer or alarm hardware is active,
    clock_systime_ticks() will continuously increase.

    This patch introduces two new functions that provide access to
    scheduler ticks — a counter that only increases when the scheduler
    itself is running.

Signed-off-by: Chengdong Wang wangchengdong@lixiang.com
2025-10-18 20:07:59 +08:00
trns1997
c705b278d1 cmake: Remove unused BUILD_OOTCPP guard from configuration.
Clean up the CMake configuration by removing the obsolete
`BUILD_OOTCPP` guard. This variable is no longer required
since out-of-tree build handling is now managed via the
enhanced `nuttx_add_subdirectory()` with EXCLUDE support.

* Simplifies CMake configuration command.
* Avoids redundant or unused build options.

Signed-off-by: trns1997 <trns1997@gmail.com>
2025-10-17 17:06:46 -03:00
Tiago Medicci Serrano
fb93a9e4d0 arch/risc-v/espressif/i2s: Fix common driver issues
This commit refactors the I2S common driver for Espressif's RISC-V
SoCs. Previously, the peripheral was not working as expected.

Along with the new I2S character driver, this new I2S lower-half
driver can be easily tested using internal loopback between the
transmitter and receiver channels.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-10-17 17:05:38 -03:00
Thiago Finelon
42d5f10c0d arch/xtensa/esp32s3: expose UART RX FIFO controls
Adds Kconfig knobs for the ESP32-S3 RX FIFO full threshold and timeout and wires them into the UART driver.
Clears RX FIFO overflow interrupts by resetting the hardware FIFO so reception resumes cleanly.

Signed-off-by: Thiago Finelon <thiago.sfinelon@gmail.com>
2025-10-17 17:40:32 +08:00
chao an
2909b1dadd sam3u-ek/knsh: disable LIBC_TEMPBUFFER to save code size
Fix build break:

| arm-none-eabi-ld: /home/archer/code/nuttx/nuttx section `.data' will not fit in region `kflash'
| arm-none-eabi-ld: region `kflash' overflowed by 96 bytes
| Memory region         Used Size  Region Size  %age Used
|           kflash:       65632 B        64 KB    100.15%
|           uflash:           0 B        64 KB      0.00%
|           xflash:           0 B       128 KB      0.00%
|           ksram1:        4716 B         6 KB     76.76%
|           usram1:           0 B         4 KB      0.00%
|           xsram1:           0 B        22 KB      0.00%
|            sram2:           0 B        16 KB      0.00%
| make[1]: *** [Makefile:217: nuttx] Error 1
| make: *** [tools/Unix.mk:542: nuttx] Error 2

Signed-off-by: chao an <anchao.archer@bytedance.com>
2025-10-17 14:05:02 +08:00
chao an
a8af5f3d0e style/spell: fix spell checker error
To make checker happy:

arch/arm/src/sama5/sam_classd.c:997: nd ==> and, 2nd
arch/arm/src/sama5/sam_classd.c:1362: levl ==> level
drivers/sensors/apds9922.c:286: persistance ==> persistence

Signed-off-by: chao an <anchao.archer@bytedance.com>
2025-10-17 14:05:02 +08:00
chao an
87f134cfaa sched/sleep: replace all Signal-based sleep implement to Scheduled sleep
Nuttx currently has 2 types of sleep interfaces:

1. Signal-scheduled sleep: nxsig_sleep() / nxsig_usleep() / nxsig_nanosleep()
Weaknesses:
a. Signal-dependent: The signal-scheduled sleep method is bound to the signal framework, while some driver sleep operations do not depend on signals.
b. Timespec conversion: Signal-scheduled sleep involves timespec conversion, which has a significant impact on performance.

2. Busy sleep: up_mdelay() / up_udelay()
Weaknesses:
a. Does not actively trigger scheduling, occupy the CPU loading.

3. New interfaces: Scheduled sleep: nxsched_sleep() / nxsched_usleep() / nxsched_msleep() / nxsched_ticksleep()
Strengths:
a. Does not depend on the signal framework.
b. Tick-based, without additional computational overhead.

Currently, the Nuttx driver framework extensively uses nxsig_* interfaces. However, the driver does not need to rely on signals or timespec conversion.
Therefore, a new set of APIs is added to reduce dependencies on other modules.

(This PR also aims to make signals optional, further reducing the code size of Nuttx.)

Signed-off-by: chao an <anchao.archer@bytedance.com>
2025-10-17 14:05:02 +08:00
Filipe Cavalcanti
7297ecc02e arch/xtensa: add non-iram interrupt support for ESP32-S2
Adds support for enabling and disabling non-iram interrupts on ESP32-S2.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-16 17:06:05 -04:00
chao an
02bfd290ac sched/sleep: add support for scheduling sleep
Nuttx currently has 2 types of sleep interfaces:

1. Signal-scheduled sleep: nxsig_sleep() / nxsig_usleep() / nxsig_nanosleep()
Weaknesses:
  a. Signal-dependent: The signal-scheduled sleep method is bound to the signal framework, while some driver sleep operations do not depend on signals.
  b. Timespec conversion: Signal-scheduled sleep involves timespec conversion, which has a significant impact on performance.
2. Busy sleep: up_mdelay() / up_udelay()
Weaknesses:
  a. Does not actively trigger scheduling, occupy the CPU loading.

3. New interfaces: Scheduled sleep: nxsched_sleep() / nxsched_usleep() / nxsched_msleep() / nxsched_ticksleep()
Strengths:
  a. Does not depend on the signal framework.
  b. Tick-based, without additional computational overhead.

Currently, the Nuttx driver framework extensively uses nxsig_* interfaces. However, the driver does not need to rely on signals or timespec conversion.
Therefore, a new set of APIs is added to reduce dependencies on other modules.

(This PR also aims to make signals optional, further reducing the code size of Nuttx.)

Signed-off-by: chao an <anchao.archer@bytedance.com>
2025-10-16 12:46:42 +02:00