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arch/xtensa/esp32[-s3]: Add ULP RISCV coprocessor wakeup board support

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Add ULP RISC-V coprocessor wakeup board support for esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
This commit is contained in:
Eren Terzioglu 2025-10-22 13:48:28 +02:00 • committed by Xiang Xiao
parent a590599c7e
commit de9cb4be9f
1 changed files with 9 additions and 0 deletions
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boards/xtensa/esp32s3/common/Kconfig
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@ -232,6 +232,15 @@ config PM_EXT1_WAKEUP_TRIGGER_MODE
endif # PM_EXT1_WAKEUP
config PM_ULP_WAKEUP
bool "PM ULP Wakeup"
default n
---help---
Enable ULP RISC-V coprocessor wakeup functionality.
This allows the system to wake up from PM_STANDBY or PM_SLEEP
when ULP app triggers HP core to wakeup with "ulp_riscv_wakeup_main_processor"
call on ULP app.
config PM_ALARM_SEC
int "PM_STANDBY delay (seconds)"
default 15