Commit graph

24187 commits

Author SHA1 Message Date
Gregory Nutt
f508c07b97 SAMA5 XDMAC: Missing some CUBC bits 2014-07-21 16:47:16 -06:00
Gregory Nutt
2d69c2f519 SAMA4D5 HSMCI: Set burst size to 1, sample DMA registers on timeout, and don't return from transfer until BOTH the HSMCI transfer and DMA complete 2014-07-21 13:24:55 -06:00
Gregory Nutt
43b214addd SAMA4D5 HSMCI: Set burst size to 1, sample DMA registers on timeout, and don't return from transfer until BOTH the HSMCI transfer and DMA complete 2014-07-21 13:24:55 -06:00
Gregory Nutt
c5b58b189c XDMAC register sampling missed CIM register; Should not set SWREQ bit in DMA setup 2014-07-21 13:23:36 -06:00
Gregory Nutt
3b24da2d7c XDMAC register sampling missed CIM register; Should not set SWREQ bit in DMA setup 2014-07-21 13:23:36 -06:00
Gregory Nutt
35ea8f1542 Fix a commented out assertion 2014-07-20 17:06:55 -06:00
Gregory Nutt
e202c8e9b2 Fix a commented out assertion 2014-07-20 17:06:55 -06:00
Gregory Nutt
b207138be9 Fix typos in comments 2014-07-20 13:09:47 -06:00
Gregory Nutt
e8c030a833 Fix typos in comments 2014-07-20 13:09:47 -06:00
Gregory Nutt
7ba2d9ed36 SAMA5D4-EK: PIO Schmitt trigger logic backward 2014-07-20 13:04:30 -06:00
Gregory Nutt
7fa1eec246 SAMA5D4-EK: PIO Schmitt trigger logic backward 2014-07-20 13:04:30 -06:00
Gregory Nutt
9392953ea1 WM8904 w/NxPlayer: Fix some compile errors and warnings with debug enabled 2014-07-20 09:17:36 -06:00
Gregory Nutt
f4bcb730d2 WM8904 w/NxPlayer: Fix some compile errors and warnings with debug enabled 2014-07-20 09:17:36 -06:00
Gregory Nutt
7c56185006 SAMA5D ADC: Fix some typos in conditional compilation 2014-07-19 13:56:48 -06:00
Gregory Nutt
54d441b5c9 SAMA5D ADC: Fix some typos in conditional compilation 2014-07-19 13:56:48 -06:00
Gregory Nutt
3c29703c42 SAMA5 SCK: The SAMA5D3 does things a little differently 2014-07-19 13:55:53 -06:00
Gregory Nutt
6ece3d8378 SAMA5 SCK: The SAMA5D3 does things a little differently 2014-07-19 13:55:53 -06:00
Gregory Nutt
e82143ac38 SAMA5 PCK: Add support for the slow clock as the PCK clock source 2014-07-19 13:55:08 -06:00
Gregory Nutt
d8f85d1caa SAMA5 PCK: Add support for the slow clock as the PCK clock source 2014-07-19 13:55:08 -06:00
Gregory Nutt
8986bd3976 SAMA5: Update slow clock logic. Things work a little differently on the SAMA5D3 2014-07-19 13:25:59 -06:00
Gregory Nutt
c74531e014 SAMA5: Update slow clock logic. Things work a little differently on the SAMA5D3 2014-07-19 13:25:59 -06:00
Gregory Nutt
813eade679 SAMA5: Add slow clock support 2014-07-19 13:07:55 -06:00
Gregory Nutt
bad3ad58cb SAMA5: Add slow clock support 2014-07-19 13:07:55 -06:00
Gregory Nutt
c7055a4cb8 SAMA5D4-EK: Add WM8904 initialization logic 2014-07-19 11:58:53 -06:00
Gregory Nutt
6d9f9e37bf SAMA5D4-EK: Add WM8904 initialization logic 2014-07-19 11:58:53 -06:00
Gregory Nutt
8055a59d49 SAMA5 LCDC: Back out the delay kludge. Increase the LCDC input clock from MCK to 2*MCK was sufficient for all timing instbility problems 2014-07-12 11:24:14 -06:00
Gregory Nutt
3a6ea3642f SAMA5 LCDC: Back out the delay kludge. Increase the LCDC input clock from MCK to 2*MCK was sufficient for all timing instbility problems 2014-07-12 11:24:14 -06:00
Gregory Nutt
424d47cfee SAMA5D4-EK LCDC: Change source clock to 2*Mck seems to solve stability issues 2014-07-12 09:45:05 -06:00
Gregory Nutt
8d1feb7a54 SAMA5D4-EK LCDC: Change source clock to 2*Mck seems to solve stability issues 2014-07-12 09:45:05 -06:00
Gregory Nutt
30603b1021 SAMA5D4-EK LCDC: Adding a delay after enabling the LCD solves lots of start-up timing issues 2014-07-12 08:05:22 -06:00
Gregory Nutt
253110bbf1 SAMA5D4-EK LCDC: Adding a delay after enabling the LCD solves lots of start-up timing issues 2014-07-12 08:05:22 -06:00
Gregory Nutt
20493f1212 Lpc17xx Ethernet: Comment out an assertion that is reported to first inappropriately. From Max 2014-07-11 12:25:11 -06:00
Gregory Nutt
3384906cdd Lpc17xx Ethernet: Comment out an assertion that is reported to first inappropriately. From Max 2014-07-11 12:25:11 -06:00
Gregory Nutt
67468408ae SAMA5D4-EK LCD: Actual hardware with appears to be RGB888 2014-07-10 12:23:41 -06:00
Gregory Nutt
95df6bd3de SAMA5D4-EK LCD: Actual hardware with appears to be RGB888 2014-07-10 12:23:41 -06:00
Gregory Nutt
c7d53cb927 SAMA5D4-EK: LCDC works (with a few color problems) 2014-07-10 12:03:10 -06:00
Gregory Nutt
89024f3698 SAMA5D4-EK: LCDC works (with a few color problems) 2014-07-10 12:03:10 -06:00
Gregory Nutt
6563ae07c2 Don't have to set SDA high initially in I2C reset because that is done by the pin configuration 2014-07-09 17:17:32 -06:00
Gregory Nutt
60e64ae93d Don't have to set SDA high initially in I2C reset because that is done by the pin configuration 2014-07-09 17:17:32 -06:00
Gregory Nutt
fc973eb512 SAMA5 PIO: Fix a typo in Schmitt trigger configuration; Configure pin as a a vanilla input first so that final pin configuration is more read-able (i.e., easier to debug) 2014-07-09 17:16:43 -06:00
Gregory Nutt
981c1ebf55 SAMA5 PIO: Fix a typo in Schmitt trigger configuration; Configure pin as a a vanilla input first so that final pin configuration is more read-able (i.e., easier to debug) 2014-07-09 17:16:43 -06:00
Gregory Nutt
0d4255257d SAMA5 I2C Reset: More changes... still does not work right 2014-07-09 15:09:06 -06:00
Gregory Nutt
27be48a1ba SAMA5 I2C Reset: More changes... still does not work right 2014-07-09 15:09:06 -06:00
Gregory Nutt
c1ca11331d SAMA5 TWI: Some restructured needed by up_i2creset. Also timeout needs to vary with the size of the transfer and if debug is on or not 2014-07-09 13:39:10 -06:00
Gregory Nutt
c2ca4be4f5 SAMA5 TWI: Some restructured needed by up_i2creset. Also timeout needs to vary with the size of the transfer and if debug is on or not 2014-07-09 13:39:10 -06:00
Gregory Nutt
ee351dc695 Use sam_pio_forceclk() so that we can read the current state of an open-drain output in the TWI reset logic. 2014-07-09 11:31:21 -06:00
Gregory Nutt
84056291e8 Use sam_pio_forceclk() so that we can read the current state of an open-drain output in the TWI reset logic. 2014-07-09 11:31:21 -06:00
Gregory Nutt
c4b9eaa01f Add a new interface sam_pio_forceclk() that can be used to force PIO clocking on. I am afraid I was too conservative with PIO clocking in the initial design; this is the price 2014-07-09 11:26:07 -06:00
Gregory Nutt
a966e4f30b Add a new interface sam_pio_forceclk() that can be used to force PIO clocking on. I am afraid I was too conservative with PIO clocking in the initial design; this is the price 2014-07-09 11:26:07 -06:00
Gregory Nutt
6c4f57b0dc SAMA5 TWI: Add support for up_i2creset 2014-07-09 09:51:28 -06:00