Commit graph

1993 commits

Author SHA1 Message Date
wangchengdong
15f6e399b8 nuttx/arch: merge tickless and tick process
merge nxsched_timer_expiration() into nxsched_process_timer()
    to improve code efficient

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2026-01-12 16:20:42 +08:00
simbit18
bfa7025c28 arch/xtensa: Fix Kconfig style
- Replace help => ---help---

- Remove TAB

- Add comments

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-01-06 06:35:08 +08:00
rongyichang
3a0ab84855 xtensa/esp32s3: fix dcache flush error in up_flush_dcache
The items is not used in up_flush_dcache, and we should use it in
function cache_invalidate_dcache_items.

Signed-off-by: rongyichang <rongyichang@xiaommi.com>
2026-01-01 07:26:25 -03:00
anjiahao
0a2b01950c sched:use tcb_s inside of task_tcb_s , remove all cast
Simplify the code and remove different tcb

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2025-12-22 17:55:45 +08:00
Alan Carvalho de Assis
30a7420349 boards/esp32: Add initial support to heltec_wifi_lora32
This commit adds basic/initial support to Heltec WiFi LoRa32 board.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-12-21 15:18:08 -03:00
Alan Carvalho de Assis
3bf8b55d64 arch/xtensa/esp32: Add CONFIG_ESP32_IGNORE_CHIP_REVISION_CHECK
This commit add the option that was missing in the esp32_start.c
to ignore the chip version for boards with old ESP32 silicon tape out.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-12-21 15:18:08 -03:00
zhanghongyu
aa8ffea3cf netdev_upperhalf: convert Kconfig to variable
Upperhalf supports multiple working modes at the same time,
which is specified by NIC when register

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2025-12-14 10:01:22 +08:00
Filipe Cavalcanti
49d6177c68 espressif: automate build system for flash enc
Modifies Kconfig and build tools to support flash encryption
and E-Fuse burning when flash encryption is enabled.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Filipe Cavalcanti
8f42a6f6d7 arch/xtensa: add critical section on e-fuse bringup
The efuse initialization requires critical section to avoid a very
hidden corner case when flash encryption is enabled.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Filipe Cavalcanti
151776f0a5 arch/xtensa: change .bss clear location on start
Moves the clearing of global variables to the very start
of the chip start up process. This avoids clearing some
globals that are initialized between the new location and
previous location.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Filipe Cavalcanti
3a74b82e09 arch/xtensa: flash encryption support for ESP32|S2|S3
Deprecates ESP32_STORAGE_MTD_ENCRYPT and ESP32_OTA_PARTITION_ENCRYPT options.
Add ESPRESSIF_SECURE_FLASH_ENC_ENABLED Kconfig option.
Updates SPI Flash driver to handle encryption automatically.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Yanfeng Liu
c38042941f arch/crt0.c: revert entry _start
This reverts crt0.c entry name to _start to fix LTO issue/17443,
needs apps/ side pull/3235.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2025-12-10 19:06:04 +08:00
Filipe Cavalcanti
027bc43df7 arch/xtensa/espressif: add PWM capture getedges function
Create esp_capture_getedges function which was missing from
the capture API.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-03 13:44:25 +08:00
Eren Terzioglu
6b53141c9e arch/xtensa/esp32[-s2|-s3]: Refactor PM support
Refactor PM modes for Xtensa based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-12-02 02:37:06 +08:00
Vlad Pruteanu
70455f1890 xtensa/esp32: Add support for hardware accelerated HMAC-SHA
This add support for using the cryptographic accelerator
within the ESP32 for HMAC-SHA operations. The supported
algorithms are: SHA1 and SHA512.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2025-11-27 03:38:09 +08:00
v-tangmeng
a221df7175 arch/xtensa/esp32[-s2|-s3]: add USE_NXTMPDIR_ESP_REPO_DIRECTLY
Directly downloading the Git repository is inconvenient for local debugging.
This will allow to automatically download external packages from the Internet.
If not set, the repo need to be download will need to provide them manually,
otherwise an error will occur and the build will be aborted.

Add `USE_NXTMPDIR_ESP_REPO_DIRECTLY`, with this we can use
`USE_NXTMPDIR_ESP_REPO_DIRECTLY=y make` which can directly use esp-hal-3rdparty
under nxtmpdir without CLONE, CHECK_COMMITSHA, reset, checkout and update. Just
`cp -rf nxtmpdir/esp-hal-3rdparty chip/$(ESP_HAL_3RDPARTY_REPO)`.

Signed-off-by: v-tangmeng <v-tangmeng@xiaomi.com>
2025-11-18 21:46:50 +08:00
ouyangxiangzhen
fc28b93224 timers/oneshot: Remove all callback and args.
This commit remove all callback and args in the APIs.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-11-18 13:02:29 +01:00
ouyangxiangzhen
5c113f79b7 timers/oneshot: Remove all private callback.
This commit removed all private callback and handle it on the upperhalf
of oneshot.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-11-18 13:02:29 +01:00
wangchengdong
c342c0851f xtensa/esp32s2: Replace spinlock/sched_lock with spin_lock_irqsave_nopreempt
Replace the spinlock/sched_lock pair in xtensa/esp32s2 with
    spin_lock_irqsave_nopreempt() to improve code clarity and consistency.

Signed-off-by: Chengdong Wang wangchengdong@lixiang.com
2025-11-04 22:46:15 +08:00
wangchengdong
97b24a1a0b xtensa/esp32: Replace spinlock/sched_lock with spin_lock_irqsave_nopreempt
Replace the spinlock/sched_lock pair in xtensa/esp32 with
    spin_lock_irqsave_nopreempt() to improve code clarity and consistency.

Signed-off-by: Chengdong Wang wangchengdong@lixiang.com
2025-11-04 22:46:15 +08:00
Filipe Cavalcanti
680766d304 arch/xtensa: update SPI Flash driver for ESP32-S2|S3
Updates the SPI Flash driver used for user storage MTD.
Moves ESP32 and ESP32S3 to use common driver.
Updates KConfig options to keep backwards compatibility.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-29 09:44:55 -04:00
Vlad Pruteanu
8a10e35c0b arch/xtensa/esp32: Fix support for hardware accelerated AES
Curently, the driver code for HW accelerated AES is not usable
since it's not registered within esp32_crypto. This commit fixes
it as well as a few bugs.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2025-10-24 11:20:04 -03:00
Eren Terzioglu
a590599c7e arch/xtensa/esp32[-s3]: Add ULP RISCV coprocessor wakeup
Add ULP RISCV coprocessor wakeup support for esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-24 11:16:11 +08:00
Eren Terzioglu
734068890a arch/xtensa/esp32[-|-s3]: Fix exception issue when pm active
Fix exception issue when PM and DEBUG_ASSERTIONS enabled for esp32 and esp32s3.
This error happens due to PM system workflow, when system gets into sleep-modes with
removing PM_NORMAL count, system is raising an exception for not having
enough number of PM_NORMAL state count if DEBUG_ASSERTIONS enabled.

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-23 09:38:26 -04:00
Eren Terzioglu
24eeff91c0 arch/xtensa/esp32[-s2|-s3]: Add multiple ULP RISC-V bin support
Add multiple ULP RISC-V bin support for esp32s2 and esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
Thiago Finelon
42d5f10c0d arch/xtensa/esp32s3: expose UART RX FIFO controls
Adds Kconfig knobs for the ESP32-S3 RX FIFO full threshold and timeout and wires them into the UART driver.
Clears RX FIFO overflow interrupts by resetting the hardware FIFO so reception resumes cleanly.

Signed-off-by: Thiago Finelon <thiago.sfinelon@gmail.com>
2025-10-17 17:40:32 +08:00
chao an
87f134cfaa sched/sleep: replace all Signal-based sleep implement to Scheduled sleep
Nuttx currently has 2 types of sleep interfaces:

1. Signal-scheduled sleep: nxsig_sleep() / nxsig_usleep() / nxsig_nanosleep()
Weaknesses:
a. Signal-dependent: The signal-scheduled sleep method is bound to the signal framework, while some driver sleep operations do not depend on signals.
b. Timespec conversion: Signal-scheduled sleep involves timespec conversion, which has a significant impact on performance.

2. Busy sleep: up_mdelay() / up_udelay()
Weaknesses:
a. Does not actively trigger scheduling, occupy the CPU loading.

3. New interfaces: Scheduled sleep: nxsched_sleep() / nxsched_usleep() / nxsched_msleep() / nxsched_ticksleep()
Strengths:
a. Does not depend on the signal framework.
b. Tick-based, without additional computational overhead.

Currently, the Nuttx driver framework extensively uses nxsig_* interfaces. However, the driver does not need to rely on signals or timespec conversion.
Therefore, a new set of APIs is added to reduce dependencies on other modules.

(This PR also aims to make signals optional, further reducing the code size of Nuttx.)

Signed-off-by: chao an <anchao.archer@bytedance.com>
2025-10-17 14:05:02 +08:00
Filipe Cavalcanti
7297ecc02e arch/xtensa: add non-iram interrupt support for ESP32-S2
Adds support for enabling and disabling non-iram interrupts on ESP32-S2.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-16 17:06:05 -04:00
Filipe Cavalcanti
df6e5384fe arch/xtensa: update MCUBoot and virtual E-Fuse offset
Updates MCUBoot version and default address for virtual E-Fuse, depending
if MCUBoot is enabled.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-14 17:44:15 +08:00
guoshengyuan1
79711737bc arch/init: call up_color_intstack before up_irq_enable
Make sure interrupt stack is colored before IRQ is enabled.

Currently, after calling irq_initialize in nx_start to
enable interrupts, there is still a period of execution
path before the interrupt stack is colored.

Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
2025-10-14 17:42:01 +08:00
Eren Terzioglu
7e2a06959a arch/xtensa/espressif: Fix efuse build warning for esp32
Fix build warning while building efuse for esp32

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-07 15:18:36 +02:00
Thiago Finelon
7fe0fbd9b8 uart: fix FSM check to avoid PM deadlocks
Incorrect FSM status checks in the suspend path could cause
deadlocks when power management was enabled. This patch fixes
the condition to allow proper UART suspend/resume handling.

Signed-off-by: Thiago Finelon <thiago.sfinelon@gmail.com>
2025-10-06 09:03:03 -03:00
Eren Terzioglu
09c298ed16 arch/xtensa/esp32[-s2|-s3]: Add RTC I2C support for HP Core for esp32[-s2|-s3]
Add RTC I2C support for HP Core for esp32[-s2|-s3]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-01 14:16:55 -04:00
Eren Terzioglu
743b694560 arch/xtensa/esp32[-s2|-s3]: Add RTC I2C support
Add RTC I2C support for esp32[-s2|-s3]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-01 14:16:55 -04:00
Eren Terzioglu
36616025c7 arch/xtensa/esp32[-s2|-s3]: Add RTC GPIO write/read calls support
Add RTC GPIO write/read calls support for esp32[-s2|-s3]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-01 14:16:55 -04:00
Eren Terzioglu
b520655b07 arch/xtensa/esp32[-s2|-s3]: Add ULP RISC-V coprocessor support
Add ULP RISC-V coprocessor support for esp32[-s2|-s3]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-01 14:16:55 -04:00
guoshengyuan1
3f55710184 arch: remove nxsched_resume_scheduler in cpustart
Idle thread initialization does not require calling nxsched_resume_scheduler

Co-authored-by: yinshengkai <yinshengkai@xiaomi.com>
Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
2025-09-30 23:26:28 +08:00
Filipe Cavalcanti
2e39707f3a arch/xtensa/espressif: fix Wi-Fi netpkt copy error
Fix an issue where netpkt copy would fail due to wrong
return checking condition.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-29 17:36:10 -04:00
guoshengyuan1
ca7608c2ac sched/irq: add a check for the interrupt stack in irq_dispatch
After irq_dispatch finished, the interrupt stack will be checked to
determine whether overflow occurs.
The relevant configuration reuses the configuration of stack overflow
detection during context switching.

Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
2025-09-29 19:12:18 +08:00
Matteo Golin
504ec6b2c6 arch/udelay: Make common, weak definition of up_*delay functions
Many different architectures re-implemented the exact same code for
`up_*delay` because it was originally written as architecture dependent
code. Busy-waiting can be done regardless of architecture, so this
commit moves that duplicated implementation to a common file with weak
definitions so that individual architectures (see tc32) are still able
to override the definition if needed/desired.

Default implementation is not included if ARCH_TIMER is enabled, since
it is more accurate and provides its own weak definitions to override.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-09-29 09:22:56 +08:00
guoshengyuan1
5d7ac216f2 arch: optimize up_check_tcbstack for stack overflow detection
Many times, context switching does not occur when the thread stack
memory is almost exhausted, so we need to mofify up_check_tcbstack to
accurately detect it.

Co-authored-by: Chengdong Wang <wangchengdong@lixiang.com>
Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
2025-09-27 12:56:11 +08:00
guoshengyuan1
6a57c56925 arch: replace all nxsched_suspend/resume_*** with nxsched_switch_context
Complete the missing scheduling information in some architectures

In these architectures (riscv, avr, tricor) context switching
can occur in both up_switch_context and xx_doirq

Co-authored-by: yinshengkai <yinshengkai@xiaomi.com>
Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
2025-09-25 16:40:23 +08:00
Huang Qi
6f3658fe23 arch/xtensa: espressif: temperature: Fix incorrect pointer casting
Fix bug in temperature sensor driver where direct casting of lower half
structure pointer could lead to incorrect memory access.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2025-09-20 08:01:21 -03:00
wangchengdong
b92e0b6730 arch: fix alignment bug for archs that need stack alignment
These archs only align the size of the stack, forgeting to do the
 stack start addr alignment, this patch fixes it.

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-09-18 11:11:32 -03:00
Filipe Cavalcanti
662c1e0bbb boards/xtensa: update board and defconfigs for Wi-Fi on ESP32|S2|S3
Updates the defconfigs and board source to support driver refactor.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-14 10:41:15 +08:00
Filipe Cavalcanti
20ff68bd65 arch/xtensa: refactor Wi-Fi driver for ESP32|S2|S3
Fixes low and inconsistent bandwidth issues.
Adds new configuration options for buffer management.
Moves code around to make the implementation cleaner and easier to debug.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-14 10:41:15 +08:00
nuttxs
a5b810bdb1 Kconfig: Add configurable Stack Canaries protection levels.
Introduce a configurable stack-protection level for the existing
CONFIG_STACK_CANARIES, instead of hard-coding -fstack-protector-all.
Add Kconfig choice STACK_CANARIES_LEVEL four selectable levels:

 -fstack-protector
 -fstack-protector-strong
 -fstack-protector-all (default)
 -fstack-protector-explicit

Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
2025-09-11 19:56:42 +08:00
Filipe Cavalcanti
ed751889de arch/xtensa/esp32: Update E-Fuse driver
Updates E-Fuse driver for ESP32, now sharing a common implementation across Xtensa devices.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-06 14:46:32 -03:00
Filipe Cavalcanti
65d5f9bc8f arch/xtensa/esp32s2: Update E-Fuse driver
Updates E-Fuse driver for ESP32S2, sharing a common implementation for Xtensa devices.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-06 14:46:32 -03:00
Filipe Cavalcanti
23faaa29f7 arch/xtensa/esp32s3: Update E-Fuse driver
Updates E-Fuse driver for ESP32S3, now sharing a common implementation across
Xtensa devices.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-06 14:46:32 -03:00