Commit graph

59426 commits

Author SHA1 Message Date
wangchengdong
5beb4ae6d5 sched/sched: Introduce nxsched_wakeup()
Add a new function nxsched_wakeup() to the scheduler,
    which allows waking up a sleeping task before its timeout.

Signed-off-by: Chengdong Wang wangchengdong@lixiang.com
2025-10-28 10:43:24 +08:00
wangchengdong
201406b22b sched/sched: Reuse nxsig_wait_irq() in nxsig_timeout()
Currently, there is duplicated code in nxsig_wait_irq() and nxsig_timeout().
    This patch updates the input parameters of nxsig_wait_irq() so that it can
    be reused in nxsig_timeout(), reducing code duplication and improving
    maintainability.

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-10-27 10:05:45 -03:00
wangchengdong
6913e52ac3 sched/signal: Remove redundant code in nxsig_wait_irq()
nxsig_wait_irq() is always invoked within an existing critical section,
    and the task state is already verified, similar to nxsem_wait_irq().
    Therefore, the additional critical section protection and task state
    check inside the function are redundant and have been removed.

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-10-27 10:05:45 -03:00
dependabot[bot]
6e7a498787 build(deps): bump actions/download-artifact from 5 to 6
Bumps [actions/download-artifact](https://github.com/actions/download-artifact) from 5 to 6.
- [Release notes](https://github.com/actions/download-artifact/releases)
- [Commits](https://github.com/actions/download-artifact/compare/v5...v6)

---
updated-dependencies:
- dependency-name: actions/download-artifact
  dependency-version: '6'
  dependency-type: direct:production
  update-type: version-update:semver-major
...

Signed-off-by: dependabot[bot] <support@github.com>
2025-10-27 19:47:03 +08:00
dependabot[bot]
817a063b9b build(deps): bump actions/upload-artifact from 4 to 5
Bumps [actions/upload-artifact](https://github.com/actions/upload-artifact) from 4 to 5.
- [Release notes](https://github.com/actions/upload-artifact/releases)
- [Commits](https://github.com/actions/upload-artifact/compare/v4...v5)

---
updated-dependencies:
- dependency-name: actions/upload-artifact
  dependency-version: '5'
  dependency-type: direct:production
  update-type: version-update:semver-major
...

Signed-off-by: dependabot[bot] <support@github.com>
2025-10-27 19:46:58 +08:00
Alan Carvalho de Assis
8cb1fd713e drivers/usbhost_hub: Add support to Multiple TT HS HUB
This is the case for USB2517 USB HUB. Also improved the driver to
avoid mistakes: initially I changed g_id[3], but the in register
there is another field where we need to pass this size again. So
it is better to use ARRAY_SIZE() macro to avoid mistakes.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-10-27 18:24:42 +08:00
Stepan Pressl
cf0d962d9c samv7/mcan,emac: revision logic based on sam_has_revb_periphs
The sam_has_revb_periphs function is used to configure
the peripherals correctly.

Signed-off-by: Stepan Pressl <pressl.stepan@gmail.com>
2025-10-27 00:09:11 +08:00
Stepan Pressl
9fc84c250d samv7/sam_chipid: add sam_has_revb_periphs function
This function can identify (during the runtime) whether the chip
is revB or revA. Bear in mind PIC32CZ2051CA70 is always revB.
Allows to have one binary compatible with SAMV7 and PIC32.

Thanks to Pavel Pisa and Michal Lenc for the suggested code.

Signed-off-by: Stepan Pressl <pressl.stepan@gmail.com>
2025-10-27 00:09:11 +08:00
Kevin Witteveen (MartiniMarter)
32a8caf66b documentation: JPEGResizeTool application and libjpeg
Signed-off-by: Kevin Witteveen (MartiniMarter) <kevinwit1999@gmail.com>
2025-10-26 09:44:46 -04:00
Lars Kruse
8c91052433 boards/arm/rp2040: allow flash write operation on rp2040 in SMP mode
Previously the function "up_cpu_pause" was used for preventing all other
CPUs from executing code from flash.
The above function was removed in d8cb7759.

Now flash operations work on rp2040 in SMP mode by blocking all but the
current CPU for the duration of the critical function (write or erase).

Closes: #16203

Signed-off-by: Lars Kruse <devel@sumpfralle.de>
2025-10-26 08:07:08 -03:00
kywwilson11
35d1aaafda arch/arm/stm32h5: STM32H5 PWM Driver (STM32H7 port)
Adding the stm32h5 pwm driver. This is almost an exact copy of the stm32h7 pwm driver. I confirmed the timers for the h5 are version v2 and added the preprocessor definition. This commit was tested on a stm32h5 nucleo-h563zi development board. Necessary board files and a pwm config have been added. Added pin mappings for all timer outputs.

Signed-off-by: kywwilson11 <kwilson@2g-eng.com>

Added documentation regarding nucleo-h563zi:pwm config.

Removed CONFIG_STM32H5_PWM guard at the top. Fixed IRQs for tim1 and tim8. Added H5 to list of Timer IP v2 timers.

Conditionally compile stm32_serial.c.

Add stm32_pwm.c to CMakeLists.txt
2025-10-25 12:48:34 +08:00
simbit18
678cd54aa8 arch/arm/src/stm32h5: CMake build implemented for STM32H5 MCU series
- added STM32H5 MCU series

Signed-off-by: simbit18 <simbit18@gmail.com>
2025-10-24 12:17:07 -04:00
simbit18
14a0780ff5 board/arm/stm32h5: Added CMake build for NUCLEO-H563ZI board
- CMake added board STM32 NUCLEO-H563ZI

https://www.st.com/en/evaluation-tools/nucleo-h563zi.html

Signed-off-by: simbit18 <simbit18@gmail.com>
2025-10-24 12:17:07 -04:00
Vlad Pruteanu
8a10e35c0b arch/xtensa/esp32: Fix support for hardware accelerated AES
Curently, the driver code for HW accelerated AES is not usable
since it's not registered within esp32_crypto. This commit fixes
it as well as a few bugs.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2025-10-24 11:20:04 -03:00
Matteo Golin
b2e823d0b9 docs/platforms/risc-v/esp32c3-legacy/boards/esp32c3-devkit-rust-1: Migrate README.txt
Migrate README.txt to RST, adhering to the standard board documentation
template.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:16:36 +02:00
Matteo Golin
b7de650968 docs/platforms/risc-v/fe310/boards/hifive1-revb: Migrate README.txt
Migrate README.txt to RST format adhering to the standard board
documentation template.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:16:36 +02:00
Matteo Golin
cb710a71d1 docs/platforms/risc-v/rv32m1/boards/rv32m1-vega: Migrate README.txt
Migrate README.txt to RST format adhering to the standard board
documentation template.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:16:36 +02:00
Matteo Golin
6056fd61f3 docs/platforms/risc-v/c906/boards/smartl-c906: Migrate README.txt
Migrate README.txt to RST documentation format adhering to standard
board documentation template.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:16:36 +02:00
Matteo Golin
865753fd80 docs/platforms/risc-v/hpm6750/boards/hpm6750evk2: Migrate README.txt
Migrate README.txt to RST format adhering to standard board
documentation template.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:16:36 +02:00
Matteo Golin
525db5309d docs/platforms/risc-v/litex/boards/arty_a7: Migrate README.txt
Migrated legacy README.txt documentation to RST format which aligns with
the standard template for board documentation.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:16:36 +02:00
Matteo Golin
a0c878ad96 docs/platforms/risc-v/k210/boards/maix-bit: Migrate README.txt
Migrated legacy README.txt documentation to RST format following the
standard board documentation template.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:16:36 +02:00
Matteo Golin
286bec29d9 docs/platforms/sim/sim/boards/sim: Clean up legacy SIM documentation.
Migrate README.txt about ROMFS to SIM documentation in RST format. Also
cleans up the formatting of the board documentation to leverage RST's
features.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-10-24 10:15:24 +02:00
Eren Terzioglu
3893350287 Documentation/xtensa/esp32s3: Add ULP RISCV coprocessor wakeup docs
Add ULP RISCV coprocessor wakeup docs for esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-24 11:16:11 +08:00
Eren Terzioglu
de9cb4be9f arch/xtensa/esp32[-s3]: Add ULP RISCV coprocessor wakeup board support
Add ULP RISC-V coprocessor wakeup board support for esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-24 11:16:11 +08:00
Eren Terzioglu
a590599c7e arch/xtensa/esp32[-s3]: Add ULP RISCV coprocessor wakeup
Add ULP RISCV coprocessor wakeup support for esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-24 11:16:11 +08:00
Alan C. Assis
ff0fa9807a doc: Add semihost syslog guide instructions
Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-10-24 09:56:24 +08:00
Eren Terzioglu
734068890a arch/xtensa/esp32[-|-s3]: Fix exception issue when pm active
Fix exception issue when PM and DEBUG_ASSERTIONS enabled for esp32 and esp32s3.
This error happens due to PM system workflow, when system gets into sleep-modes with
removing PM_NORMAL count, system is raising an exception for not having
enough number of PM_NORMAL state count if DEBUG_ASSERTIONS enabled.

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-23 09:38:26 -04:00
kywwilson11
aa8fb9ae2e arch/arm/stm32h5: Add defines for ADC_HAVE_WDG
AWD defines needed by stm32_adc.c were missing from PR #17007. This commit adds them in.

Signed-off-by: kywwilson11 <kwilson@2g-eng.com>
2025-10-23 20:46:20 +08:00
Alan C. Assis
1f15756156 fs/fat: Ignore //... sequences in the file path
This fixes an issue reported by user harishn6 on github.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-10-23 08:44:12 -04:00
Filipe Cavalcanti
fb4274187b boards/risc-v: optimize linker script IRAM section
Adds lipbb (Wi-Fi related) to IRAM and removes unnecessary E-Fuse sources.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-23 20:34:59 +08:00
Filipe Cavalcanti
58cdb9cfea boards/xtensa: optimize linker script IRAM section
Improve IRAM usage.
- Remove unnecessary E-Fuse sources;
- Optimizing (ESP32) and add (S2|S3) libpp(Wi-Fi related).

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-23 20:34:59 +08:00
Geoffroy Du Prey
28a6f7c541 docs/config: Wrong term.
Fixes #17225

Signed-off-by: Geoffroy Du Prey <geoffroy.duprey@wandercraft.health>
2025-10-23 16:46:31 +08:00
simbit18
bbe1d420a7 arch/risc-v/rp23xx-rv: CMake build implemented for Raspberry Pi RP2350 RISCV
- added Raspberry Pi RP2350 RISCV (Hazard3 RISC-V cores)

Signed-off-by: simbit18 <simbit18@gmail.com>
2025-10-22 09:01:39 -04:00
simbit18
fc536babfa board/risc-v/rp23xx-rv: Added CMake build for Raspberry Pi Pico 2 RISC-V board
- CMake added board Raspberry Pi Pico 2 RISC-V

- Created a file rp23xx_common_pico.h with function
   prototype

     int rp23xx_dev_gpio_init(void);

 to allow cmake + ninja to build without errors.

Signed-off-by: simbit18 <simbit18@gmail.com>
2025-10-22 09:01:39 -04:00
ouyangxiangzhen
be413af022 compiler: Fix inlining stack-overflow.
If the compiler optimization is disabled, the stack-usage of inlining functions will not be optimized.
In this case, force inlining can lead to stack-overflow (e.g.
qemu-armeabi-v7a-bl). This commit replaced the definition of the
always_inline_function and inline_function with the inline
keyword to avoid force-inlining.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-10-22 09:46:42 +08:00
ouyangxiangzhen
f309d65a7f lib/math32: improve the performance of invdiv_u32.
This commit provided a better invdiv_u32 implementation on 64-bit architectures. The test results showed it is 25% faster than the original implementation on x86_64.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-10-22 09:46:42 +08:00
ouyangxiangzhen
f6dfd3f6d0 lib/math32: Support optimized runtime-invariant integer division.
This commit implemented optimized runtime-invariant integer division
proposed by T. Granlund and L. Montgomery. It can be used to convert the
hardware clock cycles to seconds, where the clock frequency is runtime-invariant.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-10-22 09:46:42 +08:00
Eren Terzioglu
f564f4fc56 Documentation/risc-v/esp32[c6]: Add multiple ULP bin docs for esp32c6
Add multiple ULP bin docs for esp32c6

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
Eren Terzioglu
11b1361a96 boards/risc-v/esp32[c6]: Add multiple ULP bin board support for esp32c6
Add multiple ULP bin board support for esp32c6

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
Eren Terzioglu
7aaac3ed8e arch/risc-v/esp32[c6]: Add multiple ULP bin support for esp32c6
Add multiple ULP bin support for esp32c6

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
Eren Terzioglu
a3841a1678 Documentation/xtensa/esp32[-s2|-s3]: Add multiple ULP RISC-V bin docs
Add multiple ULP RISC-V bin docs for esp32s2 and esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
Eren Terzioglu
6702b4fdb4 boards/xtensa/esp32[-s2|-s3]: Add multiple ULP RISC-V bin board support
Add multiple ULP RISC-V bin board support for esp32s2 and esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
Eren Terzioglu
24eeff91c0 arch/xtensa/esp32[-s2|-s3]: Add multiple ULP RISC-V bin support
Add multiple ULP RISC-V bin support for esp32s2 and esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
Eren Terzioglu
7403177473 arch/risc-v/espressif: Add ULP as char device to support multiple ULP bins
Add ULP as char device to change binary that runs on ULP

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
simbit18
90a881271e CI MSYS2 : added the genromfs tool for creating romfs file systems
Add:

 - the genromfs tool for creating romfs file systems

https://github.com/chexum/genromfs

Signed-off-by: simbit18 <simbit18@gmail.com>
2025-10-21 01:14:15 +08:00
Alexander Lerach
a9b258aa68 arch/arm/stm32h7: Fix UART TX DMA getting stuck
When closing a serial port an ongoing TX DMA transfer will be stopped. This can cause
one (or multiple) the following:

- dev->dmatx.length != 0
- dev->dmatx.nlength != 0
- stm32_dmaresidual returning a non-zero residual

This is caused by length/nlength not being set to 0 at startup or during closing.
In addition the DMA_SxNDTR register is not set to 0 at startup or during closing.

This commit solves the issue by setting the variables and register to 0 during closing.

Signed-off-by: Alexander Lerach <alexander@auterion.com>

arch/arm/stm32h7: Add review feedback regarding style

Removed non-needed spaces.
Aligned style of documentation.

Signed-off-by: Alexander Lerach <alexander@auterion.com>
2025-10-21 01:10:05 +08:00
wangchengdong
fca1010a5b arch/risc-v: remove duplicated nxsched_switch_context() call
The nxsched_switch_context() function should only be called
    when a task switch actually occurs. The RISC-V architecture
    already performs this call in riscv_perform_syscall(),
    so this PR removed the redundant nxsched_switch_context() call in
    up_switch_context().

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-10-21 01:05:33 +08:00
Tiago Medicci Serrano
fcb96babc5 risc-v/espressif/spi: Update common source code functions
Updates the common source code for the SPI peripheral used by
Espressif's RISC-Vs SoCs. This enables newer SoCs to be supported
in the future while maintaining backwards compatibility.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2025-10-21 01:03:36 +08:00
wangchengdong
97db9a499c sched/signal: use list_waitingforsignal() to access g_waitingforsignal
Replace direct access to the g_waitingforsignal list with the
    NuttX-defined macro list_waitingforsignal() to improve code
    consistency and maintainability.

Signed-off-by: Chengdong Wang wangchengdong@lixiang.com
2025-10-20 11:24:25 -03:00
wangchengdong
4bdd33a035 nuttx/cmake: Remove redundant logic in CMake scripts
Simplify the CMake scripts by removing redundant logic to
    improve code readability and maintainability.

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-10-20 10:08:28 +08:00