BREAKING CHANGE:
Part of splitting the legacy stm32 super-directory; relocates
the stm32g0 sources, headers and boards into arch/arm/src/stm32g0,
arch/arm/include/stm32g0 and boards/arm/stm32g0.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE:
Part of splitting the legacy stm32 super-directory; relocates
the stm32l0 sources, headers and boards into arch/arm/src/stm32l0,
arch/arm/include/stm32l0 and boards/arm/stm32l0.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE:
Part of splitting the legacy stm32 super-directory; relocates
the stm32f0 sources, headers and boards into arch/arm/src/stm32f0,
arch/arm/include/stm32f0 and boards/arm/stm32f0.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: Common STM32 source and private header files moved to
arch/arm/src/common/stm32. Out-of-tree code that references family-local
common source paths must update includes, build rules, and source paths
to the new common STM32 location.
Signed-off-by: raiden00pl <raiden00@railab.me>
Add boards/arm/stm32l4/common so STM32L4 boards build through the shared
STM32 board-common tree (boards/arm/common/stm32), like the other split
STM32 families.
Convert each STM32L4 board's src/Makefile to src/Make.defs so the
per-board sources are pulled in by the common board Makefile.
Signed-off-by: raiden00pl <raiden00@railab.me>
BREAKING CHANGE: Move the existing STM32 board common sources to
boards/arm/common/stm32 and fold in the common STM32F0/L0/G0/C0
board helpers so split STM32 board families can share one source
tree.
Signed-off-by: raiden00pl <raiden00@railab.me>
Document the SCPI parser application, including source location, basic Kconfig options, and the unit parser options introduced by apache/nuttx-apps#3556.
Signed-off-by: Nightt <87569709+nightt5879@users.noreply.github.com>
struct gran_s and struct graninfo_s store granule counts in uint16_t.
Reject pools whose computed granule count exceeds UINT16_MAX,
instead of truncating the count and creating an invalid handle.
Signed-off-by: shichunma <shichunma@bestechnic.com>
Add application-level documentation for the Dropbear SSH server port,
covering prerequisites, configuration options, usage and troubleshooting.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
NuttX has no real session/process-group abstraction, so the TTY layer
collapses the foreground process group onto the single dev->pid field
(pgrp == pid, one member per group). Extend the controlling-terminal
support so portable software (e.g. dropbear, socat) that relies on
job-control primitives works without losing the existing NuttX-specific
behaviour.
Driver (serial.c, pty.c):
- TIOCSCTTY now accepts a flag: arg > 0 keeps the historical "target
PID in arg" semantics (NSH registers the foreground command it just
spawned), while arg == 0 selects the calling task via
nxsched_getpid(), matching the POSIX flag convention used by
dropbear/socat/apue. This preserves all existing callers and makes
the previously-dead arg==0 path deliver SIGINT correctly.
- Add TIOCGPGRP/TIOCGSID (return dev->pid) and TIOCSPGRP (set it).
- pty.c gains the same handlers against pd_pid and includes
nuttx/sched.h for nxsched_getpid().
ioctl numbers (tioctl.h): TIOCGPGRP/TIOCSPGRP/TIOCGSID at 0x37-0x39.
libc wrappers:
- termios: tcgetpgrp(), tcsetpgrp(), tcgetsid() over the new ioctls.
- unistd: setsid()/getsid()/setpgid() stubs consistent with the
existing getpgrp()/getpgid() single-session model (sid == pgid ==
pid; setpgid only succeeds for pgid == pid).
Declare the new prototypes in unistd.h (tcgetsid was already in
termios.h) and register all sources in the Make.defs/CMakeLists.
Group-broadcast signalling (kill(-pgrp)) remains unsupported, so
tty signals still target the single dev->pid; a real session/process
group model is left as a follow-up.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Fixed three bugs in the RP23XX (RISC-V) PWM driver, mirroring the fix
previously applied to the ARM variant:
* setup_period: The previous divisor calculation used integer arithmetic
that caused overflow and loss of precision. The divider is now computed
as a 16-bit fixed-point value (div16) using 64-bit arithmetic, and
clamped to the valid hardware range (0x10 to 0xFFF).
* setup_pulse: The compare value was incorrectly scaled by TOP instead
of 65535, producing wrong duty cycles. The formula is now corrected
to ((duty * (top + 1)) / 65535) with an overflow guard.
* pwm_start: The driver was not updated as part of the breaking change
introduced in commit 4df80e19 ("!drivers/pwm: remove PWM_MULTICHAN
option"). Access to single channel API is now info->channels[0].duty
instead of info[0].duty.
Signed-off-by: Brunocor26 <bruno.correia@ubi.pt>
Add getgrouplist() to the C library. It scans the group database for
a user's supplementary groups and always reports the primary group
first. Without CONFIG_LIBC_GROUP_FILE only the primary group is
returned, since no membership information is available.
The group file is read through lib_get_tempbuffer()/lib_put_tempbuffer()
to avoid a heap allocation on every lookup.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
The current implementation exits syslog_write_foreach function
if write to one channel fails, causing other channels not being written
and returning negated errno. libc syslog functions then stay in
an infinite loop, because error is returned and the same bytes
are still passed to syslograwstream_flush and syslog_write_foreach.
The channel write may fail for many reasons - disconnected USB if
CDC ACM syslog is enabled, lost networking if telnet syslog is enabled,
error on NOR flash etc. This shouldn't lead to an ininite loop in the
code though.
The solution ensures all channels in syslog_write_foreach are tried,
therefore the user get the output to the working channels even if
the first one is broken. It also updates syslograwstream_addchar and
syslograwstream_addstring to skip the bytes if all channels fails. This
ensures syslog call won't result in an infinite loop, but the user may
lost the debugging output.
Co-authored-by: Martin Krasula <mkrasula@elektroline.cz>
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This commit includes BMP280 driver registration on I2C1 in the RPi4B
bringup logic _if_ the user selects the board-level configuration option
(so as to not interfere with any user's custom implementation of
interfacing with this sensor). A configuration is added with the BMP280
registration, example program and `uorb_listener` that is also
documented.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
Includes a new I2C configuration (and documentation for it) to use the
I2C1 bus on the Raspberry Pi 4B.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
Change the I2C character device registration to depend on the correct
CONFIG option for enabling character drivers.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
This commit adds support for I2C transfers spread across multiple
messages using the I2C_M_NOSTOP/I2C_M_NOSTART. The approach greedily
merges as many sequential I2C messages together as possible and
considers them as a single transfer.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
On STM32H5, ADC1.OR.OP0 (RM0481 26.6.23) enables the GPIO switch that
routes PA0 to ADC mux (ADC1_INP0 or ADC1_INN1).
Set ADC1.OR.OP0 during `adc_setup()` when ADC1 channel 0 is selected, or
when channel 1 is configured in differential mode.
Signed-off-by: Joao Mario Lago <joao.mario.lago@hotmail.com>
Add QSPI mode to the GD25 MTD driver alongside the existing SPI path.
When CONFIG_GD25_QSPI is selected, sector erase, chip erase, byte read,
page write, and byte write all use the QSPI command/memory interfaces
instead of SPI. Reads use the quad I/O fast-read command (1-4-4) and
writes use the quad page-program command (1-1-4) via QSPIMEM_QUADDATA.
A new Kconfig option enables the QE bit in SR2 at initialisation so the
quad I/O pins are active.
Signed-off-by: Sammy Tran <sammytran@geotab.com>
Add QSPIMEM_QUADDATA to the QSPI memory flags. This flag selects quad
data width while keeping the address phase on a single line (1-1-4),
which QSPIMEM_QUADIO cannot express (it forces quad on both address and
data phases). Update stm32_qspi_memory() to honour the new flag by
setting CCR_DMODE_QUAD without touching the address mode.
Signed-off-by: Sammy Tran <sammytran@geotab.com>
Check open access against file mode and owner via fs_checkmode(), verify
parent directory permissions on create, and assign creator uid/gid to
newly created files.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
Store uid/gid/mode on tmpfs objects, support chstat, enforce open and
path permissions via fs_checkmode()/fs_checkopenperm(), and inherit
creator identity on file creation.
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
Even after installing the ftdi library on CI it doesn't work to
compile the sim:ft2232h_gpio, so remove it from CI test.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
Add fs_checkmode() and fs_checkopenperm() for reuse across filesystems.
Enforce pseudoFS mode bits in inode_checkperm() and allow world-readable
open of passwd/group entries so getpwnam() works after seteuid().
Signed-off-by: Abhishek Mishra <mishra.abhishek2808@gmail.com>
In arm_addrenv_create_region(), the inner loop already advances vaddr by
MM_PGSIZE for each mapped page, so after filling one L2 page table
(i.e., ENTRIES_PER_L2TABLE pages), vaddr has naturally advanced to the
start of the next 1MB section. The old code additionally added
i * SECTION_SIZE, causing the L1 entry for the second and subsequent
sections to skip one section each iteration—leaving virtual address
holes in the mapping.
Remove the redundant i * SECTION_SIZE offset so that the L1 entry tracks
the vaddr already maintained by the inner loop, producing contiguous
section mappings.
Signed-off-by: leisiji <2265215145@qq.com>
Update the function definitions in all 6 clk implementation files to
match the uintptr_t parameter type already declared in clk_provider.h.
Fixes CI error:
error: conflicting types for 'clk_register_divider'
Signed-off-by: hanzhijian <hanzhijian@zepp.com>
Change the 'reg' field type from uint32_t to uintptr_t in all clock
provider structs (clk_gate_s, clk_divider_s, clk_phase_s,
clk_fractional_divider_s, clk_multiplier_s, clk_mux_s) and their
corresponding clk_register_*() function prototypes.
Also update clk_write() and clk_read() inline functions to take
uintptr_t parameter and remove the now-redundant (uintptr_t) cast.
On 32-bit embedded platforms uintptr_t equals uint32_t so there is
no functional change. On 64-bit targets (e.g. sim) this fixes
-Wint-to-pointer-cast warnings that GCC15 promotes to errors.
Fixes: #16896
Signed-off-by: hanzhijian <hanzhijian@zepp.com>
This change mentions the special Kconfig settings for custom boards to
tell the build system about properties that are defined using the `HAVE`
options for in-tree boards. It also specifically mentions to avoid using
Kconfig `if` guards around the custom board Kconfig, which would be a
gotcha for people copying from in-tree boards.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
fix
Document NSH identity commands and how login/su update the prompt (# for
effective root, $ for non-root). Cover flat-build euid semantics, related
Kconfig options, and session identity behavior after login.
The function seek which allows the user to move the cursor to a particular
offset in order to read and write from EEPROM storage does not validate the
offset is valid. Later, this can cause an out-of-bounds reads or writes.
Note that newpos may store a large value, larger than the size of the EEPROM.
Similar change in the SPI driver.
Tested locally, builds fine.
Signed-off-by: Catalin Visinescu <catalin_visinescu@yahoo.com>
This commits adds an example of the NuttX Web Panel documentation
along with its usage on ESP32-P4.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit adds a defconfig for enabling the NuttX Web Panel on
ESP32-P4. It also create entries to automatically call the Web
panel application after system's boot up.
The `webpanel` is removed from regular ESP32-P4 CI testing because
it ships with Python and that would overload CI infrastructure.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
An unchecked integer assignment in the CAN driver may result in a division-by-zero which would result in a kernel crash (denial of service).
Tested locally, builds fine.
An unchecked integer assignment in the CAN driver may result in a division-by-zero which would result in a kernel crash (denial of service).
The CAN driver `can_ioctl` function, shown below (drivers/can/can.c), receives commands from user processes. Its received arguments `cmd` and content of `arg` are under attacker's control. In the CAN driver, some `ioctl` commands are hardware specific and are processed by calling `dev_ioctl()`. Subsequently, depending on the hardware (STM32 or AT32), this function calls `fdcan_ioctl` or `at32can_ioctl`, as shown in the snippets that follow.
```c
static int can_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
{
FAR struct inode *inode = filep->f_inode;
FAR struct can_dev_s *dev = inode->i_private;
FAR struct can_reader_s *reader = filep->f_priv;
...
flags = enter_critical_section();
/* Handle built-in ioctl commands */
switch (cmd)
{
...
/* Not a "built-in" ioctl command.. perhaps it is unique to this
* lower-half, device driver. */
default:
{
ret = dev_ioctl(dev, cmd, arg);
}
break;
}
leave_critical_section(flags);
return ret;
}
```
There are a few instances where the user can trigger a kernel crash, caused by a division by zero on `CANIOC_SET_BITTIMING` command. On STM32 platforms (arch/arm/src/stm32/stm32_fdcan.c), while there is a `DEBUGASSERT` assertion for `bt->bt_baud`, the check does not cover value `0`.
```c
static const struct can_ops_s g_fdcanops =
{
...
.co_ioctl = fdcan_ioctl,
...
};
static int fdcan_ioctl(struct can_dev_s *dev, int cmd, unsigned long arg)
{
...
switch (cmd)
{
...
case CANIOC_SET_BITTIMING:
{
const struct canioc_bittiming_s *bt = (const struct canioc_bittiming_s *)arg;
uint32_t nbrp;
uint32_t ntseg1;
uint32_t ntseg2;
uint32_t nsjw;
uint32_t ie;
uint8_t state;
DEBUGASSERT(bt != NULL);
DEBUGASSERT(bt->bt_baud < STM32_FDCANCLK_FREQUENCY); // <- not valid
DEBUGASSERT(bt->bt_sjw > 0 && bt->bt_sjw <= 16);
DEBUGASSERT(bt->bt_tseg1 > 1 && bt->bt_tseg1 <= 64);
DEBUGASSERT(bt->bt_tseg2 > 0 && bt->bt_tseg2 <= 16);
/* Extract bit timing data */
ntseg1 = bt->bt_tseg1 - 1;
ntseg2 = bt->bt_tseg2 - 1;
nsjw = bt->bt_sjw - 1;
nbrp = (uint32_t)
( ((float) STM32_FDCANCLK_FREQUENCY /
((float)(ntseg1 + ntseg2 + 3) * (float)bt->bt_baud)) - 1 ); // <- div by 0
```
Similarly, another division by zero was found in Artery Technology AT32 (arch/arm/src/stm32/stm32_can.c) driver:
```c
static const struct can_ops_s g_canops =
{
...
.co_ioctl = at32can_ioctl,
...
};
static int at32can_ioctl(struct can_dev_s *dev, int cmd, unsigned long arg)
{
...
/* Handle the command */
switch (cmd)
{
...
case CANIOC_SET_BITTIMING:
{
const struct canioc_bittiming_s *bt = (const struct canioc_bittiming_s *)arg;
...
uint32_t tmp;
uint32_t regval;
DEBUGASSERT(bt != NULL);
DEBUGASSERT(bt->bt_baud < AT32_PCLK1_FREQUENCY); // <- not valid
DEBUGASSERT(bt->bt_sjw > 0 && bt->bt_sjw <= 4);
DEBUGASSERT(bt->bt_tseg1 > 0 && bt->bt_tseg1 <= 16);
DEBUGASSERT(bt->bt_tseg2 > 0 && bt->bt_tseg2 <= 8);
regval = at32can_getreg(priv, AT32_CAN_BTMG_OFFSET);
/* Extract bit timing data tmp is in clocks per bit time */
tmp = AT32_PCLK1_FREQUENCY / bt->bt_baud; // <- div by 0
```
Instances found are listed in the *Location* section below. They are not shown in detail to reduce the length of the issue.
Ensure the attacker-controlled data is properly validated before use, to stop division by zero situations. For instance:
```c
DEBUGASSERT(bt->bt_baud > 0 && bt->bt_baud < AT32_PCLK1_FREQUENCY);
```
* arch/arm/src/stm32/stm32_fdcan.c
* arch/arm/src/stm32/stm32_can.c
* arch/arm/src/sama5/sam_mcan.c
* arch/arm/src/at32/at32_can.c
* arch/arm/src/samv7/sam_mcan.c
* arch/arm/src/stm32f0l0g0/stm32_fdcan.c
* arch/arm/src/stm32f7/stm32_can.c
* arch/arm/src/stm32h5/stm32_fdcan.c
* arch/arm/src/stm32l4/stm32l4_can.c
* arch/arm/src/tiva/common/tiva_can.c
* drivers/can/mcp2515.c
Signed-off-by: Catalin Visinescu <catalin_visinescu@yahoo.com>
struct pthread_cond_s contains three fields: sem, clockid, and
wait_count. However, PTHREAD_COND_INITIALIZER only initialized the first
two fields, which triggers -Wmissing-field-initializers when a condition
variable is statically initialized.
Initialize wait_count explicitly to zero so the macro matches the structure
definition and remains warning-free with strict compiler flags.
Validated with a minimal compile test using:
pthread_cond_t cond = PTHREAD_COND_INITIALIZER;
Signed-off-by: nicolasWDC <nicolasWDC@users.noreply.github.com>
1. Don't fail LTE GETQUAL on AT+CSQ error
The LTE_CMDID_GETQUAL handler queried the modem with AT+CESQ (RSRP/RSRQ)
and then AT+CSQ (RSSI), returning the result of the last command.
Set 'valid' only when AT+CESQ parses, treat AT+CSQ as optional, zero
the metrics up front, and return OK so the caller inspects 'valid'.
2. get SNIR
Signed-off-by: raiden00pl <raiden00@railab.me>
Add LTE_CMDID_SETPSM / LTE_CMDID_SETEDRX handling that encodes the requested
PSM (T3412/T3324) and eDRX timers to AT+CPSMS / AT+CEDRXS, so the LTE power
saving modes are controllable through the common LTE API.
Signed-off-by: raiden00pl <raiden00@railab.me>
Correct build errors when CONFIG_ENABLE_ALL_SIGNALS is not defined
- sched makefiles: Move pending-signal helpers from the ENABLE_ALL_SIGNALS-only
list to the !DISABLE_ALL_SIGNALS list so signal dispatch is available in
PARTIAL builds sched: make SIG_PREALLOC_ACTIONS, SIG_ALLOC_ACTIONS and
SIG_DEFAULT depend on ENABLE_ALL_SIGNALS
- sched: fix ifdefs around pending-signal queue access and signal-mask for
PARTIAL/DISABLE modes
- arch: gate SYS_signal_handler / _return calls and SYSCALL_LOOKUP(signal)
with ENABLE_ALL_SIGNALS
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
