!arch/stm32f0l0g0: move stm32f0 to its own directory

BREAKING CHANGE:

Part of splitting the legacy stm32 super-directory; relocates
the stm32f0 sources, headers and boards into arch/arm/src/stm32f0,
arch/arm/include/stm32f0 and boards/arm/stm32f0.

Signed-off-by: raiden00pl <raiden00@railab.me>
This commit is contained in:
raiden00pl 2026-05-25 22:43:32 +02:00 • committed by Alan C. Assis
parent f491361368
commit ccdc7a3a28
84 changed files with 1478 additions and 164 deletions

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@ -0,0 +1,238 @@
/****************************************************************************
* arch/arm/include/stm32f0/chip.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_STM32F0_CHIP_H
#define __ARCH_ARM_INCLUDE_STM32F0_CHIP_H
#define ARMV6M_PERIPHERAL_INTERRUPTS 32
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/* Get customizations for each supported chip */
#if defined(CONFIG_ARCH_CHIP_STM32F030RC) || defined(CONFIG_ARCH_CHIP_STM32F030CC)
# define STM32_FLASH_SIZE (256 * 1024) /* 256Kb */
# define STM32_SRAM_SIZE (32 * 1024) /* 32Kb */
# define STM32_NSPI 2 /* Two SPI modules (SPI or I2S) */
# define STM32_NI2S 0 /* No I2S modules */
# define STM32_NI2C 2 /* Two I2C modules */
# define STM32_NDMA 1 /* 1 DMA1, 7-channels */
# define STM32_NUSART 6 /* Six USARTs modules */
# define STM32_NCAN 0 /* No CAN controllers */
# define STM32_NUSBDEV 0 /* One USB full-speed device controller */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 0 /* One DAC channel */
# define STM32_NCOMP 0 /* Two Analog Comparators */
# define STM32_NCAP 0 /* Capacitive sensing channels (14 on UFQFPN32)) */
# define STM32_NPORTS 5 /* Five GPIO ports, GPIOA-D, F */
#elif defined(CONFIG_ARCH_CHIP_STM32F051R8)
# define STM32_FLASH_SIZE (64 * 1024) /* 64Kb */
# define STM32_SRAM_SIZE (8 * 1024) /* 8Kb */
# define STM32_NSPI 2 /* Two SPI modules (SPI or I2S) */
# define STM32_NI2S 2 /* Two I2S modules (SPI or I2S) */
# define STM32_NI2C 2 /* Two I2C modules */
# define STM32_NDMA 1 /* 1 DMA1, 7-channels */
# define STM32_NUSART 2 /* Two USARTs modules */
# define STM32_NCAN 0 /* No CAN controllers */
# define STM32_NUSBDEV 1 /* One USB full-speed device controller */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 1 /* One DAC channel */
# define STM32_NCOMP 2 /* Two Analog Comparators */
# define STM32_NCAP 13 /* Capacitive sensing channels (14 on UFQFPN32)) */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-F */
#elif defined(CONFIG_ARCH_CHIP_STM32F072C8) || defined(CONFIG_ARCH_CHIP_STM32F072CB)
# ifdef CONFIG_ARCH_CHIP_STM32F072C8
# define STM32_FLASH_SIZE (64 * 1024) /* 64Kb */
# else
# define STM32_FLASH_SIZE (128 * 1024) /* 128Kb */
# endif
# define STM32_SRAM_SIZE (16 * 1024) /* 16Kb */
# define STM32_NATIM 1 /* One advanced timer TIM1 */
# define STM32_NGTIM16 5 /* 16-bit general up/down timers TIM3, TIM14-17 */
# define STM32_NGTIM32 1 /* 32-bit general up/down timers TIM2 */
# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 */
# define STM32_NSPI 2 /* Two SPI modules (SPI or I2S) */
# define STM32_NI2S 2 /* Two I2S modules (SPI or I2S) */
# define STM32_NI2C 2 /* Two I2C modules */
# define STM32_NDMA 1 /* 1 DMA1, 7-channels */
# define STM32_NUSART 4 /* Four USARTs module */
# define STM32_NCAN 1 /* One CAN controller */
# define STM32_NUSBDEV 1 /* One USB full-speed device controller */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 1 /* One HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 2 /* Two DAC channel */
# define STM32_NCOMP 2 /* Two Analog Comparators */
# define STM32_NCAP 17 /* Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-F */
#elif defined(CONFIG_ARCH_CHIP_STM32F072R8) || defined(CONFIG_ARCH_CHIP_STM32F072RB)
# ifdef CONFIG_ARCH_CHIP_STM32F072R8
# define STM32_FLASH_SIZE (64*1024) /* 64Kb */
# else
# define STM32_FLASH_SIZE (128*1024) /* 128Kb */
# endif
# define STM32_SRAM_SIZE (16*1024) /* 16Kb */
# define STM32_NATIM 1 /* One advanced timer TIM1 */
# define STM32_NGTIM16 5 /* 16-bit general up/down timers TIM3, TIM14-17 */
# define STM32_NGTIM32 1 /* 32-bit general up/down timers TIM2 */
# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 */
# define STM32_NSPI 2 /* Two SPI modules (SPI or I2S) */
# define STM32_NI2S 2 /* Two I2S modules (SPI or I2S) */
# define STM32_NI2C 2 /* Two I2C modules */
# define STM32_NDMA 1 /* 1 DMA1, 7-channels */
# define STM32_NUSART 4 /* Four USARTs module */
# define STM32_NCAN 1 /* One CAN controller */
# define STM32_NUSBDEV 1 /* One USB full-speed device controller */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 1 /* One HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 2 /* Two DAC channel */
# define STM32_NCOMP 2 /* Two Analog Comparators */
# define STM32_NCAP 18 /* Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-F */
#elif defined(CONFIG_ARCH_CHIP_STM32F072V8) || defined(CONFIG_ARCH_CHIP_STM32F072VB)
# ifdef CONFIG_ARCH_CHIP_STM32F072V8
# define STM32_FLASH_SIZE (64 * 1024) /* 64Kb */
# else
# define STM32_FLASH_SIZE (128 * 1024) /* 128Kb */
# endif
# define STM32_SRAM_SIZE (16 * 1024) /* 16Kb */
# define STM32_NATIM 1 /* One advanced timer TIM1 */
# define STM32_NGTIM16 5 /* 16-bit general up/down timers TIM3, TIM14-17 */
# define STM32_NGTIM32 1 /* 32-bit general up/down timers TIM2 */
# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 */
# define STM32_NSPI 2 /* Two SPI modules (SPI or I2S) */
# define STM32_NI2S 2 /* Two I2S modules (SPI or I2S) */
# define STM32_NI2C 2 /* Two I2C modules */
# define STM32_NDMA 1 /* 1 DMA1, 7-channels */
# define STM32_NUSART 4 /* Four USARTs module */
# define STM32_NCAN 1 /* One CAN controller */
# define STM32_NUSBDEV 1 /* One USB full-speed device controller */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 1 /* One HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 2 /* Two DAC channel */
# define STM32_NCOMP 2 /* Two Analog Comparators */
# define STM32_NCAP 24 /* Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-F */
#elif defined(CONFIG_ARCH_CHIP_STM32F091CB) || defined(CONFIG_ARCH_CHIP_STM32F091CC)
# ifdef CONFIG_ARCH_CHIP_STM32F091CB
# define STM32_FLASH_SIZE (128 * 1024) /* 128Kb */
# else
# define STM32_FLASH_SIZE (256 * 1024) /* 256Kb */
# endif
# define STM32_SRAM_SIZE (32 * 1024) /* 32Kb */
# define STM32_NATIM 1 /* One advanced timer TIM1 */
# define STM32_NGTIM16 5 /* 16-bit general up/down timers TIM3, TIM14-17 */
# define STM32_NGTIM32 1 /* 32-bit general up/down timers TIM2 */
# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 */
# define STM32_NSPI 2 /* Two SPI modules (SPI or I2S) */
# define STM32_NI2S 2 /* Two I2S modules (SPI or I2S) */
# define STM32_NI2C 2 /* Two I2C modules */
# define STM32_NDMA 2 /* DMA1, DMA2 */
# define STM32_NUSART 6 /* Six USARTs modules */
# define STM32_NCAN 1 /* One CAN controller */
# define STM32_NUSBDEV 0 /* No USB full-speed device controller */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 1 /* One HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 2 /* Two DAC channel */
# define STM32_NCOMP 2 /* Two Analog Comparators */
# define STM32_NCAP 17 /* Capacitive sensing channels */
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-F */
#elif defined(CONFIG_ARCH_CHIP_STM32F091RB) || defined(CONFIG_ARCH_CHIP_STM32F091RC) || \
defined(CONFIG_ARCH_CHIP_STM32F091VB) || defined(CONFIG_ARCH_CHIP_STM32F091VC)
# if defined(CONFIG_ARCH_CHIP_STM32F091RB) || defined(CONFIG_ARCH_CHIP_STM32F091VB)
# define STM32_FLASH_SIZE (128 * 1024) /* 128Kb */
# else
# define STM32_FLASH_SIZE (256 * 1024) /* 256Kb */
# endif
# define STM32_SRAM_SIZE (32 * 1024) /* 32Kb */
# define STM32_NATIM 1 /* One advanced timer TIM1 */
# define STM32_NGTIM16 5 /* 16-bit general up/down timers TIM3, TIM14-17 */
# define STM32_NGTIM32 1 /* 32-bit general up/down timers TIM2 */
# define STM32_NBTIM 2 /* 2 basic timers: TIM6, TIM7 */
# define STM32_NSPI 2 /* Two SPI modules (SPI or I2S) */
# define STM32_NI2S 2 /* Two I2S modules (SPI or I2S) */
# define STM32_NI2C 2 /* Two I2C modules */
# define STM32_NDMA 2 /* DMA1, DMA2 */
# define STM32_NUSART 8 /* Eight USARTs modules */
# define STM32_NCAN 1 /* One CAN controller */
# define STM32_NUSBDEV 0 /* No USB full-speed device controller */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS (only USB 2.0 device) */
# define STM32_NCEC 1 /* One HDMI-CEC controller */
# define STM32_NADC 1 /* One 12-bit module */
# define STM32_NDAC 2 /* Two DAC channel */
# define STM32_NCOMP 2 /* Two Analog Comparators */
# if defined(CONFIG_ARCH_CHIP_STM32F091VB) || defined(CONFIG_ARCH_CHIP_STM32F091VC)
# define STM32_NCAP 24 /* Capacitive sensing channels */
# else
# define STM32_NCAP 18 /* Capacitive sensing channels */
# endif
# define STM32_NPORTS 6 /* Six GPIO ports, GPIOA-F */
#endif
/* NVIC priority levels *****************************************************/
/* Each priority field holds a priority value, 0-31. The lower the value,
* the greater the priority of the corresponding interrupt. The processor
* implements only bits[7:6] of each field, bits[5:0] read as zero and
* ignore writes.
*/
#define NVIC_SYSH_PRIORITY_MIN 0xc0 /* All bits[7:6] set is minimum priority */
#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x40 /* Two bits of interrupt priority used */
#endif /* __ARCH_ARM_INCLUDE_STM32F0_CHIP_H */

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@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/include/stm32f0l0g0/stm32f0_irq.h
* arch/arm/include/stm32f0/irq.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -24,16 +24,17 @@
* through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32F0_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32F0_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_STM32F0_IRQ_H
#define __ARCH_ARM_INCLUDE_STM32F0_IRQ_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <arch/stm32f0l0g0/chip.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
#include <arch/stm32f0/chip.h>
/****************************************************************************
* Pre-processor Prototypes
@ -42,11 +43,31 @@
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words of
* memory in the IRQ to handle mapping tables.
*
* Processor Exceptions (vectors 0-15). These common definitions can be
* found in nuttx/arch/arm/include/stm32f0l0g0/irq.h
*/
/* Common Processor Exceptions (vectors 0-15) */
#define STM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define STM32_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
#define STM32_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
/* Vectors 4-10: Reserved */
#define STM32_IRQ_SVCALL (11) /* Vector 11: SVC call */
/* Vector 12-13: Reserved */
#define STM32_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
#define STM32_IRQ_SYSTICK (15) /* Vector 15: System tick */
/* External interrupts (vectors >= 16) */
#define STM32_IRQ_EXTINT (16) /* Vector number of the first external interrupt */
/****************************************************************************
* Included Files
****************************************************************************/
/* External interrupt vectors */
#define STM32_IRQ_WWDG (STM32_IRQ_EXTINT + 0) /* 0: WWDG */
#define STM32_IRQ_PVD_VDDIO2 (STM32_IRQ_EXTINT + 1) /* 1: PVD_VDDIO2 */
#define STM32_IRQ_RTC (STM32_IRQ_EXTINT + 2) /* 2: RTC */
@ -97,35 +118,8 @@
#define STM32_IRQ_CAN (STM32_IRQ_EXTINT + 30) /* 30: HDMI CAN */
#define STM32_IRQ_USB (STM32_IRQ_EXTINT + 31) /* 31: USB */
#define STM32_IRQ_NEXTINTS (32) /* 32 external interrupts */
#define STM32_IRQ_NEXTINTS (32)
/****************************************************************************
* Public Types
****************************************************************************/
#define NR_IRQS (STM32_IRQ_EXTINT + STM32_IRQ_NEXTINTS)
#ifndef __ASSEMBLY__
typedef void (*vic_vector_t)(uint32_t *regs);
/****************************************************************************
* Inline functions
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifdef __cplusplus
extern "C"
{
#endif
#ifdef __cplusplus
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32F0_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_STM32F0_IRQ_H */

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@ -0,0 +1,32 @@
# ##############################################################################
# arch/arm/src/stm32f0/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
set(SRCS)
list(APPEND SRCS stm32_rcc.c)
if(CONFIG_BUILD_PROTECTED)
list(APPEND SRCS stm32_userspace.c)
endif()
target_sources(arch PRIVATE ${SRCS})
add_subdirectory(${NUTTX_DIR}/arch/arm/src/common/stm32 stm32_common)

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@ -0,0 +1,559 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
comment "STM32 F0 configuration"
if ARCH_CHIP_STM32F0
choice
prompt "ST STM32F0 Chip Selection"
default ARCH_CHIP_STM32F051R8
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F030C6
bool "STM32F030C6"
select STM32_STM32F03X
select STM32F0_VALUELINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F030C8
bool "STM32F030C8"
select STM32_STM32F03X
select STM32F0_VALUELINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F030CC
bool "STM32F030CC"
select STM32_STM32F03X
select STM32F0_VALUELINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F030F4
bool "STM32F030F4"
select STM32_STM32F03X
select STM32F0_VALUELINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F030K6
bool "STM32F030K6"
select STM32_STM32F03X
select STM32F0_VALUELINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F030R8
bool "STM32F030R8"
select STM32_STM32F03X
select STM32F0_VALUELINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F030RC
bool "STM32F030RC"
select STM32_STM32F03X
select STM32F0_VALUELINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F031C4
bool "STM32F031C4"
select STM32_STM32F03X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F031C6
bool "STM32F031C6"
select STM32_STM32F03X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F031E6
bool "STM32F031E6"
select STM32_STM32F03X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F031F4
bool "STM32F031F4"
select STM32_STM32F03X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F031F6
bool "STM32F031F6"
select STM32_STM32F03X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F031G4
bool "STM32F031G4"
select STM32_STM32F03X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F031G6
bool "STM32F031G6"
select STM32_STM32F03X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F031K4
bool "STM32F031K4"
select STM32_STM32F03X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F031K6
bool "STM32F031K6"
select STM32_STM32F03X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F038C6
bool "STM32F038C6"
select STM32_STM32F03X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F038E6
bool "STM32F038E6"
select STM32_STM32F03X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F038F6
bool "STM32F038F6"
select STM32_STM32F03X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F038G6
bool "STM32F038G6"
select STM32_STM32F03X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F038K6
bool "STM32F038K6"
select STM32_STM32F03X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F042C4
bool "STM32F042C4"
select STM32_STM32F04X
select STM32F0_USBLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F042C6
bool "STM32F042C6"
select STM32_STM32F04X
select STM32F0_USBLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F042F4
bool "STM32F042F4"
select STM32_STM32F04X
select STM32F0_USBLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F042F6
bool "STM32F042F6"
select STM32_STM32F04X
select STM32F0_USBLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F042G4
bool "STM32F042G4"
select STM32_STM32F04X
select STM32F0_USBLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F042G6
bool "STM32F042G6"
select STM32_STM32F04X
select STM32F0_USBLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F042K4
bool "STM32F042K4"
select STM32_STM32F04X
select STM32F0_USBLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F042K6
bool "STM32F042K6"
select STM32_STM32F04X
select STM32F0_USBLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F042T6
bool "STM32F042T6"
select STM32_STM32F04X
select STM32F0_USBLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F048C6
bool "STM32F048C6"
select STM32_STM32F04X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F048G6
bool "STM32F048G6"
select STM32_STM32F04X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F048T6
bool "STM32F048T6"
select STM32_STM32F04X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F051C4
bool "STM32F051C4"
select STM32_STM32F05X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F051C6
bool "STM32F051C6"
select STM32_STM32F05X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F051C8
bool "STM32F051C8"
select STM32_STM32F05X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F051K4
bool "STM32F051K4"
select STM32_STM32F05X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F051K6
bool "STM32F051K6"
select STM32_STM32F05X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F051K8
bool "STM32F051K8"
select STM32_STM32F05X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F051R4
bool "STM32F051R4"
select STM32_STM32F05X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F051R6
bool "STM32F051R6"
select STM32_STM32F05X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F051R8
bool "STM32F051R8"
select STM32_STM32F05X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F051T8
bool "STM32F051T8"
select STM32_STM32F05X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F058C8
bool "STM32F058C8"
select STM32_STM32F05X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F058R8
bool "STM32F058R8"
select STM32_STM32F05X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F058T8
bool "STM32F058T8"
select STM32_STM32F05X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F070C6
bool "STM32F070C6"
select STM32_STM32F07X
select STM32F0_VALUELINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F070CB
bool "STM32F070CB"
select STM32_STM32F07X
select STM32F0_VALUELINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F070F6
bool "STM32F070F6"
select STM32_STM32F07X
select STM32F0_VALUELINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F070RB
bool "STM32F070RB"
select STM32_STM32F07X
select STM32F0_VALUELINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F071C8
bool "STM32F071C8"
select STM32_STM32F07X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F071CB
bool "STM32F071CB"
select STM32_STM32F07X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F071RB
bool "STM32F071RB"
select STM32_STM32F07X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F071V8
bool "STM32F071V8"
select STM32_STM32F07X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F071VB
bool "STM32F071VB"
select STM32_STM32F07X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F072C8
bool "STM32F072C8"
select STM32_STM32F07X
select STM32F0_USBLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F072CB
bool "STM32F072CB"
select STM32_STM32F07X
select STM32F0_USBLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F072R8
bool "STM32F072R8"
select STM32_STM32F07X
select STM32F0_USBLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F072RB
bool "STM32F072RB"
select STM32_STM32F07X
select STM32F0_USBLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F072V8
bool "STM32F072V8"
select STM32_STM32F07X
select STM32F0_USBLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F072VB
bool "STM32F072VB"
select STM32_STM32F07X
select STM32F0_USBLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F078CB
bool "STM32F078CB"
select STM32_STM32F07X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F078RB
bool "STM32F078RB"
select STM32_STM32F07X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F078VB
bool "STM32F078VB"
select STM32_STM32F07X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F091CB
bool "STM32F091CB"
select STM32_STM32F09X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F091CC
bool "STM32F091CC"
select STM32_STM32F09X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F091RB
bool "STM32F091RB"
select STM32_STM32F09X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F091RC
bool "STM32F091RC"
select STM32_STM32F09X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F091VB
bool "STM32F091VB"
select STM32_STM32F09X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F091VC
bool "STM32F091VC"
select STM32_STM32F09X
select STM32F0_ACCESSLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F098CC
bool "STM32F098CC"
select STM32_STM32F09X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F098RC
bool "STM32F098RC"
select STM32_STM32F09X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
config ARCH_CHIP_STM32F098VC
bool "STM32F098VC"
select STM32_STM32F09X
select STM32F0_LOWVOLTLINE
depends on ARCH_CHIP_STM32F0
endchoice
endif
config STM32_STM32F0
bool
default n
select STM32_HAVE_DMA1
select STM32_HAVE_I2C1
select STM32_HAVE_SPI1
select STM32_HAVE_USART1
select STM32_HAVE_USART2
select STM32_HAVE_USART3
select STM32_HAVE_USART4
select STM32_HAVE_TIM1
select STM32_HAVE_TIM2
select STM32_HAVE_TIM3
select STM32_HAVE_TIM6
select STM32_HAVE_TIM7
select STM32_HAVE_TIM14
select STM32_HAVE_TIM15
select STM32_HAVE_TIM16
select STM32_HAVE_TIM17
select STM32_HAVE_IP_ADC_M0_V1
select STM32_HAVE_CRC
select STM32_HAVE_PWR
select STM32_HAVE_BKP
select STM32_HAVE_BKPSRAM
select STM32_HAVE_IP_AES_M0_V1 if STM32_HAVE_AES
select STM32_HAVE_IP_CAN_BXCAN_M0_V1
select STM32_HAVE_IP_COMP_M0_V1 if STM32_HAVE_COMP
select STM32_HAVE_IP_DAC_M0_V1 if STM32_HAVE_DAC1
select STM32_HAVE_IP_DBGMCU_M0_V1
select STM32_HAVE_IP_DMA_V1
select STM32_HAVE_IP_DMA_V1_7CH
select STM32_HAVE_IP_EXTI_V1
select STM32_HAVE_IP_FLASH_M0_V1
select STM32_HAVE_IP_GPIO_M0_V1
select STM32_HAVE_IP_I2C_M0_V1
select STM32_HAVE_IP_PWR_M0_V1
select STM32_HAVE_IP_RNG_M0_V1 if STM32_HAVE_RNG
select STM32_HAVE_IP_RTCC_M0_V1
select STM32_HAVE_IP_SPI_V2
select STM32_HAVE_IP_TIMERS_M0_V1
select STM32_HAVE_IP_USART_V3
select STM32_HAVE_IP_WDG_M0_V1
select STM32_HAVE_IP_UID_M0_V1
select STM32_HAVE_IP_USBDEV_M0_V1 if STM32_HAVE_USBDEV
select STM32_HAVE_IP_HSI48_M0_V1 if STM32_HAVE_HSI48
config STM32_STM32F03X
bool
default n
select STM32_STM32F0
config STM32_STM32F04X
bool
default n
select STM32_STM32F0
select STM32_HAVE_HSI48
config STM32_STM32F05X
bool
default n
select STM32_STM32F0
select STM32_HAVE_DMA2
config STM32_STM32F07X
bool
default n
select STM32_STM32F0
select STM32_HAVE_HSI48
select STM32_HAVE_DMA2
config STM32_STM32F09X
bool
default n
select STM32_STM32F0
select STM32_HAVE_HSI48
select STM32_HAVE_DMA2
config STM32F0_VALUELINE
bool
default n
select STM32_HAVE_USART5
select STM32_HAVE_SPI2
config STM32F0_ACCESSLINE
bool
default n
select STM32_HAVE_USART5
select STM32_HAVE_CAN1
select STM32_HAVE_SPI2
config STM32F0_LOWVOLTLINE
bool
default n
select STM32_HAVE_USART5
select STM32_HAVE_CAN1
select STM32_HAVE_SPI2
config STM32F0_USBLINE
bool
default n
select STM32_HAVE_HSI48
select STM32_HAVE_CAN1
select STM32_HAVE_SPI2
select STM32_HAVE_USBDEV

View file

@ -0,0 +1,31 @@
############################################################################
# arch/arm/src/stm32f0/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include armv6-m/Make.defs
CHIP_CSRCS = stm32_rcc.c
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CHIP_CSRCS += stm32_userspace.c
endif
include common/stm32/Make.defs

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32_rcc.h
* arch/arm/src/stm32f0/chip.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,26 +20,25 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_RCC_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_RCC_H
#ifndef __ARCH_ARM_SRC_STM32F0_CHIP_H
#define __ARCH_ARM_SRC_STM32F0_CHIP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
#include "nvic.h"
#if defined(CONFIG_ARCH_CHIP_STM32F0)
# include "hardware/stm32f0_rcc.h"
#elif defined(CONFIG_ARCH_CHIP_STM32L0)
# include "hardware/stm32l0_rcc.h"
#elif defined(CONFIG_ARCH_CHIP_STM32G0)
# include "hardware/stm32g0_rcc.h"
#elif defined(CONFIG_ARCH_CHIP_STM32C0)
# include "hardware/stm32c0_rcc.h"
#else
# error "Unsupported STM32 M0 RCC"
#endif
/* Include the chip capabilities file */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32_RCC_H */
#include <arch/stm32f0/chip.h>
/* Include the memory map file.
* Other chip hardware files should then include this file for the proper
* setup.
*/
#include "hardware/stm32_memorymap.h"
#endif /* __ARCH_ARM_SRC_STM32F0_CHIP_H */

View file

@ -0,0 +1,26 @@
/****************************************************************************
* arch/arm/src/stm32f0/hardware/stm32_memorymap.h
*
* SPDX-License-Identifier: Apache-2.0
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32_MEMORYMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#if defined(CONFIG_STM32_STM32F03X)
# include "hardware/stm32f03x_memorymap.h"
#elif defined(CONFIG_STM32_STM32F05X) || defined(CONFIG_STM32_STM32F07X) || \
defined(CONFIG_STM32_STM32F09X)
# include "hardware/stm32f05xf07xf09x_memorymap.h"
#else
# error "Unsupported STM32F0 memory map"
#endif
#endif /* __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32_MEMORYMAP_H */

View file

@ -0,0 +1,29 @@
/****************************************************************************
* arch/arm/src/stm32f0/hardware/stm32_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32_PINMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#if defined(CONFIG_STM32_STM32F03X)
# include "hardware/stm32f03x_pinmap.h"
#elif defined(CONFIG_STM32_STM32F05X)
# include "hardware/stm32f05x_pinmap.h"
#elif defined(CONFIG_STM32_STM32F07X)
# include "hardware/stm32f07x_pinmap.h"
#elif defined(CONFIG_STM32_STM32F09X)
# include "hardware/stm32f09x_pinmap.h"
#else
# error "Unsupported STM32F0 pin map"
#endif
#endif /* __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32_PINMAP_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32f03x_memorymap.h
* arch/arm/src/stm32f0/hardware/stm32f03x_memorymap.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F03X_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F03X_MEMORYMAP_H
#ifndef __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F03X_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F03X_MEMORYMAP_H
/****************************************************************************
* Pre-processor Definitions
@ -141,4 +141,4 @@
#define STM32_SYSMEM_UID 0x1ffff7ac /* The 96-bit unique device identifier */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F03X_MEMORYMAP_H */
#endif /* __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F03X_MEMORYMAP_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32f03x_pinmap.h
* arch/arm/src/stm32f0/hardware/stm32f03x_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F03X_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F03X_PINMAP_H
#ifndef __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F03X_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F03X_PINMAP_H
/****************************************************************************
* Included Files
@ -241,4 +241,4 @@
#define GPIO_USART4_TX_1 (GPIO_ALT | GPIO_AF0 | GPIO_PORTC | GPIO_PIN10)
#define GPIO_USART4_TX_2 (GPIO_ALT | GPIO_AF4 | GPIO_PORTA | GPIO_PIN0)
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F03X_PINMAP_H */
#endif /* __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F03X_PINMAP_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32f05x_pinmap.h
* arch/arm/src/stm32f0/hardware/stm32f05x_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F05X_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F05X_PINMAP_H
#ifndef __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F05X_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F05X_PINMAP_H
/****************************************************************************
* Included Files
@ -119,4 +119,4 @@
#define GPIO_I2C2_SCL_0 (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_PORTB | GPIO_PIN10)
#define GPIO_I2C2_SDA_0 (GPIO_ALT | GPIO_AF1 | GPIO_OPENDRAIN | GPIO_PORTB | GPIO_PIN11)
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F05X_PINMAP_H */
#endif /* __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F05X_PINMAP_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32f05xf07xf09x_memorymap.h
* arch/arm/src/stm32f0/hardware/stm32f05xf07xf09x_memorymap.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F05XF07XF09X_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F05XF07XF09X_MEMORYMAP_H
#ifndef __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F05XF07XF09X_MEMORYMAP_H
#define __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F05XF07XF09X_MEMORYMAP_H
/****************************************************************************
* Pre-processor Definitions
@ -145,4 +145,4 @@
#define STM32_SYSMEM_UID 0x1ffff7ac /* The 96-bit unique device identifier */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F05XF07XF09X_MEMORYMAP_H */
#endif /* __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F05XF07XF09X_MEMORYMAP_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32f07x_pinmap.h
* arch/arm/src/stm32f0/hardware/stm32f07x_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F07X_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F07X_PINMAP_H
#ifndef __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F07X_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F07X_PINMAP_H
/****************************************************************************
* Included Files
@ -385,4 +385,4 @@
#define GPIO_USB_NOE_0 (GPIO_ALT | GPIO_AF2 | GPIO_PORTA | GPIO_PIN13)
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F07X_PINMAP_H */
#endif /* __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F07X_PINMAP_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32f09x_pinmap.h
* arch/arm/src/stm32f0/hardware/stm32f09x_pinmap.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F09X_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F09X_PINMAP_H
#ifndef __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F09X_PINMAP_H
#define __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F09X_PINMAP_H
/****************************************************************************
* Included Files
@ -414,4 +414,4 @@
#define GPIO_USART8_RX_3 (GPIO_ALT | GPIO_AF0 | GPIO_PORTD | GPIO_PIN13)
#define GPIO_USART8_CK_RST_0 (GPIO_ALT | GPIO_AF2 | GPIO_PORTD | GPIO_PIN14)
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F09X_PINMAP_H */
#endif /* __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F09X_PINMAP_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32f0_exti.h
* arch/arm/src/stm32f0/hardware/stm32f0_exti.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_EXTI_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_EXTI_H
#ifndef __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_EXTI_H
#define __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_EXTI_H
/****************************************************************************
* Included Files
@ -114,4 +114,4 @@
#define EXTI_PR_SHIFT (0) /* Bits 0-X: Pending bit for all lines */
#define EXTI_PR_MASK STM32_EXTI_MASK
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_EXTI_H */
#endif /* __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_EXTI_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32f0_flash.h
* arch/arm/src/stm32f0/hardware/stm32f0_flash.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_FLASH_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_FLASH_H
#ifndef __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_FLASH_H
#define __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_FLASH_H
/****************************************************************************
* Included Files
@ -94,4 +94,4 @@
#define FLASH_OBR_ /* To be provided */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_FLASH_H */
#endif /* __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_FLASH_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32f0_pwr.h
* arch/arm/src/stm32f0/hardware/stm32f0_pwr.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_PWR_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_PWR_H
#ifndef __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_PWR_H
#define __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_PWR_H
/****************************************************************************
* Included Files
@ -85,4 +85,4 @@
#define PWR_CSR_EWUP7 (1 << 14) /* Bit 14: Enable WKUP7 pin */
#define PWR_CSR_EWUP8 (1 << 15) /* Bit 15: Enable WKUP8 pin */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_PWR_H */
#endif /* __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_PWR_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32f0_rcc.h
* arch/arm/src/stm32f0/hardware/stm32f0_rcc.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_RCC_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_RCC_H
#ifndef __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_RCC_H
#define __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_RCC_H
/****************************************************************************
* Pre-processor Definitions
@ -391,4 +391,4 @@
#define RCC_CR2_HSI48CAL_SHIFT (24) /* Bits 24-31: HSI48 factory clock calibration */
#define RCC_CR2_HSI48CAL_MASK (0xff << RCC_CR2_HSI48CAL_SHIFT)
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_RCC_H */
#endif /* __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_RCC_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/hardware/stm32f0_syscfg.h
* arch/arm/src/stm32f0/hardware/stm32f0_syscfg.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,8 +20,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_SYSCFG_H
#define __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_SYSCFG_H
#ifndef __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_SYSCFG_H
#define __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_SYSCFG_H
/****************************************************************************
* Included Files
@ -378,4 +378,4 @@
#define SYSCFG_ITLINE30_CEC (1 << 0) /* Bit 0: CEC interrupt request pending, combined with EXTI line 27 */
#define SYSCFG_ITLINE30_CAN (1 << 1) /* Bit 1: CAN interrupt request pending */
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_HARDWARE_STM32F0_SYSCFG_H */
#endif /* __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_SYSCFG_H */

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/stm32_pwr.c
* arch/arm/src/stm32f0/stm32.h
*
* SPDX-License-Identifier: Apache-2.0
*
@ -20,23 +20,35 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F0_STM32_H
#define __ARCH_ARM_SRC_STM32F0_STM32_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include "arm_internal.h"
/* Peripherals **************************************************************/
#include "chip.h"
/* This file is only a thin shell that includes the proper PWR implementation
* according to the selected MCU family.
*/
#if defined(CONFIG_STM32_STM32G0)
# include "stm32g0_pwr.c"
#elif defined(CONFIG_STM32_STM32F0) || defined(CONFIG_STM32_STM32L0)
# include "stm32f0l0_pwr.c"
#endif
#include "stm32_dma.h"
#include "stm32_gpio.h"
#include "stm32_i2c.h"
#include "stm32_pwr.h"
#include "stm32_rcc.h"
#include "stm32_spi.h"
#include "stm32_uart.h"
#include "stm32_lowputc.h"
#include "stm32_adc.h"
/****************************************************************************
* Public Functions
* Pre-processor Definitions
****************************************************************************/
#endif /* __ARCH_ARM_SRC_STM32F0_STM32_H */

View file

@ -0,0 +1,220 @@
/****************************************************************************
* arch/arm/src/stm32f0/stm32_rcc.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdio.h>
#include <assert.h>
#include <nuttx/debug.h>
#include <arch/board/board.h>
#include "arm_internal.h"
#include "hardware/stm32_flash.h"
#include "stm32_rcc.h"
#include "stm32_hsi48_m0_v1.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_STM32_RNG
# ifndef STM32_USE_CLK48
# error RNG requires CLK48 enabled
# endif
#endif
#ifdef CONFIG_STM32_USB
# ifndef STM32_USE_CLK48
# error USB requires CLK48 enabled
# endif
#endif
static_assert(CONFIG_BOARD_LOOPSPERMSEC != -1,
"Configure BOARD_LOOPSPERMSEC to non-default value.");
/* Allow up to 100 milliseconds for the high speed clock to become ready.
* that is a very long delay, but if the clock does not become ready we are
* hosed anyway.
*/
#define HSERDY_TIMEOUT (100 * CONFIG_BOARD_LOOPSPERMSEC)
/****************************************************************************
* Included Files
****************************************************************************/
/* Include chip-specific clocking initialization logic */
#include "stm32f0_rcc.c"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: rcc_resetbkp
*
* Description:
* The RTC needs to reset the Backup Domain to change RTCSEL and resetting
* the Backup Domain renders to disabling the LSE as consequence.
* In order to avoid resetting the Backup Domain when we already configured
* LSE we will reset the Backup Domain early (here).
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
#if defined(CONFIG_STM32_RTC) && defined(CONFIG_STM32_PWR)
static inline void rcc_resetbkp(void)
{
uint32_t regval;
/* Check if the RTC is already configured */
stm32_pwr_initbkp(false);
regval = getreg32(RTC_MAGIC_REG);
if (regval != RTC_MAGIC && regval != RTC_MAGIC_TIME_SET)
{
stm32_pwr_enablebkp(true);
/* We might be changing RTCSEL - to ensure such changes work, we must
* reset the backup domain (having backed up the RTC_MAGIC token)
*/
modifyreg32(STM32_RCC_BDCR, 0, RCC_BDCR_BDRST);
modifyreg32(STM32_RCC_BDCR, RCC_BDCR_BDRST, 0);
stm32_pwr_enablebkp(false);
}
}
#else
# define rcc_resetbkp()
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_clockconfig
*
* Description:
* Called to establish the clock settings based on the values in board.h.
* This function (by default) will reset most everything, enable the PLL,
* and enable peripheral clocking for all peripherals enabled in the NuttX
* configuration file.
*
* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then
* clocking will be enabled by an externally provided, board-specific
* function called stm32_board_clockconfig().
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void stm32_clockconfig(void)
{
/* Make sure that we are starting in the reset state */
rcc_reset();
/* Reset backup domain if appropriate */
rcc_resetbkp();
#if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
/* Invoke Board Custom Clock Configuration */
stm32_board_clockconfig();
#else
/* Invoke standard, fixed clock configuration based on definitions
* in board.h
*/
stm32_stdclockconfig();
#endif
/* Enable peripheral clocking */
rcc_enableperipherals();
}
/****************************************************************************
* Name: stm32_clockenable
*
* Description:
* Re-enable the clock and restore the clock settings based on settings in
* board.h. This function is only available to support low-power modes of
* operation: When re-awakening from deep-sleep modes, it is necessary to
* re-enable/re-start the PLL
*
* This functional performs a subset of the operations performed by
* stm32_clockconfig(): It does not reset any devices, and it does not
* reset the currently enabled peripheral clocks.
*
* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then
* clocking will be enabled by an externally provided, board-specific
* function called stm32_board_clockconfig().
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_PM
void stm32_clockenable(void)
{
#if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
/* Invoke Board Custom Clock Configuration */
stm32_board_clockconfig();
#else
/* Invoke standard, fixed clock configuration based on definitions
* in board.h
*/
stm32_stdclockconfig();
#endif
}
#endif

View file

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32f0l0g0/stm32f0_rcc.c
* arch/arm/src/stm32f0/stm32f0_rcc.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -0,0 +1,25 @@
# ##############################################################################
# boards/arm/stm32f0/common/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
if(CONFIG_ARCH_BOARD_COMMON)
add_subdirectory(${NUTTX_DIR}/boards/arm/common/stm32 stm32_common)
endif()

View file

@ -0,0 +1,6 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
source "boards/arm/common/stm32/Kconfig"

View file

@ -0,0 +1,38 @@
#############################################################################
# boards/arm/stm32f0/common/Makefile
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
#############################################################################
include $(TOPDIR)/Make.defs
STM32_BOARD_COMMON_DIR := $(TOPDIR)$(DELIM)boards$(DELIM)arm$(DELIM)common$(DELIM)stm32
STM32_COMMON_SRCDIR := $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)common$(DELIM)stm32
include board/Make.defs
include $(STM32_BOARD_COMMON_DIR)$(DELIM)src$(DELIM)Make.defs
DEPPATH += --dep-path board
include $(TOPDIR)/boards/Board.mk
ARCHSRCDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src
BOARDDIR = $(ARCHSRCDIR)$(DELIM)board
CFLAGS += ${INCDIR_PREFIX}$(BOARDDIR)$(DELIM)include
CFLAGS += ${INCDIR_PREFIX}$(STM32_COMMON_SRCDIR)

View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32f0l0g0/nucleo-c071rb/CMakeLists.txt
# boards/arm/stm32f0/nucleo-f072rb/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

View file

@ -24,7 +24,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f072rb"
CONFIG_ARCH_BOARD_NUCLEO_F072RB=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32f0l0g0"
CONFIG_ARCH_CHIP="stm32f0"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F072RB=y
CONFIG_ARCH_CHIP_STM32F0=y

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f072rb/include/board.h
* boards/arm/stm32f0/nucleo-f072rb/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32f0l0g0/nucleo-f072rb/scripts/Make.defs
# boards/arm/stm32f0/nucleo-f072rb/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f072rb/scripts/flash.ld
* boards/arm/stm32f0/nucleo-f072rb/scripts/flash.ld
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32f0l0g0/nucleo-f072rb/src/CMakeLists.txt
# boards/arm/stm32f0/nucleo-f072rb/src/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32f0l0g0/nucleo-f072rb/src/Make.defs
# boards/arm/stm32f0/nucleo-f072rb/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f072rb/src/nucleo-f072rb.h
* boards/arm/stm32f0/nucleo-f072rb/src/nucleo-f072rb.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f072rb/src/stm32_autoleds.c
* boards/arm/stm32f0/nucleo-f072rb/src/stm32_autoleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f072rb/src/stm32_boot.c
* boards/arm/stm32f0/nucleo-f072rb/src/stm32_boot.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f072rb/src/stm32_bringup.c
* boards/arm/stm32f0/nucleo-f072rb/src/stm32_bringup.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f072rb/src/stm32_buttons.c
* boards/arm/stm32f0/nucleo-f072rb/src/stm32_buttons.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f072rb/src/stm32_userleds.c
* boards/arm/stm32f0/nucleo-f072rb/src/stm32_userleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32f0l0g0/nucleo-f091rc/CMakeLists.txt
# boards/arm/stm32f0/nucleo-f091rc/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

View file

@ -24,7 +24,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f091rc"
CONFIG_ARCH_BOARD_NUCLEO_F091RC=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32f0l0g0"
CONFIG_ARCH_CHIP="stm32f0"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F091RC=y
CONFIG_ARCH_CHIP_STM32F0=y

View file

@ -10,7 +10,7 @@ CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f091rc"
CONFIG_ARCH_BOARD_NUCLEO_F091RC=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32f0l0g0"
CONFIG_ARCH_CHIP="stm32f0"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F091RC=y
CONFIG_ARCH_CHIP_STM32F0=y

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f091rc/include/board.h
* boards/arm/stm32f0/nucleo-f091rc/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32f0l0g0/nucleo-f091rc/scripts/Make.defs
# boards/arm/stm32f0/nucleo-f091rc/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f091rc/scripts/flash.ld
* boards/arm/stm32f0/nucleo-f091rc/scripts/flash.ld
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32f0l0g0/nucleo-f091rc/src/CMakeLists.txt
# boards/arm/stm32f0/nucleo-f091rc/src/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

View file

@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32f0l0g0/nucleo-f091rc/src/Make.defs
# boards/arm/stm32f0/nucleo-f091rc/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f091rc/src/nucleo-f091rc.h
* boards/arm/stm32f0/nucleo-f091rc/src/nucleo-f091rc.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f091rc/src/stm32_autoleds.c
* boards/arm/stm32f0/nucleo-f091rc/src/stm32_autoleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f091rc/src/stm32_boot.c
* boards/arm/stm32f0/nucleo-f091rc/src/stm32_boot.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f091rc/src/stm32_bringup.c
* boards/arm/stm32f0/nucleo-f091rc/src/stm32_bringup.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f091rc/src/stm32_buttons.c
* boards/arm/stm32f0/nucleo-f091rc/src/stm32_buttons.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f091rc/src/stm32_spi.c
* boards/arm/stm32f0/nucleo-f091rc/src/stm32_spi.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f091rc/src/stm32_sx127x.c
* boards/arm/stm32f0/nucleo-f091rc/src/stm32_sx127x.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/nucleo-f091rc/src/stm32_userleds.c
* boards/arm/stm32f0/nucleo-f091rc/src/stm32_userleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32f0l0g0/b-l072z-lrwan1/CMakeLists.txt
# boards/arm/stm32f0/stm32f051-discovery/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

View file

@ -14,7 +14,7 @@
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm32f051-discovery"
CONFIG_ARCH_BOARD_STM32F051_DISCOVERY=y
CONFIG_ARCH_CHIP="stm32f0l0g0"
CONFIG_ARCH_CHIP="stm32f0"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F051R8=y
CONFIG_ARCH_CHIP_STM32F0=y

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f051-discovery/include/board.h
* boards/arm/stm32f0/stm32f051-discovery/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -0,0 +1,41 @@
############################################################################
# boards/arm/stm32f0/stm32f051-discovery/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv6-m/Toolchain.defs
LDSCRIPT = flash.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048

View file

@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f051-discovery/scripts/flash.ld
* boards/arm/stm32f0/stm32f051-discovery/scripts/flash.ld
*
* SPDX-License-Identifier: Apache-2.0
*

View file

@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32f0l0g0/stm32f051-discovery/src/CMakeLists.txt
# boards/arm/stm32f0/stm32f051-discovery/src/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

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@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32f0l0g0/stm32f051-discovery/src/Make.defs
# boards/arm/stm32f0/stm32f051-discovery/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

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@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f051-discovery/src/stm32_autoleds.c
* boards/arm/stm32f0/stm32f051-discovery/src/stm32_autoleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f051-discovery/src/stm32_boot.c
* boards/arm/stm32f0/stm32f051-discovery/src/stm32_boot.c
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f051-discovery/src/stm32_bringup.c
* boards/arm/stm32f0/stm32f051-discovery/src/stm32_bringup.c
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f051-discovery/src/stm32_buttons.c
* boards/arm/stm32f0/stm32f051-discovery/src/stm32_buttons.c
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f051-discovery/src/stm32_userleds.c
* boards/arm/stm32f0/stm32f051-discovery/src/stm32_userleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f051-discovery/src/stm32f051-discovery.h
* boards/arm/stm32f0/stm32f051-discovery/src/stm32f051-discovery.h
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -0,0 +1,23 @@
# ##############################################################################
# boards/arm/stm32f0/stm32f072-discovery/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
add_subdirectory(src)

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@ -14,7 +14,7 @@
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm32f072-discovery"
CONFIG_ARCH_BOARD_STM32F072_DISCOVERY=y
CONFIG_ARCH_CHIP="stm32f0l0g0"
CONFIG_ARCH_CHIP="stm32f0"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F072RB=y
CONFIG_ARCH_CHIP_STM32F0=y

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@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f072-discovery/include/board.h
* boards/arm/stm32f0/stm32f072-discovery/include/board.h
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -0,0 +1,41 @@
############################################################################
# boards/arm/stm32f0/stm32f072-discovery/scripts/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv6-m/Toolchain.defs
LDSCRIPT = flash.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048

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@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f072-discovery/scripts/flash.ld
* boards/arm/stm32f0/stm32f072-discovery/scripts/flash.ld
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
# ##############################################################################
# boards/arm/stm32f0l0g0/stm32f072-discovery/src/CMakeLists.txt
# boards/arm/stm32f0/stm32f072-discovery/src/CMakeLists.txt
#
# SPDX-License-Identifier: Apache-2.0
#

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@ -1,5 +1,5 @@
############################################################################
# boards/arm/stm32f0l0g0/stm32f072-discovery/src/Make.defs
# boards/arm/stm32f0/stm32f072-discovery/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#

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@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f072-discovery/src/stm32_autoleds.c
* boards/arm/stm32f0/stm32f072-discovery/src/stm32_autoleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f072-discovery/src/stm32_boot.c
* boards/arm/stm32f0/stm32f072-discovery/src/stm32_boot.c
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f072-discovery/src/stm32_bringup.c
* boards/arm/stm32f0/stm32f072-discovery/src/stm32_bringup.c
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f072-discovery/src/stm32_buttons.c
* boards/arm/stm32f0/stm32f072-discovery/src/stm32_buttons.c
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f072-discovery/src/stm32_userleds.c
* boards/arm/stm32f0/stm32f072-discovery/src/stm32_userleds.c
*
* SPDX-License-Identifier: Apache-2.0
*

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@ -1,5 +1,5 @@
/****************************************************************************
* boards/arm/stm32f0l0g0/stm32f072-discovery/src/stm32f072-discovery.h
* boards/arm/stm32f0/stm32f072-discovery/src/stm32f072-discovery.h
*
* SPDX-License-Identifier: Apache-2.0
*