platform_autoconf.h is a hand-maintained minimal header that provides the
SDK #defines required by the fwlib sources compiled during PREBUILD. Unlike
the other Ameba ICs (which use ameba_gen_autoconf.sh to regenerate it from
SDK menuconfig), RTL8730E uses a static file because the amebasmart SDK
does not ship a pre-generated autoconf and running menuconfig in CI is not
feasible.
The file was previously gitignored along with all other prebuilt/ artifacts,
so CI had no platform_autoconf.h on a clean clone, causing:
fatal error: platform_autoconf.h: No such file or directory
Fix: add !platform_autoconf.h exception to prebuilt/.gitignore and track
the file in git. Local clean build verified (nuttx.bin 550 KB generated).
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Assisted-by: Claude <noreply@anthropic.com>
Two CI issues in the RTL8730E (AmebaSmart CA32) port:
1. PREBUILD used $(ARCHOPTIMIZATION) which injects --param=min-pagesize=0
on GCC>=12. arm-none-eabi-gcc in CI does not recognise this flag.
Fix: replace $(ARCHOPTIMIZATION) with explicit -Os -ffunction-sections
-fdata-sections in both the fwlib and wifi PREBUILD loops, matching the
pattern already used by the other Ameba ICs (rtl8721dx/8720f/8721f).
2. boards/arm/rtl8730e/rtl8730e_evb/configs/nsh/defconfig was out of sync
with `make savedefconfig` output (missing CONFIG_ARCH_CHIP_RTL8730E_CA32,
wrong ordering of several NETUTILS options, and redundant entries that
are auto-selected by Kconfig). Regenerated with olddefconfig+savedefconfig.
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Assisted-by: Claude <noreply@anthropic.com>
Add the rtl8730e_evb (RTL8730E Evaluation Board) with an nsh configuration
that demonstrates the RTL8730E baseline feature set:
- Dual-core SMP (CONFIG_SMP=y, CONFIG_SMP_NCPUS=2)
- Wi-Fi station and SoftAP via wapi
- DHCP client (wlan0) and DHCP server (wlan1/AP mode)
- littlefs persistent storage at /data on SPI NOR flash
- iperf2 TCP/UDP throughput measurement
- NSH console over the LOG-UART
Board formerly named ca32-evb; renamed to follow the rtlXXXX_evb
convention used by all other Ameba boards.
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Assisted-by: Claude Sonnet 4.6 <noreply@anthropic.com>
Replace the CMake skeleton with full SDK build machinery, mirroring
the make-side ameba_board.mk. RTL8730E differs from the KM4-based
ICs in three ways that prevent a direct include(ameba_board.cmake):
- No SDK autoconf / image2 ldscript generation: the board uses its own
dramboot.ld and a static prebuilt platform_autoconf.h
- No NP firmware build: KM0/KM4 are prebuilt blobs in prebuilt/
- No -mcmse: CA32 is ARMv7-A, not Cortex-M33; uses -DCONFIG_ARM_CORE_CA32
The ameba_build_lib() helper (adapted from ameba_board.cmake) compiles
SDK sources with an isolated flag set into libameba_fwlib.a and
libameba_wifi.a, avoiding NuttX header conflicts.
Key additions:
- libameba_fwlib.a: arch.c + log.c + sscanf_minimal.c always; IPC for
WiFi/FlashFS; ameba_flash_ram.c for FlashFS
- lib_rom.a linked for GPIO or FlashFS (GPIO_Init, Pinmux_Config, etc.)
- libameba_wifi.a + prebuilt WHC host libs for WiFi
- VFS1 geometry extracted from platform_autoconf.h via
target_compile_definitions (set_property(SOURCE) has scope issues in
NuttX's include()-based CMake structure)
- `flash` target calls ameba_smart_flash.sh
Verified: gpio (1186 targets) and nsh (1530 targets) configs both
build cleanly; /data mounts at correct 2 MB partition size.
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Assisted-by: Claude Sonnet 4.6 <noreply@anthropic.com>
RTL8730E has dual Cortex-A32 cores (CA32) in the AP domain. Core1 is
powered off by default and requires an explicit HSYS power-on sequence
before ATF SP_MIN can service the PSCI CPU_ON call. Without it, SP_MIN
writes the entry point to the mailbox and times out waiting for Core1 to
poll it.
Add rtl8730e_core1_power_on() that mirrors SDK smp.c:rtk_core1_power_on():
assert reset, assert isolation, two-stage power-on with up_udelay() for
correct 50/50/500/50 us timing, then release isolation and reset. Call it
from up_cpu_start() before psci_cpu_on().
Enable CONFIG_SMP / CONFIG_SMP_NCPUS=2 / CONFIG_ARM_PSCI in the nsh
defconfig.
Enabling SMP also exposed a latent WHC skb alignment bug: the Realtek
WHC WiFi driver keeps the AP/NP DDR views coherent with by-VA
DCache_Clean/Invalidate at SKB_CACHE_SZ (64 on RTL8730E) granularity,
which requires every skb buffer to be cache-line aligned. The port had
omitted CONFIG_MM_DEFAULT_ALIGNMENT (defaulting to 8; the 8721Dx parts
set 32), so heap-allocated skb buffers were unaligned and the cache
maintenance spilled onto the neighbouring skb struct, corrupting its
immutable buf pointer (seen as skb->buf = 0x05 and a TX memcpy data
abort on "renew wlan0"). This was harmless on single core -- the
non-shareable DDR mapping made the stray maintenance a no-op -- but the
SMP shareable mapping plus real dual-core concurrency turned it into a
hard fault. Set CONFIG_MM_DEFAULT_ALIGNMENT=64 in the nsh defconfig.
Hardware verified on RTL8730E (C-cut): /proc/cpuinfo shows both processor 0
and processor 1; getprime 2 completes two concurrent threads in ~573 ms
(same as single-thread), confirming true parallel execution across both cores.
"renew wlan0" now obtains a DHCP lease (192.168.1.101) without faulting.
Assisted-by: Claude Sonnet 4.6 <noreply@anthropic.com>
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Add NuttX support for the Realtek AmebaSmart (RTL8730E) running on the
CA32 (Cortex-A32) application core, with the KM4/KM0 cores kept as
vendor firmware (KM4 acts as the WiFi network processor over WHC IPC).
Stage 1 bring-up, hardware verified:
- CA32 boot / exception vectors / MMU + page allocator / heap
- LOGUART console (RX via KM0-owned IPC + shared memory)
- IRQ controller, timer, serial
- On-chip SPI NOR flash MTD -> littlefs mounted at /data
- WHC-host WiFi netdev (STA): scan / connect / DHCP, verified end to
end (association -> 4-way -> DHCP -> ping, bidirectional TCP)
IC-agnostic Ameba glue is shared from arch/arm/src/common/ameba via a
relative VPATH entry (matching the rtl8721dx pattern), which also avoids
the empty mkdeps --dep-path that a leading-":" VPATH entry produced and
which intermittently broke parallel .ddc dependency generation.
The FIP packaging / flash image assembly is driven by
common/ameba/tools/ameba_smart_flash.sh from the board scripts.
Vendor blobs and build artefacts under the board prebuilt/ directory are
kept out of the tree via prebuilt/.gitignore.
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Makes /proc/reset available, so which peripherals are held can be read
while the board is running rather than only for the eight lines the
startup report names.
RESET_PROCFS depends on FS_PROCFS_REGISTER, which neither board set.
Without it the symbol is dropped when the configuration is regenerated
and the entry never appears, which is silent: the defconfig still reads
as though the feature were on.
Assisted-by: Claude:claude-opus-5
Signed-off-by: Justin Hammond <justin@dynam.ac>
A peripheral held in reset reads like one that is absent, and the boot
loader does not leave the same lines released on every board or every
boot. One line at startup says how much is held:
reset: 324 lines, 117 held
Beside the clock tree's line and for the same reason: the summary is
worth seeing on every boot, and the detail belongs in /proc where it can
be read when it is wanted.
The driver's error output is enabled, matching the clock driver. Info
level is not, since nothing at that level prints on a healthy boot.
Assisted-by: Claude:claude-opus-5
Signed-off-by: Justin Hammond <justin@dynam.ac>
Connects the R5F to Linux remoteproc over the NAVSS mailbox.
The mailbox ISR only drains the FIFO and acknowledges; OpenAMP delivery is
deferred to HPWORK, because the rpmsg rx path takes mutexes and allocates.
The resource table publishes two vdevs, rpmsg and virtio-net, leaving every
vring address FW_RSC_ADDR_ANY: Linux allocates them from the R5F DMA pool and
rejects fixed addresses outside it.
Shared IPC memory is mapped Non-cacheable, since the R5F is not coherent with
the A53 and cached mappings leave NuttX reading stale vring state.
Also drops the duplicate arm_mpu.c from CHIP_CSRCS.
Assisted-by: Claude Code:claude-fable-5
Signed-off-by: Ulaş Sertan Kemeç <sertan.usk@gmail.com>
CONFIG_EXAMPLES_COMP_DACPATH matched its Kconfig default value, which
make savedefconfig drops as redundant. The stale explicit line made
the committed defconfig differ from what a clean savedefconfig
produces, failing CI's defconfig-completeness check even though the
board builds fine either way.
Assisted-by: Claude:claude-sonnet-5
Signed-off-by: Daniel P. Carvalho <danieloak@gmail.com>
Implement ao_ioctl in stm32_comp_m3m4_v2.c to handle ANIOC_COMP_ENABLE and
ANIOC_COMP_DISABLE commands. Also add CONFIG_STM32_COMP_INIT_DISABLED to
allow keeping the comparator disabled after driver initialization until
explicitly enabled.
Update nucleo-g431kb:comp defconfig to enable CONFIG_EXAMPLES_COMP and
set default DAC path for comparator ramp verification.
Assisted-by: Gemini:gemini-2.5-pro
Signed-off-by: Daniel P. Carvalho <danieloak@gmail.com>
Add a standalone tool to create AHAB container for imxrt118x. This can
generate a trivial unsigned image without appending ELE.
The tool can be used to create bootable images for m33. To do anything
more complicated, the user needs to use the official SPSDK tool from
NXP.
Assisted-by: Claude Code:claude-opus-5-0
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
This adds the initial board configurattions for building NuttX for imxrt1189-evk.
Also add a script building the NXP container image for bootloaders (m33 images)
The board boots on Cortex-M33 core, for which there are two m33 targets: nsh-m33 and bl.
- "bl" target does basic initialization of ELE and TRDC and just releases the M7 to run
at 0x20080000.
- "nsh-m33" target just boots nuttx into nsh shell on m33
- The "nsh" target is for M7 core. It can be flashed at 0x20080000, and
it boots to nsh shell with a proper bootloader on m33 (the bl target does this).
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
Move RX timestamp storage from net_driver_s.d_rxtime into
iob_s.io_time so each IOB carries its own timestamp through
the stack. Remove old iob_trycopyin/iob_copyout timestamp
packing in CAN/PKT/UDP paths. Fix iob_clone_partial to copy
io_time before source pointer advances to NULL.
Signed-off-by: OceanfromXiaomi <zhaohaiyang1@xiaomi.com>
Signed-off-by: wenquan1 <wenquan1@xiaomi.com>
Switch CONFIG_INIT_ENTRYPOINT from nsh_main to nxinit's init_main for
the shell-capable configs (nsh, usbnsh) of waveshare-rp2040-zero and
waveshare-rp2040-lcd-1.28. nsh now runs as a "console sh" service
started by init.rc instead of being the top-level init task.
Add etc/init.d/init.rc to the shared common/src RCSRCS, gated on
CONFIG_ETC_ROMFS && CONFIG_SYSTEM_NXINIT, so one copy covers both
boards, plus a .gitignore for the etctmp files Board.mk generates from
it. The four defconfigs also set CONFIG_SYSTEM_NXINIT=y with its
Kconfig deps, CONFIG_ETC_ROMFS=y and CONFIG_FS_ROMFS=y.
nsh_main connected the CDC/ACM gadget itself via
boardctl(BOARDIOC_USBDEV_CDCACM); init_main does not, so the usbnsh
configs would otherwise come up with no USB console. Run sercon from
init.rc and enable CONFIG_SYSTEM_CDCACM in those two defconfigs to keep
that step.
Assisted-by: Claude:claude-sonnet-5
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Adds a PWM lower-half using the eCAP modules in APWM mode as single-channel
generators rather than capture units.
start() reprograms the time base only when the frequency changes, so a
duty-only update does not stop or zero a live counter.
t3-gem-o1 registers /dev/ecap1 and /dev/ecap2; output pad selection is left to
the board, as the candidates collide with I2C0.
Verified on t3-gem-o1: examples/pwm runs a 1 kHz, 50% duty train on both
instances and accepts a duty-only change (25% then 75%). The output pins have
not been measured on copper, as no pad is assigned to them on this board.
Assisted-by: Claude Code:claude-opus-4-8
Signed-off-by: Ulaş Sertan Kemeç <sertan.usk@gmail.com>
Moves EPWM initialization from am67_bringup.c to am67_pwm.c. Initialization
now requires only a function call in bringup.c.
Nxstyle checked, builds same.
Signed-off-by: Ulaş Sertan Kemeç <sertan.usk@gmail.com>
Adds a PWM lower-half for EPWM0 and EPWM1, covering both output channels of
each. The CTRL_MMR EPWM clock enables are unlocked once during board bring-up.
t3-gem-o1 registers /dev/pwm0 and /dev/pwm1 with PWM_NCHANNELS=2.
Verified on t3-gem-o1: all four outputs (EPWM0 A+B, EPWM1 A+B) drive physical
pins, jumpered into a Linux GPIO input -- 50% and 20% duty read back at the
expected sample ratios, and gpiomon timed a 50 Hz half-period at 9.998-10.002
ms. examples/pwm starts and stops a 1 kHz train cleanly.
Assisted-by: Claude Code:claude-fable-5
Signed-off-by: Ulaş Sertan Kemeç <sertan.usk@gmail.com>
Aligns the qemu-i486 nsh and vga_fb defconfigs with the nxinit
migration already done for sim, rv-virt and qemu-armv8a:
- CONFIG_INIT_ENTRYPOINT/ENTRYNAME: "nsh_main" -> "init_main"
- CONFIG_SYSTEM_NXINIT=y, plus its dependencies CONFIG_EXPERIMENTAL,
CONFIG_LIBC_EXECFUNCS, CONFIG_SCHED_HAVE_PARENT and
CONFIG_SCHED_CHILD_STATUS
- CONFIG_ETC_ROMFS=y (CONFIG_FS_ROMFS was already enabled on both
configs)
- New boards/x86/qemu/qemu-i486/src/etc/init.d/init.rc, identical in
content to boards/arm64/qemu/qemu-armv8a/src/etc/init.d/init.rc
(service console sh + restart_period 1000, started from `on init`
under CONFIG_SYSTEM_NSH)
- src/Makefile: add init.rc to RCSRCS when CONFIG_ETC_ROMFS and
CONFIG_SYSTEM_NXINIT are both set, matching qemu-armv8a's
src/Makefile
This depends on the previous commit ("arch/x86: Add -P to CPP to
suppress linemarkers."): without it, the preprocessed init.rc that
Board.mk feeds to nxinit's parser at build time still contains GNU
linemarker lines and the parser rejects it with -EINVAL at boot. That
arch-level fix is otherwise independent and can be reverted on its
own without affecting other x86 boards.
qemu-i486 is 32-bit x86 with no romfs_img/romdisk_register/
romfs_boot/romfs_stub definitions anywhere under its board directory,
so it does not hit the romfs_img symbol collision that affects
qemu-intel64 (a separate board, tracked separately); i486 goes
straight from a clean ETC_ROMFS build to a working /etc mount.
Verified under QEMU (qemu-system-i386), both configs, host gcc -m32
(CROSSDEV is unset on Linux, ARCH_X86_M32=y already handles -m32):
nsh (-cpu 486 -m 2):
nsh> ps
TID PID PPID PRI POLICY TYPE NPX STATE EVENT SIGMASK STACK COMMAND
0 0 0 0 FIFO Kthread - Ready 0000000000000000 0002024 Idle_Task
2 2 0 100 FIFO Task - Waiting Semaphore 0000000000000000 0002004 init_main
3 3 2 100 FIFO Task - Running 0000000000000000 0002012 sh
nsh> mount
/etc type romfs
/proc type procfs
nsh> free
total used free maxused maxfree nused nfree name
572784 9680 563104 10048 563104 52 1 Umem
vga_fb (-cpu 486 -m 1024 -vga std -serial stdio -display none): same
init_main/sh parent-child relationship, /etc romfs mounted, `fb`
framebuffer test completes ("Test finished"); free shows
551696/86832/464864 total/used/free (heavier due to LCD framebuffer
allocations, still well clear of CONFIG_RAM_SIZE=1048576).
ostest (third config on this board, INIT_ENTRYPOINT="ostest_main")
is out of scope and left untouched.
Assisted-by: Claude:claude-sonnet-5
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Record the WKUP_I2C0 master in the board's Peripheral Support list.
Assisted-by: Claude Code:claude-opus-5
Signed-off-by: Ulaş Sertan Kemeç <sertan.usk@gmail.com>
Adds an I2C master driver for the AM67 I2C instances, completing transfers on
ARDY as the K3 controller signals.
Bring-up is deferred to the first transfer, because the Linux Device Manager
enables the I2C clocks late and touching the bus during early board init is not
safe here. The last reference drop clears the flag so the next transfer
re-initialises the hardware.
t3-gem-o1 registers WKUP_I2C0 as /dev/i2c2.
Verified on t3-gem-o1: i2c dev finds 0x30, 0x40, 0x51 and 0x68, the RTC at
0x68 reads a ticking BCD seconds register, repeated reads are consistent, and
NACK recovery returns the bus to a usable state.
Assisted-by: Claude Code:claude-fable-5
Assisted-by: Claude Code:claude-opus-4-8
Signed-off-by: Ulaş Sertan Kemeç <sertan.usk@gmail.com>
esp32s3-devkit and esp32s3-eye both call board_spiflash_init() from
their bring-up to register the internal SPI flash MTD partition and
mount its file system; esp32s3-xiao never did, so CONFIG_ESP32S3_SPIFLASH
built but no /dev/... MTD partition or mount ever appeared -- same shape
of gap as the IMU, SD, console and Wi-Fi wiring already fixed for this
board.
Guarded with pm_stay(PM_IDLE_DOMAIN, PM_IDLE) the same way the Wi-Fi
bring-up below it is: flash operations run with the cache disabled and
can't tolerate PM_STANDBY's clock gating either.
Confirmed under QEMU's esp32s3 machine: LittleFS mounts, and a counter
file written to it survives a reboot.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
Assisted-by: Claude:claude-sonnet-5
esp32s3-devkit, esp32s3-ws-lcd128, lckfb-szpi-esp32s3 and esp32-devkitc
all call esp_openeth_initialize() from their bring-up to register the
openeth MAC (the NIC QEMU's esp32s3 machine provides); esp32s3-xiao
never did, so CONFIG_ESP32S3_OPENETH built but no wlan/eth netdev ever
registered under QEMU -- same shape of gap as the IMU, SD, console,
Wi-Fi and SPI-flash wiring already fixed for this board.
Confirmed under QEMU's esp32s3 machine, combined with the esp_openeth
RX-interrupt fix (merged in 88c8623ced): the netdev registers and the
guest genuinely sends and receives.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
Assisted-by: Claude:claude-sonnet-5
If CONFIG_ARM_MPU and CONFIG_STM32_ICACHE are set, this will configure an
MPU region marking the OTP flash as non-cacheable. This prevents hard faults
when accessing the 4K OTP region from software.
Signed-off-by: Darryl Ring <darryl@bluerobotics.ca>
Add a Peripheral Support section to the board page listing the GPIO and
MCU_MCSPI0 drivers, and replace the "UART console only" warning on both
the chip and board pages -- it no longer describes the port. The
replacement states what actually constrains the port: NuttX runs on the
R5F under RemoteProc and depends on the bootloader or Linux Device
Manager having powered and clocked the peripherals, because there is no
TISCI client yet.
Assisted-by: Claude Code:claude-opus-5
Signed-off-by: Ulaş Sertan Kemeç <sertan.usk@gmail.com>
Adds the AM67 GPIO lower half and a polled MCU_MCSPI0 master driver, with the
pad configuration both need. The K3 instance is not the OMAP2 layout: an HL
header block precedes the functional registers.
Chip select is released only after CHSTAT.EOT, since a high SCLK otherwise
drops it mid-word and truncates the write, and CHCTRL.EN stays asserted between
transfers.
t3-gem-o1 registers /dev/spi0 for its ICM-20948 (CS3) and LPS22DF (CS1), and
raises NSH_MAXARGUMENTS to 16 so the spi tool can address a device.
Verified on t3-gem-o1: WHO_AM_I reads 0xEA on CS3 and 0xB4 on CS1, and the
ICM-20948 streams continuous accelerometer samples over the bus.
Co-authored-by: Ulaş Sertan Kemeç <sertan.usk@gmail.com>
Assisted-by: Cursor
Assisted-by: Claude Code:claude-opus-4-8
Signed-off-by: Ulaş Sertan Kemeç <sertan.usk@gmail.com>
Follow-up to the previous commit, which switched every flat-build
rv-virt nsh defconfig from nsh_main to nxinit (init_main) but left
pnsh and pnsh64 (CONFIG_BUILD_PROTECTED=y) on nsh_main. Under protected
build nxinit's "console sh" service failed to start:
posix_spawnp("sh") resolves through the kernel-space binfmt "builtin"
loader / BINFS, but the kernel-space g_builtins/g_builtin_count table
those rely on was never populated -- CONFIG_BUILD_PROTECTED links
apps/builtin/builtin_list.c only into the user blob (nuttx_user), and
nothing called the boardctl(BOARDIOC_BUILTINS) hand-off NuttX has
provided for this since release 8.1.
With that hand-off now issued by apps/system/nxinit early in init_main()
(nuttx-apps, "system/nxinit: register g_builtins with the kernel under
PROTECTED build"), pnsh/pnsh64 can use nxinit like every other
flat-build rv-virt nsh defconfig. Apply the same minimal
nxinit-essential delta used for the 23 configs switched previously.
Verified on rv-virt:pnsh: `ps` shows init_main as the parent with sh
as its Running child, `ls /bin` lists the builtins, and `hello` runs
(see the PR description for logs).
Assisted-by: opencode-agent/claude-sonnet-5
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Switch every rv-virt (qemu-rv) flat-build defconfig whose init entry
point was nsh_main to nxinit (init_main): citest, citest64, fb, fb64,
flats, flats64, leds, leds64, leds64_rust, leds64_zig, libcxx,
libcxx64, lvgl64_vector, netnsh, netnsh64, netnsh64_smp, netnsh_smp,
nsh, nsh64, python, smp, smp64, virt_nsh (23 configs; pnsh/pnsh64 are
switched in the following commit). nsh now runs as a "console sh"
service started by init.rc instead of being the top-level init task,
matching boards/arm/qemu-armv7a, boards/arm64/qemu-armv8a and
boards/sim. elf (elf_main) and the 11 kernel-build configs (which use
CONFIG_INIT_FILEPATH) are out of scope and untouched.
Each switched defconfig gains only the nxinit-essential keys
(regenerated with make savedefconfig): CONFIG_INIT_ENTRYPOINT="init_main",
CONFIG_SYSTEM_NXINIT=y and its deps (CONFIG_EXPERIMENTAL,
CONFIG_LIBC_EXECFUNCS, CONFIG_SCHED_CHILD_STATUS), and
CONFIG_ETC_ROMFS=y/CONFIG_FS_ROMFS=y to ship init.rc via ROMFS.
Add boards/risc-v/qemu-rv/rv-virt/src/etc/init.d/init.rc registering a
"console sh" service (guarded by CONFIG_SYSTEM_NSH), shipped via ROMFS
in both the Make (RCSRCS, only when CONFIG_ETC_ROMFS && CONFIG_SYSTEM_NXINIT)
and CMake (nuttx_add_romfs()) builds, matching qemu-armv7a/qemu-armv8a.
rc.sysinit and rcS are left in place: on rv-virt both are empty
license-only shells still referenced unconditionally by boards/Board.mk
for the kernel-build and pnsh/pnsh64 configs.
CONFIG_FS_BINFS=y is added with a binfs mount at CONFIG_PATH_INITIAL
(pre-existing "/system/bin") in
qemu_rv_boardinit.c:board_late_initialize() (gated on CONFIG_FS_BINFS,
so the block and the CONFIG_PATH_INITIAL reference compile out when
binfs is not selected).
Rationale: nxinit resolves the "sh" service via posix_spawnp() ->
exec_spawn() -> load_module(); with CONFIG_LIBC_ENVPATH that walks $PATH
via envpath_next() and stat()s each "$dir/sh" candidate, so it never
reaches the builtin binfmt loader unless a real directory entry exists.
CONFIG_PATH_INITIAL is left at its pre-existing "/system/bin"; mounting
binfs there (rather than repointing PATH) makes "sh" resolvable while
keeping the defconfig delta minimal. This never surfaced under nsh_main,
which runs nsh_consolemain() inline without spawning by relative path.
Equivalent to the binfs mount already present in boards/sim's
sim_bringup.c (which mounts at /bin, its own PATH_INITIAL).
smp and smp64 additionally re-enable binfmt: their CONFIG_DEFAULT_SMALL=y
default pulls in CONFIG_BINFMT_DISABLE=y, which blocks
CONFIG_LIBC_EXECFUNCS (thus CONFIG_SYSTEM_NXINIT) and would otherwise
fail to link with "undefined reference to init_main". Same fix
boards/sim used for its affected configs.
citest/citest64 also carry their pre-existing explicit
CONFIG_INIT_STACKSIZE value (3072/4096) over to
CONFIG_SYSTEM_NSH_STACKSIZE: under nxinit "sh" is a separate spawned
child sized by SYSTEM_NSH_STACKSIZE, which otherwise dropped to the
2048 default and overflowed (citest64 crashed running `ps`). Every
other switched config that had an INIT_STACKSIZE override already had a
matching SYSTEM_NSH_STACKSIZE one.
All 23 switched configs were booted (not just compiled) and show
init_main as the parent with sh as its Running child in `ps` (see the
PR description for logs).
Assisted-by: opencode-agent/claude-sonnet-5
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
The mcuboot-loader image overflows its flash region once the FAT deferred-delete change is applied. Long filename support is not needed by the bootloader, which boots from flash areas and never opens FAT files by long name, so disable CONFIG_FAT_LFN to reclaim the space while keeping short filename support intact.
Signed-off-by: Arnav Sharma <2006arnavsharma@gmail.com>
This restores the entrypoint switch from commit
7cc6707a76 ("boards/esp32s3-xiao: switch
defconfigs to nxinit entrypoint"), reverted in 76b90e02cbe4967193
b620abcb1efb9f6b3f8f5b after a real-hardware regression report on
Seeed XIAO ESP32-S3 (board hangs, no USB console), and fixes the
actual root cause this time instead of just reverting it.
Root cause: the shared boards/xtensa/esp32s3 init.rc starts the
interactive console as a plain "sh", which, unlike nsh_main's
nsh_consolemain(), never registers/connects the CDC-ACM gadget this
board uses as its console (CONFIG_CDCACM_CONSOLE=y, no
CONFIG_DEV_CONSOLE). Restoring the previous commit's entrypoint switch
on its own is therefore not sufficient - it would just reintroduce the
same regression, so that commit is folded into this one rather than
kept as a separate, individually broken step.
Fix, using the "console" service option added to nxinit by a companion
apps change:
- init.rc: bring up the console gadget once, unconditionally, before
any service starts, via "exec -- sercon" (apps/system/cdcacm already
implements exactly this and depends on neither nxinit nor nsh); flag
the "console" service with the new "console" option so its stdio is
connected to the (now registered) gadget device.
- esp32s3-xiao's usbnsh/combo defconfigs: add CONFIG_SYSTEM_CDCACM=y so
sercon is actually built in. Verified with "make savedefconfig"
against both defconfigs (byte-identical, no manual edits beyond the
generated diff).
Verified end to end on real Seeed XIAO ESP32-S3 Sense hardware
(usbnsh): after this change the board enumerates its NuttX CDC-ACM
gadget on a normal reset and boots to an interactive nsh session
spawned by nxinit ("ps" shows init_main as PID 2, parent of "sh").
Assisted-by: Kiro:claude-sonnet-5
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Nothing copies .data on a RAM/remoteproc image (CONFIG_BOOT_RUNFROMISRAM=y),
so an LMA distinct from the VMA loads initialised data where the code never
reads it. _sidata was taken before .init_section, putting the load address
sizeof(.init_section) below the run address.
That section is empty in the in-tree configurations, so the fault is latent
today and this change is a no-op for them; it appears as soon as anything lands
in .init_array.
Assisted-by: Claude Code:claude-opus-4-8
Signed-off-by: Ulaş Sertan Kemeç <sertan.usk@gmail.com>
The in-tree esp32s3-xiao board bringup never wires up Wi-Fi at all --
unlike esp32s3-devkit/esp32s3-eye, it has no
`#ifdef CONFIG_ESPRESSIF_WIFI` include of esp32s3_board_wlan.h and no
call to board_wlan_init(). Add both, mirroring those boards' pattern
and placement exactly.
On its own this is not enough for a board that also uses CONFIG_PM:
Wi-Fi's PHY/RF calibration inside board_wlan_init() cannot tolerate
the clock gating of PM_STANDBY (light sleep). If the idle task enters
light sleep while phy_init's calibration is still running -- which the
greedy governor is free to do the moment the CPU goes idle during
driver init -- the calibration hangs forever waiting on a clock that
just stopped. Confirmed on real XIAO ESP32-S3 hardware: with
CONFIG_PM + CONFIG_ESPRESSIF_WIFI both enabled and no guard, boot got
stuck 100% of the time right after the "net80211 rom version" line,
before phy_init ever printed, and never reached NSH -- reproducible
across repeated flashes, 50s+ waits, not even responding to a UART
wakeup keypress (a genuine hang, not quiet sleep).
Fixed by holding a stronger PM lock than PM_STANDBY for the duration
of board_wlan_init(): pm_stay(PM_IDLE_DOMAIN, PM_IDLE) blocks
PM_STANDBY/PM_SLEEP while still allowing normal CPU idle, and
pm_relax() releases it immediately after, restoring whatever floor the
board's own PM policy holds otherwise. Confirmed fixed on the same
hardware: boots clean to NSH with Wi-Fi + PM enabled together, `ps`
shows the wifi/netdev-wlan0 kernel threads running, and `wapi scan`/
`ifup wlan0` work normally.
esp32c3-devkit and esp32c6-devkit also combine CONFIG_PM with Wi-Fi,
but don't need this guard today: both call board_wlan_init() well
before esp_pmconfigure() (which is what actually arms the PM governor)
runs near the end of bringup, so PM isn't active yet during their
Wi-Fi init. This board's PM handling begins earlier in bringup, so the
two can race here.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
Assisted-by: Claude:claude-sonnet-5
gotindex named the .got section header, and every user then reached through
shdr[] for what it actually wanted. Only one of the five wanted the index.
gotbase and gotsize say it directly. gotsize is the extent of .got and is
also what says the object has one, and gotbase is where the GOT ended up:
the placed address of .got for an ordinary object, or DT_PLTGOT for an FDPIC
one, which libelf_bind() already reads. Both are set in libelf_loadfile(),
after the sections are placed, so gotbase is the address the object will be
read at rather than the one it was linked for.
The GOT walk in libelf_loadfile() now runs only when there is a base, which
also keeps it off an FDPIC object. An FDPIC object's sections are never
placed, so .got carried a link time sh_addr there, and the walk read and
wrote through it. Its GOT is relocated through its own relocations.
The check that gates libelf_xipacquire() runs before the load, when neither
field is set, so it looks the section up by name. It hands the index it
found to libelf_loadfile(), which is the only reason that function takes
one: the object is searched once, not twice.
One behaviour changes: a .got that exists but is empty now reads as no GOT.
There is nothing for any of the five users to do with an empty one.
Built for pimoroni-pico-2-plus with CONFIG_PIC, CONFIG_ELF and
CONFIG_LIBC_ELF, and for mps3-an547:bl, which is the board that read the
index. Run on QEMU with mps3-an547:picostest, which loads PIC ELF modules
from a romfs: hello prints, and ostest reaches the timed mutex test, the
same as before the change.
Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
Add a CDC/ACM (console) + USB fastboot (ADB "fastboot" personality)
composite device to the shared rp2040_composite.c board glue, and a
new "fastboot_usb" defconfig for waveshare-rp2040-zero and
waveshare-rp2040-lcd-1.28.
- boards/arm/rp2040/common/src/rp2040_composite.c: add a third
composite slot for CONFIG_USBADB (covers both plain ADB and, with
CONFIG_USBFASTBOOT, the "fastboot" personality of the same driver)
alongside the existing MSC/CDC-ACM slots. While adding this,
fixed a latent bug: the CDC/ACM block never advanced ifnobase/
strbase after filling in its own slot, because CDC/ACM used to
always be the *last* device in the composite (nothing downstream
ever needed the incremented values). Now that a device can follow
CDC/ACM, the missing increment caused the fastboot interface to be
assigned the same USB interface number as CDC/ACM's control
interface (both 0), which the Linux kernel rejects with "Duplicate
descriptor for config 1 interface 0 altsetting 0, skipping" and
drops the fastboot interface entirely (confirmed via lsusb -v and
disassembly of the generated board_composite_connect() code).
- boards/arm/rp2040/waveshare-rp2040-zero/configs/fastboot_usb and
boards/arm/rp2040/waveshare-rp2040-lcd-1.28/configs/fastboot_usb:
new defconfig booting directly into fastbootd
(CONFIG_INIT_ENTRYPOINT="fastbootd_main", no nsh) which brings up
the CDC/ACM + fastboot composite via
CONFIG_SYSTEM_FASTBOOTD_USB_BOARDCTL as soon as fastbootd starts,
so the CDC/ACM sub-interface still provides a console for boot/
fastbootd log visibility without requiring a wired UART, while the
fastboot vendor interface is what `fastboot devices`/`getvar` talk
to.
Assisted-by: OpenCode:claude-sonnet-5
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Drives the speed of the four application cores. The rate is set to any
of the operating points the vendor validates, all of which share a core
voltage, so this touches no regulator.
The cores run from the PLL being reprogrammed, so they park on a slower
clock first, through a selector the vendor names as glitch free. While
parked the PLL is stopped, given new dividers, restarted and watched
until it locks; if it never locks the cores stay parked, since returning
them to an unlocked PLL does not fail safely.
Above a gigahertz the bus ratio must be two to one before the cores
return: the bus fabric does not reach beyond about eight hundred
megahertz. That is the one step in the sequence software cannot recover
from, so the mux is moved before the ratio.
The rate is measured rather than derived. The cores are counted against
the crystal derived time counter and the result reported beside what the
clock tree computes, because the manual and the vendor's code number the
CPU PLL's outputs differently. The core selector's parent is
cpupll_fout1, and the three CPU PLL outputs are marked
CLK_GET_RATE_NOCACHE since this driver reprograms that PLL at run time.
Assisted-by: Claude:claude-opus-5
Signed-off-by: Justin Hammond <justin@dynam.ac>
Add reset_usb_boot ROM function typedef and wire it into
board_reset() so that 'nsh> reboot bootloader'
(BOARDIOC_SOFTRESETCAUSE_ENTER_BOOTLOADER) on RP2040 boards enters
BOOTSEL USB mass-storage mode directly, matching the behavior
already available on rp23xx boards. All other status values keep
the existing up_systemreset() behavior.
This affects all boards under boards/arm/rp2040/common (pico,
pico-w, feather-rp2040, xiao-rp2040, w5500-evb-pico, etc.) since
the change is in the shared board_reset() implementation.
Assisted-by: GitHubCopilot:claude-4.6-opus
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
The console divisor was computed from 198144000, a figure with no source
in the manual, the vendor tree or Linux, all of which give the low speed
peripheral clock as 200 MHz. The clock tree now reports lsp_uart0_pclk
at 200 MHz, and section 12.4.3.2 makes that clock the UART's baud
reference.
Also enable the fractional divisor. These are DesignWare UARTs with DLF
implemented, four bits wide at offset 0xc0, which is where
UART_DLF_OFFSET lands once scaled by this board's register increment.
Section 12.4.3.2 works the same example at the same 200 MHz.
At 115200 the error goes from 1.41% to 0.006%. The old figure with the
old divisor was tolerable; the margin only gets worse at higher rates.
DEBUG_CLK and DEBUG_CLK_ERROR are enabled so a clock that fails to
register is reported.
Assisted-by: Claude:claude-opus-5
Signed-off-by: Justin Hammond <justin@dynam.ac>
The architecture registers the clock tree before the board runs, and every
driver the board brings up afterwards depends on it. Report what
registered, so a tree that came up short is visible without a debug build.
eic7700x_clk_count() supplies the numbers; /proc/clk has the tree itself.
Assisted-by: Claude:claude-opus-5
Signed-off-by: Justin Hammond <justin@dynam.ac>
A C++ module with a static object does not link. GCC registers each such
object's destructor with __cxa_atexit(dtor, obj, &__dso_handle), and
__dso_handle comes from crtbegin, which a module does not link:
hello++3.cxx:119: undefined reference to `__dso_handle'
It is reachable today with CONFIG_PIC, where a module is linked as an
executable and the symbol has to resolve. Without it the link is
relocatable, the symbol stays undefined and nothing complains until
something makes it resolve.
-fno-use-cxa-atexit registers the destructors with atexit() instead, which
puts them in .fini_array. That is also where libelf_uninit() looks for them
when the module is unloaded, so the flag that makes the link work is also
the flag that makes the destructors run.
The option goes wherever CXXELFFLAGS is defined, which is the architecture
Toolchain.defs and the boards that reassign it. The toolchains that are not
GCC or Clang are left alone: ceva, tricore, z16 and the z80 family.
The CMake build sets it once, next to where the architecture elf.cmake is
included. A generator expression keeps it off the C compiles, because the
option is valid for C++ alone and GCC warns about it otherwise, and the
compiler id gates it so that a toolchain which is neither GCC nor Clang does
not see it. It cannot go in the toolchain file itself: CMake reads that file
again inside try_compile, in a project that has not included the NuttX
extensions, so the call is an unknown command there.
Reproduced with apps/examples/elf on mps3-an547:picostest with CONFIG_PIC
enabled: hello++3 fails to link before and links after.
Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
