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xtensa/espressif: enable openeth RX interrupt, fix ifdown()'s TX/RX disable

Browse source 
esp_openeth_initialize() (arch/xtensa/src/common/espressif/esp_openeth.c)
attaches the MAC interrupt with esp_setup_irq() but never calls
up_enable_irq(OPENETH_IRQ_MAC), unlike every other Espressif driver in
this tree. Left masked, openeth_isr_handler() never runs and received
frames are only picked up when the netdev work thread happens to run
for some other reason (a transmit). A guest can therefore send but
effectively not receive: ping still works because each request is
itself a transmit, while a socket blocked in recvfrom() waits on a
wake-up that never comes.

Confirmed with a GDB breakpoint counter on openeth_isr_handler():
zero hits before the fix, dozens after, under QEMU's esp32s3 machine
(the open_eth NIC it emulates). With the interrupt enabled, TCP
retransmits over a fixed test window dropped from 86 to 4.

Separately, openeth_ifdown() calls openeth_enable() right under a
comment that says "Disable TX and RX" -- it should call
openeth_disable(), which is what actually disables the two DMA
descriptor rings. Fixed alongside since it's the same function and
the same class of mistake.

Board-independent (arch/xtensa/src/common/espressif), not specific
to any one esp32s3 board; open_eth itself only exists as a QEMU
peripheral, so there's no real-hardware regression risk from either
change.

Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
Assisted-by: Claude:claude-sonnet-5
This commit is contained in:
Felipe Moura 2026-09-15 15:26:02 -03:00 • committed by Filipe do Ó Cavalcanti
parent b5f7b88bae
commit 88c8623ced
1 changed files with 8 additions and 1 deletions
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9
arch/xtensa/src/common/espressif/esp_openeth.c
View file

@ -366,7 +366,7 @@ static int openeth_ifdown(struct netdev_lowerhalf_s *dev)
/* Disable TX and RX */
openeth_enable();
openeth_disable();
leave_critical_section(flags);
@ -424,6 +424,7 @@ static int openeth_set_addr(uint8_t *addr)
uint32_t mac0_u32;
uint32_t mac1_u32;
memcpy(&mac0_u32, &mac0, 4);
memcpy(&mac1_u32, &mac1, 4);
REG_WRITE(OPENETH_MAC_ADDR0_REG, mac0_u32);
@ -524,6 +525,12 @@ int esp_openeth_initialize(void)
goto err;
}
/* The interrupt is attached but still masked at the CPU; without this
* call it never fires, so received frames are only picked up on a TX.
*/
up_enable_irq(OPENETH_IRQ_MAC);
/* Initialize the MAC */
openeth_reset();