The citests.rst now documents how to run the CI test suites locally (the
same way they are done in NuttX GitHub CI). Other pages are created for
different parts of NuttX testing.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
Adds a documentation page describing the process that happens to each PR
submitted to nuttx and nuttx-apps.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
All of the tools listed on the original documentation are now given
their own individual doc pages. This makes it much easier to
cross-reference them from other documentation locations (as many are
used in CI/for specific architectures) and it also makes it easier for
users to digest the information.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
Update SIM configuration and CMake toolchain to resolve
linker errors when building on macOS. Adjust POSIX host
implementation to ensure successful compilation and
proper behavior of the sim target.
Modified:
- arch/sim/Kconfig
- arch/sim/src/cmake/Toolchain.cmake
- arch/sim/src/sim/posix/sim_hostmisc.c
Signed-off-by: Aditya Yadav <166515021+aditya0yadav@users.noreply.github.com>
GPIO PIN base address calculation had double right shift, thus call
to SAM_PION_BASE was always with port = 0 instead of correct port
number. As a result, function sam_gpioirq didn't correctly configure
additional interrupt modes (only rising or falling edge and level
interrupts).
The issue occured on SAMv7 and SAM34 platforms (likely copy-pasted
from one to another).
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This commit updates the common-source integration for RISC-V-based
Espressif devices (ESP32-C3, ESP32-C6, and ESP32-H2). This is part of a
larger common-source update split by architecture for better maintainability
of the already-supported devices and upcoming devices.
Major components updated:
- IRQ allocator refactoring with intr_alloc integration
- Common-source drivers (GPIO, RMT, I2C, SPI, UART, etc.)
- Espressif components upgrade to release/master.b
- Peripheral drivers (ADC, PWM, LEDC, MCPWM, PCNT, Temperature Sensor, etc.)
- Wireless adapters (Wi-Fi and BLE)
- Board defconfigs for all RISC-V Espressif boards
- Critical section handling improvements
Key architectural changes:
- IRQ Allocator: The new interrupt allocator enables multiple mapping
options from interrupt sources to CPU interrupts, providing flexibility
required by modern peripherals. Although this introduces breaking changes
to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE
Kconfig option is explicitly checked during startup to ensure proper
configuration. This validation prevents runtime issues from configuration
mismatches.
Note: This is a large commit to maintain bisectability. Breaking the
changes into smaller commits would result in non-building intermediate
states across the common-source infrastructure update.
Tested configurations:
- All defconfigs were built and tested, inclusing `ostest`.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
To be merged with RISC-V implementation
Add open-amp patch 0019 to extend fw_rsc_config with h2r_buf_addr
and r2h_buf_addr fields, allowing the host and remote sides to
specify buffer physical addresses through the resource table.
This enables splitting the shared memory pool into separate regions.
Also update open-amp.defs and open-amp.cmake to apply the new patch
during the open-amp build process.
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
support specify the address by h2r_buf_addr and r2h_buf_addr
so is can split shared memory pool
Signed-off-by: yintao <yintao@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
Implement `cc1101_file_ioctl` to map common NuttX wireless IOCTL commands
to CC1101 hardware registers. This allows dynamic configuration of radio
parameters from user-space applications.
* Map `WLIOC_SETRADIOFREQ` and `GETRADIOFREQ` to `FREQ[2:0]`.
* Map `WLIOC_SETADDR` and `GETADDR` to `ADDR`.
* Map `WLIOC_SETTXPOWER` and `GETTXPOWER` to internal PATABLE indexing.
* Map `WLIOC_SETMODU` and `GETMODU` to `MDMCFG2`.
* Map `WLIOC_FSK_SETBITRATE` and `GETBITRATE` to `MDMCFG4` and `MDMCFG3`.
* Map `WLIOC_FSK_SETFDEV` and `GETFDEV` to `DEVIATN`.
* Normalize positive SPI status byte returns from `cc1101_access` to `OK` (0)
to ensure POSIX compliance and prevent silently skipped register writes.
Signed-off-by: Chip L. <chplee@gmail.com>
Remove the unnecessary CONFIG_RPMSG_UART_CONSOLE preprocessor guard around
the console registration logic in uart_rpmsg_init().
The uart_rpmsg_init() function already accepts a bool isconsole parameter to
dynamically control console registration, which is designed to support flexible
console setup in distributed multi-core SOC systems. Adding the macro check on
top of this runtime parameter is redundant and negates the dynamic registration
capability.
This change fixes a regression introduced by PR #18410, which broke the functionality
of sim/rpproxy and sim/rpserver due to the incorrect macro guard preventing proper
console registration for the rpmsg UART device.
Signed-off-by: chao an <anchao.archer@bytedance.com>
Fix the abnormal CPU usage statistics issue caused by missing update
of run_start timestamp in the target task (to) TCB when the CPU load
counting mode is SCHED_CPULOAD_CRITMONITOR.
Before this fix, the to->run_start was not set when switching context,
leading to incorrect CPU usage calculation (e.g., Idle_Task showed 52.9%
CPU usage instead of 100%, and running tasks had wrong non-zero values).
After fixing, the CPU statistics return to normal: Idle_Task correctly
shows 100% usage, and non-running tasks show 0% as expected.
Enable:
+CONFIG_SCHED_CPULOAD_CRITMONITOR=y
+CONFIG_SCHED_CRITMONITOR=y
Before:
nsh> ps
TID PID PPID PRI POLICY TYPE NPX STATE EVENT SIGMASK STACK CPU COMMAND
0 0 0 0 FIFO Kthread - Ready 0000000000000000 0069584 52.9% Idle_Task
1 0 0 224 FIFO Kthread - Waiting Semaphore 0000000000000000 0067456 0.0% sim_loop_wq 0x7b4417a003f0 0x7b4417a00470
2 0 0 224 FIFO Kthread - Waiting Semaphore 0000000000000000 0067464 17.6% hpwork 0x4014dba0 0x4014dc20
3 3 0 100 FIFO Task - Running 0000000000000000 0067496 36.8% nsh_main
After:
nsh> ps
TID PID PPID PRI POLICY TYPE NPX STATE EVENT SIGMASK STACK CPU COMMAND
0 0 0 0 FIFO Kthread - Ready 0000000000000000 0069584 100.0% Idle_Task
1 0 0 224 FIFO Kthread - Waiting Semaphore 0000000000000000 0067456 0.0% sim_loop_wq 0x7646932003f0 0x764693200470
2 0 0 224 FIFO Kthread - Waiting Semaphore 0000000000000000 0067464 0.0% hpwork 0x4014dba0 0x4014dc20
3 3 0 100 FIFO Task - Running 0000000000000000 0067496 0.0% nsh_main
This issue was introduced by PR #17075, where the run_start update for the
target task was omitted in the SCHED_CPULOAD_CRITMONITOR branch.
Signed-off-by: chao an <anchao.archer@bytedance.com>
Fix the issue where clock_gettime(CLOCK_MONOTONIC) always returns 0 in
tickless mode, caused by the scheduler tick counter (g_system_ticks) not
being updated with the actual timer ticks.
1. Add clock_update_sched_ticks() function to sched/clock/clock_sched_ticks.c:
a. This function directly sets the system tick counter to a specific value
(vs incrementing in clock_increase_sched_ticks), with full documentation
matching the existing code style.
b. Uses seqlock to ensure thread-safe access to g_system_ticks.
2. Call clock_update_sched_ticks() in nxsched_process_timer() (sched_processtickless.c):
a. Syncs the scheduler tick counter with the actual timer ticks retrieved via up_timer_gettick().
With this fix, g_system_ticks is properly updated in tickless mode,
and clock_gettime(CLOCK_MONOTONIC) returns the correct non-zero monotonic time.
Signed-off-by: chao an <anchao.archer@bytedance.com>
Enable NTFC for qemu-armv8a (arm64).
QEMU for aarch64 architecture should be already on Docker image,
so it should work.
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Include information about installing PlantUML for the build process now
that it has been included for UML diagram rendering.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
Don't export pytest.debug.log in CI artifacts.
In case of an exception returned by ntfc, this file may
not be present. A future version of ntfc will place this
file in the "results" dir, so it will be exported anyway.
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
- Introduced Kconfig options for stdbit.h, allowing architecture-specific and generic implementations.
- Added new documentation for stdbit.h, detailing its usage and configuration.
- Updated CMake and Makefile to handle the inclusion of stdbit.h based on configuration settings.
This enhances the NuttX library with optional C23 bit manipulation utilities, improving functionality for architectures that support it.
Signed-off-by: Arjav Patel <arjav1528@gmail.com>
Update the nrf24l01_ioctl function to fully comply with the common wireless
character driver interface defined in nuttx/wireless/ioctl.h, and complete
previously unimplemented device-specific commands.
* Add support for WLIOC_SETRADIOFREQ and WLIOC_GETRADIOFREQ with
quantitative conversion between Hz (API) and MHz (Hardware).
* Add support for WLIOC_SETTXPOWER, WLIOC_GETTXPOWER, WLIOC_SETFINEPOWER,
and WLIOC_GETFINEPOWER.
* Add WLIOC_SETMODU and WLIOC_GETMODU, strictly enforcing WLIOC_GFSK
modulation as required by the nRF24L01 physical layer.
* Map WLIOC_SETADDR and WLIOC_GETADDR to the existing TX address routines.
* Resolve -ENOSYS in NRF24L01IOC_GETRETRCFG by reading the
NRF24L01_SETUP_RETR register and decoding ARD/ARC shift bits.
* Resolve -ENOSYS in NRF24L01IOC_GETDATARATE by parsing RF_DR_LOW and
RF_DR_HIGH bits from the NRF24L01_RF_SETUP register.
Signed-off-by: Chip L. <chplee@gmail.com>
I0680e48d8ff8847c8712e1a54efe32d320e7c84d changes the scope of the symbol definition.
So nxgdb needs to synchronize this modification.
Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
Commit 6ed4ea63d renamed the function `mm_initialize` to
`mm_initialize_heap`.
This caused the pynuttx modules (e.g. `mm dump`) to be missing.
Signed-off-by: Lars Kruse <devel@sumpfralle.de>
This commit implements a compile-time warning and in-code comment
warning for legacy sensor drivers. This is intended to:
- Warn users that legacy drivers may eventually be removed
- Warn developers that they should not use a legacy driver as a
reference for their new driver contributions
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
This patch adds defconfig example to The Custom Boards How-To guide.
The command specified in this guide which runs configure script fails
if the defconfig file does not exists; the guide did not mention this
file at all.
If the file exists but is empty, the configure script fails and leaves
the system in a broken state which is somewhat difficult to deal with.
(Subsequent attempts to configure fail but so do attempts to distclean.)
To resolve this, this patch adds a minimal defconfig example which
should be sufficient for the configure script to do its work correctly.
Signed-off-by: Kerogit <kr.git@kerogit.eu>
This patch fixes formatting error in desription of High Resolution Timer.
Using indentation to (presumably) align non-bold text right of the bold
text did not have the desired effect, instead the line was split into two
and the second line was handled as an indented paragraph.
Signed-off-by: Kerogit <kr.git@kerogit.eu>
This patch fixes a typo in a comment. (Tested: checkpatch - all checks
pass, compilation yields binary with identical SHA256 checksum
with and without the patch.)
Signed-off-by: Kerogit <kr.git@kerogit.eu>
Add board support for the NXP i.MX93 QSB targeting the Cortex-M33
core. Three configurations are provided:
- nsh: run from ITCM (128 kB), LPUART2 console
- nsh-ddr: run from DDR, LPUART2 console
- rpmsg: run from ITCM, RPMsg/OpenAMP transport, NSH on
/dev/tty-nsh via RPMSG_UART_RAW
Linker scripts:
- itcm.ld: vectors + text in ITCM, data in DTCM
- ddr.ld: vectors + text + data in DDR (0x89000000, 16 MB)
Tool to enable local debug interface through USB.
Signed-off-by: Maarten Zanders <maarten@zanders.be>
Add hardware register headers and driver support for the NXP i.MX93
Cortex-M33 core. All new and modified code is guarded by
ARCH_CHIP_IMX93_M33 preprocessor defines; existing i.MX95-M7 builds
are unaffected.
New drivers:
- imx9_xcache.c - off core cache init and maintenance
- imx9_ccm.c - generic CCM abstraction layer
Signed-off-by: Maarten Zanders <maarten@zanders.be>
Rename imx95_mu_* functions to imx9_mu_*, decoupling the MU driver
API from the iMX95-specific naming in preparation for iMX93-M33
support.
Add ARCH_CHIP_IMX95_M7 dependency to the MU instance Kconfig entries
so they are only visible for the appropriate target.
Switch imx9_mu.c to include the generic imx9_memorymap.h instead of
the imx95-specific header.
Fix incorrect help text for MU8 (was copy-pasted from MU5).
Signed-off-by: Maarten Zanders <maarten@zanders.be>
Extract chip-specific constants from imx9_rptun.c and imx9_rsctable.c
into new dispatch headers:
- hardware/imx9_rsctable.h: VDEV0_VRING_BASE and RESOURCE_TABLE_BASE,
selected per ARCH_CHIP define
- hardware/imx9_rptun.h: MU_INSTANCE, selected per ARCH_CHIP define
Rename the misnamed VRING_SHMEM constant in imx9_rptun.c to
RESOURCE_TABLE_BASE, which correctly reflects that this address points
to the resource table, not the vring shared memory region.
No functional change for i.MX95-M7 builds.
Signed-off-by: Maarten Zanders <maarten@zanders.be>
Use NVIC_IRQ_ENABLE(n) and NVIC_IRQ_PRIORITY(n) macros in
imx9_dumpnvic() to iterate over all NVIC registers programmatically
based on CONFIG_ARCH_NINTS (IMX9_IRQ_NEXTINT), rather than
enumerating named per-range register defines. Output is grouped
4-per-line for priority and 4-per-line for enable registers,
matching the original layout.
This avoids accessing registers which don't exist when extending
the interrupt count.
Also replace named NVIC_IRQxx_yy_ENABLE constants in imx9_irqinfo()
with NVIC_IRQ_ENABLE(n), avoiding naming conflicts between chips
with different IRQ counts.
Fix the upper boundary in the >192 IRQ branch from 219 to 224 to
align with the 32-interrupt register granularity.
Change %08x to %08lx to silence warnings from the compiler for
the debug dump.
No functional change for existing i.MX95-M7 builds.
Signed-off-by: Maarten Zanders <maarten@zanders.be>
The GPIO mux range check in imx9_iomux_gpio() used a hardcoded
IOMUXC_MUX_CTL_GPIO_IO37_OFFSET as the upper bound, which is
i.MX95-specific. Move the define to imx95_iomuxc.h as an alias of
the last GPIO_IO entry, and use the named constant in the comparison.
No functional change; i.MX95 builds are unaffected.
Signed-off-by: Maarten Zanders <maarten@zanders.be>
- Guard imx9_gpc.h inclusion with CONFIG_IMX9_WFI_AWAKES_AT_SYSTICK
to avoid a GPC dependency on chips that lack GPC
- Add depends on ARCH_CHIP_IMX95_M7 to IMX9_WFI_AWAKES_AT_SYSTICK
since GPC wake configuration is i.MX95-specific
- Move XTAL_FREQ and ROOT_CLOCK_OFFSET defines to imx95_clock.h
- Make imx9_sm_setrootclock() and imx9_sm_getipfreq() static;
they are not referenced outside this translation unit
Signed-off-by: Maarten Zanders <maarten@zanders.be>
When the mempool uses the waitsem semaphore for memory allocation,
the flowing two conditions must be satisfied simultaneously:
its wait variable is set to true, and the expandsize variable is set to 0
Signed-off-by: zhanxiaoqi <zhanxiaoqi@bytedance.com>
When testing tickless scheme with default arm_systick.c, we found the
count writed to systick register is too smaller the expected, just the
ticks not count, and os runing abnormally with too much interrupter.
Add necessary coversion, then system run well.
Signed-off-by: taoliu <taoliu@asrmicro.com>
The X11 event loop in the POSIX simulator was processing MotionNotify
(touch/mouse movement)and ButtonPress/ButtonRelease events unconditionally,
even when the touchscreen feature(CONFIG_SIM_TOUCHSCREEN) was disabled.
This could lead to unnecessary event processing, potential compiler warnings
about unusedfunctions (e.g., sim_buttonevent), or unintended behavior in simulator
builds withouttouchscreen support. The touchscreen-related event handling should
only be active whenthe corresponding configuration is enabled.
This fix wraps the MotionNotify and ButtonPress/ButtonRelease event handling
logicwith #ifdef CONFIG_SIM_TOUCHSCREEN guards to:
1. Ensure touchscreen/mouse event processing is only compiled when CONFIG_SIM_TOUCHSCREEN is enabled.
2. Eliminate unused code warnings in non-touchscreen simulator builds.
3. Align event loop behavior with the configured feature set, reducing unnecessary runtime overhead.
The change maintains full touchscreen functionality when the config is enabled, whilecleaning up the
code path for builds that don't require touchscreen support.
Signed-off-by: chao an <anchao.archer@bytedance.com>
