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arch/mips/pic32mz: record the running task on interrupt exit.

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pic32mz_decodeirq() saves the interrupted context to the TCB in
g_running_tasks[], but never updated g_running_tasks[] after a context
switch.  It kept pointing at the Idle task from nx_start(), so every
interrupt overwrote the Idle task's saved registers, and after up_exit()
set it to NULL no context was saved at all.  The next context switch
then restored stale registers; on PIC32MZ-W1 the system crashed as soon
as the netinit thread exited.

Set g_running_tasks[] to this_task() before returning, as the other
architectures do.

Assisted-by: Claude Code:claude-opus-5-5
Signed-off-by: Daniel P. Carvalho <danieloak@gmail.com>
This commit is contained in:
Daniel P. Carvalho 2026-10-03 19:14:04 -03:00 • committed by Alan C. Assis
parent 9cf38e7fbe
commit 7956039dfd
1 changed files with 7 additions and 0 deletions
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7
arch/mips/src/pic32mz/pic32mz_decodeirq.c
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@ -36,6 +36,7 @@
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include <sched/sched.h>
#include "mips_internal.h"
#include "hardware/pic32mz_int.h"
@ -141,6 +142,12 @@ uint32_t *pic32mz_decodeirq(uint32_t *regs)
regs = up_current_regs();
/* Record the task that will run when the interrupt returns. Its state
* is saved to its TCB on the next interrupt entry (see above).
*/
*running_task = this_task();
#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
/* Check for a context switch. If a context switch occurred, then
* g_current_regs will have a different value than it did on entry. If an